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git.proxmox.com Git - mirror_edk2.git/blob - MdeModulePkg/Bus/Pci/UhciDxe/UhciReg.h
3 Copyright (c) 2007, Intel Corporation
4 All rights reserved. This program and the accompanying materials
5 are licensed and made available under the terms and conditions of the BSD License
6 which accompanies this distribution. The full text of the license may be found at
7 http://opensource.org/licenses/bsd-license.php
9 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
10 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
18 The definition for UHCI register operation routines.
25 #ifndef _EFI_UHCI_REG_H_
26 #define _EFI_UHCI_REG_H_
28 #define BIT(a) (1 << (a))
31 UHCI_FRAME_NUM
= 1024,
34 // Register offset and PCI related staff
37 USBBASE_OFFSET
= 0x20,
39 PCI_CLASSC_PI_UHCI
= 0x00,
44 USBPORTSC_OFFSET
= 0x10,
45 USB_FRAME_NO_OFFSET
= 6,
46 USB_FRAME_BASE_OFFSET
= 8,
47 USB_EMULATION_OFFSET
= 0xC0,
52 SETUP_PACKET_ID
= 0x2D,
53 INPUT_PACKET_ID
= 0x69,
54 OUTPUT_PACKET_ID
= 0xE1,
55 ERROR_PACKET_ID
= 0x55,
58 // USB port status and control bit definition.
60 USBPORTSC_CCS
= BIT(0), // Current Connect Status
61 USBPORTSC_CSC
= BIT(1), // Connect Status Change
62 USBPORTSC_PED
= BIT(2), // Port Enable / Disable
63 USBPORTSC_PEDC
= BIT(3), // Port Enable / Disable Change
64 USBPORTSC_LSL
= BIT(4), // Line Status Low BIT
65 USBPORTSC_LSH
= BIT(5), // Line Status High BIT
66 USBPORTSC_RD
= BIT(6), // Resume Detect
67 USBPORTSC_LSDA
= BIT(8), // Low Speed Device Attached
68 USBPORTSC_PR
= BIT(9), // Port Reset
69 USBPORTSC_SUSP
= BIT(12), // Suspend
71 USB_MAX_ROOTHUB_PORT
= 0x0F, // Max number of root hub port
74 // Command register bit definitions
76 USBCMD_RS
= BIT(0), // Run/Stop
77 USBCMD_HCRESET
= BIT(1), // Host reset
78 USBCMD_GRESET
= BIT(2), // Global reset
79 USBCMD_EGSM
= BIT(3), // Global Suspend Mode
80 USBCMD_FGR
= BIT(4), // Force Global Resume
81 USBCMD_SWDBG
= BIT(5), // SW Debug mode
82 USBCMD_CF
= BIT(6), // Config Flag (sw only)
83 USBCMD_MAXP
= BIT(7), // Max Packet (0 = 32, 1 = 64)
86 // USB Status register bit definitions
88 USBSTS_USBINT
= BIT(0), // Interrupt due to IOC
89 USBSTS_ERROR
= BIT(1), // Interrupt due to error
90 USBSTS_RD
= BIT(2), // Resume Detect
91 USBSTS_HSE
= BIT(3), // Host System Error
92 USBSTS_HCPE
= BIT(4), // Host Controller Process Error
93 USBSTS_HCH
= BIT(5), // HC Halted
95 USBTD_ACTIVE
= BIT(7), // TD is still active
96 USBTD_STALLED
= BIT(6), // TD is stalled
97 USBTD_BUFFERR
= BIT(5), // Buffer underflow or overflow
98 USBTD_BABBLE
= BIT(4), // Babble condition
99 USBTD_NAK
= BIT(3), // NAK is received
100 USBTD_CRC
= BIT(2), // CRC/Time out error
101 USBTD_BITSTUFF
= BIT(1) // Bit stuff error
108 @param PciIo The EFI_PCI_IO_PROTOCOL to use
109 @param Offset Register offset to USB_BAR_INDEX
111 @return Content of register
116 IN EFI_PCI_IO_PROTOCOL
*PciIo
,
124 Write data to UHCI register
126 @param PciIo The EFI_PCI_IO_PROTOCOL to use
127 @param Offset Register offset to USB_BAR_INDEX
128 @param Data Data to write
135 IN EFI_PCI_IO_PROTOCOL
*PciIo
,
144 Set a bit of the UHCI Register
146 @param PciIo The EFI_PCI_IO_PROTOCOL to use
147 @param Offset Register offset to USB_BAR_INDEX
148 @param Bit The bit to set
155 IN EFI_PCI_IO_PROTOCOL
*PciIo
,
164 Clear a bit of the UHCI Register
166 @param PciIo The PCI_IO protocol to access the PCI
167 @param Offset Register offset to USB_BAR_INDEX
168 @param Bit The bit to clear
175 IN EFI_PCI_IO_PROTOCOL
*PciIo
,
183 Clear all the interrutp status bits, these bits
186 @param Uhc The UHCI device
192 UhciAckAllInterrupt (
199 Stop the host controller
201 @param Uhc The UHCI device
202 @param Timeout Max time allowed
204 @retval EFI_SUCCESS The host controller is stopped
205 @retval EFI_TIMEOUT Failed to stop the host controller
218 Check whether the host controller operates well
220 @param PciIo The PCI_IO protocol to use
222 @retval TRUE Host controller is working
223 @retval FALSE Host controller is halted or system error
228 IN EFI_PCI_IO_PROTOCOL
*PciIo
234 Set the UHCI frame list base address. It can't use
235 UhciWriteReg which access memory in UINT16.
237 @param PciIo The EFI_PCI_IO_PROTOCOL to use
238 @param Addr Address to set
244 UhciSetFrameListBaseAddr (
245 IN EFI_PCI_IO_PROTOCOL
*PciIo
,
252 Disable USB Emulation
254 @param PciIo The EFI_PCI_IO_PROTOCOL protocol to use
260 UhciTurnOffUsbEmulation (
261 IN EFI_PCI_IO_PROTOCOL
*PciIo