2 PEIM to produce gPeiUsbHostControllerPpiGuid based on gPeiUsbControllerPpiGuid
3 which is used to enable recovery function from USB Drivers.
5 Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved. <BR>
7 This program and the accompanying materials
8 are licensed and made available under the terms and conditions
9 of the BSD License which accompanies this distribution. The
10 full text of the license may be found at
11 http://opensource.org/licenses/bsd-license.php
13 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
14 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
21 Stop the host controller.
23 @param Uhc The UHCI device.
24 @param Timeout Max time allowed.
26 @retval EFI_SUCCESS The host controller is stopped.
27 @retval EFI_TIMEOUT Failed to stop the host controller.
36 UINT16 CommandContent
;
40 CommandContent
= USBReadPortW (Uhc
, Uhc
->UsbHostControllerBaseAddress
+ USBCMD
);
41 CommandContent
&= USBCMD_RS
;
42 USBWritePortW (Uhc
, Uhc
->UsbHostControllerBaseAddress
+ USBCMD
, CommandContent
);
45 // ensure the HC is in halt status after send the stop command
46 // Timeout is in us unit.
48 for (Index
= 0; Index
< (Timeout
/ 50) + 1; Index
++) {
49 UsbSts
= USBReadPortW (Uhc
, Uhc
->UsbHostControllerBaseAddress
+ USBSTS
);
51 if ((UsbSts
& USBSTS_HCH
) == USBSTS_HCH
) {
55 MicroSecondDelay (50);
62 One notified function to stop the Host Controller at the end of PEI
64 @param[in] PeiServices Pointer to PEI Services Table.
65 @param[in] NotifyDescriptor Pointer to the descriptor for the Notification event that
66 caused this function to execute.
67 @param[in] Ppi Pointer to the PPI data associated with this function.
69 @retval EFI_SUCCESS The function completes successfully
75 IN EFI_PEI_SERVICES
**PeiServices
,
76 IN EFI_PEI_NOTIFY_DESCRIPTOR
*NotifyDescriptor
,
82 Uhc
= PEI_RECOVERY_USB_UHC_DEV_FROM_THIS_NOTIFY (NotifyDescriptor
);
85 // Stop the Host Controller
87 UhciStopHc (Uhc
, 1000 * 1000);
93 Initializes Usb Host Controller.
95 @param FileHandle Handle of the file being invoked.
96 @param PeiServices Describes the list of possible PEI Services.
98 @retval EFI_SUCCESS PPI successfully installed.
99 @retval EFI_OUT_OF_RESOURCES Can't allocate memory resource.
105 IN EFI_PEI_FILE_HANDLE FileHandle
,
106 IN CONST EFI_PEI_SERVICES
**PeiServices
109 PEI_USB_CONTROLLER_PPI
*ChipSetUsbControllerPpi
;
112 UINTN ControllerType
;
116 EFI_PHYSICAL_ADDRESS TempPtr
;
119 // Shadow this PEIM to run from memory
121 if (!EFI_ERROR (PeiServicesRegisterForShadow (FileHandle
))) {
125 Status
= PeiServicesLocatePpi (
126 &gPeiUsbControllerPpiGuid
,
129 (VOID
**) &ChipSetUsbControllerPpi
132 // If failed to locate, it is a bug in dispather as depex has gPeiUsbControllerPpiGuid.
134 ASSERT_EFI_ERROR (Status
);
138 Status
= ChipSetUsbControllerPpi
->GetUsbController (
139 (EFI_PEI_SERVICES
**) PeiServices
,
140 ChipSetUsbControllerPpi
,
146 // When status is error, meant no controller is found
148 if (EFI_ERROR (Status
)) {
153 // This PEIM is for UHC type controller.
155 if (ControllerType
!= PEI_UHCI_CONTROLLER
) {
160 MemPages
= sizeof (USB_UHC_DEV
) / EFI_PAGE_SIZE
+ 1;
162 Status
= PeiServicesAllocatePages (
167 if (EFI_ERROR (Status
)) {
168 return EFI_OUT_OF_RESOURCES
;
171 UhcDev
= (USB_UHC_DEV
*) ((UINTN
) TempPtr
);
172 UhcDev
->Signature
= USB_UHC_DEV_SIGNATURE
;
173 IoMmuInit (&UhcDev
->IoMmu
);
174 UhcDev
->UsbHostControllerBaseAddress
= (UINT32
) BaseAddress
;
177 // Init local memory management service
179 Status
= InitializeMemoryManagement (UhcDev
);
180 if (EFI_ERROR (Status
)) {
185 // Initialize Uhc's hardware
187 Status
= InitializeUsbHC (UhcDev
);
188 if (EFI_ERROR (Status
)) {
192 UhcDev
->UsbHostControllerPpi
.ControlTransfer
= UhcControlTransfer
;
193 UhcDev
->UsbHostControllerPpi
.BulkTransfer
= UhcBulkTransfer
;
194 UhcDev
->UsbHostControllerPpi
.GetRootHubPortNumber
= UhcGetRootHubPortNumber
;
195 UhcDev
->UsbHostControllerPpi
.GetRootHubPortStatus
= UhcGetRootHubPortStatus
;
196 UhcDev
->UsbHostControllerPpi
.SetRootHubPortFeature
= UhcSetRootHubPortFeature
;
197 UhcDev
->UsbHostControllerPpi
.ClearRootHubPortFeature
= UhcClearRootHubPortFeature
;
199 UhcDev
->PpiDescriptor
.Flags
= (EFI_PEI_PPI_DESCRIPTOR_PPI
| EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST
);
200 UhcDev
->PpiDescriptor
.Guid
= &gPeiUsbHostControllerPpiGuid
;
201 UhcDev
->PpiDescriptor
.Ppi
= &UhcDev
->UsbHostControllerPpi
;
203 Status
= PeiServicesInstallPpi (&UhcDev
->PpiDescriptor
);
204 if (EFI_ERROR (Status
)) {
209 UhcDev
->EndOfPeiNotifyList
.Flags
= (EFI_PEI_PPI_DESCRIPTOR_NOTIFY_CALLBACK
| EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST
);
210 UhcDev
->EndOfPeiNotifyList
.Guid
= &gEfiEndOfPeiSignalPpiGuid
;
211 UhcDev
->EndOfPeiNotifyList
.Notify
= UhcEndOfPei
;
213 PeiServicesNotifyPpi (&UhcDev
->EndOfPeiNotifyList
);
222 Submits control transfer to a target USB device.
224 @param PeiServices The pointer of EFI_PEI_SERVICES.
225 @param This The pointer of PEI_USB_HOST_CONTROLLER_PPI.
226 @param DeviceAddress The target device address.
227 @param DeviceSpeed Target device speed.
228 @param MaximumPacketLength Maximum packet size the default control transfer
229 endpoint is capable of sending or receiving.
230 @param Request USB device request to send.
231 @param TransferDirection Specifies the data direction for the data stage.
232 @param Data Data buffer to be transmitted or received from USB device.
233 @param DataLength The size (in bytes) of the data buffer.
234 @param TimeOut Indicates the maximum timeout, in millisecond.
235 If Timeout is 0, then the caller must wait for the function
236 to be completed until EFI_SUCCESS or EFI_DEVICE_ERROR is returned.
237 @param TransferResult Return the result of this control transfer.
239 @retval EFI_SUCCESS Transfer was completed successfully.
240 @retval EFI_OUT_OF_RESOURCES The transfer failed due to lack of resources.
241 @retval EFI_INVALID_PARAMETER Some parameters are invalid.
242 @retval EFI_TIMEOUT Transfer failed due to timeout.
243 @retval EFI_DEVICE_ERROR Transfer failed due to host controller or device error.
249 IN EFI_PEI_SERVICES
**PeiServices
,
250 IN PEI_USB_HOST_CONTROLLER_PPI
*This
,
251 IN UINT8 DeviceAddress
,
252 IN UINT8 DeviceSpeed
,
253 IN UINT8 MaximumPacketLength
,
254 IN EFI_USB_DEVICE_REQUEST
*Request
,
255 IN EFI_USB_DATA_DIRECTION TransferDirection
,
256 IN OUT VOID
*Data OPTIONAL
,
257 IN OUT UINTN
*DataLength OPTIONAL
,
259 OUT UINT32
*TransferResult
268 TD_STRUCT
*PtrSetupTD
;
269 TD_STRUCT
*PtrStatusTD
;
278 UhcDev
= PEI_RECOVERY_USB_UHC_DEV_FROM_UHCI_THIS (This
);
280 StatusReg
= UhcDev
->UsbHostControllerBaseAddress
+ USBSTS
;
282 PktID
= INPUT_PACKET_ID
;
284 if (Request
== NULL
|| TransferResult
== NULL
) {
285 return EFI_INVALID_PARAMETER
;
288 // if errors exist that cause host controller halt,
289 // then return EFI_DEVICE_ERROR.
292 if (!IsStatusOK (UhcDev
, StatusReg
)) {
293 ClearStatusReg (UhcDev
, StatusReg
);
294 *TransferResult
= EFI_USB_ERR_SYSTEM
;
295 return EFI_DEVICE_ERROR
;
298 ClearStatusReg (UhcDev
, StatusReg
);
301 // Map the Request and data for bus master access,
302 // then create a list of TD for this transfer
304 Status
= UhciMapUserRequest (UhcDev
, Request
, &RequestPhy
, &RequestMap
);
305 if (EFI_ERROR (Status
)) {
309 Status
= UhciMapUserData (UhcDev
, TransferDirection
, Data
, DataLength
, &PktID
, &DataPhy
, &DataMap
);
311 if (EFI_ERROR (Status
)) {
312 if (RequestMap
!= NULL
) {
313 IoMmuUnmap (UhcDev
->IoMmu
, RequestMap
);
319 // generate Setup Stage TD
322 PtrQH
= UhcDev
->ConfigQH
;
331 (UINT8
) sizeof (EFI_USB_DEVICE_REQUEST
),
336 // link setup TD structures to QH structure
338 LinkTDToQH (PtrQH
, PtrSetupTD
);
340 PtrPreTD
= PtrSetupTD
;
343 // Data Stage of Control Transfer
346 if (TransferDirection
== EfiUsbNoData
) {
349 DataLen
= (UINT32
) *DataLength
;
355 while (DataLen
> 0) {
357 // create TD structures and link together
362 // PacketSize is the data load size of each TD carries.
364 PacketSize
= (UINT8
) DataLen
;
365 if (DataLen
> MaximumPacketLength
) {
366 PacketSize
= MaximumPacketLength
;
383 // Link two TDs in vertical depth
385 LinkTDToTD (PtrPreTD
, PtrTD
);
389 Data
= (VOID
*) ((UINT8
*) Data
+ PacketSize
);
390 DataPhy
+= PacketSize
;
391 DataLen
-= PacketSize
;
395 // PtrPreTD points to the last TD before the Setup-Stage TD.
400 // Status Stage of Control Transfer
402 if (PktID
== OUTPUT_PACKET_ID
) {
403 PktID
= INPUT_PACKET_ID
;
405 PktID
= OUTPUT_PACKET_ID
;
408 // create Status Stage TD structure
419 LinkTDToTD (PtrPreTD
, PtrStatusTD
);
422 // Poll QH-TDs execution and get result.
423 // detail status is returned
425 Status
= ExecuteControlTransfer (
434 // TRUE means must search other framelistindex
436 SetQHVerticalValidorInvalid(PtrQH
, FALSE
);
437 DeleteQueuedTDs (UhcDev
, PtrSetupTD
);
440 // if has errors that cause host controller halt, then return EFI_DEVICE_ERROR directly.
442 if (!IsStatusOK (UhcDev
, StatusReg
)) {
443 *TransferResult
|= EFI_USB_ERR_SYSTEM
;
444 Status
= EFI_DEVICE_ERROR
;
447 ClearStatusReg (UhcDev
, StatusReg
);
449 if (DataMap
!= NULL
) {
450 IoMmuUnmap (UhcDev
->IoMmu
, DataMap
);
452 if (RequestMap
!= NULL
) {
453 IoMmuUnmap (UhcDev
->IoMmu
, RequestMap
);
460 Submits bulk transfer to a bulk endpoint of a USB device.
462 @param PeiServices The pointer of EFI_PEI_SERVICES.
463 @param This The pointer of PEI_USB_HOST_CONTROLLER_PPI.
464 @param DeviceAddress Target device address.
465 @param EndPointAddress Endpoint number and its direction in bit 7.
466 @param MaximumPacketLength Maximum packet size the endpoint is capable of
467 sending or receiving.
468 @param Data Array of pointers to the buffers of data to transmit
469 from or receive into.
470 @param DataLength The lenght of the data buffer.
471 @param DataToggle On input, the initial data toggle for the transfer;
472 On output, it is updated to to next data toggle to use of
473 the subsequent bulk transfer.
474 @param TimeOut Indicates the maximum time, in millisecond, which the
475 transfer is allowed to complete.
476 If Timeout is 0, then the caller must wait for the function
477 to be completed until EFI_SUCCESS or EFI_DEVICE_ERROR is returned.
478 @param TransferResult A pointer to the detailed result information of the
481 @retval EFI_SUCCESS The transfer was completed successfully.
482 @retval EFI_OUT_OF_RESOURCES The transfer failed due to lack of resource.
483 @retval EFI_INVALID_PARAMETER Parameters are invalid.
484 @retval EFI_TIMEOUT The transfer failed due to timeout.
485 @retval EFI_DEVICE_ERROR The transfer failed due to host controller error.
491 IN EFI_PEI_SERVICES
**PeiServices
,
492 IN PEI_USB_HOST_CONTROLLER_PPI
*This
,
493 IN UINT8 DeviceAddress
,
494 IN UINT8 EndPointAddress
,
495 IN UINT8 MaximumPacketLength
,
497 IN OUT UINTN
*DataLength
,
498 IN OUT UINT8
*DataToggle
,
500 OUT UINT32
*TransferResult
509 TD_STRUCT
*PtrFirstTD
;
519 EFI_USB_DATA_DIRECTION TransferDirection
;
521 BOOLEAN ShortPacketEnable
;
523 UINT16 CommandContent
;
528 UhcDev
= PEI_RECOVERY_USB_UHC_DEV_FROM_UHCI_THIS (This
);
531 // Enable the maximum packet size (64bytes)
532 // that can be used for full speed bandwidth reclamation
533 // at the end of a frame.
535 CommandContent
= USBReadPortW (UhcDev
, UhcDev
->UsbHostControllerBaseAddress
+ USBCMD
);
536 if ((CommandContent
& USBCMD_MAXP
) != USBCMD_MAXP
) {
537 CommandContent
|= USBCMD_MAXP
;
538 USBWritePortW (UhcDev
, UhcDev
->UsbHostControllerBaseAddress
+ USBCMD
, CommandContent
);
541 StatusReg
= UhcDev
->UsbHostControllerBaseAddress
+ USBSTS
;
544 // these code lines are added here per complier's strict demand
546 PktID
= INPUT_PACKET_ID
;
552 ShortPacketEnable
= FALSE
;
554 if ((DataLength
== 0) || (Data
== NULL
) || (TransferResult
== NULL
)) {
555 return EFI_INVALID_PARAMETER
;
558 if ((*DataToggle
!= 1) && (*DataToggle
!= 0)) {
559 return EFI_INVALID_PARAMETER
;
562 if (MaximumPacketLength
!= 8 && MaximumPacketLength
!= 16
563 && MaximumPacketLength
!= 32 && MaximumPacketLength
!= 64) {
564 return EFI_INVALID_PARAMETER
;
567 // if has errors that cause host controller halt, then return EFI_DEVICE_ERROR directly.
569 if (!IsStatusOK (UhcDev
, StatusReg
)) {
571 ClearStatusReg (UhcDev
, StatusReg
);
572 *TransferResult
= EFI_USB_ERR_SYSTEM
;
573 return EFI_DEVICE_ERROR
;
576 ClearStatusReg (UhcDev
, StatusReg
);
579 // Map the source data buffer for bus master access,
580 // then create a list of TDs
582 if ((EndPointAddress
& 0x80) != 0) {
583 TransferDirection
= EfiUsbDataIn
;
585 TransferDirection
= EfiUsbDataOut
;
588 Status
= UhciMapUserData (UhcDev
, TransferDirection
, Data
, DataLength
, &PktID
, &DataPhy
, &DataMap
);
590 if (EFI_ERROR (Status
)) {
594 DataLen
= (UINT32
) *DataLength
;
596 PtrQH
= UhcDev
->BulkQH
;
599 while (DataLen
> 0) {
601 // create TD structures and link together
605 PacketSize
= (UINT8
) DataLen
;
606 if (DataLen
> MaximumPacketLength
) {
607 PacketSize
= MaximumPacketLength
;
619 USB_FULL_SPEED_DEVICE
,
624 // Enable short packet detection.
625 // (default action is disabling short packet detection)
627 if (ShortPacketEnable
) {
628 EnableorDisableTDShortPacket (PtrTD
, TRUE
);
633 PtrFirstTD
->PtrNextTD
= NULL
;
637 // Link two TDs in vertical depth
639 LinkTDToTD (PtrPreTD
, PtrTD
);
645 Data
= (VOID
*) ((UINT8
*) Data
+ PacketSize
);
646 DataPhy
+= PacketSize
;
647 DataLen
-= PacketSize
;
650 // link TD structures to QH structure
652 LinkTDToQH (PtrQH
, PtrFirstTD
);
655 // Execute QH-TD and get result
658 // detail status is put into the Result field in the pIRP
659 // the Data Toggle value is also re-updated to the value
660 // of the last successful TD
662 Status
= ExecBulkTransfer (
672 // Delete Bulk transfer TD structure
674 DeleteQueuedTDs (UhcDev
, PtrFirstTD
);
677 // if has errors that cause host controller halt, then return EFI_DEVICE_ERROR directly.
679 if (!IsStatusOK (UhcDev
, StatusReg
)) {
680 *TransferResult
|= EFI_USB_ERR_SYSTEM
;
681 Status
= EFI_DEVICE_ERROR
;
684 ClearStatusReg (UhcDev
, StatusReg
);
686 if (DataMap
!= NULL
) {
687 IoMmuUnmap (UhcDev
->IoMmu
, DataMap
);
694 Retrieves the number of root hub ports.
696 @param[in] PeiServices The pointer to the PEI Services Table.
697 @param[in] This The pointer to this instance of the
698 PEI_USB_HOST_CONTROLLER_PPI.
699 @param[out] PortNumber The pointer to the number of the root hub ports.
701 @retval EFI_SUCCESS The port number was retrieved successfully.
702 @retval EFI_INVALID_PARAMETER PortNumber is NULL.
707 UhcGetRootHubPortNumber (
708 IN EFI_PEI_SERVICES
**PeiServices
,
709 IN PEI_USB_HOST_CONTROLLER_PPI
*This
,
710 OUT UINT8
*PortNumber
715 UINT16 RHPortControl
;
718 UhcDev
= PEI_RECOVERY_USB_UHC_DEV_FROM_UHCI_THIS (This
);
720 if (PortNumber
== NULL
) {
721 return EFI_INVALID_PARAMETER
;
726 for (Index
= 0; Index
< 2; Index
++) {
727 PSAddr
= UhcDev
->UsbHostControllerBaseAddress
+ USBPORTSC1
+ Index
* 2;
728 RHPortControl
= USBReadPortW (UhcDev
, PSAddr
);
730 // Port Register content is valid
732 if (RHPortControl
!= 0xff) {
741 Retrieves the current status of a USB root hub port.
743 @param PeiServices The pointer of EFI_PEI_SERVICES.
744 @param This The pointer of PEI_USB_HOST_CONTROLLER_PPI.
745 @param PortNumber The root hub port to retrieve the state from.
746 @param PortStatus Variable to receive the port state.
748 @retval EFI_SUCCESS The status of the USB root hub port specified.
749 by PortNumber was returned in PortStatus.
750 @retval EFI_INVALID_PARAMETER PortNumber is invalid.
755 UhcGetRootHubPortStatus (
756 IN EFI_PEI_SERVICES
**PeiServices
,
757 IN PEI_USB_HOST_CONTROLLER_PPI
*This
,
759 OUT EFI_USB_PORT_STATUS
*PortStatus
765 UINT8 TotalPortNumber
;
767 if (PortStatus
== NULL
) {
768 return EFI_INVALID_PARAMETER
;
771 UhcGetRootHubPortNumber (PeiServices
, This
, &TotalPortNumber
);
772 if (PortNumber
> TotalPortNumber
) {
773 return EFI_INVALID_PARAMETER
;
776 UhcDev
= PEI_RECOVERY_USB_UHC_DEV_FROM_UHCI_THIS (This
);
777 PSAddr
= UhcDev
->UsbHostControllerBaseAddress
+ USBPORTSC1
+ PortNumber
* 2;
779 PortStatus
->PortStatus
= 0;
780 PortStatus
->PortChangeStatus
= 0;
782 RHPortStatus
= USBReadPortW (UhcDev
, PSAddr
);
785 // Current Connect Status
787 if ((RHPortStatus
& USBPORTSC_CCS
) != 0) {
788 PortStatus
->PortStatus
|= USB_PORT_STAT_CONNECTION
;
791 // Port Enabled/Disabled
793 if ((RHPortStatus
& USBPORTSC_PED
) != 0) {
794 PortStatus
->PortStatus
|= USB_PORT_STAT_ENABLE
;
799 if ((RHPortStatus
& USBPORTSC_SUSP
) != 0) {
800 PortStatus
->PortStatus
|= USB_PORT_STAT_SUSPEND
;
805 if ((RHPortStatus
& USBPORTSC_PR
) != 0) {
806 PortStatus
->PortStatus
|= USB_PORT_STAT_RESET
;
809 // Low Speed Device Attached
811 if ((RHPortStatus
& USBPORTSC_LSDA
) != 0) {
812 PortStatus
->PortStatus
|= USB_PORT_STAT_LOW_SPEED
;
815 // Fill Port Status Change bits
818 // Connect Status Change
820 if ((RHPortStatus
& USBPORTSC_CSC
) != 0) {
821 PortStatus
->PortChangeStatus
|= USB_PORT_STAT_C_CONNECTION
;
824 // Port Enabled/Disabled Change
826 if ((RHPortStatus
& USBPORTSC_PEDC
) != 0) {
827 PortStatus
->PortChangeStatus
|= USB_PORT_STAT_C_ENABLE
;
834 Sets a feature for the specified root hub port.
836 @param PeiServices The pointer of EFI_PEI_SERVICES
837 @param This The pointer of PEI_USB_HOST_CONTROLLER_PPI
838 @param PortNumber Root hub port to set.
839 @param PortFeature Feature to set.
841 @retval EFI_SUCCESS The feature specified by PortFeature was set.
842 @retval EFI_INVALID_PARAMETER PortNumber is invalid or PortFeature is invalid.
843 @retval EFI_TIMEOUT The time out occurred.
848 UhcSetRootHubPortFeature (
849 IN EFI_PEI_SERVICES
**PeiServices
,
850 IN PEI_USB_HOST_CONTROLLER_PPI
*This
,
852 IN EFI_USB_PORT_FEATURE PortFeature
857 UINT32 CommandRegAddr
;
858 UINT16 RHPortControl
;
859 UINT8 TotalPortNumber
;
861 UhcGetRootHubPortNumber (PeiServices
, This
, &TotalPortNumber
);
862 if (PortNumber
> TotalPortNumber
) {
863 return EFI_INVALID_PARAMETER
;
866 UhcDev
= PEI_RECOVERY_USB_UHC_DEV_FROM_UHCI_THIS (This
);
867 PSAddr
= UhcDev
->UsbHostControllerBaseAddress
+ USBPORTSC1
+ PortNumber
* 2;
868 CommandRegAddr
= UhcDev
->UsbHostControllerBaseAddress
+ USBCMD
;
870 RHPortControl
= USBReadPortW (UhcDev
, PSAddr
);
872 switch (PortFeature
) {
874 case EfiUsbPortSuspend
:
875 if ((USBReadPortW (UhcDev
, CommandRegAddr
) & USBCMD_EGSM
) == 0) {
877 // if global suspend is not active, can set port suspend
879 RHPortControl
&= 0xfff5;
880 RHPortControl
|= USBPORTSC_SUSP
;
884 case EfiUsbPortReset
:
885 RHPortControl
&= 0xfff5;
886 RHPortControl
|= USBPORTSC_PR
;
892 case EfiUsbPortPower
:
895 case EfiUsbPortEnable
:
896 RHPortControl
&= 0xfff5;
897 RHPortControl
|= USBPORTSC_PED
;
901 return EFI_INVALID_PARAMETER
;
904 USBWritePortW (UhcDev
, PSAddr
, RHPortControl
);
910 Clears a feature for the specified root hub port.
912 @param PeiServices The pointer of EFI_PEI_SERVICES.
913 @param This The pointer of PEI_USB_HOST_CONTROLLER_PPI.
914 @param PortNumber Specifies the root hub port whose feature
915 is requested to be cleared.
916 @param PortFeature Indicates the feature selector associated with the
917 feature clear request.
919 @retval EFI_SUCCESS The feature specified by PortFeature was cleared
920 for the USB root hub port specified by PortNumber.
921 @retval EFI_INVALID_PARAMETER PortNumber is invalid or PortFeature is invalid.
926 UhcClearRootHubPortFeature (
927 IN EFI_PEI_SERVICES
**PeiServices
,
928 IN PEI_USB_HOST_CONTROLLER_PPI
*This
,
930 IN EFI_USB_PORT_FEATURE PortFeature
935 UINT16 RHPortControl
;
936 UINT8 TotalPortNumber
;
938 UhcGetRootHubPortNumber (PeiServices
, This
, &TotalPortNumber
);
940 if (PortNumber
> TotalPortNumber
) {
941 return EFI_INVALID_PARAMETER
;
944 UhcDev
= PEI_RECOVERY_USB_UHC_DEV_FROM_UHCI_THIS (This
);
945 PSAddr
= UhcDev
->UsbHostControllerBaseAddress
+ USBPORTSC1
+ PortNumber
* 2;
947 RHPortControl
= USBReadPortW (UhcDev
, PSAddr
);
949 switch (PortFeature
) {
951 // clear PORT_ENABLE feature means disable port.
953 case EfiUsbPortEnable
:
954 RHPortControl
&= 0xfff5;
955 RHPortControl
&= ~USBPORTSC_PED
;
959 // clear PORT_SUSPEND feature means resume the port.
960 // (cause a resume on the specified port if in suspend mode)
962 case EfiUsbPortSuspend
:
963 RHPortControl
&= 0xfff5;
964 RHPortControl
&= ~USBPORTSC_SUSP
;
970 case EfiUsbPortPower
:
974 // clear PORT_RESET means clear the reset signal.
976 case EfiUsbPortReset
:
977 RHPortControl
&= 0xfff5;
978 RHPortControl
&= ~USBPORTSC_PR
;
982 // clear connect status change
984 case EfiUsbPortConnectChange
:
985 RHPortControl
&= 0xfff5;
986 RHPortControl
|= USBPORTSC_CSC
;
990 // clear enable/disable status change
992 case EfiUsbPortEnableChange
:
993 RHPortControl
&= 0xfff5;
994 RHPortControl
|= USBPORTSC_PEDC
;
998 // root hub does not support this request
1000 case EfiUsbPortSuspendChange
:
1004 // root hub does not support this request
1006 case EfiUsbPortOverCurrentChange
:
1010 // root hub does not support this request
1012 case EfiUsbPortResetChange
:
1016 return EFI_INVALID_PARAMETER
;
1019 USBWritePortW (UhcDev
, PSAddr
, RHPortControl
);
1027 @param UhcDev UHCI Device.
1029 @retval EFI_SUCCESS UHCI successfully initialized.
1030 @retval EFI_OUT_OF_RESOURCES Resource can not be allocated.
1035 IN USB_UHC_DEV
*UhcDev
1039 UINT32 FrameListBaseAddrReg
;
1044 // Create and Initialize Frame List For the Host Controller.
1046 Status
= CreateFrameList (UhcDev
);
1047 if (EFI_ERROR (Status
)) {
1051 FrameListBaseAddrReg
= UhcDev
->UsbHostControllerBaseAddress
+ USBFLBASEADD
;
1052 CommandReg
= UhcDev
->UsbHostControllerBaseAddress
+ USBCMD
;
1055 // Set Frame List Base Address to the specific register to inform the hardware.
1057 SetFrameListBaseAddress (UhcDev
, FrameListBaseAddrReg
, (UINT32
) (UINTN
) (UhcDev
->FrameListEntry
));
1059 Command
= USBReadPortW (UhcDev
, CommandReg
);
1060 Command
|= USBCMD_GRESET
;
1061 USBWritePortW (UhcDev
, CommandReg
, Command
);
1063 MicroSecondDelay (50 * 1000);
1066 Command
&= ~USBCMD_GRESET
;
1068 USBWritePortW (UhcDev
, CommandReg
, Command
);
1071 //UHCI spec page120 reset recovery time
1073 MicroSecondDelay (20 * 1000);
1076 // Set Run/Stop bit to 1.
1078 Command
= USBReadPortW (UhcDev
, CommandReg
);
1079 Command
|= USBCMD_RS
| USBCMD_MAXP
;
1080 USBWritePortW (UhcDev
, CommandReg
, Command
);
1086 Create Frame List Structure.
1088 @param UhcDev UHCI device.
1090 @retval EFI_OUT_OF_RESOURCES Can't allocate memory resources.
1091 @retval EFI_SUCCESS Success.
1100 EFI_PHYSICAL_ADDRESS FrameListBaseAddr
;
1101 FRAMELIST_ENTRY
*FrameListPtr
;
1105 // The Frame List ocupies 4K bytes,
1106 // and must be aligned on 4-Kbyte boundaries.
1108 Status
= PeiServicesAllocatePages (
1109 EfiBootServicesData
,
1114 if (Status
!= EFI_SUCCESS
) {
1115 return EFI_OUT_OF_RESOURCES
;
1119 //Create Control QH and Bulk QH and link them into Framelist Entry
1121 Status
= CreateQH(UhcDev
, &UhcDev
->ConfigQH
);
1122 if (Status
!= EFI_SUCCESS
) {
1123 return EFI_OUT_OF_RESOURCES
;
1125 ASSERT (UhcDev
->ConfigQH
!= NULL
);
1127 Status
= CreateQH(UhcDev
, &UhcDev
->BulkQH
);
1128 if (Status
!= EFI_SUCCESS
) {
1129 return EFI_OUT_OF_RESOURCES
;
1131 ASSERT (UhcDev
->BulkQH
!= NULL
);
1134 //Set the corresponding QH pointer
1136 SetQHHorizontalLinkPtr(UhcDev
->ConfigQH
, UhcDev
->BulkQH
);
1137 SetQHHorizontalQHorTDSelect (UhcDev
->ConfigQH
, TRUE
);
1138 SetQHHorizontalValidorInvalid (UhcDev
->ConfigQH
, TRUE
);
1140 UhcDev
->FrameListEntry
= (FRAMELIST_ENTRY
*) ((UINTN
) FrameListBaseAddr
);
1142 FrameListPtr
= UhcDev
->FrameListEntry
;
1144 for (Index
= 0; Index
< 1024; Index
++) {
1145 FrameListPtr
->FrameListPtrTerminate
= 0;
1146 FrameListPtr
->FrameListPtr
= (UINT32
)(UINTN
)UhcDev
->ConfigQH
>> 4;
1147 FrameListPtr
->FrameListPtrQSelect
= 1;
1148 FrameListPtr
->FrameListRsvd
= 0;
1156 Read a 16bit width data from Uhc HC IO space register.
1158 @param UhcDev The UHCI device.
1159 @param Port The IO space address of the register.
1161 @retval the register content read.
1166 IN USB_UHC_DEV
*UhcDev
,
1170 return IoRead16 (Port
);
1174 Write a 16bit width data into Uhc HC IO space register.
1176 @param UhcDev The UHCI device.
1177 @param Port The IO space address of the register.
1178 @param Data The data written into the register.
1183 IN USB_UHC_DEV
*UhcDev
,
1188 IoWrite16 (Port
, Data
);
1192 Write a 32bit width data into Uhc HC IO space register.
1194 @param UhcDev The UHCI device.
1195 @param Port The IO space address of the register.
1196 @param Data The data written into the register.
1201 IN USB_UHC_DEV
*UhcDev
,
1206 IoWrite32 (Port
, Data
);
1210 Clear the content of UHCI's Status Register.
1212 @param UhcDev The UHCI device.
1213 @param StatusAddr The IO space address of the register.
1218 IN USB_UHC_DEV
*UhcDev
,
1219 IN UINT32 StatusAddr
1223 // Clear the content of UHCI's Status Register
1225 USBWritePortW (UhcDev
, StatusAddr
, 0x003F);
1229 Check whether the host controller operates well.
1231 @param UhcDev The UHCI device.
1232 @param StatusRegAddr The io address of status register.
1234 @retval TRUE Host controller is working.
1235 @retval FALSE Host controller is halted or system error.
1240 IN USB_UHC_DEV
*UhcDev
,
1241 IN UINT32 StatusRegAddr
1246 StatusValue
= USBReadPortW (UhcDev
, StatusRegAddr
);
1248 if ((StatusValue
& (USBSTS_HCPE
| USBSTS_HSE
| USBSTS_HCH
)) != 0) {
1256 Get Current Frame Number.
1258 @param UhcDev The UHCI device.
1259 @param FrameNumberAddr The address of frame list register.
1261 @retval The content of the frame list register.
1265 GetCurrentFrameNumber (
1266 IN USB_UHC_DEV
*UhcDev
,
1267 IN UINT32 FrameNumberAddr
1271 // Gets value in the USB frame number register.
1273 return (UINT16
) (USBReadPortW (UhcDev
, FrameNumberAddr
) & 0x03FF);
1277 Set Frame List Base Address.
1279 @param UhcDev The UHCI device.
1280 @param FrameListRegAddr The address of frame list register.
1281 @param Addr The address of frame list table.
1285 SetFrameListBaseAddress (
1286 IN USB_UHC_DEV
*UhcDev
,
1287 IN UINT32 FrameListRegAddr
,
1292 // Sets value in the USB Frame List Base Address register.
1294 USBWritePortDW (UhcDev
, FrameListRegAddr
, (UINT32
) (Addr
& 0xFFFFF000));
1298 Create QH and initialize.
1300 @param UhcDev The UHCI device.
1301 @param PtrQH Place to store QH_STRUCT pointer.
1303 @retval EFI_OUT_OF_RESOURCES Can't allocate memory resources.
1304 @retval EFI_SUCCESS Success.
1309 IN USB_UHC_DEV
*UhcDev
,
1310 OUT QH_STRUCT
**PtrQH
1316 // allocate align memory for QH_STRUCT
1318 Status
= AllocateTDorQHStruct (UhcDev
, sizeof(QH_STRUCT
), (void **)PtrQH
);
1319 if (EFI_ERROR (Status
)) {
1320 return EFI_OUT_OF_RESOURCES
;
1323 // init each field of the QH_STRUCT
1325 SetQHHorizontalValidorInvalid (*PtrQH
, FALSE
);
1326 SetQHVerticalValidorInvalid (*PtrQH
, FALSE
);
1332 Set the horizontal link pointer in QH.
1334 @param PtrQH Place to store QH_STRUCT pointer.
1335 @param PtrNext Place to the next QH_STRUCT.
1339 SetQHHorizontalLinkPtr (
1340 IN QH_STRUCT
*PtrQH
,
1345 // Since the QH_STRUCT is aligned on 16-byte boundaries,
1346 // Only the highest 28bit of the address is valid
1347 // (take 32bit address as an example).
1349 PtrQH
->QueueHead
.QHHorizontalPtr
= (UINT32
) (UINTN
) PtrNext
>> 4;
1353 Get the horizontal link pointer in QH.
1355 @param PtrQH Place to store QH_STRUCT pointer.
1357 @retval The horizontal link pointer in QH.
1361 GetQHHorizontalLinkPtr (
1366 // Restore the 28bit address to 32bit address
1367 // (take 32bit address as an example)
1369 return (VOID
*) (UINTN
) ((PtrQH
->QueueHead
.QHHorizontalPtr
) << 4);
1373 Set a QH or TD horizontally to be connected with a specific QH.
1375 @param PtrQH Place to store QH_STRUCT pointer.
1376 @param IsQH Specify QH or TD is connected.
1380 SetQHHorizontalQHorTDSelect (
1381 IN QH_STRUCT
*PtrQH
,
1386 // if QH is connected, the specified bit is set,
1387 // if TD is connected, the specified bit is cleared.
1389 PtrQH
->QueueHead
.QHHorizontalQSelect
= IsQH
? 1 : 0;
1393 Set the horizontal validor bit in QH.
1395 @param PtrQH Place to store QH_STRUCT pointer.
1396 @param IsValid Specify the horizontal linker is valid or not.
1400 SetQHHorizontalValidorInvalid (
1401 IN QH_STRUCT
*PtrQH
,
1406 // Valid means the horizontal link pointer is valid,
1407 // else, it's invalid.
1409 PtrQH
->QueueHead
.QHHorizontalTerminate
= IsValid
? 0 : 1;
1413 Set the vertical link pointer in QH.
1415 @param PtrQH Place to store QH_STRUCT pointer.
1416 @param PtrNext Place to the next QH_STRUCT.
1420 SetQHVerticalLinkPtr (
1421 IN QH_STRUCT
*PtrQH
,
1426 // Since the QH_STRUCT is aligned on 16-byte boundaries,
1427 // Only the highest 28bit of the address is valid
1428 // (take 32bit address as an example).
1430 PtrQH
->QueueHead
.QHVerticalPtr
= (UINT32
) (UINTN
) PtrNext
>> 4;
1434 Set a QH or TD vertically to be connected with a specific QH.
1436 @param PtrQH Place to store QH_STRUCT pointer.
1437 @param IsQH Specify QH or TD is connected.
1441 SetQHVerticalQHorTDSelect (
1442 IN QH_STRUCT
*PtrQH
,
1447 // Set the specified bit if the Vertical Link Pointer pointing to a QH,
1448 // Clear the specified bit if the Vertical Link Pointer pointing to a TD.
1450 PtrQH
->QueueHead
.QHVerticalQSelect
= IsQH
? 1 : 0;
1454 Set the vertical validor bit in QH.
1456 @param PtrQH Place to store QH_STRUCT pointer.
1457 @param IsValid Specify the vertical linker is valid or not.
1461 SetQHVerticalValidorInvalid (
1462 IN QH_STRUCT
*PtrQH
,
1467 // If TRUE, meaning the Vertical Link Pointer field is valid,
1468 // else, the field is invalid.
1470 PtrQH
->QueueHead
.QHVerticalTerminate
= IsValid
? 0 : 1;
1474 Get the vertical validor bit in QH.
1476 @param PtrQH Place to store QH_STRUCT pointer.
1478 @retval The vertical linker is valid or not.
1482 GetQHHorizontalValidorInvalid (
1487 // If TRUE, meaning the Horizontal Link Pointer field is valid,
1488 // else, the field is invalid.
1490 return (BOOLEAN
) (!(PtrQH
->QueueHead
.QHHorizontalTerminate
));
1494 Allocate TD or QH Struct.
1496 @param UhcDev The UHCI device.
1497 @param Size The size of allocation.
1498 @param PtrStruct Place to store TD_STRUCT pointer.
1500 @return EFI_SUCCESS Allocate successfully.
1501 @retval EFI_OUT_OF_RESOURCES Can't allocate memory resource.
1505 AllocateTDorQHStruct (
1506 IN USB_UHC_DEV
*UhcDev
,
1508 OUT VOID
**PtrStruct
1513 Status
= EFI_SUCCESS
;
1516 Status
= UhcAllocatePool (
1518 (UINT8
**) PtrStruct
,
1521 if (EFI_ERROR (Status
)) {
1525 ZeroMem (*PtrStruct
, Size
);
1533 @param UhcDev The UHCI device.
1534 @param PtrTD Place to store TD_STRUCT pointer.
1536 @return EFI_SUCCESS Allocate successfully.
1537 @retval EFI_OUT_OF_RESOURCES Can't allocate memory resource.
1542 IN USB_UHC_DEV
*UhcDev
,
1543 OUT TD_STRUCT
**PtrTD
1548 // create memory for TD_STRUCT, and align the memory.
1550 Status
= AllocateTDorQHStruct (UhcDev
, sizeof(TD_STRUCT
), (void **)PtrTD
);
1551 if (EFI_ERROR (Status
)) {
1558 SetTDLinkPtrValidorInvalid (*PtrTD
, FALSE
);
1564 Generate Setup Stage TD.
1566 @param UhcDev The UHCI device.
1567 @param DevAddr Device address.
1568 @param Endpoint Endpoint number.
1569 @param DeviceSpeed Device Speed.
1570 @param DevRequest CPU memory address of request structure buffer to transfer.
1571 @param RequestPhy PCI memory address of request structure buffer to transfer.
1572 @param RequestLen Request length.
1573 @param PtrTD TD_STRUCT generated.
1575 @return EFI_SUCCESS Generate setup stage TD successfully.
1576 @retval EFI_OUT_OF_RESOURCES Can't allocate memory resource.
1581 IN USB_UHC_DEV
*UhcDev
,
1584 IN UINT8 DeviceSpeed
,
1585 IN UINT8
*DevRequest
,
1586 IN UINT8
*RequestPhy
,
1587 IN UINT8 RequestLen
,
1588 OUT TD_STRUCT
**PtrTD
1591 TD_STRUCT
*TdStruct
;
1594 Status
= CreateTD (UhcDev
, &TdStruct
);
1595 if (EFI_ERROR (Status
)) {
1599 SetTDLinkPtr (TdStruct
, NULL
);
1602 // Depth first fashion
1604 SetTDLinkPtrDepthorBreadth (TdStruct
, TRUE
);
1607 // initialize as the last TD in the QH context,
1608 // this field will be updated in the TD linkage process.
1610 SetTDLinkPtrValidorInvalid (TdStruct
, FALSE
);
1613 // Disable Short Packet Detection by default
1615 EnableorDisableTDShortPacket (TdStruct
, FALSE
);
1618 // Max error counter is 3, retry 3 times when error encountered.
1620 SetTDControlErrorCounter (TdStruct
, 3);
1623 // set device speed attribute
1624 // (TRUE - Slow Device; FALSE - Full Speed Device)
1626 switch (DeviceSpeed
) {
1627 case USB_SLOW_SPEED_DEVICE
:
1628 SetTDLoworFullSpeedDevice (TdStruct
, TRUE
);
1631 case USB_FULL_SPEED_DEVICE
:
1632 SetTDLoworFullSpeedDevice (TdStruct
, FALSE
);
1636 // Non isochronous transfer TD
1638 SetTDControlIsochronousorNot (TdStruct
, FALSE
);
1641 // Interrupt On Complete bit be set to zero,
1642 // Disable IOC interrupt.
1644 SetorClearTDControlIOC (TdStruct
, FALSE
);
1647 // Set TD Active bit
1649 SetTDStatusActiveorInactive (TdStruct
, TRUE
);
1651 SetTDTokenMaxLength (TdStruct
, RequestLen
);
1653 SetTDTokenDataToggle0 (TdStruct
);
1655 SetTDTokenEndPoint (TdStruct
, Endpoint
);
1657 SetTDTokenDeviceAddress (TdStruct
, DevAddr
);
1659 SetTDTokenPacketID (TdStruct
, SETUP_PACKET_ID
);
1661 TdStruct
->PtrTDBuffer
= (UINT8
*) DevRequest
;
1662 TdStruct
->TDBufferLength
= RequestLen
;
1664 // Set the beginning address of the buffer that will be used
1665 // during the transaction.
1667 TdStruct
->TDData
.TDBufferPtr
= (UINT32
) (UINTN
) RequestPhy
;
1675 Generate Data Stage TD.
1677 @param UhcDev The UHCI device.
1678 @param DevAddr Device address.
1679 @param Endpoint Endpoint number.
1680 @param PtrData CPU memory address of user data buffer to transfer.
1681 @param DataPhy PCI memory address of user data buffer to transfer.
1682 @param Len Data length.
1683 @param PktID PacketID.
1684 @param Toggle Data toggle value.
1685 @param DeviceSpeed Device Speed.
1686 @param PtrTD TD_STRUCT generated.
1688 @return EFI_SUCCESS Generate data stage TD successfully.
1689 @retval EFI_OUT_OF_RESOURCES Can't allocate memory resource.
1694 IN USB_UHC_DEV
*UhcDev
,
1702 IN UINT8 DeviceSpeed
,
1703 OUT TD_STRUCT
**PtrTD
1706 TD_STRUCT
*TdStruct
;
1709 Status
= CreateTD (UhcDev
, &TdStruct
);
1710 if (EFI_ERROR (Status
)) {
1714 SetTDLinkPtr (TdStruct
, NULL
);
1717 // Depth first fashion
1719 SetTDLinkPtrDepthorBreadth (TdStruct
, TRUE
);
1722 // Link pointer pointing to TD struct
1724 SetTDLinkPtrQHorTDSelect (TdStruct
, FALSE
);
1727 // initialize as the last TD in the QH context,
1728 // this field will be updated in the TD linkage process.
1730 SetTDLinkPtrValidorInvalid (TdStruct
, FALSE
);
1733 // Disable short packet detect
1735 EnableorDisableTDShortPacket (TdStruct
, FALSE
);
1737 // Max error counter is 3
1739 SetTDControlErrorCounter (TdStruct
, 3);
1742 // set device speed attribute
1743 // (TRUE - Slow Device; FALSE - Full Speed Device)
1745 switch (DeviceSpeed
) {
1746 case USB_SLOW_SPEED_DEVICE
:
1747 SetTDLoworFullSpeedDevice (TdStruct
, TRUE
);
1750 case USB_FULL_SPEED_DEVICE
:
1751 SetTDLoworFullSpeedDevice (TdStruct
, FALSE
);
1755 // Non isochronous transfer TD
1757 SetTDControlIsochronousorNot (TdStruct
, FALSE
);
1760 // Disable Interrupt On Complete
1761 // Disable IOC interrupt.
1763 SetorClearTDControlIOC (TdStruct
, FALSE
);
1768 SetTDStatusActiveorInactive (TdStruct
, TRUE
);
1770 SetTDTokenMaxLength (TdStruct
, Len
);
1773 SetTDTokenDataToggle1 (TdStruct
);
1775 SetTDTokenDataToggle0 (TdStruct
);
1778 SetTDTokenEndPoint (TdStruct
, Endpoint
);
1780 SetTDTokenDeviceAddress (TdStruct
, DevAddr
);
1782 SetTDTokenPacketID (TdStruct
, PktID
);
1784 TdStruct
->PtrTDBuffer
= (UINT8
*) PtrData
;
1785 TdStruct
->TDBufferLength
= Len
;
1787 // Set the beginning address of the buffer that will be used
1788 // during the transaction.
1790 TdStruct
->TDData
.TDBufferPtr
= (UINT32
) (UINTN
) DataPhy
;
1798 Generate Status Stage TD.
1800 @param UhcDev The UHCI device.
1801 @param DevAddr Device address.
1802 @param Endpoint Endpoint number.
1803 @param PktID PacketID.
1804 @param DeviceSpeed Device Speed.
1805 @param PtrTD TD_STRUCT generated.
1807 @return EFI_SUCCESS Generate status stage TD successfully.
1808 @retval EFI_OUT_OF_RESOURCES Can't allocate memory resource.
1813 IN USB_UHC_DEV
*UhcDev
,
1817 IN UINT8 DeviceSpeed
,
1818 OUT TD_STRUCT
**PtrTD
1821 TD_STRUCT
*PtrTDStruct
;
1824 Status
= CreateTD (UhcDev
, &PtrTDStruct
);
1825 if (EFI_ERROR (Status
)) {
1829 SetTDLinkPtr (PtrTDStruct
, NULL
);
1832 // Depth first fashion
1834 SetTDLinkPtrDepthorBreadth (PtrTDStruct
, TRUE
);
1837 // initialize as the last TD in the QH context,
1838 // this field will be updated in the TD linkage process.
1840 SetTDLinkPtrValidorInvalid (PtrTDStruct
, FALSE
);
1843 // Disable short packet detect
1845 EnableorDisableTDShortPacket (PtrTDStruct
, FALSE
);
1848 // Max error counter is 3
1850 SetTDControlErrorCounter (PtrTDStruct
, 3);
1853 // set device speed attribute
1854 // (TRUE - Slow Device; FALSE - Full Speed Device)
1856 switch (DeviceSpeed
) {
1857 case USB_SLOW_SPEED_DEVICE
:
1858 SetTDLoworFullSpeedDevice (PtrTDStruct
, TRUE
);
1861 case USB_FULL_SPEED_DEVICE
:
1862 SetTDLoworFullSpeedDevice (PtrTDStruct
, FALSE
);
1866 // Non isochronous transfer TD
1868 SetTDControlIsochronousorNot (PtrTDStruct
, FALSE
);
1871 // Disable Interrupt On Complete
1872 // Disable IOC interrupt.
1874 SetorClearTDControlIOC (PtrTDStruct
, FALSE
);
1877 // Set TD Active bit
1879 SetTDStatusActiveorInactive (PtrTDStruct
, TRUE
);
1881 SetTDTokenMaxLength (PtrTDStruct
, 0);
1883 SetTDTokenDataToggle1 (PtrTDStruct
);
1885 SetTDTokenEndPoint (PtrTDStruct
, Endpoint
);
1887 SetTDTokenDeviceAddress (PtrTDStruct
, DevAddr
);
1889 SetTDTokenPacketID (PtrTDStruct
, PktID
);
1891 PtrTDStruct
->PtrTDBuffer
= NULL
;
1892 PtrTDStruct
->TDBufferLength
= 0;
1894 // Set the beginning address of the buffer that will be used
1895 // during the transaction.
1897 PtrTDStruct
->TDData
.TDBufferPtr
= 0;
1899 *PtrTD
= PtrTDStruct
;
1905 Set the link pointer validor bit in TD.
1907 @param PtrTDStruct Place to store TD_STRUCT pointer.
1908 @param IsValid Specify the linker pointer is valid or not.
1912 SetTDLinkPtrValidorInvalid (
1913 IN TD_STRUCT
*PtrTDStruct
,
1918 // Valid means the link pointer is valid,
1919 // else, it's invalid.
1921 PtrTDStruct
->TDData
.TDLinkPtrTerminate
= (IsValid
? 0 : 1);
1925 Set the Link Pointer pointing to a QH or TD.
1927 @param PtrTDStruct Place to store TD_STRUCT pointer.
1928 @param IsQH Specify QH or TD is connected.
1932 SetTDLinkPtrQHorTDSelect (
1933 IN TD_STRUCT
*PtrTDStruct
,
1938 // Indicate whether the Link Pointer pointing to a QH or TD
1940 PtrTDStruct
->TDData
.TDLinkPtrQSelect
= (IsQH
? 1 : 0);
1944 Set the traverse is depth-first or breadth-first.
1946 @param PtrTDStruct Place to store TD_STRUCT pointer.
1947 @param IsDepth Specify the traverse is depth-first or breadth-first.
1951 SetTDLinkPtrDepthorBreadth (
1952 IN TD_STRUCT
*PtrTDStruct
,
1957 // If TRUE, indicating the host controller should process in depth first fashion,
1958 // else, the host controller should process in breadth first fashion
1960 PtrTDStruct
->TDData
.TDLinkPtrDepthSelect
= (IsDepth
? 1 : 0);
1964 Set TD Link Pointer in TD.
1966 @param PtrTDStruct Place to store TD_STRUCT pointer.
1967 @param PtrNext Place to the next TD_STRUCT.
1972 IN TD_STRUCT
*PtrTDStruct
,
1977 // Set TD Link Pointer. Since QH,TD align on 16-byte boundaries,
1978 // only the highest 28 bits are valid. (if take 32bit address as an example)
1980 PtrTDStruct
->TDData
.TDLinkPtr
= (UINT32
) (UINTN
) PtrNext
>> 4;
1984 Get TD Link Pointer.
1986 @param PtrTDStruct Place to store TD_STRUCT pointer.
1988 @retval Get TD Link Pointer in TD.
1993 IN TD_STRUCT
*PtrTDStruct
1997 // Get TD Link Pointer. Restore it back to 32bit
1998 // (if take 32bit address as an example)
2000 return (VOID
*) (UINTN
) ((PtrTDStruct
->TDData
.TDLinkPtr
) << 4);
2004 Get the information about whether the Link Pointer field pointing to
2007 @param PtrTDStruct Place to store TD_STRUCT pointer.
2009 @retval whether the Link Pointer field pointing to a QH or a TD.
2014 IN TD_STRUCT
*PtrTDStruct
2018 // Get the information about whether the Link Pointer field pointing to
2021 return (BOOLEAN
) (PtrTDStruct
->TDData
.TDLinkPtrQSelect
);
2025 Enable/Disable short packet detection mechanism.
2027 @param PtrTDStruct Place to store TD_STRUCT pointer.
2028 @param IsEnable Enable or disable short packet detection mechanism.
2032 EnableorDisableTDShortPacket (
2033 IN TD_STRUCT
*PtrTDStruct
,
2038 // TRUE means enable short packet detection mechanism.
2040 PtrTDStruct
->TDData
.TDStatusSPD
= (IsEnable
? 1 : 0);
2044 Set the max error counter in TD.
2046 @param PtrTDStruct Place to store TD_STRUCT pointer.
2047 @param MaxErrors The number of allowable error.
2051 SetTDControlErrorCounter (
2052 IN TD_STRUCT
*PtrTDStruct
,
2057 // valid value of MaxErrors is 0,1,2,3
2059 if (MaxErrors
> 3) {
2063 PtrTDStruct
->TDData
.TDStatusErr
= MaxErrors
;
2067 Set the TD is targeting a low-speed device or not.
2069 @param PtrTDStruct Place to store TD_STRUCT pointer.
2070 @param IsLowSpeedDevice Whether The device is low-speed.
2074 SetTDLoworFullSpeedDevice (
2075 IN TD_STRUCT
*PtrTDStruct
,
2076 IN BOOLEAN IsLowSpeedDevice
2080 // TRUE means the TD is targeting at a Low-speed device
2082 PtrTDStruct
->TDData
.TDStatusLS
= (IsLowSpeedDevice
? 1 : 0);
2086 Set the TD is isochronous transfer type or not.
2088 @param PtrTDStruct Place to store TD_STRUCT pointer.
2089 @param IsIsochronous Whether the transaction isochronous transfer type.
2093 SetTDControlIsochronousorNot (
2094 IN TD_STRUCT
*PtrTDStruct
,
2095 IN BOOLEAN IsIsochronous
2099 // TRUE means the TD belongs to Isochronous transfer type.
2101 PtrTDStruct
->TDData
.TDStatusIOS
= (IsIsochronous
? 1 : 0);
2105 Set if UCHI should issue an interrupt on completion of the frame
2106 in which this TD is executed
2108 @param PtrTDStruct Place to store TD_STRUCT pointer.
2109 @param IsSet Whether HC should issue an interrupt on completion.
2113 SetorClearTDControlIOC (
2114 IN TD_STRUCT
*PtrTDStruct
,
2119 // If this bit is set, it indicates that the host controller should issue
2120 // an interrupt on completion of the frame in which this TD is executed.
2122 PtrTDStruct
->TDData
.TDStatusIOC
= IsSet
? 1 : 0;
2126 Set if the TD is active and can be executed.
2128 @param PtrTDStruct Place to store TD_STRUCT pointer.
2129 @param IsActive Whether the TD is active and can be executed.
2133 SetTDStatusActiveorInactive (
2134 IN TD_STRUCT
*PtrTDStruct
,
2139 // If this bit is set, it indicates that the TD is active and can be
2143 PtrTDStruct
->TDData
.TDStatus
|= 0x80;
2145 PtrTDStruct
->TDData
.TDStatus
&= 0x7F;
2150 Specifies the maximum number of data bytes allowed for the transfer.
2152 @param PtrTDStruct Place to store TD_STRUCT pointer.
2153 @param MaxLen The maximum number of data bytes allowed.
2155 @retval The allowed maximum number of data.
2158 SetTDTokenMaxLength (
2159 IN TD_STRUCT
*PtrTDStruct
,
2164 // Specifies the maximum number of data bytes allowed for the transfer.
2165 // the legal value extent is 0 ~ 0x500.
2167 if (MaxLen
> 0x500) {
2171 PtrTDStruct
->TDData
.TDTokenMaxLen
= MaxLen
- 1;
2177 Set the data toggle bit to DATA1.
2179 @param PtrTDStruct Place to store TD_STRUCT pointer.
2183 SetTDTokenDataToggle1 (
2184 IN TD_STRUCT
*PtrTDStruct
2188 // Set the data toggle bit to DATA1
2190 PtrTDStruct
->TDData
.TDTokenDataToggle
= 1;
2194 Set the data toggle bit to DATA0.
2196 @param PtrTDStruct Place to store TD_STRUCT pointer.
2200 SetTDTokenDataToggle0 (
2201 IN TD_STRUCT
*PtrTDStruct
2205 // Set the data toggle bit to DATA0
2207 PtrTDStruct
->TDData
.TDTokenDataToggle
= 0;
2211 Set EndPoint Number the TD is targeting at.
2213 @param PtrTDStruct Place to store TD_STRUCT pointer.
2214 @param EndPoint The Endport number of the target.
2218 SetTDTokenEndPoint (
2219 IN TD_STRUCT
*PtrTDStruct
,
2224 // Set EndPoint Number the TD is targeting at.
2226 PtrTDStruct
->TDData
.TDTokenEndPt
= (UINT8
) EndPoint
;
2230 Set Device Address the TD is targeting at.
2232 @param PtrTDStruct Place to store TD_STRUCT pointer.
2233 @param DevAddr The Device Address of the target.
2237 SetTDTokenDeviceAddress (
2238 IN TD_STRUCT
*PtrTDStruct
,
2243 // Set Device Address the TD is targeting at.
2245 PtrTDStruct
->TDData
.TDTokenDevAddr
= (UINT8
) DevAddr
;
2249 Set Packet Identification the TD is targeting at.
2251 @param PtrTDStruct Place to store TD_STRUCT pointer.
2252 @param PacketID The Packet Identification of the target.
2256 SetTDTokenPacketID (
2257 IN TD_STRUCT
*PtrTDStruct
,
2262 // Set the Packet Identification to be used for this transaction.
2264 PtrTDStruct
->TDData
.TDTokenPID
= PacketID
;
2268 Detect whether the TD is active.
2270 @param PtrTDStruct Place to store TD_STRUCT pointer.
2272 @retval The TD is active or not.
2277 IN TD_STRUCT
*PtrTDStruct
2283 // Detect whether the TD is active.
2285 TDStatus
= (UINT8
) (PtrTDStruct
->TDData
.TDStatus
);
2286 return (BOOLEAN
) (TDStatus
& 0x80);
2290 Detect whether the TD is stalled.
2292 @param PtrTDStruct Place to store TD_STRUCT pointer.
2294 @retval The TD is stalled or not.
2299 IN TD_STRUCT
*PtrTDStruct
2305 // Detect whether the device/endpoint addressed by this TD is stalled.
2307 TDStatus
= (UINT8
) (PtrTDStruct
->TDData
.TDStatus
);
2308 return (BOOLEAN
) (TDStatus
& 0x40);
2312 Detect whether Data Buffer Error is happened.
2314 @param PtrTDStruct Place to store TD_STRUCT pointer.
2316 @retval The Data Buffer Error is happened or not.
2320 IsTDStatusBufferError (
2321 IN TD_STRUCT
*PtrTDStruct
2327 // Detect whether Data Buffer Error is happened.
2329 TDStatus
= (UINT8
) (PtrTDStruct
->TDData
.TDStatus
);
2330 return (BOOLEAN
) (TDStatus
& 0x20);
2334 Detect whether Babble Error is happened.
2336 @param PtrTDStruct Place to store TD_STRUCT pointer.
2338 @retval The Babble Error is happened or not.
2342 IsTDStatusBabbleError (
2343 IN TD_STRUCT
*PtrTDStruct
2349 // Detect whether Babble Error is happened.
2351 TDStatus
= (UINT8
) (PtrTDStruct
->TDData
.TDStatus
);
2352 return (BOOLEAN
) (TDStatus
& 0x10);
2356 Detect whether NAK is received.
2358 @param PtrTDStruct Place to store TD_STRUCT pointer.
2360 @retval The NAK is received or not.
2364 IsTDStatusNAKReceived (
2365 IN TD_STRUCT
*PtrTDStruct
2371 // Detect whether NAK is received.
2373 TDStatus
= (UINT8
) (PtrTDStruct
->TDData
.TDStatus
);
2374 return (BOOLEAN
) (TDStatus
& 0x08);
2378 Detect whether CRC/Time Out Error is encountered.
2380 @param PtrTDStruct Place to store TD_STRUCT pointer.
2382 @retval The CRC/Time Out Error is encountered or not.
2386 IsTDStatusCRCTimeOutError (
2387 IN TD_STRUCT
*PtrTDStruct
2393 // Detect whether CRC/Time Out Error is encountered.
2395 TDStatus
= (UINT8
) (PtrTDStruct
->TDData
.TDStatus
);
2396 return (BOOLEAN
) (TDStatus
& 0x04);
2400 Detect whether Bitstuff Error is received.
2402 @param PtrTDStruct Place to store TD_STRUCT pointer.
2404 @retval The Bitstuff Error is received or not.
2408 IsTDStatusBitStuffError (
2409 IN TD_STRUCT
*PtrTDStruct
2415 // Detect whether Bitstuff Error is received.
2417 TDStatus
= (UINT8
) (PtrTDStruct
->TDData
.TDStatus
);
2418 return (BOOLEAN
) (TDStatus
& 0x02);
2422 Retrieve the actual number of bytes that were tansferred.
2424 @param PtrTDStruct Place to store TD_STRUCT pointer.
2426 @retval The actual number of bytes that were tansferred.
2430 GetTDStatusActualLength (
2431 IN TD_STRUCT
*PtrTDStruct
2435 // Retrieve the actual number of bytes that were tansferred.
2436 // the value is encoded as n-1. so return the decoded value.
2438 return (UINT16
) ((PtrTDStruct
->TDData
.TDStatusActualLength
) + 1);
2442 Retrieve the information of whether the Link Pointer field is valid or not.
2444 @param PtrTDStruct Place to store TD_STRUCT pointer.
2446 @retval The linker pointer field is valid or not.
2450 GetTDLinkPtrValidorInvalid (
2451 IN TD_STRUCT
*PtrTDStruct
2455 // Retrieve the information of whether the Link Pointer field
2458 if ((PtrTDStruct
->TDData
.TDLinkPtrTerminate
& BIT0
) != 0) {
2467 Count TD Number from PtrFirstTD.
2469 @param PtrFirstTD Place to store TD_STRUCT pointer.
2471 @retval The queued TDs number.
2476 IN TD_STRUCT
*PtrFirstTD
2483 // Count the queued TDs number.
2488 Ptr
= (TD_STRUCT
*) Ptr
->PtrNextTD
;
2498 @param PtrQH Place to store QH_STRUCT pointer.
2499 @param PtrTD Place to store TD_STRUCT pointer.
2504 IN QH_STRUCT
*PtrQH
,
2508 if (PtrQH
== NULL
|| PtrTD
== NULL
) {
2512 // Validate QH Vertical Ptr field
2514 SetQHVerticalValidorInvalid (PtrQH
, TRUE
);
2517 // Vertical Ptr pointing to TD structure
2519 SetQHVerticalQHorTDSelect (PtrQH
, FALSE
);
2521 SetQHVerticalLinkPtr (PtrQH
, (VOID
*) PtrTD
);
2523 PtrQH
->PtrDown
= (VOID
*) PtrTD
;
2529 @param PtrPreTD Place to store TD_STRUCT pointer.
2530 @param PtrTD Place to store TD_STRUCT pointer.
2535 IN TD_STRUCT
*PtrPreTD
,
2539 if (PtrPreTD
== NULL
|| PtrTD
== NULL
) {
2543 // Depth first fashion
2545 SetTDLinkPtrDepthorBreadth (PtrPreTD
, TRUE
);
2548 // Link pointer pointing to TD struct
2550 SetTDLinkPtrQHorTDSelect (PtrPreTD
, FALSE
);
2553 // Validate the link pointer valid bit
2555 SetTDLinkPtrValidorInvalid (PtrPreTD
, TRUE
);
2557 SetTDLinkPtr (PtrPreTD
, PtrTD
);
2559 PtrPreTD
->PtrNextTD
= (VOID
*) PtrTD
;
2561 PtrTD
->PtrNextTD
= NULL
;
2565 Execute Control Transfer.
2567 @param UhcDev The UCHI device.
2568 @param PtrTD A pointer to TD_STRUCT data.
2569 @param ActualLen Actual transfer Length.
2570 @param TimeOut TimeOut value.
2571 @param TransferResult Transfer Result.
2573 @return EFI_DEVICE_ERROR The transfer failed due to transfer error.
2574 @return EFI_TIMEOUT The transfer failed due to time out.
2575 @return EFI_SUCCESS The transfer finished OK.
2579 ExecuteControlTransfer (
2580 IN USB_UHC_DEV
*UhcDev
,
2581 IN TD_STRUCT
*PtrTD
,
2582 OUT UINTN
*ActualLen
,
2584 OUT UINT32
*TransferResult
2589 BOOLEAN InfiniteLoop
;
2592 *TransferResult
= EFI_USB_NOERROR
;
2594 InfiniteLoop
= FALSE
;
2596 Delay
= TimeOut
* STALL_1_MILLI_SECOND
;
2598 // If Timeout is 0, then the caller must wait for the function to be completed
2599 // until EFI_SUCCESS or EFI_DEVICE_ERROR is returned.
2602 InfiniteLoop
= TRUE
;
2607 CheckTDsResults (PtrTD
, TransferResult
, &ErrTDPos
, ActualLen
);
2610 // TD is inactive, means the control transfer is end.
2612 if ((*TransferResult
& EFI_USB_ERR_NOTEXECUTE
) != EFI_USB_ERR_NOTEXECUTE
) {
2615 MicroSecondDelay (STALL_1_MICRO_SECOND
);
2618 } while (InfiniteLoop
|| (Delay
!= 0));
2620 if (*TransferResult
!= EFI_USB_NOERROR
) {
2621 return EFI_DEVICE_ERROR
;
2628 Execute Bulk Transfer.
2630 @param UhcDev The UCHI device.
2631 @param PtrTD A pointer to TD_STRUCT data.
2632 @param ActualLen Actual transfer Length.
2633 @param DataToggle DataToggle value.
2634 @param TimeOut TimeOut value.
2635 @param TransferResult Transfer Result.
2637 @return EFI_DEVICE_ERROR The transfer failed due to transfer error.
2638 @return EFI_TIMEOUT The transfer failed due to time out.
2639 @return EFI_SUCCESS The transfer finished OK.
2644 IN USB_UHC_DEV
*UhcDev
,
2645 IN TD_STRUCT
*PtrTD
,
2646 IN OUT UINTN
*ActualLen
,
2647 IN UINT8
*DataToggle
,
2649 OUT UINT32
*TransferResult
2655 BOOLEAN InfiniteLoop
;
2658 *TransferResult
= EFI_USB_NOERROR
;
2660 InfiniteLoop
= FALSE
;
2662 Delay
= TimeOut
* STALL_1_MILLI_SECOND
;
2664 // If Timeout is 0, then the caller must wait for the function to be completed
2665 // until EFI_SUCCESS or EFI_DEVICE_ERROR is returned.
2668 InfiniteLoop
= TRUE
;
2673 CheckTDsResults (PtrTD
, TransferResult
, &ErrTDPos
, ActualLen
);
2675 // TD is inactive, thus meaning bulk transfer's end.
2677 if ((*TransferResult
& EFI_USB_ERR_NOTEXECUTE
) != EFI_USB_ERR_NOTEXECUTE
) {
2680 MicroSecondDelay (STALL_1_MICRO_SECOND
);
2683 } while (InfiniteLoop
|| (Delay
!= 0));
2688 if (*TransferResult
!= EFI_USB_NOERROR
) {
2690 // scroll the Data Toggle back to the last success TD
2692 ScrollNum
= CountTDsNumber (PtrTD
) - ErrTDPos
;
2693 if ((ScrollNum
% 2) != 0) {
2698 // If error, wait 100ms to retry by upper layer
2700 MicroSecondDelay (100 * 1000);
2701 return EFI_DEVICE_ERROR
;
2710 @param UhcDev The UCHI device.
2711 @param PtrFirstTD Place to store TD_STRUCT pointer.
2716 IN USB_UHC_DEV
*UhcDev
,
2717 IN TD_STRUCT
*PtrFirstTD
2726 // Delete all the TDs in a queue.
2728 while (Tptr1
!= NULL
) {
2732 if (!GetTDLinkPtrValidorInvalid (Tptr2
)) {
2736 // has more than one TD in the queue.
2738 Tptr1
= GetTDLinkPtr (Tptr2
);
2741 UhcFreePool (UhcDev
, (UINT8
*) Tptr2
, sizeof (TD_STRUCT
));
2750 @param PtrTD A pointer to TD_STRUCT data.
2751 @param Result The result to return.
2752 @param ErrTDPos The Error TD position.
2753 @param ActualTransferSize Actual transfer size.
2755 @retval The TD is executed successfully or not.
2760 IN TD_STRUCT
*PtrTD
,
2762 OUT UINTN
*ErrTDPos
,
2763 OUT UINTN
*ActualTransferSize
2768 *Result
= EFI_USB_NOERROR
;
2774 *ActualTransferSize
= 0;
2776 while (PtrTD
!= NULL
) {
2778 if (IsTDStatusActive (PtrTD
)) {
2779 *Result
|= EFI_USB_ERR_NOTEXECUTE
;
2782 if (IsTDStatusStalled (PtrTD
)) {
2783 *Result
|= EFI_USB_ERR_STALL
;
2786 if (IsTDStatusBufferError (PtrTD
)) {
2787 *Result
|= EFI_USB_ERR_BUFFER
;
2790 if (IsTDStatusBabbleError (PtrTD
)) {
2791 *Result
|= EFI_USB_ERR_BABBLE
;
2794 if (IsTDStatusNAKReceived (PtrTD
)) {
2795 *Result
|= EFI_USB_ERR_NAK
;
2798 if (IsTDStatusCRCTimeOutError (PtrTD
)) {
2799 *Result
|= EFI_USB_ERR_TIMEOUT
;
2802 if (IsTDStatusBitStuffError (PtrTD
)) {
2803 *Result
|= EFI_USB_ERR_BITSTUFF
;
2806 // Accumulate actual transferred data length in each TD.
2808 Len
= GetTDStatusActualLength (PtrTD
) & 0x7FF;
2809 *ActualTransferSize
+= Len
;
2812 // if any error encountered, stop processing the left TDs.
2814 if ((*Result
) != 0) {
2818 PtrTD
= (TD_STRUCT
*) (PtrTD
->PtrNextTD
);
2820 // Record the first Error TD's position in the queue,
2821 // this value is zero-based.
2830 Create Memory Block.
2832 @param UhcDev The UCHI device.
2833 @param MemoryHeader The Pointer to allocated memory block.
2834 @param MemoryBlockSizeInPages The page size of memory block to be allocated.
2836 @retval EFI_OUT_OF_RESOURCES Can't allocate memory resources.
2837 @retval EFI_SUCCESS Success.
2842 IN USB_UHC_DEV
*UhcDev
,
2843 OUT MEMORY_MANAGE_HEADER
**MemoryHeader
,
2844 IN UINTN MemoryBlockSizeInPages
2852 EFI_PHYSICAL_ADDRESS MappedAddr
;
2855 // Memory Block uses MemoryBlockSizeInPages pages,
2856 // memory management header and bit array use 1 page
2858 MemPages
= MemoryBlockSizeInPages
+ 1;
2859 Status
= IoMmuAllocateBuffer (
2866 if (EFI_ERROR (Status
) || (TempPtr
== NULL
)) {
2867 return EFI_OUT_OF_RESOURCES
;
2872 ZeroMem (Ptr
, MemPages
* EFI_PAGE_SIZE
);
2874 *MemoryHeader
= (MEMORY_MANAGE_HEADER
*) Ptr
;
2876 // adjust Ptr pointer to the next empty memory
2878 Ptr
+= sizeof (MEMORY_MANAGE_HEADER
);
2880 // Set Bit Array initial address
2882 (*MemoryHeader
)->BitArrayPtr
= Ptr
;
2884 (*MemoryHeader
)->Next
= NULL
;
2887 // Memory block initial address
2890 Ptr
+= EFI_PAGE_SIZE
;
2891 (*MemoryHeader
)->MemoryBlockPtr
= Ptr
;
2893 // set Memory block size
2895 (*MemoryHeader
)->MemoryBlockSizeInBytes
= MemoryBlockSizeInPages
* EFI_PAGE_SIZE
;
2897 // each bit in Bit Array will manage 32byte memory in memory block
2899 (*MemoryHeader
)->BitArraySizeInBytes
= ((*MemoryHeader
)->MemoryBlockSizeInBytes
/ 32) / 8;
2905 Initialize UHCI memory management.
2907 @param UhcDev The UCHI device.
2909 @retval EFI_OUT_OF_RESOURCES Can't allocate memory resources.
2910 @retval EFI_SUCCESS Success.
2914 InitializeMemoryManagement (
2915 IN USB_UHC_DEV
*UhcDev
2918 MEMORY_MANAGE_HEADER
*MemoryHeader
;
2922 MemPages
= NORMAL_MEMORY_BLOCK_UNIT_IN_PAGES
;
2923 Status
= CreateMemoryBlock (UhcDev
, &MemoryHeader
, MemPages
);
2924 if (EFI_ERROR (Status
)) {
2928 UhcDev
->Header1
= MemoryHeader
;
2934 Initialize UHCI memory management.
2936 @param UhcDev The UCHI device.
2937 @param Pool Buffer pointer to store the buffer pointer.
2938 @param AllocSize The size of the pool to be allocated.
2940 @retval EFI_OUT_OF_RESOURCES Can't allocate memory resources.
2941 @retval EFI_SUCCESS Success.
2946 IN USB_UHC_DEV
*UhcDev
,
2951 MEMORY_MANAGE_HEADER
*MemoryHeader
;
2952 MEMORY_MANAGE_HEADER
*TempHeaderPtr
;
2953 MEMORY_MANAGE_HEADER
*NewMemoryHeader
;
2954 UINTN RealAllocSize
;
2955 UINTN MemoryBlockSizeInPages
;
2960 MemoryHeader
= UhcDev
->Header1
;
2963 // allocate unit is 32 byte (align on 32 byte)
2965 if ((AllocSize
& 0x1F) != 0) {
2966 RealAllocSize
= (AllocSize
/ 32 + 1) * 32;
2968 RealAllocSize
= AllocSize
;
2971 Status
= EFI_NOT_FOUND
;
2972 for (TempHeaderPtr
= MemoryHeader
; TempHeaderPtr
!= NULL
; TempHeaderPtr
= TempHeaderPtr
->Next
) {
2974 Status
= AllocMemInMemoryBlock (
2979 if (!EFI_ERROR (Status
)) {
2984 // There is no enough memory,
2985 // Create a new Memory Block
2988 // if pool size is larger than NORMAL_MEMORY_BLOCK_UNIT_IN_PAGES,
2989 // just allocate a large enough memory block.
2991 if (RealAllocSize
> (NORMAL_MEMORY_BLOCK_UNIT_IN_PAGES
* EFI_PAGE_SIZE
)) {
2992 MemoryBlockSizeInPages
= RealAllocSize
/ EFI_PAGE_SIZE
+ 1;
2994 MemoryBlockSizeInPages
= NORMAL_MEMORY_BLOCK_UNIT_IN_PAGES
;
2997 Status
= CreateMemoryBlock (UhcDev
, &NewMemoryHeader
, MemoryBlockSizeInPages
);
2998 if (EFI_ERROR (Status
)) {
3002 // Link the new Memory Block to the Memory Header list
3004 InsertMemoryHeaderToList (MemoryHeader
, NewMemoryHeader
);
3006 Status
= AllocMemInMemoryBlock (
3015 Alloc Memory In MemoryBlock.
3017 @param MemoryHeader The pointer to memory manage header.
3018 @param Pool Buffer pointer to store the buffer pointer.
3019 @param NumberOfMemoryUnit The size of the pool to be allocated.
3021 @retval EFI_OUT_OF_RESOURCES Can't allocate memory resources.
3022 @retval EFI_SUCCESS Success.
3026 AllocMemInMemoryBlock (
3027 IN MEMORY_MANAGE_HEADER
*MemoryHeader
,
3029 IN UINTN NumberOfMemoryUnit
3038 UINTN NumberOfZeros
;
3044 ByteValue
= MemoryHeader
->BitArrayPtr
[0];
3047 for (TempBytePos
= 0; TempBytePos
< MemoryHeader
->BitArraySizeInBytes
;) {
3049 // Pop out BitValue from a byte in TempBytePos.
3051 BitValue
= (UINT8
)(ByteValue
& 0x1);
3053 if (BitValue
== 0) {
3055 // Found a free bit, the NumberOfZeros only record the number of those consecutive zeros
3059 // Found enough consecutive free space, break the loop
3061 if (NumberOfZeros
>= NumberOfMemoryUnit
) {
3066 // Encountering a '1', meant the bit is ocupied.
3068 if (NumberOfZeros
>= NumberOfMemoryUnit
) {
3070 // Found enough consecutive free space,break the loop
3075 // the NumberOfZeros only record the number of those consecutive zeros,
3076 // so reset the NumberOfZeros to 0 when encountering '1' before finding
3077 // enough consecutive '0's
3081 // reset the (FoundBytePos,FoundBitPos) to the position of '1'
3083 FoundBytePos
= TempBytePos
;
3084 FoundBitPos
= Index
;
3088 // right shift the byte
3093 // step forward a bit
3098 // step forward a byte, getting the byte value,
3099 // and reset the bit pos.
3102 ByteValue
= MemoryHeader
->BitArrayPtr
[TempBytePos
];
3107 if (NumberOfZeros
< NumberOfMemoryUnit
) {
3108 return EFI_NOT_FOUND
;
3111 // Found enough free space.
3114 // The values recorded in (FoundBytePos,FoundBitPos) have two conditions:
3115 // 1)(FoundBytePos,FoundBitPos) record the position
3116 // of the last '1' before the consecutive '0's, it must
3117 // be adjusted to the start position of the consecutive '0's.
3118 // 2)the start address of the consecutive '0's is just the start of
3119 // the bitarray. so no need to adjust the values of (FoundBytePos,FoundBitPos).
3121 if ((MemoryHeader
->BitArrayPtr
[0] & BIT0
) != 0) {
3125 // Have the (FoundBytePos,FoundBitPos) make sense.
3127 if (FoundBitPos
> 7) {
3132 // Set the memory as allocated
3134 for (TempBytePos
= FoundBytePos
, Index
= FoundBitPos
, Count
= 0; Count
< NumberOfMemoryUnit
; Count
++) {
3136 MemoryHeader
->BitArrayPtr
[TempBytePos
] = (UINT8
) (MemoryHeader
->BitArrayPtr
[TempBytePos
] | (1 << Index
));
3144 *Pool
= MemoryHeader
->MemoryBlockPtr
+ (FoundBytePos
* 8 + FoundBitPos
) * 32;
3152 @param UhcDev The UHCI device.
3153 @param Pool A pointer to store the buffer address.
3154 @param AllocSize The size of the pool to be freed.
3159 IN USB_UHC_DEV
*UhcDev
,
3164 MEMORY_MANAGE_HEADER
*MemoryHeader
;
3165 MEMORY_MANAGE_HEADER
*TempHeaderPtr
;
3171 UINTN RealAllocSize
;
3173 MemoryHeader
= UhcDev
->Header1
;
3176 // allocate unit is 32 byte (align on 32 byte)
3178 if ((AllocSize
& 0x1F) != 0) {
3179 RealAllocSize
= (AllocSize
/ 32 + 1) * 32;
3181 RealAllocSize
= AllocSize
;
3184 for (TempHeaderPtr
= MemoryHeader
; TempHeaderPtr
!= NULL
;
3185 TempHeaderPtr
= TempHeaderPtr
->Next
) {
3187 if ((Pool
>= TempHeaderPtr
->MemoryBlockPtr
) &&
3188 ((Pool
+ RealAllocSize
) <= (TempHeaderPtr
->MemoryBlockPtr
+
3189 TempHeaderPtr
->MemoryBlockSizeInBytes
))) {
3192 // Pool is in the Memory Block area,
3193 // find the start byte and bit in the bit array
3195 StartBytePos
= ((Pool
- TempHeaderPtr
->MemoryBlockPtr
) / 32) / 8;
3196 StartBitPos
= (UINT8
) (((Pool
- TempHeaderPtr
->MemoryBlockPtr
) / 32) % 8);
3199 // reset associated bits in bit array
3201 for (Index
= StartBytePos
, Index2
= StartBitPos
, Count
= 0; Count
< (RealAllocSize
/ 32); Count
++) {
3203 TempHeaderPtr
->BitArrayPtr
[Index
] = (UINT8
) (TempHeaderPtr
->BitArrayPtr
[Index
] ^ (1 << Index2
));
3220 Insert a new memory header into list.
3222 @param MemoryHeader A pointer to the memory header list.
3223 @param NewMemoryHeader A new memory header to be inserted into the list.
3227 InsertMemoryHeaderToList (
3228 IN MEMORY_MANAGE_HEADER
*MemoryHeader
,
3229 IN MEMORY_MANAGE_HEADER
*NewMemoryHeader
3232 MEMORY_MANAGE_HEADER
*TempHeaderPtr
;
3234 for (TempHeaderPtr
= MemoryHeader
; TempHeaderPtr
!= NULL
; TempHeaderPtr
= TempHeaderPtr
->Next
) {
3235 if (TempHeaderPtr
->Next
== NULL
) {
3236 TempHeaderPtr
->Next
= NewMemoryHeader
;
3243 Judge the memory block in the memory header is empty or not.
3245 @param MemoryHeaderPtr A pointer to the memory header list.
3247 @retval Whether the memory block in the memory header is empty or not.
3251 IsMemoryBlockEmptied (
3252 IN MEMORY_MANAGE_HEADER
*MemoryHeaderPtr
3257 for (Index
= 0; Index
< MemoryHeaderPtr
->BitArraySizeInBytes
; Index
++) {
3258 if (MemoryHeaderPtr
->BitArrayPtr
[Index
] != 0) {
3267 remove a memory header from list.
3269 @param FirstMemoryHeader A pointer to the memory header list.
3270 @param FreeMemoryHeader A memory header to be removed into the list.
3275 IN MEMORY_MANAGE_HEADER
*FirstMemoryHeader
,
3276 IN MEMORY_MANAGE_HEADER
*FreeMemoryHeader
3279 MEMORY_MANAGE_HEADER
*TempHeaderPtr
;
3281 if ((FirstMemoryHeader
== NULL
) || (FreeMemoryHeader
== NULL
)) {
3285 for (TempHeaderPtr
= FirstMemoryHeader
; TempHeaderPtr
!= NULL
; TempHeaderPtr
= TempHeaderPtr
->Next
) {
3287 if (TempHeaderPtr
->Next
== FreeMemoryHeader
) {
3289 // Link the before and after
3291 TempHeaderPtr
->Next
= FreeMemoryHeader
->Next
;
3298 Map address of request structure buffer.
3300 @param Uhc The UHCI device.
3301 @param Request The user request buffer.
3302 @param MappedAddr Mapped address of request.
3303 @param Map Identificaion of this mapping to return.
3305 @return EFI_SUCCESS Success.
3306 @return EFI_DEVICE_ERROR Fail to map the user request.
3310 UhciMapUserRequest (
3311 IN USB_UHC_DEV
*Uhc
,
3312 IN OUT VOID
*Request
,
3313 OUT UINT8
**MappedAddr
,
3319 EFI_PHYSICAL_ADDRESS PhyAddr
;
3321 Len
= sizeof (EFI_USB_DEVICE_REQUEST
);
3324 EdkiiIoMmuOperationBusMasterRead
,
3331 if (!EFI_ERROR (Status
)) {
3332 *MappedAddr
= (UINT8
*) (UINTN
) PhyAddr
;
3339 Map address of user data buffer.
3341 @param Uhc The UHCI device.
3342 @param Direction Direction of the data transfer.
3343 @param Data The user data buffer.
3344 @param Len Length of the user data.
3345 @param PktId Packet identificaion.
3346 @param MappedAddr Mapped address to return.
3347 @param Map Identificaion of this mapping to return.
3349 @return EFI_SUCCESS Success.
3350 @return EFI_DEVICE_ERROR Fail to map the user data.
3355 IN USB_UHC_DEV
*Uhc
,
3356 IN EFI_USB_DATA_DIRECTION Direction
,
3360 OUT UINT8
**MappedAddr
,
3365 EFI_PHYSICAL_ADDRESS PhyAddr
;
3367 Status
= EFI_SUCCESS
;
3369 switch (Direction
) {
3372 // BusMasterWrite means cpu read
3374 *PktId
= INPUT_PACKET_ID
;
3377 EdkiiIoMmuOperationBusMasterWrite
,
3384 if (EFI_ERROR (Status
)) {
3388 *MappedAddr
= (UINT8
*) (UINTN
) PhyAddr
;
3392 *PktId
= OUTPUT_PACKET_ID
;
3395 EdkiiIoMmuOperationBusMasterRead
,
3402 if (EFI_ERROR (Status
)) {
3406 *MappedAddr
= (UINT8
*) (UINTN
) PhyAddr
;
3410 if ((Len
!= NULL
) && (*Len
!= 0)) {
3411 Status
= EFI_INVALID_PARAMETER
;
3415 *PktId
= OUTPUT_PACKET_ID
;
3421 Status
= EFI_INVALID_PARAMETER
;