]> git.proxmox.com Git - mirror_edk2.git/blob - MdeModulePkg/Bus/Pci/UhciPei/UhcPeim.h
MdeModulePkg: Add PEI USB drivers and related PPIs
[mirror_edk2.git] / MdeModulePkg / Bus / Pci / UhciPei / UhcPeim.h
1 /** @file
2 Private Header file for Usb Host Controller PEIM
3
4 Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
5
6 This program and the accompanying materials
7 are licensed and made available under the terms and conditions
8 of the BSD License which accompanies this distribution. The
9 full text of the license may be found at
10 http://opensource.org/licenses/bsd-license.php
11
12 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
13 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
14
15 **/
16
17 #ifndef _RECOVERY_UHC_H_
18 #define _RECOVERY_UHC_H_
19
20
21 #include <PiPei.h>
22
23 #include <Ppi/UsbController.h>
24 #include <Ppi/UsbHostController.h>
25
26 #include <Library/DebugLib.h>
27 #include <Library/PeimEntryPoint.h>
28 #include <Library/PeiServicesLib.h>
29 #include <Library/BaseMemoryLib.h>
30 #include <Library/TimerLib.h>
31 #include <Library/IoLib.h>
32 #include <Library/PeiServicesLib.h>
33
34 #define USB_SLOW_SPEED_DEVICE 0x01
35 #define USB_FULL_SPEED_DEVICE 0x02
36
37 //
38 // One memory block uses 16 page
39 //
40 #define NORMAL_MEMORY_BLOCK_UNIT_IN_PAGES 16
41
42 #define USBCMD 0 /* Command Register Offset 00-01h */
43 #define USBCMD_RS BIT0 /* Run/Stop */
44 #define USBCMD_HCRESET BIT1 /* Host reset */
45 #define USBCMD_GRESET BIT2 /* Global reset */
46 #define USBCMD_EGSM BIT3 /* Global Suspend Mode */
47 #define USBCMD_FGR BIT4 /* Force Global Resume */
48 #define USBCMD_SWDBG BIT5 /* SW Debug mode */
49 #define USBCMD_CF BIT6 /* Config Flag (sw only) */
50 #define USBCMD_MAXP BIT7 /* Max Packet (0 = 32, 1 = 64) */
51
52 /* Status register */
53 #define USBSTS 2 /* Status Register Offset 02-03h */
54 #define USBSTS_USBINT BIT0 /* Interrupt due to IOC */
55 #define USBSTS_ERROR BIT1 /* Interrupt due to error */
56 #define USBSTS_RD BIT2 /* Resume Detect */
57 #define USBSTS_HSE BIT3 /* Host System Error - basically PCI problems */
58 #define USBSTS_HCPE BIT4 /* Host Controller Process Error - the scripts were buggy */
59 #define USBSTS_HCH BIT5 /* HC Halted */
60
61 /* Interrupt enable register */
62 #define USBINTR 4 /* Interrupt Enable Register 04-05h */
63 #define USBINTR_TIMEOUT BIT0 /* Timeout/CRC error enable */
64 #define USBINTR_RESUME BIT1 /* Resume interrupt enable */
65 #define USBINTR_IOC BIT2 /* Interrupt On Complete enable */
66 #define USBINTR_SP BIT3 /* Short packet interrupt enable */
67
68 /* Frame Number Register Offset 06-08h */
69 #define USBFRNUM 6
70
71 /* Frame List Base Address Register Offset 08-0Bh */
72 #define USBFLBASEADD 8
73
74 /* Start of Frame Modify Register Offset 0Ch */
75 #define USBSOF 0x0c
76
77 /* USB port status and control registers */
78 #define USBPORTSC1 0x10 /*Port 1 offset 10-11h */
79 #define USBPORTSC2 0x12 /*Port 2 offset 12-13h */
80
81 #define USBPORTSC_CCS BIT0 /* Current Connect Status ("device present") */
82 #define USBPORTSC_CSC BIT1 /* Connect Status Change */
83 #define USBPORTSC_PED BIT2 /* Port Enable / Disable */
84 #define USBPORTSC_PEDC BIT3 /* Port Enable / Disable Change */
85 #define USBPORTSC_LSL BIT4 /* Line Status Low bit*/
86 #define USBPORTSC_LSH BIT5 /* Line Status High bit*/
87 #define USBPORTSC_RD BIT6 /* Resume Detect */
88 #define USBPORTSC_LSDA BIT8 /* Low Speed Device Attached */
89 #define USBPORTSC_PR BIT9 /* Port Reset */
90 #define USBPORTSC_SUSP BIT12 /* Suspend */
91
92 #define SETUP_PACKET_ID 0x2D
93 #define INPUT_PACKET_ID 0x69
94 #define OUTPUT_PACKET_ID 0xE1
95 #define ERROR_PACKET_ID 0x55
96
97 #define STALL_1_MILLI_SECOND 1000
98
99
100 #pragma pack(1)
101
102 typedef struct {
103 UINT32 FrameListPtrTerminate : 1;
104 UINT32 FrameListPtrQSelect : 1;
105 UINT32 FrameListRsvd : 2;
106 UINT32 FrameListPtr : 28;
107 } FRAMELIST_ENTRY;
108
109 typedef struct {
110 UINT32 QHHorizontalTerminate : 1;
111 UINT32 QHHorizontalQSelect : 1;
112 UINT32 QHHorizontalRsvd : 2;
113 UINT32 QHHorizontalPtr : 28;
114 UINT32 QHVerticalTerminate : 1;
115 UINT32 QHVerticalQSelect : 1;
116 UINT32 QHVerticalRsvd : 2;
117 UINT32 QHVerticalPtr : 28;
118 } QUEUE_HEAD;
119
120 typedef struct {
121 QUEUE_HEAD QueueHead;
122 UINT32 Reserved1;
123 UINT32 Reserved2;
124 VOID *PtrNext;
125 VOID *PtrDown;
126 VOID *Reserved3;
127 UINT32 Reserved4;
128 } QH_STRUCT;
129
130 typedef struct {
131 UINT32 TDLinkPtrTerminate : 1;
132 UINT32 TDLinkPtrQSelect : 1;
133 UINT32 TDLinkPtrDepthSelect : 1;
134 UINT32 TDLinkPtrRsvd : 1;
135 UINT32 TDLinkPtr : 28;
136 UINT32 TDStatusActualLength : 11;
137 UINT32 TDStatusRsvd : 5;
138 UINT32 TDStatus : 8;
139 UINT32 TDStatusIOC : 1;
140 UINT32 TDStatusIOS : 1;
141 UINT32 TDStatusLS : 1;
142 UINT32 TDStatusErr : 2;
143 UINT32 TDStatusSPD : 1;
144 UINT32 TDStatusRsvd2 : 2;
145 UINT32 TDTokenPID : 8;
146 UINT32 TDTokenDevAddr : 7;
147 UINT32 TDTokenEndPt : 4;
148 UINT32 TDTokenDataToggle : 1;
149 UINT32 TDTokenRsvd : 1;
150 UINT32 TDTokenMaxLen : 11;
151 UINT32 TDBufferPtr;
152 } TD;
153
154 typedef struct {
155 TD TDData;
156 UINT8 *PtrTDBuffer;
157 VOID *PtrNextTD;
158 VOID *PtrNextQH;
159 UINT16 TDBufferLength;
160 UINT16 Reserved;
161 } TD_STRUCT;
162
163 #pragma pack()
164
165 typedef struct _MEMORY_MANAGE_HEADER MEMORY_MANAGE_HEADER;
166
167 struct _MEMORY_MANAGE_HEADER {
168 UINT8 *BitArrayPtr;
169 UINTN BitArraySizeInBytes;
170 UINT8 *MemoryBlockPtr;
171 UINTN MemoryBlockSizeInBytes;
172 MEMORY_MANAGE_HEADER *Next;
173 };
174
175 #define USB_UHC_DEV_SIGNATURE SIGNATURE_32 ('p', 'u', 'h', 'c')
176 typedef struct {
177 UINTN Signature;
178 PEI_USB_HOST_CONTROLLER_PPI UsbHostControllerPpi;
179 EFI_PEI_PPI_DESCRIPTOR PpiDescriptor;
180
181 UINT32 UsbHostControllerBaseAddress;
182 FRAMELIST_ENTRY *FrameListEntry;
183 QH_STRUCT *ConfigQH;
184 QH_STRUCT *BulkQH;
185 //
186 // Header1 used for QH,TD memory blocks management
187 //
188 MEMORY_MANAGE_HEADER *Header1;
189
190 } USB_UHC_DEV;
191
192 #define PEI_RECOVERY_USB_UHC_DEV_FROM_UHCI_THIS(a) CR (a, USB_UHC_DEV, UsbHostControllerPpi, USB_UHC_DEV_SIGNATURE)
193
194 /**
195 Submits control transfer to a target USB device.
196
197 @param PeiServices The pointer of EFI_PEI_SERVICES.
198 @param This The pointer of PEI_USB_HOST_CONTROLLER_PPI.
199 @param DeviceAddress The target device address.
200 @param DeviceSpeed Target device speed.
201 @param MaximumPacketLength Maximum packet size the default control transfer
202 endpoint is capable of sending or receiving.
203 @param Request USB device request to send.
204 @param TransferDirection Specifies the data direction for the data stage.
205 @param Data Data buffer to be transmitted or received from USB device.
206 @param DataLength The size (in bytes) of the data buffer.
207 @param TimeOut Indicates the maximum timeout, in millisecond.
208 @param TransferResult Return the result of this control transfer.
209
210 @retval EFI_SUCCESS Transfer was completed successfully.
211 @retval EFI_OUT_OF_RESOURCES The transfer failed due to lack of resources.
212 @retval EFI_INVALID_PARAMETER Some parameters are invalid.
213 @retval EFI_TIMEOUT Transfer failed due to timeout.
214 @retval EFI_DEVICE_ERROR Transfer failed due to host controller or device error.
215
216 **/
217 EFI_STATUS
218 EFIAPI
219 UhcControlTransfer (
220 IN EFI_PEI_SERVICES **PeiServices,
221 IN PEI_USB_HOST_CONTROLLER_PPI * This,
222 IN UINT8 DeviceAddress,
223 IN UINT8 DeviceSpeed,
224 IN UINT8 MaximumPacketLength,
225 IN EFI_USB_DEVICE_REQUEST * Request,
226 IN EFI_USB_DATA_DIRECTION TransferDirection,
227 IN OUT VOID *Data OPTIONAL,
228 IN OUT UINTN *DataLength OPTIONAL,
229 IN UINTN TimeOut,
230 OUT UINT32 *TransferResult
231 );
232
233 /**
234 Submits bulk transfer to a bulk endpoint of a USB device.
235
236 @param PeiServices The pointer of EFI_PEI_SERVICES.
237 @param This The pointer of PEI_USB_HOST_CONTROLLER_PPI.
238 @param DeviceAddress Target device address.
239 @param EndPointAddress Endpoint number and its direction in bit 7.
240 @param MaximumPacketLength Maximum packet size the endpoint is capable of
241 sending or receiving.
242 @param Data Array of pointers to the buffers of data to transmit
243 from or receive into.
244 @param DataLength The lenght of the data buffer.
245 @param DataToggle On input, the initial data toggle for the transfer;
246 On output, it is updated to to next data toggle to use of
247 the subsequent bulk transfer.
248 @param TimeOut Indicates the maximum time, in millisecond, which the
249 transfer is allowed to complete.
250 @param TransferResult A pointer to the detailed result information of the
251 bulk transfer.
252
253 @retval EFI_SUCCESS The transfer was completed successfully.
254 @retval EFI_OUT_OF_RESOURCES The transfer failed due to lack of resource.
255 @retval EFI_INVALID_PARAMETER Parameters are invalid.
256 @retval EFI_TIMEOUT The transfer failed due to timeout.
257 @retval EFI_DEVICE_ERROR The transfer failed due to host controller error.
258
259 **/
260 EFI_STATUS
261 EFIAPI
262 UhcBulkTransfer (
263 IN EFI_PEI_SERVICES **PeiServices,
264 IN PEI_USB_HOST_CONTROLLER_PPI *This,
265 IN UINT8 DeviceAddress,
266 IN UINT8 EndPointAddress,
267 IN UINT8 MaximumPacketLength,
268 IN OUT VOID *Data,
269 IN OUT UINTN *DataLength,
270 IN OUT UINT8 *DataToggle,
271 IN UINTN TimeOut,
272 OUT UINT32 *TransferResult
273 );
274
275 /**
276 Retrieves the number of root hub ports.
277
278 @param[in] PeiServices The pointer to the PEI Services Table.
279 @param[in] This The pointer to this instance of the
280 PEI_USB_HOST_CONTROLLER_PPI.
281 @param[out] PortNumber The pointer to the number of the root hub ports.
282
283 @retval EFI_SUCCESS The port number was retrieved successfully.
284 @retval EFI_INVALID_PARAMETER PortNumber is NULL.
285
286 **/
287 EFI_STATUS
288 EFIAPI
289 UhcGetRootHubPortNumber (
290 IN EFI_PEI_SERVICES **PeiServices,
291 IN PEI_USB_HOST_CONTROLLER_PPI *This,
292 OUT UINT8 *PortNumber
293 );
294
295 /**
296 Retrieves the current status of a USB root hub port.
297
298 @param PeiServices The pointer of EFI_PEI_SERVICES.
299 @param This The pointer of PEI_USB_HOST_CONTROLLER_PPI.
300 @param PortNumber The root hub port to retrieve the state from.
301 @param PortStatus Variable to receive the port state.
302
303 @retval EFI_SUCCESS The status of the USB root hub port specified.
304 by PortNumber was returned in PortStatus.
305 @retval EFI_INVALID_PARAMETER PortNumber is invalid.
306
307 **/
308 EFI_STATUS
309 EFIAPI
310 UhcGetRootHubPortStatus (
311 IN EFI_PEI_SERVICES **PeiServices,
312 IN PEI_USB_HOST_CONTROLLER_PPI *This,
313 IN UINT8 PortNumber,
314 OUT EFI_USB_PORT_STATUS *PortStatus
315 );
316
317 /**
318 Sets a feature for the specified root hub port.
319
320 @param PeiServices The pointer of EFI_PEI_SERVICES
321 @param This The pointer of PEI_USB_HOST_CONTROLLER_PPI
322 @param PortNumber Root hub port to set.
323 @param PortFeature Feature to set.
324
325 @retval EFI_SUCCESS The feature specified by PortFeature was set.
326 @retval EFI_INVALID_PARAMETER PortNumber is invalid or PortFeature is invalid.
327 @retval EFI_TIMEOUT The time out occurred.
328
329 **/
330 EFI_STATUS
331 EFIAPI
332 UhcSetRootHubPortFeature (
333 IN EFI_PEI_SERVICES **PeiServices,
334 IN PEI_USB_HOST_CONTROLLER_PPI *This,
335 IN UINT8 PortNumber,
336 IN EFI_USB_PORT_FEATURE PortFeature
337 );
338
339 /**
340 Clears a feature for the specified root hub port.
341
342 @param PeiServices The pointer of EFI_PEI_SERVICES.
343 @param This The pointer of PEI_USB_HOST_CONTROLLER_PPI.
344 @param PortNumber Specifies the root hub port whose feature
345 is requested to be cleared.
346 @param PortFeature Indicates the feature selector associated with the
347 feature clear request.
348
349 @retval EFI_SUCCESS The feature specified by PortFeature was cleared
350 for the USB root hub port specified by PortNumber.
351 @retval EFI_INVALID_PARAMETER PortNumber is invalid or PortFeature is invalid.
352
353 **/
354 EFI_STATUS
355 EFIAPI
356 UhcClearRootHubPortFeature (
357 IN EFI_PEI_SERVICES **PeiServices,
358 IN PEI_USB_HOST_CONTROLLER_PPI *This,
359 IN UINT8 PortNumber,
360 IN EFI_USB_PORT_FEATURE PortFeature
361 );
362
363 /**
364 Initialize UHCI.
365
366 @param UhcDev UHCI Device.
367
368 @retval EFI_SUCCESS UHCI successfully initialized.
369 @retval EFI_OUT_OF_RESOURCES Resource can not be allocated.
370
371 **/
372 EFI_STATUS
373 InitializeUsbHC (
374 IN USB_UHC_DEV *UhcDev
375 );
376
377 /**
378 Create Frame List Structure.
379
380 @param UhcDev UHCI device.
381
382 @retval EFI_OUT_OF_RESOURCES Can't allocate memory resources.
383 @retval EFI_SUCCESS Success.
384
385 **/
386 EFI_STATUS
387 CreateFrameList (
388 USB_UHC_DEV *UhcDev
389 );
390
391 /**
392 Read a 16bit width data from Uhc HC IO space register.
393
394 @param UhcDev The UHCI device.
395 @param Port The IO space address of the register.
396
397 @retval the register content read.
398
399 **/
400 UINT16
401 USBReadPortW (
402 IN USB_UHC_DEV *UhcDev,
403 IN UINT32 Port
404 );
405
406 /**
407 Write a 16bit width data into Uhc HC IO space register.
408
409 @param UhcDev The UHCI device.
410 @param Port The IO space address of the register.
411 @param Data The data written into the register.
412
413 **/
414 VOID
415 USBWritePortW (
416 IN USB_UHC_DEV *UhcDev,
417 IN UINT32 Port,
418 IN UINT16 Data
419 );
420
421 /**
422 Write a 32bit width data into Uhc HC IO space register.
423
424 @param UhcDev The UHCI device.
425 @param Port The IO space address of the register.
426 @param Data The data written into the register.
427
428 **/
429 VOID
430 USBWritePortDW (
431 IN USB_UHC_DEV *UhcDev,
432 IN UINT32 Port,
433 IN UINT32 Data
434 );
435
436 /**
437 Clear the content of UHCI's Status Register.
438
439 @param UhcDev The UHCI device.
440 @param StatusAddr The IO space address of the register.
441
442 **/
443 VOID
444 ClearStatusReg (
445 IN USB_UHC_DEV *UhcDev,
446 IN UINT32 StatusAddr
447 );
448
449 /**
450 Check whether the host controller operates well.
451
452 @param UhcDev The UHCI device.
453 @param StatusRegAddr The io address of status register.
454
455 @retval TRUE Host controller is working.
456 @retval FALSE Host controller is halted or system error.
457
458 **/
459 BOOLEAN
460 IsStatusOK (
461 IN USB_UHC_DEV *UhcDev,
462 IN UINT32 StatusRegAddr
463 );
464
465 /**
466 Get Current Frame Number.
467
468 @param UhcDev The UHCI device.
469 @param FrameNumberAddr The address of frame list register.
470
471 @retval The content of the frame list register.
472
473 **/
474 UINT16
475 GetCurrentFrameNumber (
476 IN USB_UHC_DEV *UhcDev,
477 IN UINT32 FrameNumberAddr
478 );
479
480 /**
481 Set Frame List Base Address.
482
483 @param UhcDev The UHCI device.
484 @param FrameListRegAddr The address of frame list register.
485 @param Addr The address of frame list table.
486
487 **/
488 VOID
489 SetFrameListBaseAddress (
490 IN USB_UHC_DEV *UhcDev,
491 IN UINT32 FrameListRegAddr,
492 IN UINT32 Addr
493 );
494
495 /**
496 Create QH and initialize.
497
498 @param UhcDev The UHCI device.
499 @param PtrQH Place to store QH_STRUCT pointer.
500
501 @retval EFI_OUT_OF_RESOURCES Can't allocate memory resources.
502 @retval EFI_SUCCESS Success.
503
504 **/
505 EFI_STATUS
506 CreateQH (
507 IN USB_UHC_DEV *UhcDev,
508 OUT QH_STRUCT **PtrQH
509 );
510
511 /**
512 Set the horizontal link pointer in QH.
513
514 @param PtrQH Place to store QH_STRUCT pointer.
515 @param PtrNext Place to the next QH_STRUCT.
516
517 **/
518 VOID
519 SetQHHorizontalLinkPtr (
520 IN QH_STRUCT *PtrQH,
521 IN VOID *PtrNext
522 );
523
524 /**
525 Get the horizontal link pointer in QH.
526
527 @param PtrQH Place to store QH_STRUCT pointer.
528
529 @retval The horizontal link pointer in QH.
530
531 **/
532 VOID *
533 GetQHHorizontalLinkPtr (
534 IN QH_STRUCT *PtrQH
535 );
536
537 /**
538 Set a QH or TD horizontally to be connected with a specific QH.
539
540 @param PtrQH Place to store QH_STRUCT pointer.
541 @param IsQH Specify QH or TD is connected.
542
543 **/
544 VOID
545 SetQHHorizontalQHorTDSelect (
546 IN QH_STRUCT *PtrQH,
547 IN BOOLEAN IsQH
548 );
549
550 /**
551 Set the horizontal validor bit in QH.
552
553 @param PtrQH Place to store QH_STRUCT pointer.
554 @param IsValid Specify the horizontal linker is valid or not.
555
556 **/
557 VOID
558 SetQHHorizontalValidorInvalid (
559 IN QH_STRUCT *PtrQH,
560 IN BOOLEAN IsValid
561 );
562
563 /**
564 Set the vertical link pointer in QH.
565
566 @param PtrQH Place to store QH_STRUCT pointer.
567 @param PtrNext Place to the next QH_STRUCT.
568
569 **/
570 VOID
571 SetQHVerticalLinkPtr (
572 IN QH_STRUCT *PtrQH,
573 IN VOID *PtrNext
574 );
575
576 /**
577 Set a QH or TD vertically to be connected with a specific QH.
578
579 @param PtrQH Place to store QH_STRUCT pointer.
580 @param IsQH Specify QH or TD is connected.
581
582 **/
583 VOID
584 SetQHVerticalQHorTDSelect (
585 IN QH_STRUCT *PtrQH,
586 IN BOOLEAN IsQH
587 );
588
589 /**
590 Set the vertical validor bit in QH.
591
592 @param PtrQH Place to store QH_STRUCT pointer.
593 @param IsValid Specify the vertical linker is valid or not.
594
595 **/
596 VOID
597 SetQHVerticalValidorInvalid (
598 IN QH_STRUCT *PtrQH,
599 IN BOOLEAN IsValid
600 );
601
602 /**
603 Get the vertical validor bit in QH.
604
605 @param PtrQH Place to store QH_STRUCT pointer.
606
607 @retval The vertical linker is valid or not.
608
609 **/
610 BOOLEAN
611 GetQHHorizontalValidorInvalid (
612 IN QH_STRUCT *PtrQH
613 );
614
615 /**
616 Allocate TD or QH Struct.
617
618 @param UhcDev The UHCI device.
619 @param Size The size of allocation.
620 @param PtrStruct Place to store TD_STRUCT pointer.
621
622 @return EFI_SUCCESS Allocate successfully.
623 @retval EFI_OUT_OF_RESOURCES Can't allocate memory resource.
624
625 **/
626 EFI_STATUS
627 AllocateTDorQHStruct (
628 IN USB_UHC_DEV *UhcDev,
629 IN UINT32 Size,
630 OUT VOID **PtrStruct
631 );
632
633 /**
634 Create a TD Struct.
635
636 @param UhcDev The UHCI device.
637 @param PtrTD Place to store TD_STRUCT pointer.
638
639 @return EFI_SUCCESS Allocate successfully.
640 @retval EFI_OUT_OF_RESOURCES Can't allocate memory resource.
641
642 **/
643 EFI_STATUS
644 CreateTD (
645 IN USB_UHC_DEV *UhcDev,
646 OUT TD_STRUCT **PtrTD
647 );
648
649 /**
650 Generate Setup Stage TD.
651
652 @param UhcDev The UHCI device.
653 @param DevAddr Device address.
654 @param Endpoint Endpoint number.
655 @param DeviceSpeed Device Speed.
656 @param DevRequest Device reuquest.
657 @param RequestLen Request length.
658 @param PtrTD TD_STRUCT generated.
659
660 @return EFI_SUCCESS Generate setup stage TD successfully.
661 @retval EFI_OUT_OF_RESOURCES Can't allocate memory resource.
662
663 **/
664 EFI_STATUS
665 GenSetupStageTD (
666 IN USB_UHC_DEV *UhcDev,
667 IN UINT8 DevAddr,
668 IN UINT8 Endpoint,
669 IN UINT8 DeviceSpeed,
670 IN UINT8 *DevRequest,
671 IN UINT8 RequestLen,
672 OUT TD_STRUCT **PtrTD
673 );
674
675 /**
676 Generate Data Stage TD.
677
678 @param UhcDev The UHCI device.
679 @param DevAddr Device address.
680 @param Endpoint Endpoint number.
681 @param PtrData Data buffer.
682 @param Len Data length.
683 @param PktID PacketID.
684 @param Toggle Data toggle value.
685 @param DeviceSpeed Device Speed.
686 @param PtrTD TD_STRUCT generated.
687
688 @return EFI_SUCCESS Generate data stage TD successfully.
689 @retval EFI_OUT_OF_RESOURCES Can't allocate memory resource.
690
691 **/
692 EFI_STATUS
693 GenDataTD (
694 IN USB_UHC_DEV *UhcDev,
695 IN UINT8 DevAddr,
696 IN UINT8 Endpoint,
697 IN UINT8 *PtrData,
698 IN UINT8 Len,
699 IN UINT8 PktID,
700 IN UINT8 Toggle,
701 IN UINT8 DeviceSpeed,
702 OUT TD_STRUCT **PtrTD
703 );
704
705 /**
706 Generate Status Stage TD.
707
708 @param UhcDev The UHCI device.
709 @param DevAddr Device address.
710 @param Endpoint Endpoint number.
711 @param PktID PacketID.
712 @param DeviceSpeed Device Speed.
713 @param PtrTD TD_STRUCT generated.
714
715 @return EFI_SUCCESS Generate status stage TD successfully.
716 @retval EFI_OUT_OF_RESOURCES Can't allocate memory resource.
717
718 **/
719 EFI_STATUS
720 CreateStatusTD (
721 IN USB_UHC_DEV *UhcDev,
722 IN UINT8 DevAddr,
723 IN UINT8 Endpoint,
724 IN UINT8 PktID,
725 IN UINT8 DeviceSpeed,
726 OUT TD_STRUCT **PtrTD
727 );
728
729 /**
730 Set the link pointer validor bit in TD.
731
732 @param PtrTDStruct Place to store TD_STRUCT pointer.
733 @param IsValid Specify the linker pointer is valid or not.
734
735 **/
736 VOID
737 SetTDLinkPtrValidorInvalid (
738 IN TD_STRUCT *PtrTDStruct,
739 IN BOOLEAN IsValid
740 );
741
742 /**
743 Set the Link Pointer pointing to a QH or TD.
744
745 @param PtrTDStruct Place to store TD_STRUCT pointer.
746 @param IsQH Specify QH or TD is connected.
747
748 **/
749 VOID
750 SetTDLinkPtrQHorTDSelect (
751 IN TD_STRUCT *PtrTDStruct,
752 IN BOOLEAN IsQH
753 );
754
755 /**
756 Set the traverse is depth-first or breadth-first.
757
758 @param PtrTDStruct Place to store TD_STRUCT pointer.
759 @param IsDepth Specify the traverse is depth-first or breadth-first.
760
761 **/
762 VOID
763 SetTDLinkPtrDepthorBreadth (
764 IN TD_STRUCT *PtrTDStruct,
765 IN BOOLEAN IsDepth
766 );
767
768 /**
769 Set TD Link Pointer in TD.
770
771 @param PtrTDStruct Place to store TD_STRUCT pointer.
772 @param PtrNext Place to the next TD_STRUCT.
773
774 **/
775 VOID
776 SetTDLinkPtr (
777 IN TD_STRUCT *PtrTDStruct,
778 IN VOID *PtrNext
779 );
780
781 /**
782 Get TD Link Pointer.
783
784 @param PtrTDStruct Place to store TD_STRUCT pointer.
785
786 @retval Get TD Link Pointer in TD.
787
788 **/
789 VOID*
790 GetTDLinkPtr (
791 IN TD_STRUCT *PtrTDStruct
792 );
793
794 /**
795 Get the information about whether the Link Pointer field pointing to
796 a QH or a TD.
797
798 @param PtrTDStruct Place to store TD_STRUCT pointer.
799
800 @retval whether the Link Pointer field pointing to a QH or a TD.
801
802 **/
803 BOOLEAN
804 IsTDLinkPtrQHOrTD (
805 IN TD_STRUCT *PtrTDStruct
806 );
807
808 /**
809 Enable/Disable short packet detection mechanism.
810
811 @param PtrTDStruct Place to store TD_STRUCT pointer.
812 @param IsEnable Enable or disable short packet detection mechanism.
813
814 **/
815 VOID
816 EnableorDisableTDShortPacket (
817 IN TD_STRUCT *PtrTDStruct,
818 IN BOOLEAN IsEnable
819 );
820
821 /**
822 Set the max error counter in TD.
823
824 @param PtrTDStruct Place to store TD_STRUCT pointer.
825 @param MaxErrors The number of allowable error.
826
827 **/
828 VOID
829 SetTDControlErrorCounter (
830 IN TD_STRUCT *PtrTDStruct,
831 IN UINT8 MaxErrors
832 );
833
834 /**
835 Set the TD is targeting a low-speed device or not.
836
837 @param PtrTDStruct Place to store TD_STRUCT pointer.
838 @param IsLowSpeedDevice Whether The device is low-speed.
839
840 **/
841 VOID
842 SetTDLoworFullSpeedDevice (
843 IN TD_STRUCT *PtrTDStruct,
844 IN BOOLEAN IsLowSpeedDevice
845 );
846
847 /**
848 Set the TD is isochronous transfer type or not.
849
850 @param PtrTDStruct Place to store TD_STRUCT pointer.
851 @param IsIsochronous Whether the transaction isochronous transfer type.
852
853 **/
854 VOID
855 SetTDControlIsochronousorNot (
856 IN TD_STRUCT *PtrTDStruct,
857 IN BOOLEAN IsIsochronous
858 );
859
860 /**
861 Set if UCHI should issue an interrupt on completion of the frame
862 in which this TD is executed
863
864 @param PtrTDStruct Place to store TD_STRUCT pointer.
865 @param IsSet Whether HC should issue an interrupt on completion.
866
867 **/
868 VOID
869 SetorClearTDControlIOC (
870 IN TD_STRUCT *PtrTDStruct,
871 IN BOOLEAN IsSet
872 );
873
874 /**
875 Set if the TD is active and can be executed.
876
877 @param PtrTDStruct Place to store TD_STRUCT pointer.
878 @param IsActive Whether the TD is active and can be executed.
879
880 **/
881 VOID
882 SetTDStatusActiveorInactive (
883 IN TD_STRUCT *PtrTDStruct,
884 IN BOOLEAN IsActive
885 );
886
887 /**
888 Specifies the maximum number of data bytes allowed for the transfer.
889
890 @param PtrTDStruct Place to store TD_STRUCT pointer.
891 @param MaxLen The maximum number of data bytes allowed.
892
893 @retval The allowed maximum number of data.
894 **/
895 UINT16
896 SetTDTokenMaxLength (
897 IN TD_STRUCT *PtrTDStruct,
898 IN UINT16 MaxLen
899 );
900
901 /**
902 Set the data toggle bit to DATA1.
903
904 @param PtrTDStruct Place to store TD_STRUCT pointer.
905
906 **/
907 VOID
908 SetTDTokenDataToggle1 (
909 IN TD_STRUCT *PtrTDStruct
910 );
911
912 /**
913 Set the data toggle bit to DATA0.
914
915 @param PtrTDStruct Place to store TD_STRUCT pointer.
916
917 **/
918 VOID
919 SetTDTokenDataToggle0 (
920 IN TD_STRUCT *PtrTDStruct
921 );
922
923 /**
924 Set EndPoint Number the TD is targeting at.
925
926 @param PtrTDStruct Place to store TD_STRUCT pointer.
927 @param EndPoint The Endport number of the target.
928
929 **/
930 VOID
931 SetTDTokenEndPoint (
932 IN TD_STRUCT *PtrTDStruct,
933 IN UINTN EndPoint
934 );
935
936 /**
937 Set Device Address the TD is targeting at.
938
939 @param PtrTDStruct Place to store TD_STRUCT pointer.
940 @param DevAddr The Device Address of the target.
941
942 **/
943 VOID
944 SetTDTokenDeviceAddress (
945 IN TD_STRUCT *PtrTDStruct,
946 IN UINTN DevAddr
947 );
948
949 /**
950 Set Packet Identification the TD is targeting at.
951
952 @param PtrTDStruct Place to store TD_STRUCT pointer.
953 @param PacketID The Packet Identification of the target.
954
955 **/
956 VOID
957 SetTDTokenPacketID (
958 IN TD_STRUCT *PtrTDStruct,
959 IN UINT8 PacketID
960 );
961
962 /**
963 Set the beginning address of the data buffer that will be used
964 during the transaction.
965
966 @param PtrTDStruct Place to store TD_STRUCT pointer.
967
968 **/
969 VOID
970 SetTDDataBuffer (
971 IN TD_STRUCT *PtrTDStruct
972 );
973
974 /**
975 Detect whether the TD is active.
976
977 @param PtrTDStruct Place to store TD_STRUCT pointer.
978
979 @retval The TD is active or not.
980
981 **/
982 BOOLEAN
983 IsTDStatusActive (
984 IN TD_STRUCT *PtrTDStruct
985 );
986
987 /**
988 Detect whether the TD is stalled.
989
990 @param PtrTDStruct Place to store TD_STRUCT pointer.
991
992 @retval The TD is stalled or not.
993
994 **/
995 BOOLEAN
996 IsTDStatusStalled (
997 IN TD_STRUCT *PtrTDStruct
998 );
999
1000 /**
1001 Detect whether Data Buffer Error is happened.
1002
1003 @param PtrTDStruct Place to store TD_STRUCT pointer.
1004
1005 @retval The Data Buffer Error is happened or not.
1006
1007 **/
1008 BOOLEAN
1009 IsTDStatusBufferError (
1010 IN TD_STRUCT *PtrTDStruct
1011 );
1012
1013 /**
1014 Detect whether Babble Error is happened.
1015
1016 @param PtrTDStruct Place to store TD_STRUCT pointer.
1017
1018 @retval The Babble Error is happened or not.
1019
1020 **/
1021 BOOLEAN
1022 IsTDStatusBabbleError (
1023 IN TD_STRUCT *PtrTDStruct
1024 );
1025
1026 /**
1027 Detect whether NAK is received.
1028
1029 @param PtrTDStruct Place to store TD_STRUCT pointer.
1030
1031 @retval The NAK is received or not.
1032
1033 **/
1034 BOOLEAN
1035 IsTDStatusNAKReceived (
1036 IN TD_STRUCT *PtrTDStruct
1037 );
1038
1039 /**
1040 Detect whether CRC/Time Out Error is encountered.
1041
1042 @param PtrTDStruct Place to store TD_STRUCT pointer.
1043
1044 @retval The CRC/Time Out Error is encountered or not.
1045
1046 **/
1047 BOOLEAN
1048 IsTDStatusCRCTimeOutError (
1049 IN TD_STRUCT *PtrTDStruct
1050 );
1051
1052 /**
1053 Detect whether Bitstuff Error is received.
1054
1055 @param PtrTDStruct Place to store TD_STRUCT pointer.
1056
1057 @retval The Bitstuff Error is received or not.
1058
1059 **/
1060 BOOLEAN
1061 IsTDStatusBitStuffError (
1062 IN TD_STRUCT *PtrTDStruct
1063 );
1064
1065 /**
1066 Retrieve the actual number of bytes that were tansferred.
1067
1068 @param PtrTDStruct Place to store TD_STRUCT pointer.
1069
1070 @retval The actual number of bytes that were tansferred.
1071
1072 **/
1073 UINT16
1074 GetTDStatusActualLength (
1075 IN TD_STRUCT *PtrTDStruct
1076 );
1077
1078 /**
1079 Retrieve the information of whether the Link Pointer field is valid or not.
1080
1081 @param PtrTDStruct Place to store TD_STRUCT pointer.
1082
1083 @retval The linker pointer field is valid or not.
1084
1085 **/
1086 BOOLEAN
1087 GetTDLinkPtrValidorInvalid (
1088 IN TD_STRUCT *PtrTDStruct
1089 );
1090
1091 /**
1092 Count TD Number from PtrFirstTD.
1093
1094 @param PtrFirstTD Place to store TD_STRUCT pointer.
1095
1096 @retval The queued TDs number.
1097
1098 **/
1099 UINTN
1100 CountTDsNumber (
1101 IN TD_STRUCT *PtrFirstTD
1102 );
1103
1104 /**
1105 Link TD To QH.
1106
1107 @param PtrQH Place to store QH_STRUCT pointer.
1108 @param PtrTD Place to store TD_STRUCT pointer.
1109
1110 **/
1111 VOID
1112 LinkTDToQH (
1113 IN QH_STRUCT *PtrQH,
1114 IN TD_STRUCT *PtrTD
1115 );
1116
1117 /**
1118 Link TD To TD.
1119
1120 @param PtrPreTD Place to store TD_STRUCT pointer.
1121 @param PtrTD Place to store TD_STRUCT pointer.
1122
1123 **/
1124 VOID
1125 LinkTDToTD (
1126 IN TD_STRUCT *PtrPreTD,
1127 IN TD_STRUCT *PtrTD
1128 );
1129
1130 /**
1131 Execute Control Transfer.
1132
1133 @param UhcDev The UCHI device.
1134 @param PtrTD A pointer to TD_STRUCT data.
1135 @param ActualLen Actual transfer Length.
1136 @param TimeOut TimeOut value.
1137 @param TransferResult Transfer Result.
1138
1139 @return EFI_DEVICE_ERROR The transfer failed due to transfer error.
1140 @return EFI_TIMEOUT The transfer failed due to time out.
1141 @return EFI_SUCCESS The transfer finished OK.
1142
1143 **/
1144 EFI_STATUS
1145 ExecuteControlTransfer (
1146 IN USB_UHC_DEV *UhcDev,
1147 IN TD_STRUCT *PtrTD,
1148 OUT UINTN *ActualLen,
1149 IN UINTN TimeOut,
1150 OUT UINT32 *TransferResult
1151 );
1152
1153 /**
1154 Execute Bulk Transfer.
1155
1156 @param UhcDev The UCHI device.
1157 @param PtrTD A pointer to TD_STRUCT data.
1158 @param ActualLen Actual transfer Length.
1159 @param DataToggle DataToggle value.
1160 @param TimeOut TimeOut value.
1161 @param TransferResult Transfer Result.
1162
1163 @return EFI_DEVICE_ERROR The transfer failed due to transfer error.
1164 @return EFI_TIMEOUT The transfer failed due to time out.
1165 @return EFI_SUCCESS The transfer finished OK.
1166
1167 **/
1168 EFI_STATUS
1169 ExecBulkTransfer (
1170 IN USB_UHC_DEV *UhcDev,
1171 IN TD_STRUCT *PtrTD,
1172 IN OUT UINTN *ActualLen,
1173 IN UINT8 *DataToggle,
1174 IN UINTN TimeOut,
1175 OUT UINT32 *TransferResult
1176 );
1177
1178 /**
1179 Delete Queued TDs.
1180
1181 @param UhcDev The UCHI device.
1182 @param PtrFirstTD Place to store TD_STRUCT pointer.
1183
1184 **/
1185 VOID
1186 DeleteQueuedTDs (
1187 IN USB_UHC_DEV *UhcDev,
1188 IN TD_STRUCT *PtrFirstTD
1189 );
1190
1191 /**
1192 Check TDs Results.
1193
1194 @param PtrTD A pointer to TD_STRUCT data.
1195 @param Result The result to return.
1196 @param ErrTDPos The Error TD position.
1197 @param ActualTransferSize Actual transfer size.
1198
1199 @retval The TD is executed successfully or not.
1200
1201 **/
1202 BOOLEAN
1203 CheckTDsResults (
1204 IN TD_STRUCT *PtrTD,
1205 OUT UINT32 *Result,
1206 OUT UINTN *ErrTDPos,
1207 OUT UINTN *ActualTransferSize
1208 );
1209
1210 /**
1211 Create Memory Block.
1212
1213 @param UhcDev The UCHI device.
1214 @param MemoryHeader The Pointer to allocated memory block.
1215 @param MemoryBlockSizeInPages The page size of memory block to be allocated.
1216
1217 @retval EFI_OUT_OF_RESOURCES Can't allocate memory resources.
1218 @retval EFI_SUCCESS Success.
1219
1220 **/
1221 EFI_STATUS
1222 CreateMemoryBlock (
1223 IN USB_UHC_DEV *UhcDev,
1224 OUT MEMORY_MANAGE_HEADER **MemoryHeader,
1225 IN UINTN MemoryBlockSizeInPages
1226 );
1227
1228 /**
1229 Initialize UHCI memory management.
1230
1231 @param UhcDev The UCHI device.
1232
1233 @retval EFI_OUT_OF_RESOURCES Can't allocate memory resources.
1234 @retval EFI_SUCCESS Success.
1235
1236 **/
1237 EFI_STATUS
1238 InitializeMemoryManagement (
1239 IN USB_UHC_DEV *UhcDev
1240 );
1241
1242 /**
1243 Initialize UHCI memory management.
1244
1245 @param UhcDev The UCHI device.
1246 @param Pool Buffer pointer to store the buffer pointer.
1247 @param AllocSize The size of the pool to be allocated.
1248
1249 @retval EFI_OUT_OF_RESOURCES Can't allocate memory resources.
1250 @retval EFI_SUCCESS Success.
1251
1252 **/
1253 EFI_STATUS
1254 UhcAllocatePool (
1255 IN USB_UHC_DEV *UhcDev,
1256 OUT UINT8 **Pool,
1257 IN UINTN AllocSize
1258 );
1259
1260 /**
1261 Alloc Memory In MemoryBlock.
1262
1263 @param MemoryHeader The pointer to memory manage header.
1264 @param Pool Buffer pointer to store the buffer pointer.
1265 @param NumberOfMemoryUnit The size of the pool to be allocated.
1266
1267 @retval EFI_OUT_OF_RESOURCES Can't allocate memory resources.
1268 @retval EFI_SUCCESS Success.
1269
1270 **/
1271 EFI_STATUS
1272 AllocMemInMemoryBlock (
1273 IN MEMORY_MANAGE_HEADER *MemoryHeader,
1274 OUT VOID **Pool,
1275 IN UINTN NumberOfMemoryUnit
1276 );
1277
1278 /**
1279 Uhci Free Pool.
1280
1281 @param UhcDev The UHCI device.
1282 @param Pool A pointer to store the buffer address.
1283 @param AllocSize The size of the pool to be freed.
1284
1285 **/
1286 VOID
1287 UhcFreePool (
1288 IN USB_UHC_DEV *UhcDev,
1289 IN UINT8 *Pool,
1290 IN UINTN AllocSize
1291 );
1292
1293 /**
1294 Insert a new memory header into list.
1295
1296 @param MemoryHeader A pointer to the memory header list.
1297 @param NewMemoryHeader A new memory header to be inserted into the list.
1298
1299 **/
1300 VOID
1301 InsertMemoryHeaderToList (
1302 IN MEMORY_MANAGE_HEADER *MemoryHeader,
1303 IN MEMORY_MANAGE_HEADER *NewMemoryHeader
1304 );
1305
1306 /**
1307 Judge the memory block in the memory header is empty or not.
1308
1309 @param MemoryHeaderPtr A pointer to the memory header list.
1310
1311 @retval Whether the memory block in the memory header is empty or not.
1312
1313 **/
1314 BOOLEAN
1315 IsMemoryBlockEmptied (
1316 IN MEMORY_MANAGE_HEADER *MemoryHeaderPtr
1317 );
1318
1319 /**
1320 remove a memory header from list.
1321
1322 @param FirstMemoryHeader A pointer to the memory header list.
1323 @param FreeMemoryHeader A memory header to be removed into the list.
1324
1325 **/
1326 VOID
1327 DelinkMemoryBlock (
1328 IN MEMORY_MANAGE_HEADER *FirstMemoryHeader,
1329 IN MEMORY_MANAGE_HEADER *FreeMemoryHeader
1330 );
1331
1332 #endif