2 ACPI 5.0 definitions from the ACPI Specification Revision 5.0 December 6, 2011
4 Copyright (c) 2011 - 2012, Intel Corporation. All rights reserved.<BR>
5 This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
17 #include <IndustryStandard/Acpi40.h>
20 // Define for Desriptor
22 #define ACPI_SMALL_FIXED_DMA_DESCRIPTOR_NAME 0x0A
23 #define ACPI_LARGE_GPIO_CONNECTION_DESCRIPTOR_NAME 0x0C
24 #define ACPI_LARGE_GENERIC_SERIAL_BUS_CONNECTION_DESCRIPTOR_NAME 0x0E
26 #define ACPI_FIXED_DMA_DESCRIPTOR 0x55
27 #define ACPI_GPIO_CONNECTION_DESCRIPTOR 0x8C
28 #define ACPI_GENERIC_SERIAL_BUS_CONNECTION_DESCRIPTOR 0x8E
33 /// Generic DMA Descriptor.
35 typedef PACKED
struct {
36 ACPI_SMALL_RESOURCE_HEADER Header
;
37 UINT16 DmaRequestLine
;
39 UINT8 DmaTransferWidth
;
40 } EFI_ACPI_FIXED_DMA_DESCRIPTOR
;
43 /// GPIO Connection Descriptor
45 typedef PACKED
struct {
46 ACPI_LARGE_RESOURCE_HEADER Header
;
50 UINT16 InterruptFlags
;
51 UINT8 PinConfiguration
;
52 UINT16 OutputDriveStrength
;
53 UINT16 DebounceTimeout
;
54 UINT16 PinTableOffset
;
55 UINT8 ResourceSourceIndex
;
56 UINT16 ResourceSourceNameOffset
;
57 UINT16 VendorDataOffset
;
58 UINT16 VendorDataLength
;
59 } EFI_ACPI_GPIO_CONNECTION_DESCRIPTOR
;
61 #define EFI_ACPI_GPIO_CONNECTION_TYPE_INTERRUPT 0x0
62 #define EFI_ACPI_GPIO_CONNECTION_TYPE_IO 0x1
65 /// Serial Bus Resource Descriptor (Generic)
67 typedef PACKED
struct {
68 ACPI_LARGE_RESOURCE_HEADER Header
;
70 UINT8 ResourceSourceIndex
;
73 UINT16 TypeSpecificFlags
;
74 UINT8 TypeSpecificRevisionId
;
75 UINT16 TypeDataLength
;
77 } EFI_ACPI_SERIAL_BUS_RESOURCE_DESCRIPTOR
;
79 #define EFI_ACPI_SERIAL_BUS_RESOURCE_TYPE_I2C 0x1
80 #define EFI_ACPI_SERIAL_BUS_RESOURCE_TYPE_SPI 0x2
81 #define EFI_ACPI_SERIAL_BUS_RESOURCE_TYPE_UART 0x3
84 /// Serial Bus Resource Descriptor (I2C)
86 typedef PACKED
struct {
87 ACPI_LARGE_RESOURCE_HEADER Header
;
89 UINT8 ResourceSourceIndex
;
92 UINT16 TypeSpecificFlags
;
93 UINT8 TypeSpecificRevisionId
;
94 UINT16 TypeDataLength
;
95 UINT32 ConnectionSpeed
;
97 } EFI_ACPI_SERIAL_BUS_RESOURCE_I2C_DESCRIPTOR
;
100 /// Serial Bus Resource Descriptor (SPI)
102 typedef PACKED
struct {
103 ACPI_LARGE_RESOURCE_HEADER Header
;
105 UINT8 ResourceSourceIndex
;
108 UINT16 TypeSpecificFlags
;
109 UINT8 TypeSpecificRevisionId
;
110 UINT16 TypeDataLength
;
111 UINT32 ConnectionSpeed
;
115 UINT16 DeviceSelection
;
116 } EFI_ACPI_SERIAL_BUS_RESOURCE_SPI_DESCRIPTOR
;
119 /// Serial Bus Resource Descriptor (UART)
121 typedef PACKED
struct {
122 ACPI_LARGE_RESOURCE_HEADER Header
;
124 UINT8 ResourceSourceIndex
;
127 UINT16 TypeSpecificFlags
;
128 UINT8 TypeSpecificRevisionId
;
129 UINT16 TypeDataLength
;
130 UINT32 DefaultBaudRate
;
134 UINT8 SerialLinesEnabled
;
135 } EFI_ACPI_SERIAL_BUS_RESOURCE_UART_DESCRIPTOR
;
140 // Ensure proper structure formats
145 /// ACPI 5.0 Generic Address Space definition
148 UINT8 AddressSpaceId
;
149 UINT8 RegisterBitWidth
;
150 UINT8 RegisterBitOffset
;
153 } EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE
;
156 // Generic Address Space Address IDs
158 #define EFI_ACPI_5_0_SYSTEM_MEMORY 0
159 #define EFI_ACPI_5_0_SYSTEM_IO 1
160 #define EFI_ACPI_5_0_PCI_CONFIGURATION_SPACE 2
161 #define EFI_ACPI_5_0_EMBEDDED_CONTROLLER 3
162 #define EFI_ACPI_5_0_SMBUS 4
163 #define EFI_ACPI_5_0_FUNCTIONAL_FIXED_HARDWARE 0x7F
166 // Generic Address Space Access Sizes
168 #define EFI_ACPI_5_0_UNDEFINED 0
169 #define EFI_ACPI_5_0_BYTE 1
170 #define EFI_ACPI_5_0_WORD 2
171 #define EFI_ACPI_5_0_DWORD 3
172 #define EFI_ACPI_5_0_QWORD 4
175 // ACPI 5.0 table structures
179 /// Root System Description Pointer Structure
189 UINT8 ExtendedChecksum
;
191 } EFI_ACPI_5_0_ROOT_SYSTEM_DESCRIPTION_POINTER
;
194 /// RSD_PTR Revision (as defined in ACPI 5.0 spec.)
196 #define EFI_ACPI_5_0_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02 ///< ACPISpec (Revision 5.0) says current value is 2
199 /// Common table header, this prefaces all ACPI tables, including FACS, but
200 /// excluding the RSD PTR structure
205 } EFI_ACPI_5_0_COMMON_HEADER
;
208 // Root System Description Table
209 // No definition needed as it is a common description table header, the same with
210 // EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT32 table pointers.
214 /// RSDT Revision (as defined in ACPI 5.0 spec.)
216 #define EFI_ACPI_5_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
219 // Extended System Description Table
220 // No definition needed as it is a common description table header, the same with
221 // EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT64 table pointers.
225 /// XSDT Revision (as defined in ACPI 5.0 spec.)
227 #define EFI_ACPI_5_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
230 /// Fixed ACPI Description Table Structure (FADT)
233 EFI_ACPI_DESCRIPTION_HEADER Header
;
237 UINT8 PreferredPmProfile
;
272 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE ResetReg
;
275 UINT64 XFirmwareCtrl
;
277 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk
;
278 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk
;
279 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk
;
280 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk
;
281 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk
;
282 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk
;
283 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XGpe0Blk
;
284 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XGpe1Blk
;
285 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE SleepControlReg
;
286 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE SleepStatusReg
;
287 } EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE
;
290 /// FADT Version (as defined in ACPI 5.0 spec.)
292 #define EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x05
295 // Fixed ACPI Description Table Preferred Power Management Profile
297 #define EFI_ACPI_5_0_PM_PROFILE_UNSPECIFIED 0
298 #define EFI_ACPI_5_0_PM_PROFILE_DESKTOP 1
299 #define EFI_ACPI_5_0_PM_PROFILE_MOBILE 2
300 #define EFI_ACPI_5_0_PM_PROFILE_WORKSTATION 3
301 #define EFI_ACPI_5_0_PM_PROFILE_ENTERPRISE_SERVER 4
302 #define EFI_ACPI_5_0_PM_PROFILE_SOHO_SERVER 5
303 #define EFI_ACPI_5_0_PM_PROFILE_APPLIANCE_PC 6
304 #define EFI_ACPI_5_0_PM_PROFILE_PERFORMANCE_SERVER 7
305 #define EFI_ACPI_5_0_PM_PROFILE_TABLET 8
308 // Fixed ACPI Description Table Boot Architecture Flags
309 // All other bits are reserved and must be set to 0.
311 #define EFI_ACPI_5_0_LEGACY_DEVICES BIT0
312 #define EFI_ACPI_5_0_8042 BIT1
313 #define EFI_ACPI_5_0_VGA_NOT_PRESENT BIT2
314 #define EFI_ACPI_5_0_MSI_NOT_SUPPORTED BIT3
315 #define EFI_ACPI_5_0_PCIE_ASPM_CONTROLS BIT4
316 #define EFI_ACPI_5_0_CMOS_RTC_NOT_PRESENT BIT5
319 // Fixed ACPI Description Table Fixed Feature Flags
320 // All other bits are reserved and must be set to 0.
322 #define EFI_ACPI_5_0_WBINVD BIT0
323 #define EFI_ACPI_5_0_WBINVD_FLUSH BIT1
324 #define EFI_ACPI_5_0_PROC_C1 BIT2
325 #define EFI_ACPI_5_0_P_LVL2_UP BIT3
326 #define EFI_ACPI_5_0_PWR_BUTTON BIT4
327 #define EFI_ACPI_5_0_SLP_BUTTON BIT5
328 #define EFI_ACPI_5_0_FIX_RTC BIT6
329 #define EFI_ACPI_5_0_RTC_S4 BIT7
330 #define EFI_ACPI_5_0_TMR_VAL_EXT BIT8
331 #define EFI_ACPI_5_0_DCK_CAP BIT9
332 #define EFI_ACPI_5_0_RESET_REG_SUP BIT10
333 #define EFI_ACPI_5_0_SEALED_CASE BIT11
334 #define EFI_ACPI_5_0_HEADLESS BIT12
335 #define EFI_ACPI_5_0_CPU_SW_SLP BIT13
336 #define EFI_ACPI_5_0_PCI_EXP_WAK BIT14
337 #define EFI_ACPI_5_0_USE_PLATFORM_CLOCK BIT15
338 #define EFI_ACPI_5_0_S4_RTC_STS_VALID BIT16
339 #define EFI_ACPI_5_0_REMOTE_POWER_ON_CAPABLE BIT17
340 #define EFI_ACPI_5_0_FORCE_APIC_CLUSTER_MODEL BIT18
341 #define EFI_ACPI_5_0_FORCE_APIC_PHYSICAL_DESTINATION_MODE BIT19
342 #define EFI_ACPI_5_0_HW_REDUCED_ACPI BIT20
343 #define EFI_ACPI_5_0_LOW_POWER_S0_IDLE_CAPABLE BIT21
346 /// Firmware ACPI Control Structure
351 UINT32 HardwareSignature
;
352 UINT32 FirmwareWakingVector
;
355 UINT64 XFirmwareWakingVector
;
360 } EFI_ACPI_5_0_FIRMWARE_ACPI_CONTROL_STRUCTURE
;
363 /// FACS Version (as defined in ACPI 5.0 spec.)
365 #define EFI_ACPI_5_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION 0x02
368 /// Firmware Control Structure Feature Flags
369 /// All other bits are reserved and must be set to 0.
371 #define EFI_ACPI_5_0_S4BIOS_F BIT0
372 #define EFI_ACPI_5_0_64BIT_WAKE_SUPPORTED_F BIT1
375 /// OSPM Enabled Firmware Control Structure Flags
376 /// All other bits are reserved and must be set to 0.
378 #define EFI_ACPI_5_0_OSPM_64BIT_WAKE_F BIT0
381 // Differentiated System Description Table,
382 // Secondary System Description Table
383 // and Persistent System Description Table,
384 // no definition needed as they are common description table header, the same with
385 // EFI_ACPI_DESCRIPTION_HEADER, followed by a definition block.
387 #define EFI_ACPI_5_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
388 #define EFI_ACPI_5_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
391 /// Multiple APIC Description Table header definition. The rest of the table
392 /// must be defined in a platform specific manner.
395 EFI_ACPI_DESCRIPTION_HEADER Header
;
396 UINT32 LocalApicAddress
;
398 } EFI_ACPI_5_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER
;
401 /// MADT Revision (as defined in ACPI 5.0 spec.)
403 #define EFI_ACPI_5_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x03
406 /// Multiple APIC Flags
407 /// All other bits are reserved and must be set to 0.
409 #define EFI_ACPI_5_0_PCAT_COMPAT BIT0
412 // Multiple APIC Description Table APIC structure types
413 // All other values between 0x0D and 0x7F are reserved and
414 // will be ignored by OSPM. 0x80 ~ 0xFF are reserved for OEM.
416 #define EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC 0x00
417 #define EFI_ACPI_5_0_IO_APIC 0x01
418 #define EFI_ACPI_5_0_INTERRUPT_SOURCE_OVERRIDE 0x02
419 #define EFI_ACPI_5_0_NON_MASKABLE_INTERRUPT_SOURCE 0x03
420 #define EFI_ACPI_5_0_LOCAL_APIC_NMI 0x04
421 #define EFI_ACPI_5_0_LOCAL_APIC_ADDRESS_OVERRIDE 0x05
422 #define EFI_ACPI_5_0_IO_SAPIC 0x06
423 #define EFI_ACPI_5_0_LOCAL_SAPIC 0x07
424 #define EFI_ACPI_5_0_PLATFORM_INTERRUPT_SOURCES 0x08
425 #define EFI_ACPI_5_0_PROCESSOR_LOCAL_X2APIC 0x09
426 #define EFI_ACPI_5_0_LOCAL_X2APIC_NMI 0x0A
427 #define EFI_ACPI_5_0_GIC 0x0B
428 #define EFI_ACPI_5_0_GICD 0x0C
431 // APIC Structure Definitions
435 /// Processor Local APIC Structure Definition
440 UINT8 AcpiProcessorId
;
443 } EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC_STRUCTURE
;
446 /// Local APIC Flags. All other bits are reserved and must be 0.
448 #define EFI_ACPI_5_0_LOCAL_APIC_ENABLED BIT0
451 /// IO APIC Structure
458 UINT32 IoApicAddress
;
459 UINT32 GlobalSystemInterruptBase
;
460 } EFI_ACPI_5_0_IO_APIC_STRUCTURE
;
463 /// Interrupt Source Override Structure
470 UINT32 GlobalSystemInterrupt
;
472 } EFI_ACPI_5_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE
;
475 /// Platform Interrupt Sources Structure Definition
485 UINT32 GlobalSystemInterrupt
;
486 UINT32 PlatformInterruptSourceFlags
;
487 UINT8 CpeiProcessorOverride
;
489 } EFI_ACPI_5_0_PLATFORM_INTERRUPT_APIC_STRUCTURE
;
493 // All other bits are reserved and must be set to 0.
495 #define EFI_ACPI_5_0_POLARITY (3 << 0)
496 #define EFI_ACPI_5_0_TRIGGER_MODE (3 << 2)
499 /// Non-Maskable Interrupt Source Structure
505 UINT32 GlobalSystemInterrupt
;
506 } EFI_ACPI_5_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE
;
509 /// Local APIC NMI Structure
514 UINT8 AcpiProcessorId
;
517 } EFI_ACPI_5_0_LOCAL_APIC_NMI_STRUCTURE
;
520 /// Local APIC Address Override Structure
526 UINT64 LocalApicAddress
;
527 } EFI_ACPI_5_0_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE
;
530 /// IO SAPIC Structure
537 UINT32 GlobalSystemInterruptBase
;
538 UINT64 IoSapicAddress
;
539 } EFI_ACPI_5_0_IO_SAPIC_STRUCTURE
;
542 /// Local SAPIC Structure
543 /// This struct followed by a null-terminated ASCII string - ACPI Processor UID String
548 UINT8 AcpiProcessorId
;
553 UINT32 ACPIProcessorUIDValue
;
554 } EFI_ACPI_5_0_PROCESSOR_LOCAL_SAPIC_STRUCTURE
;
557 /// Platform Interrupt Sources Structure
567 UINT32 GlobalSystemInterrupt
;
568 UINT32 PlatformInterruptSourceFlags
;
569 } EFI_ACPI_5_0_PLATFORM_INTERRUPT_SOURCES_STRUCTURE
;
572 /// Platform Interrupt Source Flags.
573 /// All other bits are reserved and must be set to 0.
575 #define EFI_ACPI_5_0_CPEI_PROCESSOR_OVERRIDE BIT0
578 /// Processor Local x2APIC Structure Definition
586 UINT32 AcpiProcessorUid
;
587 } EFI_ACPI_5_0_PROCESSOR_LOCAL_X2APIC_STRUCTURE
;
590 /// Local x2APIC NMI Structure
596 UINT32 AcpiProcessorUid
;
597 UINT8 LocalX2ApicLint
;
599 } EFI_ACPI_5_0_LOCAL_X2APIC_NMI_STRUCTURE
;
609 UINT32 AcpiProcessorUid
;
611 UINT32 ParkingProtocolVersion
;
612 UINT32 PerformanceInterruptGsiv
;
613 UINT64 ParkedAddress
;
614 UINT64 PhysicalBaseAddress
;
615 } EFI_ACPI_5_0_GIC_STRUCTURE
;
618 /// GIC Flags. All other bits are reserved and must be 0.
620 #define EFI_ACPI_5_0_GIC_ENABLED BIT0
621 #define EFI_ACPI_5_0_PERFORMANCE_INTERRUPT_MODEL BIT1
624 /// GIC Distributor Structure
631 UINT64 PhysicalBaseAddress
;
632 UINT32 SystemVectorBase
;
634 } EFI_ACPI_5_0_GIC_DISTRIBUTOR_STRUCTURE
;
637 /// Smart Battery Description Table (SBST)
640 EFI_ACPI_DESCRIPTION_HEADER Header
;
641 UINT32 WarningEnergyLevel
;
642 UINT32 LowEnergyLevel
;
643 UINT32 CriticalEnergyLevel
;
644 } EFI_ACPI_5_0_SMART_BATTERY_DESCRIPTION_TABLE
;
647 /// SBST Version (as defined in ACPI 5.0 spec.)
649 #define EFI_ACPI_5_0_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01
652 /// Embedded Controller Boot Resources Table (ECDT)
653 /// The table is followed by a null terminated ASCII string that contains
654 /// a fully qualified reference to the name space object.
657 EFI_ACPI_DESCRIPTION_HEADER Header
;
658 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE EcControl
;
659 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE EcData
;
662 } EFI_ACPI_5_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE
;
665 /// ECDT Version (as defined in ACPI 5.0 spec.)
667 #define EFI_ACPI_5_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION 0x01
670 /// System Resource Affinity Table (SRAT). The rest of the table
671 /// must be defined in a platform specific manner.
674 EFI_ACPI_DESCRIPTION_HEADER Header
;
675 UINT32 Reserved1
; ///< Must be set to 1
677 } EFI_ACPI_5_0_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER
;
680 /// SRAT Version (as defined in ACPI 5.0 spec.)
682 #define EFI_ACPI_5_0_SYSTEM_RESOURCE_AFFINITY_TABLE_REVISION 0x03
685 // SRAT structure types.
686 // All other values between 0x03 an 0xFF are reserved and
687 // will be ignored by OSPM.
689 #define EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY 0x00
690 #define EFI_ACPI_5_0_MEMORY_AFFINITY 0x01
691 #define EFI_ACPI_5_0_PROCESSOR_LOCAL_X2APIC_AFFINITY 0x02
694 /// Processor Local APIC/SAPIC Affinity Structure Definition
699 UINT8 ProximityDomain7To0
;
703 UINT8 ProximityDomain31To8
[3];
705 } EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY_STRUCTURE
;
708 /// Local APIC/SAPIC Flags. All other bits are reserved and must be 0.
710 #define EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC_SAPIC_ENABLED (1 << 0)
713 /// Memory Affinity Structure Definition
718 UINT32 ProximityDomain
;
720 UINT32 AddressBaseLow
;
721 UINT32 AddressBaseHigh
;
727 } EFI_ACPI_5_0_MEMORY_AFFINITY_STRUCTURE
;
730 // Memory Flags. All other bits are reserved and must be 0.
732 #define EFI_ACPI_5_0_MEMORY_ENABLED (1 << 0)
733 #define EFI_ACPI_5_0_MEMORY_HOT_PLUGGABLE (1 << 1)
734 #define EFI_ACPI_5_0_MEMORY_NONVOLATILE (1 << 2)
737 /// Processor Local x2APIC Affinity Structure Definition
743 UINT32 ProximityDomain
;
748 } EFI_ACPI_5_0_PROCESSOR_LOCAL_X2APIC_AFFINITY_STRUCTURE
;
751 /// System Locality Distance Information Table (SLIT).
752 /// The rest of the table is a matrix.
755 EFI_ACPI_DESCRIPTION_HEADER Header
;
756 UINT64 NumberOfSystemLocalities
;
757 } EFI_ACPI_5_0_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_HEADER
;
760 /// SLIT Version (as defined in ACPI 5.0 spec.)
762 #define EFI_ACPI_5_0_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_REVISION 0x01
765 /// Corrected Platform Error Polling Table (CPEP)
768 EFI_ACPI_DESCRIPTION_HEADER Header
;
770 } EFI_ACPI_5_0_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_HEADER
;
773 /// CPEP Version (as defined in ACPI 5.0 spec.)
775 #define EFI_ACPI_5_0_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_REVISION 0x01
778 // CPEP processor structure types.
780 #define EFI_ACPI_5_0_CPEP_PROCESSOR_APIC_SAPIC 0x00
783 /// Corrected Platform Error Polling Processor Structure Definition
790 UINT32 PollingInterval
;
791 } EFI_ACPI_5_0_CPEP_PROCESSOR_APIC_SAPIC_STRUCTURE
;
794 /// Maximum System Characteristics Table (MSCT)
797 EFI_ACPI_DESCRIPTION_HEADER Header
;
798 UINT32 OffsetProxDomInfo
;
799 UINT32 MaximumNumberOfProximityDomains
;
800 UINT32 MaximumNumberOfClockDomains
;
801 UINT64 MaximumPhysicalAddress
;
802 } EFI_ACPI_5_0_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_HEADER
;
805 /// MSCT Version (as defined in ACPI 5.0 spec.)
807 #define EFI_ACPI_5_0_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_REVISION 0x01
810 /// Maximum Proximity Domain Information Structure Definition
815 UINT32 ProximityDomainRangeLow
;
816 UINT32 ProximityDomainRangeHigh
;
817 UINT32 MaximumProcessorCapacity
;
818 UINT64 MaximumMemoryCapacity
;
819 } EFI_ACPI_5_0_MAXIMUM_PROXIMITY_DOMAIN_INFORMATION_STRUCTURE
;
822 /// ACPI RAS Feature Table definition.
825 EFI_ACPI_DESCRIPTION_HEADER Header
;
826 UINT8 PlatformCommunicationChannelIdentifier
[12];
827 } EFI_ACPI_5_0_RAS_FEATURE_TABLE
;
830 /// RASF Version (as defined in ACPI 5.0 spec.)
832 #define EFI_ACPI_5_0_RAS_FEATURE_TABLE_REVISION 0x01
835 /// ACPI RASF Platform Communication Channel Shared Memory Region definition.
842 UINT8 RASCapabilities
[16];
843 UINT8 SetRASCapabilities
[16];
844 UINT16 NumberOfRASFParameterBlocks
;
845 UINT32 SetRASCapabilitiesStatus
;
846 } EFI_ACPI_5_0_RASF_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION
;
849 /// ACPI RASF PCC command code
851 #define EFI_ACPI_5_0_RASF_PCC_COMMAND_CODE_EXECUTE_RASF_COMMAND 0x01
854 /// ACPI RASF Platform RAS Capabilities
856 #define EFI_ACPI_5_0_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPOTED 0x01
857 #define EFI_ACPI_5_0_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPOTED_AND_EXPOSED_TO_SOFTWARE 0x02
860 /// ACPI RASF Parameter Block structure for PATROL_SCRUB
866 UINT16 PatrolScrubCommand
;
867 UINT64 RequestedAddressRange
[2];
868 UINT64 ActualAddressRange
[2];
870 UINT8 RequestedSpeed
;
871 } EFI_ACPI_5_0_RASF_PATROL_SCRUB_PLATFORM_BLOCK_STRUCTURE
;
874 /// ACPI RASF Patrol Scrub command
876 #define EFI_ACPI_5_0_RASF_PATROL_SCRUB_COMMAND_GET_PATROL_PARAMETERS 0x01
877 #define EFI_ACPI_5_0_RASF_PATROL_SCRUB_COMMAND_START_PATROL_SCRUBBER 0x02
878 #define EFI_ACPI_5_0_RASF_PATROL_SCRUB_COMMAND_STOP_PATROL_SCRUBBER 0x03
881 /// Memory Power State Table definition.
884 EFI_ACPI_DESCRIPTION_HEADER Header
;
885 UINT8 PlatformCommunicationChannelIdentifier
;
887 // Memory Power Node Structure
888 // Memory Power State Characteristics
889 } EFI_ACPI_5_0_MEMORY_POWER_STATUS_TABLE
;
892 /// MPST Version (as defined in ACPI 5.0 spec.)
894 #define EFI_ACPI_5_0_MEMORY_POWER_STATE_TABLE_REVISION 0x01
897 /// MPST Platform Communication Channel Shared Memory Region definition.
903 UINT32 MemoryPowerCommandRegister
;
904 UINT32 MemoryPowerStatusRegister
;
906 UINT32 MemoryPowerNodeId
;
907 UINT64 MemoryEnergyConsumed
;
908 UINT64 ExpectedAveragePowerComsuned
;
909 } EFI_ACPI_5_0_MPST_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION
;
912 /// ACPI MPST PCC command code
914 #define EFI_ACPI_5_0_MPST_PCC_COMMAND_CODE_EXECUTE_MPST_COMMAND 0x03
917 /// ACPI MPST Memory Power command
919 #define EFI_ACPI_5_0_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_POWER_STATE 0x01
920 #define EFI_ACPI_5_0_MPST_MEMORY_POWER_COMMAND_SET_MEMORY_POWER_STATE 0x02
921 #define EFI_ACPI_5_0_MPST_MEMORY_POWER_COMMAND_GET_AVERAGE_POWER_CONSUMED 0x03
922 #define EFI_ACPI_5_0_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_ENERGY_CONSUMED 0x04
925 /// MPST Memory Power Node Table
928 UINT8 PowerStateValue
;
929 UINT8 PowerStateInformationIndex
;
930 } EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE
;
935 UINT16 MemoryPowerNodeId
;
938 UINT64 AddressLength
;
939 UINT32 NumberOfPowerStates
;
940 UINT32 NumberOfPhysicalComponents
;
941 //EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE MemoryPowerState[NumberOfPowerStates];
942 //UINT16 PhysicalComponentIdentifier[NumberOfPhysicalComponents];
943 } EFI_ACPI_5_0_MPST_MEMORY_POWER_STRUCTURE
;
945 #define EFI_ACPI_5_0_MPST_MEMORY_POWER_STRUCTURE_FLAG_ENABLE 0x01
946 #define EFI_ACPI_5_0_MPST_MEMORY_POWER_STRUCTURE_FLAG_POWER_MANAGED 0x02
947 #define EFI_ACPI_5_0_MPST_MEMORY_POWER_STRUCTURE_FLAG_HOT_PLUGGABLE 0x04
950 UINT16 MemoryPowerNodeCount
;
952 } EFI_ACPI_5_0_MPST_MEMORY_POWER_NODE_TABLE
;
955 /// MPST Memory Power State Characteristics Table
958 UINT8 PowerStateStructureID
;
961 UINT32 AveragePowerConsumedInMPS0
;
962 UINT32 RelativePowerSavingToMPS0
;
963 UINT64 ExitLatencyToMPS0
;
964 } EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE
;
966 #define EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_MEMORY_CONTENT_PRESERVED 0x01
967 #define EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_ENTRY 0x02
968 #define EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_EXIT 0x04
971 UINT16 MemoryPowerStateCharacteristicsCount
;
973 } EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_TABLE
;
976 /// Memory Topology Table definition.
979 EFI_ACPI_DESCRIPTION_HEADER Header
;
981 } EFI_ACPI_5_0_MEMORY_TOPOLOGY_TABLE
;
984 /// PMTT Version (as defined in ACPI 5.0 spec.)
986 #define EFI_ACPI_5_0_MEMORY_TOPOLOGY_TABLE_REVISION 0x01
989 /// Common Memory Aggregator Device Structure.
997 } EFI_ACPI_5_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE
;
1000 /// Memory Aggregator Device Type
1002 #define EFI_ACPI_5_0_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_SOCKET 0x1
1003 #define EFI_ACPI_5_0_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_MEMORY_CONTROLLER 0x2
1004 #define EFI_ACPI_5_0_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_DIMM 0x3
1007 /// Socket Memory Aggregator Device Structure.
1010 EFI_ACPI_5_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header
;
1011 //EFI_ACPI_5_0_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE MemoryController[];
1012 } EFI_ACPI_5_0_PMMT_SOCKET_MEMORY_AGGREGATOR_DEVICE_STRUCTURE
;
1015 /// MemoryController Memory Aggregator Device Structure.
1018 EFI_ACPI_5_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header
;
1020 UINT32 WriteLatency
;
1021 UINT32 ReadBandwidth
;
1022 UINT32 WriteBandwidth
;
1023 UINT16 OptimalAccessUnit
;
1024 UINT16 OptimalAccessAlignment
;
1026 UINT16 NumberOfProximityDomains
;
1027 //UINT32 ProximityDomain[NumberOfProximityDomains];
1028 //EFI_ACPI_5_0_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE PhysicalComponent[];
1029 } EFI_ACPI_5_0_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE
;
1032 /// DIMM Memory Aggregator Device Structure.
1035 EFI_ACPI_5_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header
;
1036 UINT16 PhysicalComponentIdentifier
;
1039 UINT32 SmbiosHandle
;
1040 } EFI_ACPI_5_0_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE
;
1043 /// Boot Graphics Resource Table definition.
1046 EFI_ACPI_DESCRIPTION_HEADER Header
;
1048 /// 2-bytes (16 bit) version ID. This value must be 1.
1052 /// 1-byte status field indicating current status about the table.
1053 /// Bits[7:1] = Reserved (must be zero)
1054 /// Bit [0] = Valid. A one indicates the boot image graphic is valid.
1058 /// 1-byte enumerated type field indicating format of the image.
1060 /// 1 - 255 Reserved (for future use)
1064 /// 8-byte (64 bit) physical address pointing to the firmware's in-memory copy
1065 /// of the image bitmap.
1067 UINT64 ImageAddress
;
1069 /// A 4-byte (32-bit) unsigned long describing the display X-offset of the boot image.
1070 /// (X, Y) display offset of the top left corner of the boot image.
1071 /// The top left corner of the display is at offset (0, 0).
1073 UINT32 ImageOffsetX
;
1075 /// A 4-byte (32-bit) unsigned long describing the display Y-offset of the boot image.
1076 /// (X, Y) display offset of the top left corner of the boot image.
1077 /// The top left corner of the display is at offset (0, 0).
1079 UINT32 ImageOffsetY
;
1080 } EFI_ACPI_5_0_BOOT_GRAPHICS_RESOURCE_TABLE
;
1085 #define EFI_ACPI_5_0_BOOT_GRAPHICS_RESOURCE_TABLE_REVISION 1
1090 #define EFI_ACPI_5_0_BGRT_VERSION 0x01
1095 #define EFI_ACPI_5_0_BGRT_STATUS_INVALID 0x00
1096 #define EFI_ACPI_5_0_BGRT_STATUS_VALID 0x01
1101 #define EFI_ACPI_5_0_BGRT_IMAGE_TYPE_BMP 0x00
1104 /// FPDT Version (as defined in ACPI 5.0 spec.)
1106 #define EFI_ACPI_5_0_FIRMWARE_PERFORMANCE_DATA_TABLE_REVISION 0x01
1109 /// FPDT Performance Record Types
1111 #define EFI_ACPI_5_0_FPDT_RECORD_TYPE_FIRMWARE_BASIC_BOOT_POINTER 0x0000
1112 #define EFI_ACPI_5_0_FPDT_RECORD_TYPE_S3_PERFORMANCE_TABLE_POINTER 0x0001
1115 /// FPDT Performance Record Revision
1117 #define EFI_ACPI_5_0_FPDT_RECORD_REVISION_FIRMWARE_BASIC_BOOT_POINTER 0x01
1118 #define EFI_ACPI_5_0_FPDT_RECORD_REVISION_S3_PERFORMANCE_TABLE_POINTER 0x01
1121 /// FPDT Runtime Performance Record Types
1123 #define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_TYPE_S3_RESUME 0x0000
1124 #define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_TYPE_S3_SUSPEND 0x0001
1125 #define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_TYPE_FIRMWARE_BASIC_BOOT 0x0002
1128 /// FPDT Runtime Performance Record Revision
1130 #define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_REVISION_S3_RESUME 0x01
1131 #define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_REVISION_S3_SUSPEND 0x01
1132 #define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_REVISION_FIRMWARE_BASIC_BOOT 0x02
1135 /// FPDT Performance Record header
1141 } EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER
;
1144 /// FPDT Performance Table header
1149 } EFI_ACPI_5_0_FPDT_PERFORMANCE_TABLE_HEADER
;
1152 /// FPDT Firmware Basic Boot Performance Pointer Record Structure
1155 EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header
;
1158 /// 64-bit processor-relative physical address of the Basic Boot Performance Table.
1160 UINT64 BootPerformanceTablePointer
;
1161 } EFI_ACPI_5_0_FPDT_BOOT_PERFORMANCE_TABLE_POINTER_RECORD
;
1164 /// FPDT S3 Performance Table Pointer Record Structure
1167 EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header
;
1170 /// 64-bit processor-relative physical address of the S3 Performance Table.
1172 UINT64 S3PerformanceTablePointer
;
1173 } EFI_ACPI_5_0_FPDT_S3_PERFORMANCE_TABLE_POINTER_RECORD
;
1176 /// FPDT Firmware Basic Boot Performance Record Structure
1179 EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header
;
1182 /// Timer value logged at the beginning of firmware image execution.
1183 /// This may not always be zero or near zero.
1187 /// Timer value logged just prior to loading the OS boot loader into memory.
1188 /// For non-UEFI compatible boots, this field must be zero.
1190 UINT64 OsLoaderLoadImageStart
;
1192 /// Timer value logged just prior to launching the previously loaded OS boot loader image.
1193 /// For non-UEFI compatible boots, the timer value logged will be just prior
1194 /// to the INT 19h handler invocation.
1196 UINT64 OsLoaderStartImageStart
;
1198 /// Timer value logged at the point when the OS loader calls the
1199 /// ExitBootServices function for UEFI compatible firmware.
1200 /// For non-UEFI compatible boots, this field must be zero.
1202 UINT64 ExitBootServicesEntry
;
1204 /// Timer value logged at the point just prior towhen the OS loader gaining
1205 /// control back from calls the ExitBootServices function for UEFI compatible firmware.
1206 /// For non-UEFI compatible boots, this field must be zero.
1208 UINT64 ExitBootServicesExit
;
1209 } EFI_ACPI_5_0_FPDT_FIRMWARE_BASIC_BOOT_RECORD
;
1212 /// FPDT Firmware Basic Boot Performance Table signature
1214 #define EFI_ACPI_5_0_FPDT_BOOT_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('F', 'B', 'P', 'T')
1217 // FPDT Firmware Basic Boot Performance Table
1220 EFI_ACPI_5_0_FPDT_PERFORMANCE_TABLE_HEADER Header
;
1222 // one or more Performance Records.
1224 } EFI_ACPI_5_0_FPDT_FIRMWARE_BASIC_BOOT_TABLE
;
1227 /// FPDT "S3PT" S3 Performance Table
1229 #define EFI_ACPI_5_0_FPDT_S3_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('S', '3', 'P', 'T')
1232 // FPDT Firmware S3 Boot Performance Table
1235 EFI_ACPI_5_0_FPDT_PERFORMANCE_TABLE_HEADER Header
;
1237 // one or more Performance Records.
1239 } EFI_ACPI_5_0_FPDT_FIRMWARE_S3_BOOT_TABLE
;
1242 /// FPDT Basic S3 Resume Performance Record
1245 EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header
;
1247 /// A count of the number of S3 resume cycles since the last full boot sequence.
1251 /// Timer recorded at the end of BIOS S3 resume, just prior to handoff to the
1252 /// OS waking vector. Only the most recent resume cycle's time is retained.
1256 /// Average timer value of all resume cycles logged since the last full boot
1257 /// sequence, including the most recent resume. Note that the entire log of
1258 /// timer values does not need to be retained in order to calculate this average.
1260 UINT64 AverageResume
;
1261 } EFI_ACPI_5_0_FPDT_S3_RESUME_RECORD
;
1264 /// FPDT Basic S3 Suspend Performance Record
1267 EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header
;
1269 /// Timer value recorded at the OS write to SLP_TYP upon entry to S3.
1270 /// Only the most recent suspend cycle's timer value is retained.
1272 UINT64 SuspendStart
;
1274 /// Timer value recorded at the final firmware write to SLP_TYP (or other
1275 /// mechanism) used to trigger hardware entry to S3.
1276 /// Only the most recent suspend cycle's timer value is retained.
1279 } EFI_ACPI_5_0_FPDT_S3_SUSPEND_RECORD
;
1282 /// Firmware Performance Record Table definition.
1285 EFI_ACPI_DESCRIPTION_HEADER Header
;
1286 } EFI_ACPI_5_0_FIRMWARE_PERFORMANCE_RECORD_TABLE
;
1289 /// Generic Timer Description Table definition.
1292 EFI_ACPI_DESCRIPTION_HEADER Header
;
1293 UINT64 PhysicalAddress
;
1295 UINT32 SecurePL1TimerGSIV
;
1296 UINT32 SecurePL1TimerFlags
;
1297 UINT32 NonSecurePL1TimerGSIV
;
1298 UINT32 NonSecurePL1TimerFlags
;
1299 UINT32 VirtualTimerGSIV
;
1300 UINT32 VirtualTimerFlags
;
1301 UINT32 NonSecurePL2TimerGSIV
;
1302 UINT32 NonSecurePL2TimerFlags
;
1303 } EFI_ACPI_5_0_GENERIC_TIMER_DESCRIPTION_TABLE
;
1306 /// GTDT Version (as defined in ACPI 5.0 spec.)
1308 #define EFI_ACPI_5_0_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION 0x01
1311 /// Global Flags. All other bits are reserved and must be 0.
1313 #define EFI_ACPI_5_0_GTDT_GLOBAL_FLAG_MEMORY_MAPPED_BLOCK_PRESENT BIT0
1314 #define EFI_ACPI_5_0_GTDT_GLOBAL_FLAG_INTERRUPT_MODE BIT1
1317 /// Timer Flags. All other bits are reserved and must be 0.
1319 #define EFI_ACPI_5_0_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0
1320 #define EFI_ACPI_5_0_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1
1323 /// Boot Error Record Table (BERT)
1326 EFI_ACPI_DESCRIPTION_HEADER Header
;
1327 UINT32 BootErrorRegionLength
;
1328 UINT64 BootErrorRegion
;
1329 } EFI_ACPI_5_0_BOOT_ERROR_RECORD_TABLE_HEADER
;
1332 /// BERT Version (as defined in ACPI 5.0 spec.)
1334 #define EFI_ACPI_5_0_BOOT_ERROR_RECORD_TABLE_REVISION 0x01
1337 /// Boot Error Region Block Status Definition
1340 UINT32 UncorrectableErrorValid
:1;
1341 UINT32 CorrectableErrorValid
:1;
1342 UINT32 MultipleUncorrectableErrors
:1;
1343 UINT32 MultipleCorrectableErrors
:1;
1344 UINT32 ErrorDataEntryCount
:10;
1346 } EFI_ACPI_5_0_ERROR_BLOCK_STATUS
;
1349 /// Boot Error Region Definition
1352 EFI_ACPI_5_0_ERROR_BLOCK_STATUS BlockStatus
;
1353 UINT32 RawDataOffset
;
1354 UINT32 RawDataLength
;
1356 UINT32 ErrorSeverity
;
1357 } EFI_ACPI_5_0_BOOT_ERROR_REGION_STRUCTURE
;
1360 // Boot Error Severity types
1362 #define EFI_ACPI_5_0_ERROR_SEVERITY_CORRECTABLE 0x00
1363 #define EFI_ACPI_5_0_ERROR_SEVERITY_FATAL 0x01
1364 #define EFI_ACPI_5_0_ERROR_SEVERITY_CORRECTED 0x02
1365 #define EFI_ACPI_5_0_ERROR_SEVERITY_NONE 0x03
1368 /// Generic Error Data Entry Definition
1371 UINT8 SectionType
[16];
1372 UINT32 ErrorSeverity
;
1374 UINT8 ValidationBits
;
1376 UINT32 ErrorDataLength
;
1379 } EFI_ACPI_5_0_GENERIC_ERROR_DATA_ENTRY_STRUCTURE
;
1382 /// Generic Error Data Entry Version (as defined in ACPI 5.0 spec.)
1384 #define EFI_ACPI_5_0_GENERIC_ERROR_DATA_ENTRY_REVISION 0x0201
1387 /// HEST - Hardware Error Source Table
1390 EFI_ACPI_DESCRIPTION_HEADER Header
;
1391 UINT32 ErrorSourceCount
;
1392 } EFI_ACPI_5_0_HARDWARE_ERROR_SOURCE_TABLE_HEADER
;
1395 /// HEST Version (as defined in ACPI 5.0 spec.)
1397 #define EFI_ACPI_5_0_HARDWARE_ERROR_SOURCE_TABLE_REVISION 0x01
1400 // Error Source structure types.
1402 #define EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION 0x00
1403 #define EFI_ACPI_5_0_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK 0x01
1404 #define EFI_ACPI_5_0_IA32_ARCHITECTURE_NMI_ERROR 0x02
1405 #define EFI_ACPI_5_0_PCI_EXPRESS_ROOT_PORT_AER 0x06
1406 #define EFI_ACPI_5_0_PCI_EXPRESS_DEVICE_AER 0x07
1407 #define EFI_ACPI_5_0_PCI_EXPRESS_BRIDGE_AER 0x08
1408 #define EFI_ACPI_5_0_GENERIC_HARDWARE_ERROR 0x09
1411 // Error Source structure flags.
1413 #define EFI_ACPI_5_0_ERROR_SOURCE_FLAG_FIRMWARE_FIRST (1 << 0)
1414 #define EFI_ACPI_5_0_ERROR_SOURCE_FLAG_GLOBAL (1 << 1)
1417 /// IA-32 Architecture Machine Check Exception Structure Definition
1425 UINT32 NumberOfRecordsToPreAllocate
;
1426 UINT32 MaxSectionsPerRecord
;
1427 UINT64 GlobalCapabilityInitData
;
1428 UINT64 GlobalControlInitData
;
1429 UINT8 NumberOfHardwareBanks
;
1431 } EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION_STRUCTURE
;
1434 /// IA-32 Architecture Machine Check Bank Structure Definition
1438 UINT8 ClearStatusOnInitialization
;
1439 UINT8 StatusDataFormat
;
1441 UINT32 ControlRegisterMsrAddress
;
1442 UINT64 ControlInitData
;
1443 UINT32 StatusRegisterMsrAddress
;
1444 UINT32 AddressRegisterMsrAddress
;
1445 UINT32 MiscRegisterMsrAddress
;
1446 } EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_BANK_STRUCTURE
;
1449 /// IA-32 Architecture Machine Check Bank Structure MCA data format
1451 #define EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_IA32 0x00
1452 #define EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_INTEL64 0x01
1453 #define EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_AMD64 0x02
1456 // Hardware Error Notification types. All other values are reserved
1458 #define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_POLLED 0x00
1459 #define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_EXTERNAL_INTERRUPT 0x01
1460 #define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_LOCAL_INTERRUPT 0x02
1461 #define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_SCI 0x03
1462 #define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_NMI 0x04
1465 /// Hardware Error Notification Configuration Write Enable Structure Definition
1469 UINT16 PollInterval
:1;
1470 UINT16 SwitchToPollingThresholdValue
:1;
1471 UINT16 SwitchToPollingThresholdWindow
:1;
1472 UINT16 ErrorThresholdValue
:1;
1473 UINT16 ErrorThresholdWindow
:1;
1475 } EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE
;
1478 /// Hardware Error Notification Structure Definition
1483 EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE ConfigurationWriteEnable
;
1484 UINT32 PollInterval
;
1486 UINT32 SwitchToPollingThresholdValue
;
1487 UINT32 SwitchToPollingThresholdWindow
;
1488 UINT32 ErrorThresholdValue
;
1489 UINT32 ErrorThresholdWindow
;
1490 } EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE
;
1493 /// IA-32 Architecture Corrected Machine Check Structure Definition
1501 UINT32 NumberOfRecordsToPreAllocate
;
1502 UINT32 MaxSectionsPerRecord
;
1503 EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure
;
1504 UINT8 NumberOfHardwareBanks
;
1506 } EFI_ACPI_5_0_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK_STRUCTURE
;
1509 /// IA-32 Architecture NMI Error Structure Definition
1515 UINT32 NumberOfRecordsToPreAllocate
;
1516 UINT32 MaxSectionsPerRecord
;
1517 UINT32 MaxRawDataLength
;
1518 } EFI_ACPI_5_0_IA32_ARCHITECTURE_NMI_ERROR_STRUCTURE
;
1521 /// PCI Express Root Port AER Structure Definition
1529 UINT32 NumberOfRecordsToPreAllocate
;
1530 UINT32 MaxSectionsPerRecord
;
1534 UINT16 DeviceControl
;
1536 UINT32 UncorrectableErrorMask
;
1537 UINT32 UncorrectableErrorSeverity
;
1538 UINT32 CorrectableErrorMask
;
1539 UINT32 AdvancedErrorCapabilitiesAndControl
;
1540 UINT32 RootErrorCommand
;
1541 } EFI_ACPI_5_0_PCI_EXPRESS_ROOT_PORT_AER_STRUCTURE
;
1544 /// PCI Express Device AER Structure Definition
1552 UINT32 NumberOfRecordsToPreAllocate
;
1553 UINT32 MaxSectionsPerRecord
;
1557 UINT16 DeviceControl
;
1559 UINT32 UncorrectableErrorMask
;
1560 UINT32 UncorrectableErrorSeverity
;
1561 UINT32 CorrectableErrorMask
;
1562 UINT32 AdvancedErrorCapabilitiesAndControl
;
1563 } EFI_ACPI_5_0_PCI_EXPRESS_DEVICE_AER_STRUCTURE
;
1566 /// PCI Express Bridge AER Structure Definition
1574 UINT32 NumberOfRecordsToPreAllocate
;
1575 UINT32 MaxSectionsPerRecord
;
1579 UINT16 DeviceControl
;
1581 UINT32 UncorrectableErrorMask
;
1582 UINT32 UncorrectableErrorSeverity
;
1583 UINT32 CorrectableErrorMask
;
1584 UINT32 AdvancedErrorCapabilitiesAndControl
;
1585 UINT32 SecondaryUncorrectableErrorMask
;
1586 UINT32 SecondaryUncorrectableErrorSeverity
;
1587 UINT32 SecondaryAdvancedErrorCapabilitiesAndControl
;
1588 } EFI_ACPI_5_0_PCI_EXPRESS_BRIDGE_AER_STRUCTURE
;
1591 /// Generic Hardware Error Source Structure Definition
1596 UINT16 RelatedSourceId
;
1599 UINT32 NumberOfRecordsToPreAllocate
;
1600 UINT32 MaxSectionsPerRecord
;
1601 UINT32 MaxRawDataLength
;
1602 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress
;
1603 EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure
;
1604 UINT32 ErrorStatusBlockLength
;
1605 } EFI_ACPI_5_0_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE
;
1608 /// Generic Error Status Definition
1611 EFI_ACPI_5_0_ERROR_BLOCK_STATUS BlockStatus
;
1612 UINT32 RawDataOffset
;
1613 UINT32 RawDataLength
;
1615 UINT32 ErrorSeverity
;
1616 } EFI_ACPI_5_0_GENERIC_ERROR_STATUS_STRUCTURE
;
1619 /// ERST - Error Record Serialization Table
1622 EFI_ACPI_DESCRIPTION_HEADER Header
;
1623 UINT32 SerializationHeaderSize
;
1625 UINT32 InstructionEntryCount
;
1626 } EFI_ACPI_5_0_ERROR_RECORD_SERIALIZATION_TABLE_HEADER
;
1629 /// ERST Version (as defined in ACPI 5.0 spec.)
1631 #define EFI_ACPI_5_0_ERROR_RECORD_SERIALIZATION_TABLE_REVISION 0x01
1634 /// ERST Serialization Actions
1636 #define EFI_ACPI_5_0_ERST_BEGIN_WRITE_OPERATION 0x00
1637 #define EFI_ACPI_5_0_ERST_BEGIN_READ_OPERATION 0x01
1638 #define EFI_ACPI_5_0_ERST_BEGIN_CLEAR_OPERATION 0x02
1639 #define EFI_ACPI_5_0_ERST_END_OPERATION 0x03
1640 #define EFI_ACPI_5_0_ERST_SET_RECORD_OFFSET 0x04
1641 #define EFI_ACPI_5_0_ERST_EXECUTE_OPERATION 0x05
1642 #define EFI_ACPI_5_0_ERST_CHECK_BUSY_STATUS 0x06
1643 #define EFI_ACPI_5_0_ERST_GET_COMMAND_STATUS 0x07
1644 #define EFI_ACPI_5_0_ERST_GET_RECORD_IDENTIFIER 0x08
1645 #define EFI_ACPI_5_0_ERST_SET_RECORD_IDENTIFIER 0x09
1646 #define EFI_ACPI_5_0_ERST_GET_RECORD_COUNT 0x0A
1647 #define EFI_ACPI_5_0_ERST_BEGIN_DUMMY_WRITE_OPERATION 0x0B
1648 #define EFI_ACPI_5_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE 0x0D
1649 #define EFI_ACPI_5_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE_LENGTH 0x0E
1650 #define EFI_ACPI_5_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE_ATTRIBUTES 0x0F
1653 /// ERST Action Command Status
1655 #define EFI_ACPI_5_0_ERST_STATUS_SUCCESS 0x00
1656 #define EFI_ACPI_5_0_ERST_STATUS_NOT_ENOUGH_SPACE 0x01
1657 #define EFI_ACPI_5_0_ERST_STATUS_HARDWARE_NOT_AVAILABLE 0x02
1658 #define EFI_ACPI_5_0_ERST_STATUS_FAILED 0x03
1659 #define EFI_ACPI_5_0_ERST_STATUS_RECORD_STORE_EMPTY 0x04
1660 #define EFI_ACPI_5_0_ERST_STATUS_RECORD_NOT_FOUND 0x05
1663 /// ERST Serialization Instructions
1665 #define EFI_ACPI_5_0_ERST_READ_REGISTER 0x00
1666 #define EFI_ACPI_5_0_ERST_READ_REGISTER_VALUE 0x01
1667 #define EFI_ACPI_5_0_ERST_WRITE_REGISTER 0x02
1668 #define EFI_ACPI_5_0_ERST_WRITE_REGISTER_VALUE 0x03
1669 #define EFI_ACPI_5_0_ERST_NOOP 0x04
1670 #define EFI_ACPI_5_0_ERST_LOAD_VAR1 0x05
1671 #define EFI_ACPI_5_0_ERST_LOAD_VAR2 0x06
1672 #define EFI_ACPI_5_0_ERST_STORE_VAR1 0x07
1673 #define EFI_ACPI_5_0_ERST_ADD 0x08
1674 #define EFI_ACPI_5_0_ERST_SUBTRACT 0x09
1675 #define EFI_ACPI_5_0_ERST_ADD_VALUE 0x0A
1676 #define EFI_ACPI_5_0_ERST_SUBTRACT_VALUE 0x0B
1677 #define EFI_ACPI_5_0_ERST_STALL 0x0C
1678 #define EFI_ACPI_5_0_ERST_STALL_WHILE_TRUE 0x0D
1679 #define EFI_ACPI_5_0_ERST_SKIP_NEXT_INSTRUCTION_IF_TRUE 0x0E
1680 #define EFI_ACPI_5_0_ERST_GOTO 0x0F
1681 #define EFI_ACPI_5_0_ERST_SET_SRC_ADDRESS_BASE 0x10
1682 #define EFI_ACPI_5_0_ERST_SET_DST_ADDRESS_BASE 0x11
1683 #define EFI_ACPI_5_0_ERST_MOVE_DATA 0x12
1686 /// ERST Instruction Flags
1688 #define EFI_ACPI_5_0_ERST_PRESERVE_REGISTER 0x01
1691 /// ERST Serialization Instruction Entry
1694 UINT8 SerializationAction
;
1698 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE RegisterRegion
;
1701 } EFI_ACPI_5_0_ERST_SERIALIZATION_INSTRUCTION_ENTRY
;
1704 /// EINJ - Error Injection Table
1707 EFI_ACPI_DESCRIPTION_HEADER Header
;
1708 UINT32 InjectionHeaderSize
;
1709 UINT8 InjectionFlags
;
1711 UINT32 InjectionEntryCount
;
1712 } EFI_ACPI_5_0_ERROR_INJECTION_TABLE_HEADER
;
1715 /// EINJ Version (as defined in ACPI 5.0 spec.)
1717 #define EFI_ACPI_5_0_ERROR_INJECTION_TABLE_REVISION 0x01
1720 /// EINJ Error Injection Actions
1722 #define EFI_ACPI_5_0_EINJ_BEGIN_INJECTION_OPERATION 0x00
1723 #define EFI_ACPI_5_0_EINJ_GET_TRIGGER_ERROR_ACTION_TABLE 0x01
1724 #define EFI_ACPI_5_0_EINJ_SET_ERROR_TYPE 0x02
1725 #define EFI_ACPI_5_0_EINJ_GET_ERROR_TYPE 0x03
1726 #define EFI_ACPI_5_0_EINJ_END_OPERATION 0x04
1727 #define EFI_ACPI_5_0_EINJ_EXECUTE_OPERATION 0x05
1728 #define EFI_ACPI_5_0_EINJ_CHECK_BUSY_STATUS 0x06
1729 #define EFI_ACPI_5_0_EINJ_GET_COMMAND_STATUS 0x07
1730 #define EFI_ACPI_5_0_EINJ_TRIGGER_ERROR 0xFF
1733 /// EINJ Action Command Status
1735 #define EFI_ACPI_5_0_EINJ_STATUS_SUCCESS 0x00
1736 #define EFI_ACPI_5_0_EINJ_STATUS_UNKNOWN_FAILURE 0x01
1737 #define EFI_ACPI_5_0_EINJ_STATUS_INVALID_ACCESS 0x02
1740 /// EINJ Error Type Definition
1742 #define EFI_ACPI_5_0_EINJ_ERROR_PROCESSOR_CORRECTABLE (1 << 0)
1743 #define EFI_ACPI_5_0_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_NONFATAL (1 << 1)
1744 #define EFI_ACPI_5_0_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_FATAL (1 << 2)
1745 #define EFI_ACPI_5_0_EINJ_ERROR_MEMORY_CORRECTABLE (1 << 3)
1746 #define EFI_ACPI_5_0_EINJ_ERROR_MEMORY_UNCORRECTABLE_NONFATAL (1 << 4)
1747 #define EFI_ACPI_5_0_EINJ_ERROR_MEMORY_UNCORRECTABLE_FATAL (1 << 5)
1748 #define EFI_ACPI_5_0_EINJ_ERROR_PCI_EXPRESS_CORRECTABLE (1 << 6)
1749 #define EFI_ACPI_5_0_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_NONFATAL (1 << 7)
1750 #define EFI_ACPI_5_0_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_FATAL (1 << 8)
1751 #define EFI_ACPI_5_0_EINJ_ERROR_PLATFORM_CORRECTABLE (1 << 9)
1752 #define EFI_ACPI_5_0_EINJ_ERROR_PLATFORM_UNCORRECTABLE_NONFATAL (1 << 10)
1753 #define EFI_ACPI_5_0_EINJ_ERROR_PLATFORM_UNCORRECTABLE_FATAL (1 << 11)
1756 /// EINJ Injection Instructions
1758 #define EFI_ACPI_5_0_EINJ_READ_REGISTER 0x00
1759 #define EFI_ACPI_5_0_EINJ_READ_REGISTER_VALUE 0x01
1760 #define EFI_ACPI_5_0_EINJ_WRITE_REGISTER 0x02
1761 #define EFI_ACPI_5_0_EINJ_WRITE_REGISTER_VALUE 0x03
1762 #define EFI_ACPI_5_0_EINJ_NOOP 0x04
1765 /// EINJ Instruction Flags
1767 #define EFI_ACPI_5_0_EINJ_PRESERVE_REGISTER 0x01
1770 /// EINJ Injection Instruction Entry
1773 UINT8 InjectionAction
;
1777 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE RegisterRegion
;
1780 } EFI_ACPI_5_0_EINJ_INJECTION_INSTRUCTION_ENTRY
;
1783 /// EINJ Trigger Action Table
1790 } EFI_ACPI_5_0_EINJ_TRIGGER_ACTION_TABLE
;
1793 /// Platform Communications Channel Table (PCCT)
1796 EFI_ACPI_DESCRIPTION_HEADER Header
;
1799 } EFI_ACPI_5_0_PLATFORM_COMMUNICATION_CHANNEL_TABLE_HEADER
;
1802 /// PCCT Version (as defined in ACPI 5.0 spec.)
1804 #define EFI_ACPI_5_0_PLATFORM_COMMUNICATION_CHANNEL_TABLE_REVISION 0x01
1807 /// PCCT Global Flags
1809 #define EFI_ACPI_5_0_PCCT_FLAGS_SCI_DOORBELL BIT0
1812 // PCCT Subspace type
1814 #define EFI_ACPI_5_0_PCCT_SUBSPACE_TYPE_GENERIC 0x00
1817 /// PCC Subspace Structure Header
1822 } EFI_ACPI_5_0_PCCT_SUBSPACE_HEADER
;
1825 /// Generic Communications Subspace Structure
1832 UINT64 AddressLength
;
1833 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE DoorbellRegister
;
1834 UINT64 DoorbellPreserve
;
1835 UINT64 DoorbellWrite
;
1836 UINT32 NominalLatency
;
1837 UINT32 MaximumPeriodicAccessRate
;
1838 UINT16 MinimumRequestTurnaroundTime
;
1839 } EFI_ACPI_5_0_PCCT_SUBSPACE_GENERIC
;
1842 /// Generic Communications Channel Shared Memory Region
1848 UINT8 GenerateSci
:1;
1849 } EFI_ACPI_5_0_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND
;
1852 UINT8 CommandComplete
:1;
1853 UINT8 SciDoorbell
:1;
1857 } EFI_ACPI_5_0_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS
;
1861 EFI_ACPI_5_0_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND Command
;
1862 EFI_ACPI_5_0_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS Status
;
1863 } EFI_ACPI_5_0_PCCT_GENERIC_SHARED_MEMORY_REGION_HEADER
;
1866 // Known table signatures
1870 /// "RSD PTR " Root System Description Pointer
1872 #define EFI_ACPI_5_0_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE SIGNATURE_64('R', 'S', 'D', ' ', 'P', 'T', 'R', ' ')
1875 /// "APIC" Multiple APIC Description Table
1877 #define EFI_ACPI_5_0_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('A', 'P', 'I', 'C')
1880 /// "BERT" Boot Error Record Table
1882 #define EFI_ACPI_5_0_BOOT_ERROR_RECORD_TABLE_SIGNATURE SIGNATURE_32('B', 'E', 'R', 'T')
1885 /// "BGRT" Boot Graphics Resource Table
1887 #define EFI_ACPI_5_0_BOOT_GRAPHICS_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('B', 'G', 'R', 'T')
1890 /// "CPEP" Corrected Platform Error Polling Table
1892 #define EFI_ACPI_5_0_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_SIGNATURE SIGNATURE_32('C', 'P', 'E', 'P')
1895 /// "DSDT" Differentiated System Description Table
1897 #define EFI_ACPI_5_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('D', 'S', 'D', 'T')
1900 /// "ECDT" Embedded Controller Boot Resources Table
1902 #define EFI_ACPI_5_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE SIGNATURE_32('E', 'C', 'D', 'T')
1905 /// "EINJ" Error Injection Table
1907 #define EFI_ACPI_5_0_ERROR_INJECTION_TABLE_SIGNATURE SIGNATURE_32('E', 'I', 'N', 'J')
1910 /// "ERST" Error Record Serialization Table
1912 #define EFI_ACPI_5_0_ERROR_RECORD_SERIALIZATION_TABLE_SIGNATURE SIGNATURE_32('E', 'R', 'S', 'T')
1915 /// "FACP" Fixed ACPI Description Table
1917 #define EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'P')
1920 /// "FACS" Firmware ACPI Control Structure
1922 #define EFI_ACPI_5_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'S')
1925 /// "FPDT" Firmware Performance Data Table
1927 #define EFI_ACPI_5_0_FIRMWARE_PERFORMANCE_DATA_TABLE_SIGNATURE SIGNATURE_32('F', 'P', 'D', 'T')
1930 /// "GTDT" Generic Timer Description Table
1932 #define EFI_ACPI_5_0_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('G', 'T', 'D', 'T')
1935 /// "HEST" Hardware Error Source Table
1937 #define EFI_ACPI_5_0_HARDWARE_ERROR_SOURCE_TABLE_SIGNATURE SIGNATURE_32('H', 'E', 'S', 'T')
1940 /// "MPST" Memory Power State Table
1942 #define EFI_ACPI_5_0_MEMORY_POWER_STATE_TABLE_SIGNATURE SIGNATURE_32('M', 'P', 'S', 'T')
1945 /// "MSCT" Maximum System Characteristics Table
1947 #define EFI_ACPI_5_0_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'C', 'T')
1950 /// "PMTT" Platform Memory Topology Table
1952 #define EFI_ACPI_5_0_PLATFORM_MEMORY_TOPOLOGY_TABLE_SIGNATURE SIGNATURE_32('P', 'M', 'T', 'T')
1955 /// "PSDT" Persistent System Description Table
1957 #define EFI_ACPI_5_0_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('P', 'S', 'D', 'T')
1960 /// "RASF" ACPI RAS Feature Table
1962 #define EFI_ACPI_5_0_ACPI_RAS_FEATURE_TABLE_SIGNATURE SIGNATURE_32('R', 'A', 'S', 'F')
1965 /// "RSDT" Root System Description Table
1967 #define EFI_ACPI_5_0_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('R', 'S', 'D', 'T')
1970 /// "SBST" Smart Battery Specification Table
1972 #define EFI_ACPI_5_0_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE SIGNATURE_32('S', 'B', 'S', 'T')
1975 /// "SLIT" System Locality Information Table
1977 #define EFI_ACPI_5_0_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'T')
1980 /// "SRAT" System Resource Affinity Table
1982 #define EFI_ACPI_5_0_SYSTEM_RESOURCE_AFFINITY_TABLE_SIGNATURE SIGNATURE_32('S', 'R', 'A', 'T')
1985 /// "SSDT" Secondary System Description Table
1987 #define EFI_ACPI_5_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('S', 'S', 'D', 'T')
1990 /// "XSDT" Extended System Description Table
1992 #define EFI_ACPI_5_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('X', 'S', 'D', 'T')
1995 /// "BOOT" MS Simple Boot Spec
1997 #define EFI_ACPI_5_0_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE SIGNATURE_32('B', 'O', 'O', 'T')
2000 /// "CSRT" MS Core System Resource Table
2002 #define EFI_ACPI_5_0_CORE_SYSTEM_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('C', 'S', 'R', 'T')
2005 /// "DBG2" MS Debug Port 2 Spec
2007 #define EFI_ACPI_5_0_DEBUG_PORT_2_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', '2')
2010 /// "DBGP" MS Debug Port Spec
2012 #define EFI_ACPI_5_0_DEBUG_PORT_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', 'P')
2015 /// "DMAR" DMA Remapping Table
2017 #define EFI_ACPI_5_0_DMA_REMAPPING_TABLE_SIGNATURE SIGNATURE_32('D', 'M', 'A', 'R')
2020 /// "ETDT" Event Timer Description Table
2022 #define EFI_ACPI_5_0_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('E', 'T', 'D', 'T')
2025 /// "HPET" IA-PC High Precision Event Timer Table
2027 #define EFI_ACPI_5_0_HIGH_PRECISION_EVENT_TIMER_TABLE_SIGNATURE SIGNATURE_32('H', 'P', 'E', 'T')
2030 /// "iBFT" iSCSI Boot Firmware Table
2032 #define EFI_ACPI_5_0_ISCSI_BOOT_FIRMWARE_TABLE_SIGNATURE SIGNATURE_32('i', 'B', 'F', 'T')
2035 /// "IVRS" I/O Virtualization Reporting Structure
2037 #define EFI_ACPI_5_0_IO_VIRTUALIZATION_REPORTING_STRUCTURE_SIGNATURE SIGNATURE_32('I', 'V', 'R', 'S')
2040 /// "MCFG" PCI Express Memory Mapped Configuration Space Base Address Description Table
2042 #define EFI_ACPI_5_0_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'F', 'G')
2045 /// "MCHI" Management Controller Host Interface Table
2047 #define EFI_ACPI_5_0_MANAGEMENT_CONTROLLER_HOST_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'H', 'I')
2050 /// "MSDM" MS Data Management Table
2052 #define EFI_ACPI_5_0_DATA_MANAGEMENT_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'D', 'M')
2055 /// "SLIC" MS Software Licensing Table Specification
2057 #define EFI_ACPI_5_0_SOFTWARE_LICENSING_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'C')
2060 /// "SPCR" Serial Port Concole Redirection Table
2062 #define EFI_ACPI_5_0_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'C', 'R')
2065 /// "SPMI" Server Platform Management Interface Table
2067 #define EFI_ACPI_5_0_SERVER_PLATFORM_MANAGEMENT_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'M', 'I')
2070 /// "TCPA" Trusted Computing Platform Alliance Capabilities Table
2072 #define EFI_ACPI_5_0_TRUSTED_COMPUTING_PLATFORM_ALLIANCE_CAPABILITIES_TABLE_SIGNATURE SIGNATURE_32('T', 'C', 'P', 'A')
2075 /// "TPM2" Trusted Computing Platform 1 Table
2077 #define EFI_ACPI_5_0_TRUSTED_COMPUTING_PLATFORM_2_TABLE_SIGNATURE SIGNATURE_32('T', 'P', 'M', '2')
2080 /// "UEFI" UEFI ACPI Data Table
2082 #define EFI_ACPI_5_0_UEFI_ACPI_DATA_TABLE_SIGNATURE SIGNATURE_32('U', 'E', 'F', 'I')
2085 /// "WAET" Windows ACPI Enlightenment Table
2087 #define EFI_ACPI_5_0_WINDOWS_ACPI_ENLIGHTENMENT_TABLE_SIGNATURE SIGNATURE_32('W', 'A', 'E', 'T')
2090 /// "WDAT" Watchdog Action Table
2092 #define EFI_ACPI_5_0_WATCHDOG_ACTION_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'A', 'T')
2095 /// "WDRT" Watchdog Resource Table
2097 #define EFI_ACPI_5_0_WATCHDOG_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'R', 'T')
2100 /// "WPBT" MS Platform Binary Table
2102 #define EFI_ACPI_5_0_PLATFORM_BINARY_TABLE_SIGNATURE SIGNATURE_32('W', 'P', 'B', 'T')