2 ACPI 5.0 definitions from the ACPI Specification Revision 5.0a November 13, 2013.
4 Copyright (c) 2014 Hewlett-Packard Development Company, L.P.<BR>
5 Copyright (c) 2011 - 2018, Intel Corporation. All rights reserved.<BR>
6 Copyright (c) 2020, ARM Ltd. All rights reserved.<BR>
7 SPDX-License-Identifier: BSD-2-Clause-Patent
13 #include <IndustryStandard/Acpi40.h>
16 // Define for Descriptor
18 #define ACPI_SMALL_FIXED_DMA_DESCRIPTOR_NAME 0x0A
19 #define ACPI_LARGE_GPIO_CONNECTION_DESCRIPTOR_NAME 0x0C
20 #define ACPI_LARGE_GENERIC_SERIAL_BUS_CONNECTION_DESCRIPTOR_NAME 0x0E
22 #define ACPI_FIXED_DMA_DESCRIPTOR 0x55
23 #define ACPI_GPIO_CONNECTION_DESCRIPTOR 0x8C
24 #define ACPI_GENERIC_SERIAL_BUS_CONNECTION_DESCRIPTOR 0x8E
29 /// Generic DMA Descriptor.
31 typedef PACKED
struct {
32 ACPI_SMALL_RESOURCE_HEADER Header
;
33 UINT16 DmaRequestLine
;
35 UINT8 DmaTransferWidth
;
36 } EFI_ACPI_FIXED_DMA_DESCRIPTOR
;
39 /// GPIO Connection Descriptor
41 typedef PACKED
struct {
42 ACPI_LARGE_RESOURCE_HEADER Header
;
46 UINT16 InterruptFlags
;
47 UINT8 PinConfiguration
;
48 UINT16 OutputDriveStrength
;
49 UINT16 DebounceTimeout
;
50 UINT16 PinTableOffset
;
51 UINT8 ResourceSourceIndex
;
52 UINT16 ResourceSourceNameOffset
;
53 UINT16 VendorDataOffset
;
54 UINT16 VendorDataLength
;
55 } EFI_ACPI_GPIO_CONNECTION_DESCRIPTOR
;
57 #define EFI_ACPI_GPIO_CONNECTION_TYPE_INTERRUPT 0x0
58 #define EFI_ACPI_GPIO_CONNECTION_TYPE_IO 0x1
61 /// Serial Bus Resource Descriptor (Generic)
63 typedef PACKED
struct {
64 ACPI_LARGE_RESOURCE_HEADER Header
;
66 UINT8 ResourceSourceIndex
;
69 UINT16 TypeSpecificFlags
;
70 UINT8 TypeSpecificRevisionId
;
71 UINT16 TypeDataLength
;
73 } EFI_ACPI_SERIAL_BUS_RESOURCE_DESCRIPTOR
;
75 #define EFI_ACPI_SERIAL_BUS_RESOURCE_TYPE_I2C 0x1
76 #define EFI_ACPI_SERIAL_BUS_RESOURCE_TYPE_SPI 0x2
77 #define EFI_ACPI_SERIAL_BUS_RESOURCE_TYPE_UART 0x3
80 /// Serial Bus Resource Descriptor (I2C)
82 typedef PACKED
struct {
83 ACPI_LARGE_RESOURCE_HEADER Header
;
85 UINT8 ResourceSourceIndex
;
88 UINT16 TypeSpecificFlags
;
89 UINT8 TypeSpecificRevisionId
;
90 UINT16 TypeDataLength
;
91 UINT32 ConnectionSpeed
;
93 } EFI_ACPI_SERIAL_BUS_RESOURCE_I2C_DESCRIPTOR
;
96 /// Serial Bus Resource Descriptor (SPI)
98 typedef PACKED
struct {
99 ACPI_LARGE_RESOURCE_HEADER Header
;
101 UINT8 ResourceSourceIndex
;
104 UINT16 TypeSpecificFlags
;
105 UINT8 TypeSpecificRevisionId
;
106 UINT16 TypeDataLength
;
107 UINT32 ConnectionSpeed
;
111 UINT16 DeviceSelection
;
112 } EFI_ACPI_SERIAL_BUS_RESOURCE_SPI_DESCRIPTOR
;
115 /// Serial Bus Resource Descriptor (UART)
117 typedef PACKED
struct {
118 ACPI_LARGE_RESOURCE_HEADER Header
;
120 UINT8 ResourceSourceIndex
;
123 UINT16 TypeSpecificFlags
;
124 UINT8 TypeSpecificRevisionId
;
125 UINT16 TypeDataLength
;
126 UINT32 DefaultBaudRate
;
130 UINT8 SerialLinesEnabled
;
131 } EFI_ACPI_SERIAL_BUS_RESOURCE_UART_DESCRIPTOR
;
136 // Ensure proper structure formats
141 /// ACPI 5.0 Generic Address Space definition
144 UINT8 AddressSpaceId
;
145 UINT8 RegisterBitWidth
;
146 UINT8 RegisterBitOffset
;
149 } EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE
;
152 // Generic Address Space Address IDs
154 #define EFI_ACPI_5_0_SYSTEM_MEMORY 0
155 #define EFI_ACPI_5_0_SYSTEM_IO 1
156 #define EFI_ACPI_5_0_PCI_CONFIGURATION_SPACE 2
157 #define EFI_ACPI_5_0_EMBEDDED_CONTROLLER 3
158 #define EFI_ACPI_5_0_SMBUS 4
159 #define EFI_ACPI_5_0_PLATFORM_COMMUNICATION_CHANNEL 0x0A
160 #define EFI_ACPI_5_0_FUNCTIONAL_FIXED_HARDWARE 0x7F
163 // Generic Address Space Access Sizes
165 #define EFI_ACPI_5_0_UNDEFINED 0
166 #define EFI_ACPI_5_0_BYTE 1
167 #define EFI_ACPI_5_0_WORD 2
168 #define EFI_ACPI_5_0_DWORD 3
169 #define EFI_ACPI_5_0_QWORD 4
172 // ACPI 5.0 table structures
176 /// Root System Description Pointer Structure
186 UINT8 ExtendedChecksum
;
188 } EFI_ACPI_5_0_ROOT_SYSTEM_DESCRIPTION_POINTER
;
191 /// RSD_PTR Revision (as defined in ACPI 5.0 spec.)
193 #define EFI_ACPI_5_0_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02 ///< ACPISpec (Revision 5.0) says current value is 2
196 /// Common table header, this prefaces all ACPI tables, including FACS, but
197 /// excluding the RSD PTR structure
202 } EFI_ACPI_5_0_COMMON_HEADER
;
205 // Root System Description Table
206 // No definition needed as it is a common description table header, the same with
207 // EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT32 table pointers.
211 /// RSDT Revision (as defined in ACPI 5.0 spec.)
213 #define EFI_ACPI_5_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
216 // Extended System Description Table
217 // No definition needed as it is a common description table header, the same with
218 // EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT64 table pointers.
222 /// XSDT Revision (as defined in ACPI 5.0 spec.)
224 #define EFI_ACPI_5_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
227 /// Fixed ACPI Description Table Structure (FADT)
230 EFI_ACPI_DESCRIPTION_HEADER Header
;
234 UINT8 PreferredPmProfile
;
269 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE ResetReg
;
272 UINT64 XFirmwareCtrl
;
274 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk
;
275 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk
;
276 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk
;
277 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk
;
278 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk
;
279 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk
;
280 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XGpe0Blk
;
281 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XGpe1Blk
;
282 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE SleepControlReg
;
283 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE SleepStatusReg
;
284 } EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE
;
287 /// FADT Version (as defined in ACPI 5.0 spec.)
289 #define EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x05
292 // Fixed ACPI Description Table Preferred Power Management Profile
294 #define EFI_ACPI_5_0_PM_PROFILE_UNSPECIFIED 0
295 #define EFI_ACPI_5_0_PM_PROFILE_DESKTOP 1
296 #define EFI_ACPI_5_0_PM_PROFILE_MOBILE 2
297 #define EFI_ACPI_5_0_PM_PROFILE_WORKSTATION 3
298 #define EFI_ACPI_5_0_PM_PROFILE_ENTERPRISE_SERVER 4
299 #define EFI_ACPI_5_0_PM_PROFILE_SOHO_SERVER 5
300 #define EFI_ACPI_5_0_PM_PROFILE_APPLIANCE_PC 6
301 #define EFI_ACPI_5_0_PM_PROFILE_PERFORMANCE_SERVER 7
302 #define EFI_ACPI_5_0_PM_PROFILE_TABLET 8
305 // Fixed ACPI Description Table Boot Architecture Flags
306 // All other bits are reserved and must be set to 0.
308 #define EFI_ACPI_5_0_LEGACY_DEVICES BIT0
309 #define EFI_ACPI_5_0_8042 BIT1
310 #define EFI_ACPI_5_0_VGA_NOT_PRESENT BIT2
311 #define EFI_ACPI_5_0_MSI_NOT_SUPPORTED BIT3
312 #define EFI_ACPI_5_0_PCIE_ASPM_CONTROLS BIT4
313 #define EFI_ACPI_5_0_CMOS_RTC_NOT_PRESENT BIT5
316 // Fixed ACPI Description Table Fixed Feature Flags
317 // All other bits are reserved and must be set to 0.
319 #define EFI_ACPI_5_0_WBINVD BIT0
320 #define EFI_ACPI_5_0_WBINVD_FLUSH BIT1
321 #define EFI_ACPI_5_0_PROC_C1 BIT2
322 #define EFI_ACPI_5_0_P_LVL2_UP BIT3
323 #define EFI_ACPI_5_0_PWR_BUTTON BIT4
324 #define EFI_ACPI_5_0_SLP_BUTTON BIT5
325 #define EFI_ACPI_5_0_FIX_RTC BIT6
326 #define EFI_ACPI_5_0_RTC_S4 BIT7
327 #define EFI_ACPI_5_0_TMR_VAL_EXT BIT8
328 #define EFI_ACPI_5_0_DCK_CAP BIT9
329 #define EFI_ACPI_5_0_RESET_REG_SUP BIT10
330 #define EFI_ACPI_5_0_SEALED_CASE BIT11
331 #define EFI_ACPI_5_0_HEADLESS BIT12
332 #define EFI_ACPI_5_0_CPU_SW_SLP BIT13
333 #define EFI_ACPI_5_0_PCI_EXP_WAK BIT14
334 #define EFI_ACPI_5_0_USE_PLATFORM_CLOCK BIT15
335 #define EFI_ACPI_5_0_S4_RTC_STS_VALID BIT16
336 #define EFI_ACPI_5_0_REMOTE_POWER_ON_CAPABLE BIT17
337 #define EFI_ACPI_5_0_FORCE_APIC_CLUSTER_MODEL BIT18
338 #define EFI_ACPI_5_0_FORCE_APIC_PHYSICAL_DESTINATION_MODE BIT19
339 #define EFI_ACPI_5_0_HW_REDUCED_ACPI BIT20
340 #define EFI_ACPI_5_0_LOW_POWER_S0_IDLE_CAPABLE BIT21
343 /// Firmware ACPI Control Structure
348 UINT32 HardwareSignature
;
349 UINT32 FirmwareWakingVector
;
352 UINT64 XFirmwareWakingVector
;
357 } EFI_ACPI_5_0_FIRMWARE_ACPI_CONTROL_STRUCTURE
;
360 /// FACS Version (as defined in ACPI 5.0 spec.)
362 #define EFI_ACPI_5_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION 0x02
365 /// Firmware Control Structure Feature Flags
366 /// All other bits are reserved and must be set to 0.
368 #define EFI_ACPI_5_0_S4BIOS_F BIT0
369 #define EFI_ACPI_5_0_64BIT_WAKE_SUPPORTED_F BIT1
372 /// OSPM Enabled Firmware Control Structure Flags
373 /// All other bits are reserved and must be set to 0.
375 #define EFI_ACPI_5_0_OSPM_64BIT_WAKE_F BIT0
378 // Differentiated System Description Table,
379 // Secondary System Description Table
380 // and Persistent System Description Table,
381 // no definition needed as they are common description table header, the same with
382 // EFI_ACPI_DESCRIPTION_HEADER, followed by a definition block.
384 #define EFI_ACPI_5_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
385 #define EFI_ACPI_5_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
388 /// Multiple APIC Description Table header definition. The rest of the table
389 /// must be defined in a platform specific manner.
392 EFI_ACPI_DESCRIPTION_HEADER Header
;
393 UINT32 LocalApicAddress
;
395 } EFI_ACPI_5_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER
;
398 /// MADT Revision (as defined in ACPI 5.0 spec.)
400 #define EFI_ACPI_5_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x03
403 /// Multiple APIC Flags
404 /// All other bits are reserved and must be set to 0.
406 #define EFI_ACPI_5_0_PCAT_COMPAT BIT0
409 // Multiple APIC Description Table APIC structure types
410 // All other values between 0x0D and 0x7F are reserved and
411 // will be ignored by OSPM. 0x80 ~ 0xFF are reserved for OEM.
413 #define EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC 0x00
414 #define EFI_ACPI_5_0_IO_APIC 0x01
415 #define EFI_ACPI_5_0_INTERRUPT_SOURCE_OVERRIDE 0x02
416 #define EFI_ACPI_5_0_NON_MASKABLE_INTERRUPT_SOURCE 0x03
417 #define EFI_ACPI_5_0_LOCAL_APIC_NMI 0x04
418 #define EFI_ACPI_5_0_LOCAL_APIC_ADDRESS_OVERRIDE 0x05
419 #define EFI_ACPI_5_0_IO_SAPIC 0x06
420 #define EFI_ACPI_5_0_LOCAL_SAPIC 0x07
421 #define EFI_ACPI_5_0_PLATFORM_INTERRUPT_SOURCES 0x08
422 #define EFI_ACPI_5_0_PROCESSOR_LOCAL_X2APIC 0x09
423 #define EFI_ACPI_5_0_LOCAL_X2APIC_NMI 0x0A
424 #define EFI_ACPI_5_0_GIC 0x0B
425 #define EFI_ACPI_5_0_GICD 0x0C
428 // APIC Structure Definitions
432 /// Processor Local APIC Structure Definition
437 UINT8 AcpiProcessorId
;
440 } EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC_STRUCTURE
;
443 /// Local APIC Flags. All other bits are reserved and must be 0.
445 #define EFI_ACPI_5_0_LOCAL_APIC_ENABLED BIT0
448 /// IO APIC Structure
455 UINT32 IoApicAddress
;
456 UINT32 GlobalSystemInterruptBase
;
457 } EFI_ACPI_5_0_IO_APIC_STRUCTURE
;
460 /// Interrupt Source Override Structure
467 UINT32 GlobalSystemInterrupt
;
469 } EFI_ACPI_5_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE
;
472 /// Platform Interrupt Sources Structure Definition
482 UINT32 GlobalSystemInterrupt
;
483 UINT32 PlatformInterruptSourceFlags
;
484 UINT8 CpeiProcessorOverride
;
486 } EFI_ACPI_5_0_PLATFORM_INTERRUPT_APIC_STRUCTURE
;
490 // All other bits are reserved and must be set to 0.
492 #define EFI_ACPI_5_0_POLARITY (3 << 0)
493 #define EFI_ACPI_5_0_TRIGGER_MODE (3 << 2)
496 /// Non-Maskable Interrupt Source Structure
502 UINT32 GlobalSystemInterrupt
;
503 } EFI_ACPI_5_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE
;
506 /// Local APIC NMI Structure
511 UINT8 AcpiProcessorId
;
514 } EFI_ACPI_5_0_LOCAL_APIC_NMI_STRUCTURE
;
517 /// Local APIC Address Override Structure
523 UINT64 LocalApicAddress
;
524 } EFI_ACPI_5_0_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE
;
527 /// IO SAPIC Structure
534 UINT32 GlobalSystemInterruptBase
;
535 UINT64 IoSapicAddress
;
536 } EFI_ACPI_5_0_IO_SAPIC_STRUCTURE
;
539 /// Local SAPIC Structure
540 /// This struct followed by a null-terminated ASCII string - ACPI Processor UID String
545 UINT8 AcpiProcessorId
;
550 UINT32 ACPIProcessorUIDValue
;
551 } EFI_ACPI_5_0_PROCESSOR_LOCAL_SAPIC_STRUCTURE
;
554 /// Platform Interrupt Sources Structure
564 UINT32 GlobalSystemInterrupt
;
565 UINT32 PlatformInterruptSourceFlags
;
566 } EFI_ACPI_5_0_PLATFORM_INTERRUPT_SOURCES_STRUCTURE
;
569 /// Platform Interrupt Source Flags.
570 /// All other bits are reserved and must be set to 0.
572 #define EFI_ACPI_5_0_CPEI_PROCESSOR_OVERRIDE BIT0
575 /// Processor Local x2APIC Structure Definition
583 UINT32 AcpiProcessorUid
;
584 } EFI_ACPI_5_0_PROCESSOR_LOCAL_X2APIC_STRUCTURE
;
587 /// Local x2APIC NMI Structure
593 UINT32 AcpiProcessorUid
;
594 UINT8 LocalX2ApicLint
;
596 } EFI_ACPI_5_0_LOCAL_X2APIC_NMI_STRUCTURE
;
606 UINT32 AcpiProcessorUid
;
608 UINT32 ParkingProtocolVersion
;
609 UINT32 PerformanceInterruptGsiv
;
610 UINT64 ParkedAddress
;
611 UINT64 PhysicalBaseAddress
;
612 } EFI_ACPI_5_0_GIC_STRUCTURE
;
615 /// GIC Flags. All other bits are reserved and must be 0.
617 #define EFI_ACPI_5_0_GIC_ENABLED BIT0
618 #define EFI_ACPI_5_0_PERFORMANCE_INTERRUPT_MODEL BIT1
621 /// GIC Distributor Structure
628 UINT64 PhysicalBaseAddress
;
629 UINT32 SystemVectorBase
;
631 } EFI_ACPI_5_0_GIC_DISTRIBUTOR_STRUCTURE
;
634 /// Smart Battery Description Table (SBST)
637 EFI_ACPI_DESCRIPTION_HEADER Header
;
638 UINT32 WarningEnergyLevel
;
639 UINT32 LowEnergyLevel
;
640 UINT32 CriticalEnergyLevel
;
641 } EFI_ACPI_5_0_SMART_BATTERY_DESCRIPTION_TABLE
;
644 /// SBST Version (as defined in ACPI 5.0 spec.)
646 #define EFI_ACPI_5_0_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01
649 /// Embedded Controller Boot Resources Table (ECDT)
650 /// The table is followed by a null terminated ASCII string that contains
651 /// a fully qualified reference to the name space object.
654 EFI_ACPI_DESCRIPTION_HEADER Header
;
655 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE EcControl
;
656 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE EcData
;
659 } EFI_ACPI_5_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE
;
662 /// ECDT Version (as defined in ACPI 5.0 spec.)
664 #define EFI_ACPI_5_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION 0x01
667 /// System Resource Affinity Table (SRAT). The rest of the table
668 /// must be defined in a platform specific manner.
671 EFI_ACPI_DESCRIPTION_HEADER Header
;
672 UINT32 Reserved1
; ///< Must be set to 1
674 } EFI_ACPI_5_0_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER
;
677 /// SRAT Version (as defined in ACPI 5.0 spec.)
679 #define EFI_ACPI_5_0_SYSTEM_RESOURCE_AFFINITY_TABLE_REVISION 0x03
682 // SRAT structure types.
683 // All other values between 0x03 an 0xFF are reserved and
684 // will be ignored by OSPM.
686 #define EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY 0x00
687 #define EFI_ACPI_5_0_MEMORY_AFFINITY 0x01
688 #define EFI_ACPI_5_0_PROCESSOR_LOCAL_X2APIC_AFFINITY 0x02
691 /// Processor Local APIC/SAPIC Affinity Structure Definition
696 UINT8 ProximityDomain7To0
;
700 UINT8 ProximityDomain31To8
[3];
702 } EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY_STRUCTURE
;
705 /// Local APIC/SAPIC Flags. All other bits are reserved and must be 0.
707 #define EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC_SAPIC_ENABLED (1 << 0)
710 /// Memory Affinity Structure Definition
715 UINT32 ProximityDomain
;
717 UINT32 AddressBaseLow
;
718 UINT32 AddressBaseHigh
;
724 } EFI_ACPI_5_0_MEMORY_AFFINITY_STRUCTURE
;
727 // Memory Flags. All other bits are reserved and must be 0.
729 #define EFI_ACPI_5_0_MEMORY_ENABLED (1 << 0)
730 #define EFI_ACPI_5_0_MEMORY_HOT_PLUGGABLE (1 << 1)
731 #define EFI_ACPI_5_0_MEMORY_NONVOLATILE (1 << 2)
734 /// Processor Local x2APIC Affinity Structure Definition
740 UINT32 ProximityDomain
;
745 } EFI_ACPI_5_0_PROCESSOR_LOCAL_X2APIC_AFFINITY_STRUCTURE
;
748 /// System Locality Distance Information Table (SLIT).
749 /// The rest of the table is a matrix.
752 EFI_ACPI_DESCRIPTION_HEADER Header
;
753 UINT64 NumberOfSystemLocalities
;
754 } EFI_ACPI_5_0_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_HEADER
;
757 /// SLIT Version (as defined in ACPI 5.0 spec.)
759 #define EFI_ACPI_5_0_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_REVISION 0x01
762 /// Corrected Platform Error Polling Table (CPEP)
765 EFI_ACPI_DESCRIPTION_HEADER Header
;
767 } EFI_ACPI_5_0_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_HEADER
;
770 /// CPEP Version (as defined in ACPI 5.0 spec.)
772 #define EFI_ACPI_5_0_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_REVISION 0x01
775 // CPEP processor structure types.
777 #define EFI_ACPI_5_0_CPEP_PROCESSOR_APIC_SAPIC 0x00
780 /// Corrected Platform Error Polling Processor Structure Definition
787 UINT32 PollingInterval
;
788 } EFI_ACPI_5_0_CPEP_PROCESSOR_APIC_SAPIC_STRUCTURE
;
791 /// Maximum System Characteristics Table (MSCT)
794 EFI_ACPI_DESCRIPTION_HEADER Header
;
795 UINT32 OffsetProxDomInfo
;
796 UINT32 MaximumNumberOfProximityDomains
;
797 UINT32 MaximumNumberOfClockDomains
;
798 UINT64 MaximumPhysicalAddress
;
799 } EFI_ACPI_5_0_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_HEADER
;
802 /// MSCT Version (as defined in ACPI 5.0 spec.)
804 #define EFI_ACPI_5_0_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_REVISION 0x01
807 /// Maximum Proximity Domain Information Structure Definition
812 UINT32 ProximityDomainRangeLow
;
813 UINT32 ProximityDomainRangeHigh
;
814 UINT32 MaximumProcessorCapacity
;
815 UINT64 MaximumMemoryCapacity
;
816 } EFI_ACPI_5_0_MAXIMUM_PROXIMITY_DOMAIN_INFORMATION_STRUCTURE
;
819 /// ACPI RAS Feature Table definition.
822 EFI_ACPI_DESCRIPTION_HEADER Header
;
823 UINT8 PlatformCommunicationChannelIdentifier
[12];
824 } EFI_ACPI_5_0_RAS_FEATURE_TABLE
;
827 /// RASF Version (as defined in ACPI 5.0 spec.)
829 #define EFI_ACPI_5_0_RAS_FEATURE_TABLE_REVISION 0x01
832 /// ACPI RASF Platform Communication Channel Shared Memory Region definition.
839 UINT8 RASCapabilities
[16];
840 UINT8 SetRASCapabilities
[16];
841 UINT16 NumberOfRASFParameterBlocks
;
842 UINT32 SetRASCapabilitiesStatus
;
843 } EFI_ACPI_5_0_RASF_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION
;
846 /// ACPI RASF PCC command code
848 #define EFI_ACPI_5_0_RASF_PCC_COMMAND_CODE_EXECUTE_RASF_COMMAND 0x01
851 /// ACPI RASF Platform RAS Capabilities
853 #define EFI_ACPI_5_0_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPOTED 0x01
854 #define EFI_ACPI_5_0_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPOTED_AND_EXPOSED_TO_SOFTWARE 0x02
857 /// ACPI RASF Parameter Block structure for PATROL_SCRUB
863 UINT16 PatrolScrubCommand
;
864 UINT64 RequestedAddressRange
[2];
865 UINT64 ActualAddressRange
[2];
867 UINT8 RequestedSpeed
;
868 } EFI_ACPI_5_0_RASF_PATROL_SCRUB_PLATFORM_BLOCK_STRUCTURE
;
871 /// ACPI RASF Patrol Scrub command
873 #define EFI_ACPI_5_0_RASF_PATROL_SCRUB_COMMAND_GET_PATROL_PARAMETERS 0x01
874 #define EFI_ACPI_5_0_RASF_PATROL_SCRUB_COMMAND_START_PATROL_SCRUBBER 0x02
875 #define EFI_ACPI_5_0_RASF_PATROL_SCRUB_COMMAND_STOP_PATROL_SCRUBBER 0x03
878 /// Memory Power State Table definition.
881 EFI_ACPI_DESCRIPTION_HEADER Header
;
882 UINT8 PlatformCommunicationChannelIdentifier
;
884 // Memory Power Node Structure
885 // Memory Power State Characteristics
886 } EFI_ACPI_5_0_MEMORY_POWER_STATUS_TABLE
;
889 /// MPST Version (as defined in ACPI 5.0 spec.)
891 #define EFI_ACPI_5_0_MEMORY_POWER_STATE_TABLE_REVISION 0x01
894 /// MPST Platform Communication Channel Shared Memory Region definition.
900 UINT32 MemoryPowerCommandRegister
;
901 UINT32 MemoryPowerStatusRegister
;
903 UINT32 MemoryPowerNodeId
;
904 UINT64 MemoryEnergyConsumed
;
905 UINT64 ExpectedAveragePowerComsuned
;
906 } EFI_ACPI_5_0_MPST_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION
;
909 /// ACPI MPST PCC command code
911 #define EFI_ACPI_5_0_MPST_PCC_COMMAND_CODE_EXECUTE_MPST_COMMAND 0x03
914 /// ACPI MPST Memory Power command
916 #define EFI_ACPI_5_0_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_POWER_STATE 0x01
917 #define EFI_ACPI_5_0_MPST_MEMORY_POWER_COMMAND_SET_MEMORY_POWER_STATE 0x02
918 #define EFI_ACPI_5_0_MPST_MEMORY_POWER_COMMAND_GET_AVERAGE_POWER_CONSUMED 0x03
919 #define EFI_ACPI_5_0_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_ENERGY_CONSUMED 0x04
922 /// MPST Memory Power Node Table
925 UINT8 PowerStateValue
;
926 UINT8 PowerStateInformationIndex
;
927 } EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE
;
932 UINT16 MemoryPowerNodeId
;
935 UINT64 AddressLength
;
936 UINT32 NumberOfPowerStates
;
937 UINT32 NumberOfPhysicalComponents
;
938 //EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE MemoryPowerState[NumberOfPowerStates];
939 //UINT16 PhysicalComponentIdentifier[NumberOfPhysicalComponents];
940 } EFI_ACPI_5_0_MPST_MEMORY_POWER_STRUCTURE
;
942 #define EFI_ACPI_5_0_MPST_MEMORY_POWER_STRUCTURE_FLAG_ENABLE 0x01
943 #define EFI_ACPI_5_0_MPST_MEMORY_POWER_STRUCTURE_FLAG_POWER_MANAGED 0x02
944 #define EFI_ACPI_5_0_MPST_MEMORY_POWER_STRUCTURE_FLAG_HOT_PLUGGABLE 0x04
947 UINT16 MemoryPowerNodeCount
;
949 } EFI_ACPI_5_0_MPST_MEMORY_POWER_NODE_TABLE
;
952 /// MPST Memory Power State Characteristics Table
955 UINT8 PowerStateStructureID
;
958 UINT32 AveragePowerConsumedInMPS0
;
959 UINT32 RelativePowerSavingToMPS0
;
960 UINT64 ExitLatencyToMPS0
;
961 } EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE
;
963 #define EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_MEMORY_CONTENT_PRESERVED 0x01
964 #define EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_ENTRY 0x02
965 #define EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_EXIT 0x04
968 UINT16 MemoryPowerStateCharacteristicsCount
;
970 } EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_TABLE
;
973 /// Memory Topology Table definition.
976 EFI_ACPI_DESCRIPTION_HEADER Header
;
978 } EFI_ACPI_5_0_MEMORY_TOPOLOGY_TABLE
;
981 /// PMTT Version (as defined in ACPI 5.0 spec.)
983 #define EFI_ACPI_5_0_MEMORY_TOPOLOGY_TABLE_REVISION 0x01
986 /// Common Memory Aggregator Device Structure.
994 } EFI_ACPI_5_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE
;
997 /// Memory Aggregator Device Type
999 #define EFI_ACPI_5_0_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_SOCKET 0x1
1000 #define EFI_ACPI_5_0_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_MEMORY_CONTROLLER 0x2
1001 #define EFI_ACPI_5_0_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_DIMM 0x3
1004 /// Socket Memory Aggregator Device Structure.
1007 EFI_ACPI_5_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header
;
1008 UINT16 SocketIdentifier
;
1010 //EFI_ACPI_5_0_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE MemoryController[];
1011 } EFI_ACPI_5_0_PMMT_SOCKET_MEMORY_AGGREGATOR_DEVICE_STRUCTURE
;
1014 /// MemoryController Memory Aggregator Device Structure.
1017 EFI_ACPI_5_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header
;
1019 UINT32 WriteLatency
;
1020 UINT32 ReadBandwidth
;
1021 UINT32 WriteBandwidth
;
1022 UINT16 OptimalAccessUnit
;
1023 UINT16 OptimalAccessAlignment
;
1025 UINT16 NumberOfProximityDomains
;
1026 //UINT32 ProximityDomain[NumberOfProximityDomains];
1027 //EFI_ACPI_5_0_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE PhysicalComponent[];
1028 } EFI_ACPI_5_0_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE
;
1031 /// DIMM Memory Aggregator Device Structure.
1034 EFI_ACPI_5_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header
;
1035 UINT16 PhysicalComponentIdentifier
;
1038 UINT32 SmbiosHandle
;
1039 } EFI_ACPI_5_0_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE
;
1042 /// Boot Graphics Resource Table definition.
1045 EFI_ACPI_DESCRIPTION_HEADER Header
;
1047 /// 2-bytes (16 bit) version ID. This value must be 1.
1051 /// 1-byte status field indicating current status about the table.
1052 /// Bits[7:1] = Reserved (must be zero)
1053 /// Bit [0] = Valid. A one indicates the boot image graphic is valid.
1057 /// 1-byte enumerated type field indicating format of the image.
1059 /// 1 - 255 Reserved (for future use)
1063 /// 8-byte (64 bit) physical address pointing to the firmware's in-memory copy
1064 /// of the image bitmap.
1066 UINT64 ImageAddress
;
1068 /// A 4-byte (32-bit) unsigned long describing the display X-offset of the boot image.
1069 /// (X, Y) display offset of the top left corner of the boot image.
1070 /// The top left corner of the display is at offset (0, 0).
1072 UINT32 ImageOffsetX
;
1074 /// A 4-byte (32-bit) unsigned long describing the display Y-offset of the boot image.
1075 /// (X, Y) display offset of the top left corner of the boot image.
1076 /// The top left corner of the display is at offset (0, 0).
1078 UINT32 ImageOffsetY
;
1079 } EFI_ACPI_5_0_BOOT_GRAPHICS_RESOURCE_TABLE
;
1084 #define EFI_ACPI_5_0_BOOT_GRAPHICS_RESOURCE_TABLE_REVISION 1
1089 #define EFI_ACPI_5_0_BGRT_VERSION 0x01
1094 #define EFI_ACPI_5_0_BGRT_STATUS_NOT_DISPLAYED 0x00
1095 #define EFI_ACPI_5_0_BGRT_STATUS_DISPLAYED 0x01
1096 #define EFI_ACPI_5_0_BGRT_STATUS_INVALID EFI_ACPI_5_0_BGRT_STATUS_NOT_DISPLAYED
1097 #define EFI_ACPI_5_0_BGRT_STATUS_VALID EFI_ACPI_5_0_BGRT_STATUS_DISPLAYED
1102 #define EFI_ACPI_5_0_BGRT_IMAGE_TYPE_BMP 0x00
1105 /// FPDT Version (as defined in ACPI 5.0 spec.)
1107 #define EFI_ACPI_5_0_FIRMWARE_PERFORMANCE_DATA_TABLE_REVISION 0x01
1110 /// FPDT Performance Record Types
1112 #define EFI_ACPI_5_0_FPDT_RECORD_TYPE_FIRMWARE_BASIC_BOOT_POINTER 0x0000
1113 #define EFI_ACPI_5_0_FPDT_RECORD_TYPE_S3_PERFORMANCE_TABLE_POINTER 0x0001
1116 /// FPDT Performance Record Revision
1118 #define EFI_ACPI_5_0_FPDT_RECORD_REVISION_FIRMWARE_BASIC_BOOT_POINTER 0x01
1119 #define EFI_ACPI_5_0_FPDT_RECORD_REVISION_S3_PERFORMANCE_TABLE_POINTER 0x01
1122 /// FPDT Runtime Performance Record Types
1124 #define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_TYPE_S3_RESUME 0x0000
1125 #define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_TYPE_S3_SUSPEND 0x0001
1126 #define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_TYPE_FIRMWARE_BASIC_BOOT 0x0002
1129 /// FPDT Runtime Performance Record Revision
1131 #define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_REVISION_S3_RESUME 0x01
1132 #define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_REVISION_S3_SUSPEND 0x01
1133 #define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_REVISION_FIRMWARE_BASIC_BOOT 0x02
1136 /// FPDT Performance Record header
1142 } EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER
;
1145 /// FPDT Performance Table header
1150 } EFI_ACPI_5_0_FPDT_PERFORMANCE_TABLE_HEADER
;
1153 /// FPDT Firmware Basic Boot Performance Pointer Record Structure
1156 EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header
;
1159 /// 64-bit processor-relative physical address of the Basic Boot Performance Table.
1161 UINT64 BootPerformanceTablePointer
;
1162 } EFI_ACPI_5_0_FPDT_BOOT_PERFORMANCE_TABLE_POINTER_RECORD
;
1165 /// FPDT S3 Performance Table Pointer Record Structure
1168 EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header
;
1171 /// 64-bit processor-relative physical address of the S3 Performance Table.
1173 UINT64 S3PerformanceTablePointer
;
1174 } EFI_ACPI_5_0_FPDT_S3_PERFORMANCE_TABLE_POINTER_RECORD
;
1177 /// FPDT Firmware Basic Boot Performance Record Structure
1180 EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header
;
1183 /// Timer value logged at the beginning of firmware image execution.
1184 /// This may not always be zero or near zero.
1188 /// Timer value logged just prior to loading the OS boot loader into memory.
1189 /// For non-UEFI compatible boots, this field must be zero.
1191 UINT64 OsLoaderLoadImageStart
;
1193 /// Timer value logged just prior to launching the previously loaded OS boot loader image.
1194 /// For non-UEFI compatible boots, the timer value logged will be just prior
1195 /// to the INT 19h handler invocation.
1197 UINT64 OsLoaderStartImageStart
;
1199 /// Timer value logged at the point when the OS loader calls the
1200 /// ExitBootServices function for UEFI compatible firmware.
1201 /// For non-UEFI compatible boots, this field must be zero.
1203 UINT64 ExitBootServicesEntry
;
1205 /// Timer value logged at the point just prior to when the OS loader gaining
1206 /// control back from calls the ExitBootServices function for UEFI compatible firmware.
1207 /// For non-UEFI compatible boots, this field must be zero.
1209 UINT64 ExitBootServicesExit
;
1210 } EFI_ACPI_5_0_FPDT_FIRMWARE_BASIC_BOOT_RECORD
;
1213 /// FPDT Firmware Basic Boot Performance Table signature
1215 #define EFI_ACPI_5_0_FPDT_BOOT_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('F', 'B', 'P', 'T')
1218 // FPDT Firmware Basic Boot Performance Table
1221 EFI_ACPI_5_0_FPDT_PERFORMANCE_TABLE_HEADER Header
;
1223 // one or more Performance Records.
1225 } EFI_ACPI_5_0_FPDT_FIRMWARE_BASIC_BOOT_TABLE
;
1228 /// FPDT "S3PT" S3 Performance Table
1230 #define EFI_ACPI_5_0_FPDT_S3_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('S', '3', 'P', 'T')
1233 // FPDT Firmware S3 Boot Performance Table
1236 EFI_ACPI_5_0_FPDT_PERFORMANCE_TABLE_HEADER Header
;
1238 // one or more Performance Records.
1240 } EFI_ACPI_5_0_FPDT_FIRMWARE_S3_BOOT_TABLE
;
1243 /// FPDT Basic S3 Resume Performance Record
1246 EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header
;
1248 /// A count of the number of S3 resume cycles since the last full boot sequence.
1252 /// Timer recorded at the end of BIOS S3 resume, just prior to handoff to the
1253 /// OS waking vector. Only the most recent resume cycle's time is retained.
1257 /// Average timer value of all resume cycles logged since the last full boot
1258 /// sequence, including the most recent resume. Note that the entire log of
1259 /// timer values does not need to be retained in order to calculate this average.
1261 UINT64 AverageResume
;
1262 } EFI_ACPI_5_0_FPDT_S3_RESUME_RECORD
;
1265 /// FPDT Basic S3 Suspend Performance Record
1268 EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header
;
1270 /// Timer value recorded at the OS write to SLP_TYP upon entry to S3.
1271 /// Only the most recent suspend cycle's timer value is retained.
1273 UINT64 SuspendStart
;
1275 /// Timer value recorded at the final firmware write to SLP_TYP (or other
1276 /// mechanism) used to trigger hardware entry to S3.
1277 /// Only the most recent suspend cycle's timer value is retained.
1280 } EFI_ACPI_5_0_FPDT_S3_SUSPEND_RECORD
;
1283 /// Firmware Performance Record Table definition.
1286 EFI_ACPI_DESCRIPTION_HEADER Header
;
1287 } EFI_ACPI_5_0_FIRMWARE_PERFORMANCE_RECORD_TABLE
;
1290 /// Generic Timer Description Table definition.
1293 EFI_ACPI_DESCRIPTION_HEADER Header
;
1294 UINT64 PhysicalAddress
;
1296 UINT32 SecurePL1TimerGSIV
;
1297 UINT32 SecurePL1TimerFlags
;
1298 UINT32 NonSecurePL1TimerGSIV
;
1299 UINT32 NonSecurePL1TimerFlags
;
1300 UINT32 VirtualTimerGSIV
;
1301 UINT32 VirtualTimerFlags
;
1302 UINT32 NonSecurePL2TimerGSIV
;
1303 UINT32 NonSecurePL2TimerFlags
;
1304 } EFI_ACPI_5_0_GENERIC_TIMER_DESCRIPTION_TABLE
;
1307 /// GTDT Version (as defined in ACPI 5.0 spec.)
1309 #define EFI_ACPI_5_0_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION 0x01
1312 /// Global Flags. All other bits are reserved and must be 0.
1314 #define EFI_ACPI_5_0_GTDT_GLOBAL_FLAG_MEMORY_MAPPED_BLOCK_PRESENT BIT0
1315 #define EFI_ACPI_5_0_GTDT_GLOBAL_FLAG_INTERRUPT_MODE BIT1
1318 /// Timer Flags. All other bits are reserved and must be 0.
1320 #define EFI_ACPI_5_0_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0
1321 #define EFI_ACPI_5_0_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1
1324 /// Boot Error Record Table (BERT)
1327 EFI_ACPI_DESCRIPTION_HEADER Header
;
1328 UINT32 BootErrorRegionLength
;
1329 UINT64 BootErrorRegion
;
1330 } EFI_ACPI_5_0_BOOT_ERROR_RECORD_TABLE_HEADER
;
1333 /// BERT Version (as defined in ACPI 5.0 spec.)
1335 #define EFI_ACPI_5_0_BOOT_ERROR_RECORD_TABLE_REVISION 0x01
1338 /// Boot Error Region Block Status Definition
1341 UINT32 UncorrectableErrorValid
:1;
1342 UINT32 CorrectableErrorValid
:1;
1343 UINT32 MultipleUncorrectableErrors
:1;
1344 UINT32 MultipleCorrectableErrors
:1;
1345 UINT32 ErrorDataEntryCount
:10;
1347 } EFI_ACPI_5_0_ERROR_BLOCK_STATUS
;
1350 /// Boot Error Region Definition
1353 EFI_ACPI_5_0_ERROR_BLOCK_STATUS BlockStatus
;
1354 UINT32 RawDataOffset
;
1355 UINT32 RawDataLength
;
1357 UINT32 ErrorSeverity
;
1358 } EFI_ACPI_5_0_BOOT_ERROR_REGION_STRUCTURE
;
1361 // Boot Error Severity types
1363 #define EFI_ACPI_5_0_ERROR_SEVERITY_CORRECTABLE 0x00
1364 #define EFI_ACPI_5_0_ERROR_SEVERITY_FATAL 0x01
1365 #define EFI_ACPI_5_0_ERROR_SEVERITY_CORRECTED 0x02
1366 #define EFI_ACPI_5_0_ERROR_SEVERITY_NONE 0x03
1369 /// Generic Error Data Entry Definition
1372 UINT8 SectionType
[16];
1373 UINT32 ErrorSeverity
;
1375 UINT8 ValidationBits
;
1377 UINT32 ErrorDataLength
;
1380 } EFI_ACPI_5_0_GENERIC_ERROR_DATA_ENTRY_STRUCTURE
;
1383 /// Generic Error Data Entry Version (as defined in ACPI 5.0 spec.)
1385 #define EFI_ACPI_5_0_GENERIC_ERROR_DATA_ENTRY_REVISION 0x0201
1388 /// HEST - Hardware Error Source Table
1391 EFI_ACPI_DESCRIPTION_HEADER Header
;
1392 UINT32 ErrorSourceCount
;
1393 } EFI_ACPI_5_0_HARDWARE_ERROR_SOURCE_TABLE_HEADER
;
1396 /// HEST Version (as defined in ACPI 5.0 spec.)
1398 #define EFI_ACPI_5_0_HARDWARE_ERROR_SOURCE_TABLE_REVISION 0x01
1401 // Error Source structure types.
1403 #define EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION 0x00
1404 #define EFI_ACPI_5_0_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK 0x01
1405 #define EFI_ACPI_5_0_IA32_ARCHITECTURE_NMI_ERROR 0x02
1406 #define EFI_ACPI_5_0_PCI_EXPRESS_ROOT_PORT_AER 0x06
1407 #define EFI_ACPI_5_0_PCI_EXPRESS_DEVICE_AER 0x07
1408 #define EFI_ACPI_5_0_PCI_EXPRESS_BRIDGE_AER 0x08
1409 #define EFI_ACPI_5_0_GENERIC_HARDWARE_ERROR 0x09
1412 // Error Source structure flags.
1414 #define EFI_ACPI_5_0_ERROR_SOURCE_FLAG_FIRMWARE_FIRST (1 << 0)
1415 #define EFI_ACPI_5_0_ERROR_SOURCE_FLAG_GLOBAL (1 << 1)
1418 /// IA-32 Architecture Machine Check Exception Structure Definition
1426 UINT32 NumberOfRecordsToPreAllocate
;
1427 UINT32 MaxSectionsPerRecord
;
1428 UINT64 GlobalCapabilityInitData
;
1429 UINT64 GlobalControlInitData
;
1430 UINT8 NumberOfHardwareBanks
;
1432 } EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION_STRUCTURE
;
1435 /// IA-32 Architecture Machine Check Bank Structure Definition
1439 UINT8 ClearStatusOnInitialization
;
1440 UINT8 StatusDataFormat
;
1442 UINT32 ControlRegisterMsrAddress
;
1443 UINT64 ControlInitData
;
1444 UINT32 StatusRegisterMsrAddress
;
1445 UINT32 AddressRegisterMsrAddress
;
1446 UINT32 MiscRegisterMsrAddress
;
1447 } EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_BANK_STRUCTURE
;
1450 /// IA-32 Architecture Machine Check Bank Structure MCA data format
1452 #define EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_IA32 0x00
1453 #define EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_INTEL64 0x01
1454 #define EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_AMD64 0x02
1457 // Hardware Error Notification types. All other values are reserved
1459 #define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_POLLED 0x00
1460 #define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_EXTERNAL_INTERRUPT 0x01
1461 #define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_LOCAL_INTERRUPT 0x02
1462 #define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_SCI 0x03
1463 #define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_NMI 0x04
1466 /// Hardware Error Notification Configuration Write Enable Structure Definition
1470 UINT16 PollInterval
:1;
1471 UINT16 SwitchToPollingThresholdValue
:1;
1472 UINT16 SwitchToPollingThresholdWindow
:1;
1473 UINT16 ErrorThresholdValue
:1;
1474 UINT16 ErrorThresholdWindow
:1;
1476 } EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE
;
1479 /// Hardware Error Notification Structure Definition
1484 EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE ConfigurationWriteEnable
;
1485 UINT32 PollInterval
;
1487 UINT32 SwitchToPollingThresholdValue
;
1488 UINT32 SwitchToPollingThresholdWindow
;
1489 UINT32 ErrorThresholdValue
;
1490 UINT32 ErrorThresholdWindow
;
1491 } EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE
;
1494 /// IA-32 Architecture Corrected Machine Check Structure Definition
1502 UINT32 NumberOfRecordsToPreAllocate
;
1503 UINT32 MaxSectionsPerRecord
;
1504 EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure
;
1505 UINT8 NumberOfHardwareBanks
;
1507 } EFI_ACPI_5_0_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK_STRUCTURE
;
1510 /// IA-32 Architecture NMI Error Structure Definition
1516 UINT32 NumberOfRecordsToPreAllocate
;
1517 UINT32 MaxSectionsPerRecord
;
1518 UINT32 MaxRawDataLength
;
1519 } EFI_ACPI_5_0_IA32_ARCHITECTURE_NMI_ERROR_STRUCTURE
;
1522 /// PCI Express Root Port AER Structure Definition
1530 UINT32 NumberOfRecordsToPreAllocate
;
1531 UINT32 MaxSectionsPerRecord
;
1535 UINT16 DeviceControl
;
1537 UINT32 UncorrectableErrorMask
;
1538 UINT32 UncorrectableErrorSeverity
;
1539 UINT32 CorrectableErrorMask
;
1540 UINT32 AdvancedErrorCapabilitiesAndControl
;
1541 UINT32 RootErrorCommand
;
1542 } EFI_ACPI_5_0_PCI_EXPRESS_ROOT_PORT_AER_STRUCTURE
;
1545 /// PCI Express Device AER Structure Definition
1553 UINT32 NumberOfRecordsToPreAllocate
;
1554 UINT32 MaxSectionsPerRecord
;
1558 UINT16 DeviceControl
;
1560 UINT32 UncorrectableErrorMask
;
1561 UINT32 UncorrectableErrorSeverity
;
1562 UINT32 CorrectableErrorMask
;
1563 UINT32 AdvancedErrorCapabilitiesAndControl
;
1564 } EFI_ACPI_5_0_PCI_EXPRESS_DEVICE_AER_STRUCTURE
;
1567 /// PCI Express Bridge AER Structure Definition
1575 UINT32 NumberOfRecordsToPreAllocate
;
1576 UINT32 MaxSectionsPerRecord
;
1580 UINT16 DeviceControl
;
1582 UINT32 UncorrectableErrorMask
;
1583 UINT32 UncorrectableErrorSeverity
;
1584 UINT32 CorrectableErrorMask
;
1585 UINT32 AdvancedErrorCapabilitiesAndControl
;
1586 UINT32 SecondaryUncorrectableErrorMask
;
1587 UINT32 SecondaryUncorrectableErrorSeverity
;
1588 UINT32 SecondaryAdvancedErrorCapabilitiesAndControl
;
1589 } EFI_ACPI_5_0_PCI_EXPRESS_BRIDGE_AER_STRUCTURE
;
1592 /// Generic Hardware Error Source Structure Definition
1597 UINT16 RelatedSourceId
;
1600 UINT32 NumberOfRecordsToPreAllocate
;
1601 UINT32 MaxSectionsPerRecord
;
1602 UINT32 MaxRawDataLength
;
1603 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress
;
1604 EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure
;
1605 UINT32 ErrorStatusBlockLength
;
1606 } EFI_ACPI_5_0_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE
;
1609 /// Generic Error Status Definition
1612 EFI_ACPI_5_0_ERROR_BLOCK_STATUS BlockStatus
;
1613 UINT32 RawDataOffset
;
1614 UINT32 RawDataLength
;
1616 UINT32 ErrorSeverity
;
1617 } EFI_ACPI_5_0_GENERIC_ERROR_STATUS_STRUCTURE
;
1620 /// ERST - Error Record Serialization Table
1623 EFI_ACPI_DESCRIPTION_HEADER Header
;
1624 UINT32 SerializationHeaderSize
;
1626 UINT32 InstructionEntryCount
;
1627 } EFI_ACPI_5_0_ERROR_RECORD_SERIALIZATION_TABLE_HEADER
;
1630 /// ERST Version (as defined in ACPI 5.0 spec.)
1632 #define EFI_ACPI_5_0_ERROR_RECORD_SERIALIZATION_TABLE_REVISION 0x01
1635 /// ERST Serialization Actions
1637 #define EFI_ACPI_5_0_ERST_BEGIN_WRITE_OPERATION 0x00
1638 #define EFI_ACPI_5_0_ERST_BEGIN_READ_OPERATION 0x01
1639 #define EFI_ACPI_5_0_ERST_BEGIN_CLEAR_OPERATION 0x02
1640 #define EFI_ACPI_5_0_ERST_END_OPERATION 0x03
1641 #define EFI_ACPI_5_0_ERST_SET_RECORD_OFFSET 0x04
1642 #define EFI_ACPI_5_0_ERST_EXECUTE_OPERATION 0x05
1643 #define EFI_ACPI_5_0_ERST_CHECK_BUSY_STATUS 0x06
1644 #define EFI_ACPI_5_0_ERST_GET_COMMAND_STATUS 0x07
1645 #define EFI_ACPI_5_0_ERST_GET_RECORD_IDENTIFIER 0x08
1646 #define EFI_ACPI_5_0_ERST_SET_RECORD_IDENTIFIER 0x09
1647 #define EFI_ACPI_5_0_ERST_GET_RECORD_COUNT 0x0A
1648 #define EFI_ACPI_5_0_ERST_BEGIN_DUMMY_WRITE_OPERATION 0x0B
1649 #define EFI_ACPI_5_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE 0x0D
1650 #define EFI_ACPI_5_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE_LENGTH 0x0E
1651 #define EFI_ACPI_5_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE_ATTRIBUTES 0x0F
1654 /// ERST Action Command Status
1656 #define EFI_ACPI_5_0_ERST_STATUS_SUCCESS 0x00
1657 #define EFI_ACPI_5_0_ERST_STATUS_NOT_ENOUGH_SPACE 0x01
1658 #define EFI_ACPI_5_0_ERST_STATUS_HARDWARE_NOT_AVAILABLE 0x02
1659 #define EFI_ACPI_5_0_ERST_STATUS_FAILED 0x03
1660 #define EFI_ACPI_5_0_ERST_STATUS_RECORD_STORE_EMPTY 0x04
1661 #define EFI_ACPI_5_0_ERST_STATUS_RECORD_NOT_FOUND 0x05
1664 /// ERST Serialization Instructions
1666 #define EFI_ACPI_5_0_ERST_READ_REGISTER 0x00
1667 #define EFI_ACPI_5_0_ERST_READ_REGISTER_VALUE 0x01
1668 #define EFI_ACPI_5_0_ERST_WRITE_REGISTER 0x02
1669 #define EFI_ACPI_5_0_ERST_WRITE_REGISTER_VALUE 0x03
1670 #define EFI_ACPI_5_0_ERST_NOOP 0x04
1671 #define EFI_ACPI_5_0_ERST_LOAD_VAR1 0x05
1672 #define EFI_ACPI_5_0_ERST_LOAD_VAR2 0x06
1673 #define EFI_ACPI_5_0_ERST_STORE_VAR1 0x07
1674 #define EFI_ACPI_5_0_ERST_ADD 0x08
1675 #define EFI_ACPI_5_0_ERST_SUBTRACT 0x09
1676 #define EFI_ACPI_5_0_ERST_ADD_VALUE 0x0A
1677 #define EFI_ACPI_5_0_ERST_SUBTRACT_VALUE 0x0B
1678 #define EFI_ACPI_5_0_ERST_STALL 0x0C
1679 #define EFI_ACPI_5_0_ERST_STALL_WHILE_TRUE 0x0D
1680 #define EFI_ACPI_5_0_ERST_SKIP_NEXT_INSTRUCTION_IF_TRUE 0x0E
1681 #define EFI_ACPI_5_0_ERST_GOTO 0x0F
1682 #define EFI_ACPI_5_0_ERST_SET_SRC_ADDRESS_BASE 0x10
1683 #define EFI_ACPI_5_0_ERST_SET_DST_ADDRESS_BASE 0x11
1684 #define EFI_ACPI_5_0_ERST_MOVE_DATA 0x12
1687 /// ERST Instruction Flags
1689 #define EFI_ACPI_5_0_ERST_PRESERVE_REGISTER 0x01
1692 /// ERST Serialization Instruction Entry
1695 UINT8 SerializationAction
;
1699 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE RegisterRegion
;
1702 } EFI_ACPI_5_0_ERST_SERIALIZATION_INSTRUCTION_ENTRY
;
1705 /// EINJ - Error Injection Table
1708 EFI_ACPI_DESCRIPTION_HEADER Header
;
1709 UINT32 InjectionHeaderSize
;
1710 UINT8 InjectionFlags
;
1712 UINT32 InjectionEntryCount
;
1713 } EFI_ACPI_5_0_ERROR_INJECTION_TABLE_HEADER
;
1716 /// EINJ Version (as defined in ACPI 5.0 spec.)
1718 #define EFI_ACPI_5_0_ERROR_INJECTION_TABLE_REVISION 0x01
1721 /// EINJ Error Injection Actions
1723 #define EFI_ACPI_5_0_EINJ_BEGIN_INJECTION_OPERATION 0x00
1724 #define EFI_ACPI_5_0_EINJ_GET_TRIGGER_ERROR_ACTION_TABLE 0x01
1725 #define EFI_ACPI_5_0_EINJ_SET_ERROR_TYPE 0x02
1726 #define EFI_ACPI_5_0_EINJ_GET_ERROR_TYPE 0x03
1727 #define EFI_ACPI_5_0_EINJ_END_OPERATION 0x04
1728 #define EFI_ACPI_5_0_EINJ_EXECUTE_OPERATION 0x05
1729 #define EFI_ACPI_5_0_EINJ_CHECK_BUSY_STATUS 0x06
1730 #define EFI_ACPI_5_0_EINJ_GET_COMMAND_STATUS 0x07
1731 #define EFI_ACPI_5_0_EINJ_TRIGGER_ERROR 0xFF
1734 /// EINJ Action Command Status
1736 #define EFI_ACPI_5_0_EINJ_STATUS_SUCCESS 0x00
1737 #define EFI_ACPI_5_0_EINJ_STATUS_UNKNOWN_FAILURE 0x01
1738 #define EFI_ACPI_5_0_EINJ_STATUS_INVALID_ACCESS 0x02
1741 /// EINJ Error Type Definition
1743 #define EFI_ACPI_5_0_EINJ_ERROR_PROCESSOR_CORRECTABLE (1 << 0)
1744 #define EFI_ACPI_5_0_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_NONFATAL (1 << 1)
1745 #define EFI_ACPI_5_0_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_FATAL (1 << 2)
1746 #define EFI_ACPI_5_0_EINJ_ERROR_MEMORY_CORRECTABLE (1 << 3)
1747 #define EFI_ACPI_5_0_EINJ_ERROR_MEMORY_UNCORRECTABLE_NONFATAL (1 << 4)
1748 #define EFI_ACPI_5_0_EINJ_ERROR_MEMORY_UNCORRECTABLE_FATAL (1 << 5)
1749 #define EFI_ACPI_5_0_EINJ_ERROR_PCI_EXPRESS_CORRECTABLE (1 << 6)
1750 #define EFI_ACPI_5_0_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_NONFATAL (1 << 7)
1751 #define EFI_ACPI_5_0_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_FATAL (1 << 8)
1752 #define EFI_ACPI_5_0_EINJ_ERROR_PLATFORM_CORRECTABLE (1 << 9)
1753 #define EFI_ACPI_5_0_EINJ_ERROR_PLATFORM_UNCORRECTABLE_NONFATAL (1 << 10)
1754 #define EFI_ACPI_5_0_EINJ_ERROR_PLATFORM_UNCORRECTABLE_FATAL (1 << 11)
1757 /// EINJ Injection Instructions
1759 #define EFI_ACPI_5_0_EINJ_READ_REGISTER 0x00
1760 #define EFI_ACPI_5_0_EINJ_READ_REGISTER_VALUE 0x01
1761 #define EFI_ACPI_5_0_EINJ_WRITE_REGISTER 0x02
1762 #define EFI_ACPI_5_0_EINJ_WRITE_REGISTER_VALUE 0x03
1763 #define EFI_ACPI_5_0_EINJ_NOOP 0x04
1766 /// EINJ Instruction Flags
1768 #define EFI_ACPI_5_0_EINJ_PRESERVE_REGISTER 0x01
1771 /// EINJ Injection Instruction Entry
1774 UINT8 InjectionAction
;
1778 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE RegisterRegion
;
1781 } EFI_ACPI_5_0_EINJ_INJECTION_INSTRUCTION_ENTRY
;
1784 /// EINJ Trigger Action Table
1791 } EFI_ACPI_5_0_EINJ_TRIGGER_ACTION_TABLE
;
1794 /// Platform Communications Channel Table (PCCT)
1797 EFI_ACPI_DESCRIPTION_HEADER Header
;
1800 } EFI_ACPI_5_0_PLATFORM_COMMUNICATION_CHANNEL_TABLE_HEADER
;
1803 /// PCCT Version (as defined in ACPI 5.0 spec.)
1805 #define EFI_ACPI_5_0_PLATFORM_COMMUNICATION_CHANNEL_TABLE_REVISION 0x01
1808 /// PCCT Global Flags
1810 #define EFI_ACPI_5_0_PCCT_FLAGS_SCI_DOORBELL BIT0
1813 // PCCT Subspace type
1815 #define EFI_ACPI_5_0_PCCT_SUBSPACE_TYPE_GENERIC 0x00
1818 /// PCC Subspace Structure Header
1823 } EFI_ACPI_5_0_PCCT_SUBSPACE_HEADER
;
1826 /// Generic Communications Subspace Structure
1833 UINT64 AddressLength
;
1834 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE DoorbellRegister
;
1835 UINT64 DoorbellPreserve
;
1836 UINT64 DoorbellWrite
;
1837 UINT32 NominalLatency
;
1838 UINT32 MaximumPeriodicAccessRate
;
1839 UINT16 MinimumRequestTurnaroundTime
;
1840 } EFI_ACPI_5_0_PCCT_SUBSPACE_GENERIC
;
1843 /// Generic Communications Channel Shared Memory Region
1849 UINT8 GenerateSci
:1;
1850 } EFI_ACPI_5_0_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND
;
1853 UINT8 CommandComplete
:1;
1854 UINT8 SciDoorbell
:1;
1856 UINT8 PlatformNotification
:1;
1859 } EFI_ACPI_5_0_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS
;
1863 EFI_ACPI_5_0_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND Command
;
1864 EFI_ACPI_5_0_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS Status
;
1865 } EFI_ACPI_5_0_PCCT_GENERIC_SHARED_MEMORY_REGION_HEADER
;
1868 // Known table signatures
1872 /// "RSD PTR " Root System Description Pointer
1874 #define EFI_ACPI_5_0_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE SIGNATURE_64('R', 'S', 'D', ' ', 'P', 'T', 'R', ' ')
1877 /// "APIC" Multiple APIC Description Table
1879 #define EFI_ACPI_5_0_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('A', 'P', 'I', 'C')
1882 /// "BERT" Boot Error Record Table
1884 #define EFI_ACPI_5_0_BOOT_ERROR_RECORD_TABLE_SIGNATURE SIGNATURE_32('B', 'E', 'R', 'T')
1887 /// "BGRT" Boot Graphics Resource Table
1889 #define EFI_ACPI_5_0_BOOT_GRAPHICS_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('B', 'G', 'R', 'T')
1892 /// "CPEP" Corrected Platform Error Polling Table
1894 #define EFI_ACPI_5_0_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_SIGNATURE SIGNATURE_32('C', 'P', 'E', 'P')
1897 /// "DSDT" Differentiated System Description Table
1899 #define EFI_ACPI_5_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('D', 'S', 'D', 'T')
1902 /// "ECDT" Embedded Controller Boot Resources Table
1904 #define EFI_ACPI_5_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE SIGNATURE_32('E', 'C', 'D', 'T')
1907 /// "EINJ" Error Injection Table
1909 #define EFI_ACPI_5_0_ERROR_INJECTION_TABLE_SIGNATURE SIGNATURE_32('E', 'I', 'N', 'J')
1912 /// "ERST" Error Record Serialization Table
1914 #define EFI_ACPI_5_0_ERROR_RECORD_SERIALIZATION_TABLE_SIGNATURE SIGNATURE_32('E', 'R', 'S', 'T')
1917 /// "FACP" Fixed ACPI Description Table
1919 #define EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'P')
1922 /// "FACS" Firmware ACPI Control Structure
1924 #define EFI_ACPI_5_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'S')
1927 /// "FPDT" Firmware Performance Data Table
1929 #define EFI_ACPI_5_0_FIRMWARE_PERFORMANCE_DATA_TABLE_SIGNATURE SIGNATURE_32('F', 'P', 'D', 'T')
1932 /// "GTDT" Generic Timer Description Table
1934 #define EFI_ACPI_5_0_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('G', 'T', 'D', 'T')
1937 /// "HEST" Hardware Error Source Table
1939 #define EFI_ACPI_5_0_HARDWARE_ERROR_SOURCE_TABLE_SIGNATURE SIGNATURE_32('H', 'E', 'S', 'T')
1942 /// "MPST" Memory Power State Table
1944 #define EFI_ACPI_5_0_MEMORY_POWER_STATE_TABLE_SIGNATURE SIGNATURE_32('M', 'P', 'S', 'T')
1947 /// "MSCT" Maximum System Characteristics Table
1949 #define EFI_ACPI_5_0_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'C', 'T')
1952 /// "PMTT" Platform Memory Topology Table
1954 #define EFI_ACPI_5_0_PLATFORM_MEMORY_TOPOLOGY_TABLE_SIGNATURE SIGNATURE_32('P', 'M', 'T', 'T')
1957 /// "PSDT" Persistent System Description Table
1959 #define EFI_ACPI_5_0_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('P', 'S', 'D', 'T')
1962 /// "RASF" ACPI RAS Feature Table
1964 #define EFI_ACPI_5_0_ACPI_RAS_FEATURE_TABLE_SIGNATURE SIGNATURE_32('R', 'A', 'S', 'F')
1967 /// "RSDT" Root System Description Table
1969 #define EFI_ACPI_5_0_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('R', 'S', 'D', 'T')
1972 /// "SBST" Smart Battery Specification Table
1974 #define EFI_ACPI_5_0_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE SIGNATURE_32('S', 'B', 'S', 'T')
1977 /// "SLIT" System Locality Information Table
1979 #define EFI_ACPI_5_0_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'T')
1982 /// "SRAT" System Resource Affinity Table
1984 #define EFI_ACPI_5_0_SYSTEM_RESOURCE_AFFINITY_TABLE_SIGNATURE SIGNATURE_32('S', 'R', 'A', 'T')
1987 /// "SSDT" Secondary System Description Table
1989 #define EFI_ACPI_5_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('S', 'S', 'D', 'T')
1992 /// "XSDT" Extended System Description Table
1994 #define EFI_ACPI_5_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('X', 'S', 'D', 'T')
1997 /// "BOOT" MS Simple Boot Spec
1999 #define EFI_ACPI_5_0_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE SIGNATURE_32('B', 'O', 'O', 'T')
2002 /// "CSRT" MS Core System Resource Table
2004 #define EFI_ACPI_5_0_CORE_SYSTEM_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('C', 'S', 'R', 'T')
2007 /// "DBG2" MS Debug Port 2 Spec
2009 #define EFI_ACPI_5_0_DEBUG_PORT_2_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', '2')
2012 /// "DBGP" MS Debug Port Spec
2014 #define EFI_ACPI_5_0_DEBUG_PORT_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', 'P')
2017 /// "DMAR" DMA Remapping Table
2019 #define EFI_ACPI_5_0_DMA_REMAPPING_TABLE_SIGNATURE SIGNATURE_32('D', 'M', 'A', 'R')
2022 /// "DRTM" Dynamic Root of Trust for Measurement Table
2024 #define EFI_ACPI_5_0_DYNAMIC_ROOT_OF_TRUST_FOR_MEASUREMENT_TABLE_SIGNATURE SIGNATURE_32('D', 'R', 'T', 'M')
2027 /// "ETDT" Event Timer Description Table
2029 #define EFI_ACPI_5_0_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('E', 'T', 'D', 'T')
2032 /// "HPET" IA-PC High Precision Event Timer Table
2034 #define EFI_ACPI_5_0_HIGH_PRECISION_EVENT_TIMER_TABLE_SIGNATURE SIGNATURE_32('H', 'P', 'E', 'T')
2037 /// "iBFT" iSCSI Boot Firmware Table
2039 #define EFI_ACPI_5_0_ISCSI_BOOT_FIRMWARE_TABLE_SIGNATURE SIGNATURE_32('i', 'B', 'F', 'T')
2042 /// "IVRS" I/O Virtualization Reporting Structure
2044 #define EFI_ACPI_5_0_IO_VIRTUALIZATION_REPORTING_STRUCTURE_SIGNATURE SIGNATURE_32('I', 'V', 'R', 'S')
2047 /// "MCFG" PCI Express Memory Mapped Configuration Space Base Address Description Table
2049 #define EFI_ACPI_5_0_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'F', 'G')
2052 /// "MCHI" Management Controller Host Interface Table
2054 #define EFI_ACPI_5_0_MANAGEMENT_CONTROLLER_HOST_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'H', 'I')
2057 /// "MSDM" MS Data Management Table
2059 #define EFI_ACPI_5_0_DATA_MANAGEMENT_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'D', 'M')
2062 /// "PCCT" Platform Communications Channel Table
2064 #define EFI_ACPI_5_0_PLATFORM_COMMUNICATIONS_CHANNEL_TABLE_SIGNATURE SIGNATURE_32('P', 'C', 'C', 'T')
2067 /// "SLIC" MS Software Licensing Table Specification
2069 #define EFI_ACPI_5_0_SOFTWARE_LICENSING_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'C')
2072 /// "SPCR" Serial Port Console Redirection Table
2074 #define EFI_ACPI_5_0_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'C', 'R')
2077 /// "SPMI" Server Platform Management Interface Table
2079 #define EFI_ACPI_5_0_SERVER_PLATFORM_MANAGEMENT_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'M', 'I')
2082 /// "TCPA" Trusted Computing Platform Alliance Capabilities Table
2084 #define EFI_ACPI_5_0_TRUSTED_COMPUTING_PLATFORM_ALLIANCE_CAPABILITIES_TABLE_SIGNATURE SIGNATURE_32('T', 'C', 'P', 'A')
2087 /// "TPM2" Trusted Computing Platform 1 Table
2089 #define EFI_ACPI_5_0_TRUSTED_COMPUTING_PLATFORM_2_TABLE_SIGNATURE SIGNATURE_32('T', 'P', 'M', '2')
2092 /// "UEFI" UEFI ACPI Data Table
2094 #define EFI_ACPI_5_0_UEFI_ACPI_DATA_TABLE_SIGNATURE SIGNATURE_32('U', 'E', 'F', 'I')
2097 /// "WAET" Windows ACPI Emulated Devices Table
2099 #define EFI_ACPI_5_0_WINDOWS_ACPI_EMULATED_DEVICES_TABLE_SIGNATURE SIGNATURE_32('W', 'A', 'E', 'T')
2100 #define EFI_ACPI_5_0_WINDOWS_ACPI_ENLIGHTENMENT_TABLE_SIGNATURE EFI_ACPI_5_0_WINDOWS_ACPI_EMULATED_DEVICES_TABLE_SIGNATURE
2103 /// "WDAT" Watchdog Action Table
2105 #define EFI_ACPI_5_0_WATCHDOG_ACTION_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'A', 'T')
2108 /// "WDRT" Watchdog Resource Table
2110 #define EFI_ACPI_5_0_WATCHDOG_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'R', 'T')
2113 /// "WPBT" MS Platform Binary Table
2115 #define EFI_ACPI_5_0_PLATFORM_BINARY_TABLE_SIGNATURE SIGNATURE_32('W', 'P', 'B', 'T')