3 This file contains just some basic definitions that are needed by drivers
4 that dealing with ATA/ATAPI interface.
7 Copyright (c) 2007, Intel Corporation
8 All rights reserved. This program and the accompanying materials
9 are licensed and made available under the terms and conditions of the BSD License
10 which accompanies this distribution. The full text of the license may be found at
11 http://opensource.org/licenses/bsd-license.php
13 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
14 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
24 /// ATA_IDENTIFY_DATA is defined in ATA-5
27 UINT16 config
; /* General Configuration */
28 UINT16 cylinders
; /* Number of Cylinders */
30 UINT16 heads
; /* Number of logical heads */
33 UINT16 sectors_per_track
;
34 UINT16 vendor_specific_7_9
[3];
35 CHAR8 SerialNo
[20]; /* ASCII */
36 UINT16 vendor_specific_20_21
[2];
37 UINT16 ecc_bytes_available
;
38 CHAR8 FirmwareVer
[8]; /* ASCII */
39 CHAR8 ModelName
[40]; /* ASCII */
40 UINT16 multi_sector_cmd_max_sct_cnt
;
44 UINT16 pio_cycle_timing
;
46 UINT16 field_validity
;
47 UINT16 current_cylinders
;
49 UINT16 current_sectors
;
50 UINT16 CurrentCapacityLsb
;
51 UINT16 CurrentCapacityMsb
;
53 UINT16 user_addressable_sectors_lo
;
54 UINT16 user_addressable_sectors_hi
;
56 UINT16 multi_word_dma_mode
;
57 UINT16 advanced_pio_modes
;
58 UINT16 min_multi_word_dma_cycle_time
;
59 UINT16 rec_multi_word_dma_cycle_time
;
60 UINT16 min_pio_cycle_time_without_flow_control
;
61 UINT16 min_pio_cycle_time_with_flow_control
;
62 UINT16 reserved_69_79
[11];
63 UINT16 major_version_no
;
64 UINT16 minor_version_no
;
65 UINT16 command_set_supported_82
; // word 82
66 UINT16 command_set_supported_83
; // word 83
67 UINT16 command_set_feature_extn
; // word 84
68 UINT16 command_set_feature_enb_85
; // word 85
69 UINT16 command_set_feature_enb_86
; // word 86
70 UINT16 command_set_feature_default
; // word 87
71 UINT16 ultra_dma_mode
; // word 88
72 UINT16 reserved_89_127
[39];
73 UINT16 security_status
;
74 UINT16 vendor_data_129_159
[31];
75 UINT16 reserved_160_255
[96];
79 /// ATAPI_IDENTIFY_DATA is defined in ATA-6
82 UINT16 config
; // General Configuration
84 UINT16 specific_config
;
86 UINT16 retired_4_5
[2];
88 UINT16 cfa_reserved_7_8
[2];
90 CHAR8 SerialNo
[20]; // ASCII
91 UINT16 retired_20_21
[2];
93 CHAR8 FirmwareVer
[8]; // ASCII
94 CHAR8 ModelName
[40]; // ASCII
95 UINT16 multi_sector_cmd_max_sct_cnt
;
97 UINT16 capabilities_49
;
98 UINT16 capabilities_50
;
99 UINT16 obsolete_51_52
[2];
100 UINT16 field_validity
;
101 UINT16 obsolete_54_58
[5];
102 UINT16 mutil_sector_setting
;
103 UINT16 user_addressable_sectors_lo
;
104 UINT16 user_addressable_sectors_hi
;
106 UINT16 multi_word_dma_mode
;
107 UINT16 advanced_pio_modes
;
108 UINT16 min_multi_word_dma_cycle_time
;
109 UINT16 rec_multi_word_dma_cycle_time
;
110 UINT16 min_pio_cycle_time_without_flow_control
;
111 UINT16 min_pio_cycle_time_with_flow_control
;
112 UINT16 reserved_69_74
[6];
114 UINT16 reserved_76_79
[4];
115 UINT16 major_version_no
;
116 UINT16 minor_version_no
;
117 UINT16 cmd_set_support_82
;
118 UINT16 cmd_set_support_83
;
119 UINT16 cmd_feature_support
;
120 UINT16 cmd_feature_enable_85
;
121 UINT16 cmd_feature_enable_86
;
122 UINT16 cmd_feature_default
;
123 UINT16 ultra_dma_select
;
124 UINT16 time_required_for_sec_erase
;
125 UINT16 time_required_for_enhanced_sec_erase
;
126 UINT16 current_advanced_power_mgmt_value
;
127 UINT16 master_pwd_revison_code
;
128 UINT16 hardware_reset_result
;
129 UINT16 current_auto_acoustic_mgmt_value
;
130 UINT16 reserved_95_99
[5];
131 UINT16 max_user_lba_for_48bit_addr
[4];
132 UINT16 reserved_104_126
[23];
133 UINT16 removable_media_status_notification_support
;
134 UINT16 security_status
;
135 UINT16 vendor_data_129_159
[31];
136 UINT16 cfa_power_mode
;
137 UINT16 cfa_reserved_161_175
[15];
138 UINT16 current_media_serial_no
[30];
139 UINT16 reserved_206_254
[49];
140 UINT16 integrity_word
;
141 } ATAPI_IDENTIFY_DATA
;
145 UINT8 peripheral_type
;
148 UINT8 response_data_format
;
153 UINT8 vendor_info
[8];
154 UINT8 product_id
[12];
155 UINT8 eeprom_product_code
[4];
156 UINT8 firmware_rev_level
[4];
157 UINT8 firmware_sub_rev_level
[1];
161 UINT8 max_capacity_hi
;
162 UINT8 max_capacity_mid
;
163 UINT8 max_capacity_lo
;
164 UINT8 reserved_43_95
[95 - 43 + 1];
169 UINT8 eeprom_drive_sno
[12];
170 } ATAPI_INQUIRY_DATA
;
173 UINT8 peripheral_type
;
176 UINT8 response_data_format
;
181 UINT8 vendor_info
[8];
182 UINT8 product_id
[16];
183 UINT8 product_revision_level
[4];
184 UINT8 vendor_specific
[20];
185 UINT8 reserved_56_95
[40];
186 } ATAPI_CDROM_INQUIRY_DATA
;
190 UINT8 error_code
: 7;
194 UINT8 reserved_21
: 1;
196 UINT8 reserved_22
: 2;
197 UINT8 vendor_specific_3
;
198 UINT8 vendor_specific_4
;
199 UINT8 vendor_specific_5
;
200 UINT8 vendor_specific_6
;
201 UINT8 addnl_sense_length
; // n - 7
202 UINT8 vendor_specific_8
;
203 UINT8 vendor_specific_9
;
204 UINT8 vendor_specific_10
;
205 UINT8 vendor_specific_11
;
206 UINT8 addnl_sense_code
; // mandatory
207 UINT8 addnl_sense_code_qualifier
; // mandatory
208 UINT8 field_replaceable_unit_code
; // optional
213 // Followed by additional sense bytes.
215 } ATAPI_REQUEST_SENSE_DATA
;
226 } ATAPI_READ_CAPACITY_DATA
;
232 UINT8 Capacity_Length
;
238 UINT8 reserved_9
: 6;
242 } ATAPI_READ_FORMAT_CAPACITY_DATA
;
245 // ATAPI Packet Command
261 } ATAPI_TEST_UNIT_READY_CMD
;
265 UINT8 reserved_1
: 4;
269 UINT8 allocation_length
;
281 UINT8 reserved_1
: 4;
285 UINT8 allocation_length
;
293 } ATAPI_REQUEST_SENSE_CMD
;
297 UINT8 reserved_1
: 5;
319 UINT8 allocation_length_hi
;
320 UINT8 allocation_length_lo
;
324 } ATAPI_READ_FORMAT_CAP_CMD
;
327 UINT8 peripheral_type
;
330 UINT8 response_data_format
;
335 UINT8 vendor_info
[8];
336 UINT8 product_id
[12];
337 UINT8 eeprom_product_code
[4];
338 UINT8 firmware_rev_level
[4];
339 } ATAPI_USB_INQUIRY_DATA
;
343 UINT8 reserved_1
: 4;
346 UINT8 page_control
: 4;
351 UINT8 parameter_list_length_hi
;
352 UINT8 parameter_list_length_lo
;
356 } ATAPI_MODE_SENSE_CMD
;
359 /// ATAPI_PACKET_COMMAND is not defined in ATA specification.
360 /// We add it here for the convenience for ATA/ATAPI module writer.
364 ATAPI_TEST_UNIT_READY_CMD TestUnitReady
;
365 ATAPI_READ10_CMD Read10
;
366 ATAPI_REQUEST_SENSE_CMD RequestSence
;
367 ATAPI_INQUIRY_CMD Inquiry
;
368 ATAPI_MODE_SENSE_CMD ModeSense
;
369 ATAPI_READ_FORMAT_CAP_CMD ReadFormatCapacity
;
370 } ATAPI_PACKET_COMMAND
;
375 #define ATAPI_MAX_DMA_EXT_CMD_SECTORS 0x10000
376 #define ATAPI_MAX_DMA_CMD_SECTORS 0x100
379 // ATA Packet Command Code
381 #define ATA_CMD_SOFT_RESET 0x08
382 #define ATA_CMD_PACKET 0xA0
383 #define ATA_CMD_IDENTIFY_DEVICE 0xA1
384 #define ATA_CMD_SERVICE 0xA2
385 #define ATA_CMD_TEST_UNIT_READY 0x00
386 #define ATA_CMD_REQUEST_SENSE 0x03
387 #define ATA_CMD_INQUIRY 0x12
388 #define ATA_CMD_READ_FORMAT_CAPACITY 0x23
389 #define ATA_CMD_READ_CAPACITY 0x25
390 #define ATA_CMD_READ_10 0x28
391 #define ATA_CMD_WRITE_10 0x2A
398 // Class 1: PIO Data-In Commands
400 #define ATA_CMD_IDENTIFY_DRIVE 0xec
401 #define ATA_CMD_READ_BUFFER 0xe4
402 #define ATA_CMD_READ_SECTORS 0x20
403 #define ATA_CMD_READ_SECTORS_WITH_RETRY 0x21
404 #define ATA_CMD_READ_LONG 0x22
405 #define ATA_CMD_READ_LONG_WITH_RETRY 0x23
407 // Atapi6 enhanced commands
409 #define ATA_CMD_READ_SECTORS_EXT 0x24
413 // Class 2: PIO Data-Out Commands
415 #define ATA_CMD_FORMAT_TRACK 0x50
416 #define ATA_CMD_WRITE_BUFFER 0xe8
417 #define ATA_CMD_WRITE_SECTORS 0x30
418 #define ATA_CMD_WRITE_SECTORS_WITH_RETRY 0x31
419 #define ATA_CMD_WRITE_LONG 0x32
420 #define ATA_CMD_WRITE_LONG_WITH_RETRY 0x33
421 #define ATA_CMD_WRITE_VERIFY 0x3c
423 // Class 2 - Atapi6 enhanced commands
425 #define ATA_CMD_WRITE_SECTORS_EXT 0x34
428 // Class 3 No Data Command
430 #define ATA_CMD_ACK_MEDIA_CHANGE 0xdb
431 #define ATA_CMD_BOOT_POST_BOOT 0xdc
432 #define ATA_CMD_BOOT_PRE_BOOT 0xdd
433 #define ATA_CMD_CHECK_POWER_MODE 0x98
434 #define ATA_CMD_CHECK_POWER_MODE_ALIAS 0xe5
435 #define ATA_CMD_DOOR_LOCK 0xde
436 #define ATA_CMD_DOOR_UNLOCK 0xdf
437 #define ATA_CMD_EXEC_DRIVE_DIAG 0x90
438 #define ATA_CMD_IDLE_ALIAS 0x97
439 #define ATA_CMD_IDLE 0xe3
440 #define ATA_CMD_IDLE_IMMEDIATE 0x95
441 #define ATA_CMD_IDLE_IMMEDIATE_ALIAS 0xe1
442 #define ATA_CMD_INIT_DRIVE_PARAM 0x91
443 #define ATA_CMD_RECALIBRATE 0x10 /* aliased to 1x */
444 #define ATA_CMD_READ_DRIVE_STATE 0xe9
445 #define ATA_CMD_SET_MULTIPLE_MODE 0xC6
446 #define ATA_CMD_READ_VERIFY 0x40
447 #define ATA_CMD_READ_VERIFY_WITH_RETRY 0x41
448 #define ATA_CMD_SEEK 0x70 /* aliased to 7x */
449 #define ATA_CMD_SET_FEATURES 0xef
450 #define ATA_CMD_STANDBY 0x96
451 #define ATA_CMD_STANDBY_ALIAS 0xe2
452 #define ATA_CMD_STANDBY_IMMEDIATE 0x94
453 #define ATA_CMD_STANDBY_IMMEDIATE_ALIAS 0xe0
457 #define ATA_CMD_SMART 0xb0
458 #define ATA_CONSTANT_C2 0xc2
459 #define ATA_CONSTANT_4F 0x4f
460 #define ATA_SMART_ENABLE_OPERATION 0xd8
461 #define ATA_SMART_RETURN_STATUS 0xda
465 // Class 4: DMA Command
467 #define ATA_CMD_READ_DMA 0xc8
468 #define ATA_CMD_READ_DMA_WITH_RETRY 0xc9
469 #define ATA_CMD_READ_DMA_EXT 0x25
470 #define ATA_CMD_WRITE_DMA 0xca
471 #define ATA_CMD_WRITE_DMA_WITH_RETRY 0xcb
472 #define ATA_CMD_WRITE_DMA_EXT 0x35
477 // default content of device control register, disable INT
479 #define ATA_DEFAULT_CTL (0x0a) // default content of device control register, disable INT
480 #define ATA_DEFAULT_CMD (0xa0)
482 #define ATAPI_MAX_BYTE_COUNT (0xfffe)
487 #define ATA_REQUEST_SENSE_ERROR (0x70)
488 #define ATA_SK_NO_SENSE (0x0)
489 #define ATA_SK_RECOVERY_ERROR (0x1)
490 #define ATA_SK_NOT_READY (0x2)
491 #define ATA_SK_MEDIUM_ERROR (0x3)
492 #define ATA_SK_HARDWARE_ERROR (0x4)
493 #define ATA_SK_ILLEGAL_REQUEST (0x5)
494 #define ATA_SK_UNIT_ATTENTION (0x6)
495 #define ATA_SK_DATA_PROTECT (0x7)
496 #define ATA_SK_BLANK_CHECK (0x8)
497 #define ATA_SK_VENDOR_SPECIFIC (0x9)
498 #define ATA_SK_RESERVED_A (0xA)
499 #define ATA_SK_ABORT (0xB)
500 #define ATA_SK_RESERVED_C (0xC)
501 #define ATA_SK_OVERFLOW (0xD)
502 #define ATA_SK_MISCOMPARE (0xE)
503 #define ATA_SK_RESERVED_F (0xF)
506 // Additional Sense Codes
508 #define ATA_ASC_NOT_READY (0x04)
509 #define ATA_ASC_MEDIA_ERR1 (0x10)
510 #define ATA_ASC_MEDIA_ERR2 (0x11)
511 #define ATA_ASC_MEDIA_ERR3 (0x14)
512 #define ATA_ASC_MEDIA_ERR4 (0x30)
513 #define ATA_ASC_MEDIA_UPSIDE_DOWN (0x06)
514 #define ATA_ASC_INVALID_CMD (0x20)
515 #define ATA_ASC_LBA_OUT_OF_RANGE (0x21)
516 #define ATA_ASC_INVALID_FIELD (0x24)
517 #define ATA_ASC_WRITE_PROTECTED (0x27)
518 #define ATA_ASC_MEDIA_CHANGE (0x28)
519 #define ATA_ASC_RESET (0x29) /* Power On Reset or Bus Reset occurred */
520 #define ATA_ASC_ILLEGAL_FIELD (0x26)
521 #define ATA_ASC_NO_MEDIA (0x3A)
522 #define ATA_ASC_ILLEGAL_MODE_FOR_THIS_TRACK (0x64)
525 // Additional Sense Code Qualifier
527 #define ATA_ASCQ_IN_PROGRESS (0x01)
532 #define ATA_ERRREG_BBK BIT7 /* Bad block detected */
533 #define ATA_ERRREG_UNC BIT6 /* Uncorrectable Data */
534 #define ATA_ERRREG_MC BIT5 /* Media Change */
535 #define ATA_ERRREG_IDNF BIT4 /* ID Not Found */
536 #define ATA_ERRREG_MCR BIT3 /* Media Change Requested */
537 #define ATA_ERRREG_ABRT BIT2 /* Aborted Command */
538 #define ATA_ERRREG_TK0NF BIT1 /* Track 0 Not Found */
539 #define ATA_ERRREG_AMNF BIT0 /* Address Mark Not Found */
544 #define ATA_STSREG_BSY BIT7 /* Controller Busy */
545 #define ATA_STSREG_DRDY BIT6 /* Drive Ready */
546 #define ATA_STSREG_DWF BIT5 /* Drive Write Fault */
547 #define ATA_STSREG_DSC BIT4 /* Disk Seek Complete */
548 #define ATA_STSREG_DRQ BIT3 /* Data Request */
549 #define ATA_STSREG_CORR BIT2 /* Corrected Data */
550 #define ATA_STSREG_IDX BIT1 /* Index */
551 #define ATA_STSREG_ERR BIT0 /* Error */
554 // Device Control Reg
556 #define ATA_CTLREG_SRST BIT2 /* Software Reset */
557 #define ATA_CTLREG_IEN_L BIT1 /* Interrupt Enable #*/