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1 /** @file
2 Industry Standard Definitions of SMBIOS Table Specification v3.3.0.
3
4 Copyright (c) 2006 - 2021, Intel Corporation. All rights reserved.<BR>
5 (C) Copyright 2015-2017 Hewlett Packard Enterprise Development LP<BR>
6 (C) Copyright 2015 - 2019 Hewlett Packard Enterprise Development LP<BR>
7 SPDX-License-Identifier: BSD-2-Clause-Patent
8
9 **/
10
11 #ifndef __SMBIOS_STANDARD_H__
12 #define __SMBIOS_STANDARD_H__
13
14 ///
15 /// Reference SMBIOS 2.6, chapter 3.1.2.
16 /// For v2.1 and later, handle values in the range 0FF00h to 0FFFFh are reserved for
17 /// use by this specification.
18 ///
19 #define SMBIOS_HANDLE_RESERVED_BEGIN 0xFF00
20
21 ///
22 /// Reference SMBIOS 2.7, chapter 6.1.2.
23 /// The UEFI Platform Initialization Specification reserves handle number FFFEh for its
24 /// EFI_SMBIOS_PROTOCOL.Add() function to mean "assign an unused handle number automatically."
25 /// This number is not used for any other purpose by the SMBIOS specification.
26 ///
27 #define SMBIOS_HANDLE_PI_RESERVED 0xFFFE
28
29 ///
30 /// Reference SMBIOS 2.6, chapter 3.1.3.
31 /// Each text string is limited to 64 significant characters due to system MIF limitations.
32 /// Reference SMBIOS 2.7, chapter 6.1.3.
33 /// It will have no limit on the length of each individual text string.
34 ///
35 #define SMBIOS_STRING_MAX_LENGTH 64
36
37 //
38 // The length of the entire structure table (including all strings) must be reported
39 // in the Structure Table Length field of the SMBIOS Structure Table Entry Point,
40 // which is a WORD field limited to 65,535 bytes.
41 //
42 #define SMBIOS_TABLE_MAX_LENGTH 0xFFFF
43
44 //
45 // For SMBIOS 3.0, Structure table maximum size in Entry Point structure is DWORD field limited to 0xFFFFFFFF bytes.
46 //
47 #define SMBIOS_3_0_TABLE_MAX_LENGTH 0xFFFFFFFF
48
49 //
50 // SMBIOS type macros which is according to SMBIOS 3.3.0 specification.
51 //
52 #define SMBIOS_TYPE_BIOS_INFORMATION 0
53 #define SMBIOS_TYPE_SYSTEM_INFORMATION 1
54 #define SMBIOS_TYPE_BASEBOARD_INFORMATION 2
55 #define SMBIOS_TYPE_SYSTEM_ENCLOSURE 3
56 #define SMBIOS_TYPE_PROCESSOR_INFORMATION 4
57 #define SMBIOS_TYPE_MEMORY_CONTROLLER_INFORMATION 5
58 #define SMBIOS_TYPE_MEMORY_MODULE_INFORMATON 6
59 #define SMBIOS_TYPE_CACHE_INFORMATION 7
60 #define SMBIOS_TYPE_PORT_CONNECTOR_INFORMATION 8
61 #define SMBIOS_TYPE_SYSTEM_SLOTS 9
62 #define SMBIOS_TYPE_ONBOARD_DEVICE_INFORMATION 10
63 #define SMBIOS_TYPE_OEM_STRINGS 11
64 #define SMBIOS_TYPE_SYSTEM_CONFIGURATION_OPTIONS 12
65 #define SMBIOS_TYPE_BIOS_LANGUAGE_INFORMATION 13
66 #define SMBIOS_TYPE_GROUP_ASSOCIATIONS 14
67 #define SMBIOS_TYPE_SYSTEM_EVENT_LOG 15
68 #define SMBIOS_TYPE_PHYSICAL_MEMORY_ARRAY 16
69 #define SMBIOS_TYPE_MEMORY_DEVICE 17
70 #define SMBIOS_TYPE_32BIT_MEMORY_ERROR_INFORMATION 18
71 #define SMBIOS_TYPE_MEMORY_ARRAY_MAPPED_ADDRESS 19
72 #define SMBIOS_TYPE_MEMORY_DEVICE_MAPPED_ADDRESS 20
73 #define SMBIOS_TYPE_BUILT_IN_POINTING_DEVICE 21
74 #define SMBIOS_TYPE_PORTABLE_BATTERY 22
75 #define SMBIOS_TYPE_SYSTEM_RESET 23
76 #define SMBIOS_TYPE_HARDWARE_SECURITY 24
77 #define SMBIOS_TYPE_SYSTEM_POWER_CONTROLS 25
78 #define SMBIOS_TYPE_VOLTAGE_PROBE 26
79 #define SMBIOS_TYPE_COOLING_DEVICE 27
80 #define SMBIOS_TYPE_TEMPERATURE_PROBE 28
81 #define SMBIOS_TYPE_ELECTRICAL_CURRENT_PROBE 29
82 #define SMBIOS_TYPE_OUT_OF_BAND_REMOTE_ACCESS 30
83 #define SMBIOS_TYPE_BOOT_INTEGRITY_SERVICE 31
84 #define SMBIOS_TYPE_SYSTEM_BOOT_INFORMATION 32
85 #define SMBIOS_TYPE_64BIT_MEMORY_ERROR_INFORMATION 33
86 #define SMBIOS_TYPE_MANAGEMENT_DEVICE 34
87 #define SMBIOS_TYPE_MANAGEMENT_DEVICE_COMPONENT 35
88 #define SMBIOS_TYPE_MANAGEMENT_DEVICE_THRESHOLD_DATA 36
89 #define SMBIOS_TYPE_MEMORY_CHANNEL 37
90 #define SMBIOS_TYPE_IPMI_DEVICE_INFORMATION 38
91 #define SMBIOS_TYPE_SYSTEM_POWER_SUPPLY 39
92 #define SMBIOS_TYPE_ADDITIONAL_INFORMATION 40
93 #define SMBIOS_TYPE_ONBOARD_DEVICES_EXTENDED_INFORMATION 41
94 #define SMBIOS_TYPE_MANAGEMENT_CONTROLLER_HOST_INTERFACE 42
95 #define SMBIOS_TYPE_TPM_DEVICE 43
96 #define SMBIOS_TYPE_PROCESSOR_ADDITIONAL_INFORMATION 44
97
98 ///
99 /// Inactive type is added from SMBIOS 2.2. Reference SMBIOS 2.6, chapter 3.3.43.
100 /// Upper-level software that interprets the SMBIOS structure-table should bypass an
101 /// Inactive structure just like a structure type that the software does not recognize.
102 ///
103 #define SMBIOS_TYPE_INACTIVE 0x007E
104
105 ///
106 /// End-of-table type is added from SMBIOS 2.2. Reference SMBIOS 2.6, chapter 3.3.44.
107 /// The end-of-table indicator is used in the last physical structure in a table
108 ///
109 #define SMBIOS_TYPE_END_OF_TABLE 0x007F
110
111 #define SMBIOS_OEM_BEGIN 128
112 #define SMBIOS_OEM_END 255
113
114 ///
115 /// Types 0 through 127 (7Fh) are reserved for and defined by this
116 /// specification. Types 128 through 256 (80h to FFh) are available for system- and OEM-specific information.
117 ///
118 typedef UINT8 SMBIOS_TYPE;
119
120 ///
121 /// Specifies the structure's handle, a unique 16-bit number in the range 0 to 0FFFEh (for version
122 /// 2.0) or 0 to 0FEFFh (for version 2.1 and later). The handle can be used with the Get SMBIOS
123 /// Structure function to retrieve a specific structure; the handle numbers are not required to be
124 /// contiguous. For v2.1 and later, handle values in the range 0FF00h to 0FFFFh are reserved for
125 /// use by this specification.
126 /// If the system configuration changes, a previously assigned handle might no longer exist.
127 /// However once a handle has been assigned by the BIOS, the BIOS cannot re-assign that handle
128 /// number to another structure.
129 ///
130 typedef UINT16 SMBIOS_HANDLE;
131
132 ///
133 /// Smbios Table Entry Point Structure.
134 ///
135 #pragma pack(1)
136 typedef struct {
137 UINT8 AnchorString[4];
138 UINT8 EntryPointStructureChecksum;
139 UINT8 EntryPointLength;
140 UINT8 MajorVersion;
141 UINT8 MinorVersion;
142 UINT16 MaxStructureSize;
143 UINT8 EntryPointRevision;
144 UINT8 FormattedArea[5];
145 UINT8 IntermediateAnchorString[5];
146 UINT8 IntermediateChecksum;
147 UINT16 TableLength;
148 UINT32 TableAddress;
149 UINT16 NumberOfSmbiosStructures;
150 UINT8 SmbiosBcdRevision;
151 } SMBIOS_TABLE_ENTRY_POINT;
152
153 typedef struct {
154 UINT8 AnchorString[5];
155 UINT8 EntryPointStructureChecksum;
156 UINT8 EntryPointLength;
157 UINT8 MajorVersion;
158 UINT8 MinorVersion;
159 UINT8 DocRev;
160 UINT8 EntryPointRevision;
161 UINT8 Reserved;
162 UINT32 TableMaximumSize;
163 UINT64 TableAddress;
164 } SMBIOS_TABLE_3_0_ENTRY_POINT;
165
166 ///
167 /// The Smbios structure header.
168 ///
169 typedef struct {
170 SMBIOS_TYPE Type;
171 UINT8 Length;
172 SMBIOS_HANDLE Handle;
173 } SMBIOS_STRUCTURE;
174
175 ///
176 /// Text strings associated with a given SMBIOS structure are returned in the dmiStrucBuffer, appended directly after
177 /// the formatted portion of the structure. This method of returning string information eliminates the need for
178 /// application software to deal with pointers embedded in the SMBIOS structure. Each string is terminated with a null
179 /// (00h) BYTE and the set of strings is terminated with an additional null (00h) BYTE. When the formatted portion of
180 /// a SMBIOS structure references a string, it does so by specifying a non-zero string number within the structure's
181 /// string-set. For example, if a string field contains 02h, it references the second string following the formatted portion
182 /// of the SMBIOS structure. If a string field references no string, a null (0) is placed in that string field. If the
183 /// formatted portion of the structure contains string-reference fields and all the string fields are set to 0 (no string
184 /// references), the formatted section of the structure is followed by two null (00h) BYTES.
185 ///
186 typedef UINT8 SMBIOS_TABLE_STRING;
187
188 ///
189 /// BIOS Characteristics
190 /// Defines which functions the BIOS supports. PCI, PCMCIA, Flash, etc.
191 ///
192 typedef struct {
193 UINT32 Reserved :2; ///< Bits 0-1.
194 UINT32 Unknown :1;
195 UINT32 BiosCharacteristicsNotSupported :1;
196 UINT32 IsaIsSupported :1;
197 UINT32 McaIsSupported :1;
198 UINT32 EisaIsSupported :1;
199 UINT32 PciIsSupported :1;
200 UINT32 PcmciaIsSupported :1;
201 UINT32 PlugAndPlayIsSupported :1;
202 UINT32 ApmIsSupported :1;
203 UINT32 BiosIsUpgradable :1;
204 UINT32 BiosShadowingAllowed :1;
205 UINT32 VlVesaIsSupported :1;
206 UINT32 EscdSupportIsAvailable :1;
207 UINT32 BootFromCdIsSupported :1;
208 UINT32 SelectableBootIsSupported :1;
209 UINT32 RomBiosIsSocketed :1;
210 UINT32 BootFromPcmciaIsSupported :1;
211 UINT32 EDDSpecificationIsSupported :1;
212 UINT32 JapaneseNecFloppyIsSupported :1;
213 UINT32 JapaneseToshibaFloppyIsSupported :1;
214 UINT32 Floppy525_360IsSupported :1;
215 UINT32 Floppy525_12IsSupported :1;
216 UINT32 Floppy35_720IsSupported :1;
217 UINT32 Floppy35_288IsSupported :1;
218 UINT32 PrintScreenIsSupported :1;
219 UINT32 Keyboard8042IsSupported :1;
220 UINT32 SerialIsSupported :1;
221 UINT32 PrinterIsSupported :1;
222 UINT32 CgaMonoIsSupported :1;
223 UINT32 NecPc98 :1;
224 UINT32 ReservedForVendor :32; ///< Bits 32-63. Bits 32-47 reserved for BIOS vendor
225 ///< and bits 48-63 reserved for System Vendor.
226 } MISC_BIOS_CHARACTERISTICS;
227
228 ///
229 /// BIOS Characteristics Extension Byte 1.
230 /// This information, available for SMBIOS version 2.1 and later, appears at offset 12h
231 /// within the BIOS Information structure.
232 ///
233 typedef struct {
234 UINT8 AcpiIsSupported :1;
235 UINT8 UsbLegacyIsSupported :1;
236 UINT8 AgpIsSupported :1;
237 UINT8 I2OBootIsSupported :1;
238 UINT8 Ls120BootIsSupported :1;
239 UINT8 AtapiZipDriveBootIsSupported :1;
240 UINT8 Boot1394IsSupported :1;
241 UINT8 SmartBatteryIsSupported :1;
242 } MBCE_BIOS_RESERVED;
243
244 ///
245 /// BIOS Characteristics Extension Byte 2.
246 /// This information, available for SMBIOS version 2.3 and later, appears at offset 13h
247 /// within the BIOS Information structure.
248 ///
249 typedef struct {
250 UINT8 BiosBootSpecIsSupported :1;
251 UINT8 FunctionKeyNetworkBootIsSupported :1;
252 UINT8 TargetContentDistributionEnabled :1;
253 UINT8 UefiSpecificationSupported :1;
254 UINT8 VirtualMachineSupported :1;
255 UINT8 ExtensionByte2Reserved :3;
256 } MBCE_SYSTEM_RESERVED;
257
258 ///
259 /// BIOS Characteristics Extension Bytes.
260 ///
261 typedef struct {
262 MBCE_BIOS_RESERVED BiosReserved;
263 MBCE_SYSTEM_RESERVED SystemReserved;
264 } MISC_BIOS_CHARACTERISTICS_EXTENSION;
265
266 ///
267 /// Extended BIOS ROM size.
268 ///
269 typedef struct {
270 UINT16 Size :14;
271 UINT16 Unit :2;
272 } EXTENDED_BIOS_ROM_SIZE;
273
274 ///
275 /// BIOS Information (Type 0).
276 ///
277 typedef struct {
278 SMBIOS_STRUCTURE Hdr;
279 SMBIOS_TABLE_STRING Vendor;
280 SMBIOS_TABLE_STRING BiosVersion;
281 UINT16 BiosSegment;
282 SMBIOS_TABLE_STRING BiosReleaseDate;
283 UINT8 BiosSize;
284 MISC_BIOS_CHARACTERISTICS BiosCharacteristics;
285 UINT8 BIOSCharacteristicsExtensionBytes[2];
286 UINT8 SystemBiosMajorRelease;
287 UINT8 SystemBiosMinorRelease;
288 UINT8 EmbeddedControllerFirmwareMajorRelease;
289 UINT8 EmbeddedControllerFirmwareMinorRelease;
290 //
291 // Add for smbios 3.1.0
292 //
293 EXTENDED_BIOS_ROM_SIZE ExtendedBiosSize;
294 } SMBIOS_TABLE_TYPE0;
295
296 ///
297 /// System Wake-up Type.
298 ///
299 typedef enum {
300 SystemWakeupTypeReserved = 0x00,
301 SystemWakeupTypeOther = 0x01,
302 SystemWakeupTypeUnknown = 0x02,
303 SystemWakeupTypeApmTimer = 0x03,
304 SystemWakeupTypeModemRing = 0x04,
305 SystemWakeupTypeLanRemote = 0x05,
306 SystemWakeupTypePowerSwitch = 0x06,
307 SystemWakeupTypePciPme = 0x07,
308 SystemWakeupTypeAcPowerRestored = 0x08
309 } MISC_SYSTEM_WAKEUP_TYPE;
310
311 ///
312 /// System Information (Type 1).
313 ///
314 /// The information in this structure defines attributes of the overall system and is
315 /// intended to be associated with the Component ID group of the system's MIF.
316 /// An SMBIOS implementation is associated with a single system instance and contains
317 /// one and only one System Information (Type 1) structure.
318 ///
319 typedef struct {
320 SMBIOS_STRUCTURE Hdr;
321 SMBIOS_TABLE_STRING Manufacturer;
322 SMBIOS_TABLE_STRING ProductName;
323 SMBIOS_TABLE_STRING Version;
324 SMBIOS_TABLE_STRING SerialNumber;
325 GUID Uuid;
326 UINT8 WakeUpType; ///< The enumeration value from MISC_SYSTEM_WAKEUP_TYPE.
327 SMBIOS_TABLE_STRING SKUNumber;
328 SMBIOS_TABLE_STRING Family;
329 } SMBIOS_TABLE_TYPE1;
330
331 ///
332 /// Base Board - Feature Flags.
333 ///
334 typedef struct {
335 UINT8 Motherboard :1;
336 UINT8 RequiresDaughterCard :1;
337 UINT8 Removable :1;
338 UINT8 Replaceable :1;
339 UINT8 HotSwappable :1;
340 UINT8 Reserved :3;
341 } BASE_BOARD_FEATURE_FLAGS;
342
343 ///
344 /// Base Board - Board Type.
345 ///
346 typedef enum {
347 BaseBoardTypeUnknown = 0x1,
348 BaseBoardTypeOther = 0x2,
349 BaseBoardTypeServerBlade = 0x3,
350 BaseBoardTypeConnectivitySwitch = 0x4,
351 BaseBoardTypeSystemManagementModule = 0x5,
352 BaseBoardTypeProcessorModule = 0x6,
353 BaseBoardTypeIOModule = 0x7,
354 BaseBoardTypeMemoryModule = 0x8,
355 BaseBoardTypeDaughterBoard = 0x9,
356 BaseBoardTypeMotherBoard = 0xA,
357 BaseBoardTypeProcessorMemoryModule = 0xB,
358 BaseBoardTypeProcessorIOModule = 0xC,
359 BaseBoardTypeInterconnectBoard = 0xD
360 } BASE_BOARD_TYPE;
361
362 ///
363 /// Base Board (or Module) Information (Type 2).
364 ///
365 /// The information in this structure defines attributes of a system baseboard -
366 /// for example a motherboard, planar, or server blade or other standard system module.
367 ///
368 typedef struct {
369 SMBIOS_STRUCTURE Hdr;
370 SMBIOS_TABLE_STRING Manufacturer;
371 SMBIOS_TABLE_STRING ProductName;
372 SMBIOS_TABLE_STRING Version;
373 SMBIOS_TABLE_STRING SerialNumber;
374 SMBIOS_TABLE_STRING AssetTag;
375 BASE_BOARD_FEATURE_FLAGS FeatureFlag;
376 SMBIOS_TABLE_STRING LocationInChassis;
377 UINT16 ChassisHandle;
378 UINT8 BoardType; ///< The enumeration value from BASE_BOARD_TYPE.
379 UINT8 NumberOfContainedObjectHandles;
380 UINT16 ContainedObjectHandles[1];
381 } SMBIOS_TABLE_TYPE2;
382
383 ///
384 /// System Enclosure or Chassis Types
385 ///
386 typedef enum {
387 MiscChassisTypeOther = 0x01,
388 MiscChassisTypeUnknown = 0x02,
389 MiscChassisTypeDeskTop = 0x03,
390 MiscChassisTypeLowProfileDesktop = 0x04,
391 MiscChassisTypePizzaBox = 0x05,
392 MiscChassisTypeMiniTower = 0x06,
393 MiscChassisTypeTower = 0x07,
394 MiscChassisTypePortable = 0x08,
395 MiscChassisTypeLapTop = 0x09,
396 MiscChassisTypeNotebook = 0x0A,
397 MiscChassisTypeHandHeld = 0x0B,
398 MiscChassisTypeDockingStation = 0x0C,
399 MiscChassisTypeAllInOne = 0x0D,
400 MiscChassisTypeSubNotebook = 0x0E,
401 MiscChassisTypeSpaceSaving = 0x0F,
402 MiscChassisTypeLunchBox = 0x10,
403 MiscChassisTypeMainServerChassis = 0x11,
404 MiscChassisTypeExpansionChassis = 0x12,
405 MiscChassisTypeSubChassis = 0x13,
406 MiscChassisTypeBusExpansionChassis = 0x14,
407 MiscChassisTypePeripheralChassis = 0x15,
408 MiscChassisTypeRaidChassis = 0x16,
409 MiscChassisTypeRackMountChassis = 0x17,
410 MiscChassisTypeSealedCasePc = 0x18,
411 MiscChassisMultiSystemChassis = 0x19,
412 MiscChassisCompactPCI = 0x1A,
413 MiscChassisAdvancedTCA = 0x1B,
414 MiscChassisBlade = 0x1C,
415 MiscChassisBladeEnclosure = 0x1D,
416 MiscChassisTablet = 0x1E,
417 MiscChassisConvertible = 0x1F,
418 MiscChassisDetachable = 0x20,
419 MiscChassisIoTGateway = 0x21,
420 MiscChassisEmbeddedPc = 0x22,
421 MiscChassisMiniPc = 0x23,
422 MiscChassisStickPc = 0x24
423 } MISC_CHASSIS_TYPE;
424
425 ///
426 /// System Enclosure or Chassis States .
427 ///
428 typedef enum {
429 ChassisStateOther = 0x01,
430 ChassisStateUnknown = 0x02,
431 ChassisStateSafe = 0x03,
432 ChassisStateWarning = 0x04,
433 ChassisStateCritical = 0x05,
434 ChassisStateNonRecoverable = 0x06
435 } MISC_CHASSIS_STATE;
436
437 ///
438 /// System Enclosure or Chassis Security Status.
439 ///
440 typedef enum {
441 ChassisSecurityStatusOther = 0x01,
442 ChassisSecurityStatusUnknown = 0x02,
443 ChassisSecurityStatusNone = 0x03,
444 ChassisSecurityStatusExternalInterfaceLockedOut = 0x04,
445 ChassisSecurityStatusExternalInterfaceLockedEnabled = 0x05
446 } MISC_CHASSIS_SECURITY_STATE;
447
448 ///
449 /// Contained Element record
450 ///
451 typedef struct {
452 UINT8 ContainedElementType;
453 UINT8 ContainedElementMinimum;
454 UINT8 ContainedElementMaximum;
455 } CONTAINED_ELEMENT;
456
457
458 ///
459 /// System Enclosure or Chassis (Type 3).
460 ///
461 /// The information in this structure defines attributes of the system's mechanical enclosure(s).
462 /// For example, if a system included a separate enclosure for its peripheral devices,
463 /// two structures would be returned: one for the main, system enclosure and the second for
464 /// the peripheral device enclosure. The additions to this structure in v2.1 of this specification
465 /// support the population of the CIM_Chassis class.
466 ///
467 typedef struct {
468 SMBIOS_STRUCTURE Hdr;
469 SMBIOS_TABLE_STRING Manufacturer;
470 UINT8 Type;
471 SMBIOS_TABLE_STRING Version;
472 SMBIOS_TABLE_STRING SerialNumber;
473 SMBIOS_TABLE_STRING AssetTag;
474 UINT8 BootupState; ///< The enumeration value from MISC_CHASSIS_STATE.
475 UINT8 PowerSupplyState; ///< The enumeration value from MISC_CHASSIS_STATE.
476 UINT8 ThermalState; ///< The enumeration value from MISC_CHASSIS_STATE.
477 UINT8 SecurityStatus; ///< The enumeration value from MISC_CHASSIS_SECURITY_STATE.
478 UINT8 OemDefined[4];
479 UINT8 Height;
480 UINT8 NumberofPowerCords;
481 UINT8 ContainedElementCount;
482 UINT8 ContainedElementRecordLength;
483 //
484 // Can have 0 to (ContainedElementCount * ContainedElementRecordLength) contained elements
485 //
486 CONTAINED_ELEMENT ContainedElements[1];
487 //
488 // Add for smbios 2.7
489 //
490 // Since ContainedElements has a variable number of entries, must not define SKUNumber in
491 // the structure. Need to reference it by starting at offset 0x15 and adding
492 // (ContainedElementCount * ContainedElementRecordLength) bytes.
493 //
494 // SMBIOS_TABLE_STRING SKUNumber;
495 } SMBIOS_TABLE_TYPE3;
496
497 ///
498 /// Processor Information - Processor Type.
499 ///
500 typedef enum {
501 ProcessorOther = 0x01,
502 ProcessorUnknown = 0x02,
503 CentralProcessor = 0x03,
504 MathProcessor = 0x04,
505 DspProcessor = 0x05,
506 VideoProcessor = 0x06
507 } PROCESSOR_TYPE_DATA;
508
509 ///
510 /// Processor Information - Processor Family.
511 ///
512 typedef enum {
513 ProcessorFamilyOther = 0x01,
514 ProcessorFamilyUnknown = 0x02,
515 ProcessorFamily8086 = 0x03,
516 ProcessorFamily80286 = 0x04,
517 ProcessorFamilyIntel386 = 0x05,
518 ProcessorFamilyIntel486 = 0x06,
519 ProcessorFamily8087 = 0x07,
520 ProcessorFamily80287 = 0x08,
521 ProcessorFamily80387 = 0x09,
522 ProcessorFamily80487 = 0x0A,
523 ProcessorFamilyPentium = 0x0B,
524 ProcessorFamilyPentiumPro = 0x0C,
525 ProcessorFamilyPentiumII = 0x0D,
526 ProcessorFamilyPentiumMMX = 0x0E,
527 ProcessorFamilyCeleron = 0x0F,
528 ProcessorFamilyPentiumIIXeon = 0x10,
529 ProcessorFamilyPentiumIII = 0x11,
530 ProcessorFamilyM1 = 0x12,
531 ProcessorFamilyM2 = 0x13,
532 ProcessorFamilyIntelCeleronM = 0x14,
533 ProcessorFamilyIntelPentium4Ht = 0x15,
534 ProcessorFamilyAmdDuron = 0x18,
535 ProcessorFamilyK5 = 0x19,
536 ProcessorFamilyK6 = 0x1A,
537 ProcessorFamilyK6_2 = 0x1B,
538 ProcessorFamilyK6_3 = 0x1C,
539 ProcessorFamilyAmdAthlon = 0x1D,
540 ProcessorFamilyAmd29000 = 0x1E,
541 ProcessorFamilyK6_2Plus = 0x1F,
542 ProcessorFamilyPowerPC = 0x20,
543 ProcessorFamilyPowerPC601 = 0x21,
544 ProcessorFamilyPowerPC603 = 0x22,
545 ProcessorFamilyPowerPC603Plus = 0x23,
546 ProcessorFamilyPowerPC604 = 0x24,
547 ProcessorFamilyPowerPC620 = 0x25,
548 ProcessorFamilyPowerPCx704 = 0x26,
549 ProcessorFamilyPowerPC750 = 0x27,
550 ProcessorFamilyIntelCoreDuo = 0x28,
551 ProcessorFamilyIntelCoreDuoMobile = 0x29,
552 ProcessorFamilyIntelCoreSoloMobile = 0x2A,
553 ProcessorFamilyIntelAtom = 0x2B,
554 ProcessorFamilyIntelCoreM = 0x2C,
555 ProcessorFamilyIntelCorem3 = 0x2D,
556 ProcessorFamilyIntelCorem5 = 0x2E,
557 ProcessorFamilyIntelCorem7 = 0x2F,
558 ProcessorFamilyAlpha = 0x30,
559 ProcessorFamilyAlpha21064 = 0x31,
560 ProcessorFamilyAlpha21066 = 0x32,
561 ProcessorFamilyAlpha21164 = 0x33,
562 ProcessorFamilyAlpha21164PC = 0x34,
563 ProcessorFamilyAlpha21164a = 0x35,
564 ProcessorFamilyAlpha21264 = 0x36,
565 ProcessorFamilyAlpha21364 = 0x37,
566 ProcessorFamilyAmdTurionIIUltraDualCoreMobileM = 0x38,
567 ProcessorFamilyAmdTurionIIDualCoreMobileM = 0x39,
568 ProcessorFamilyAmdAthlonIIDualCoreM = 0x3A,
569 ProcessorFamilyAmdOpteron6100Series = 0x3B,
570 ProcessorFamilyAmdOpteron4100Series = 0x3C,
571 ProcessorFamilyAmdOpteron6200Series = 0x3D,
572 ProcessorFamilyAmdOpteron4200Series = 0x3E,
573 ProcessorFamilyAmdFxSeries = 0x3F,
574 ProcessorFamilyMips = 0x40,
575 ProcessorFamilyMIPSR4000 = 0x41,
576 ProcessorFamilyMIPSR4200 = 0x42,
577 ProcessorFamilyMIPSR4400 = 0x43,
578 ProcessorFamilyMIPSR4600 = 0x44,
579 ProcessorFamilyMIPSR10000 = 0x45,
580 ProcessorFamilyAmdCSeries = 0x46,
581 ProcessorFamilyAmdESeries = 0x47,
582 ProcessorFamilyAmdASeries = 0x48, ///< SMBIOS spec 2.8.0 updated the name
583 ProcessorFamilyAmdGSeries = 0x49,
584 ProcessorFamilyAmdZSeries = 0x4A,
585 ProcessorFamilyAmdRSeries = 0x4B,
586 ProcessorFamilyAmdOpteron4300 = 0x4C,
587 ProcessorFamilyAmdOpteron6300 = 0x4D,
588 ProcessorFamilyAmdOpteron3300 = 0x4E,
589 ProcessorFamilyAmdFireProSeries = 0x4F,
590 ProcessorFamilySparc = 0x50,
591 ProcessorFamilySuperSparc = 0x51,
592 ProcessorFamilymicroSparcII = 0x52,
593 ProcessorFamilymicroSparcIIep = 0x53,
594 ProcessorFamilyUltraSparc = 0x54,
595 ProcessorFamilyUltraSparcII = 0x55,
596 ProcessorFamilyUltraSparcIii = 0x56,
597 ProcessorFamilyUltraSparcIII = 0x57,
598 ProcessorFamilyUltraSparcIIIi = 0x58,
599 ProcessorFamily68040 = 0x60,
600 ProcessorFamily68xxx = 0x61,
601 ProcessorFamily68000 = 0x62,
602 ProcessorFamily68010 = 0x63,
603 ProcessorFamily68020 = 0x64,
604 ProcessorFamily68030 = 0x65,
605 ProcessorFamilyAmdAthlonX4QuadCore = 0x66,
606 ProcessorFamilyAmdOpteronX1000Series = 0x67,
607 ProcessorFamilyAmdOpteronX2000Series = 0x68,
608 ProcessorFamilyAmdOpteronASeries = 0x69,
609 ProcessorFamilyAmdOpteronX3000Series = 0x6A,
610 ProcessorFamilyAmdZen = 0x6B,
611 ProcessorFamilyHobbit = 0x70,
612 ProcessorFamilyCrusoeTM5000 = 0x78,
613 ProcessorFamilyCrusoeTM3000 = 0x79,
614 ProcessorFamilyEfficeonTM8000 = 0x7A,
615 ProcessorFamilyWeitek = 0x80,
616 ProcessorFamilyItanium = 0x82,
617 ProcessorFamilyAmdAthlon64 = 0x83,
618 ProcessorFamilyAmdOpteron = 0x84,
619 ProcessorFamilyAmdSempron = 0x85,
620 ProcessorFamilyAmdTurion64Mobile = 0x86,
621 ProcessorFamilyDualCoreAmdOpteron = 0x87,
622 ProcessorFamilyAmdAthlon64X2DualCore = 0x88,
623 ProcessorFamilyAmdTurion64X2Mobile = 0x89,
624 ProcessorFamilyQuadCoreAmdOpteron = 0x8A,
625 ProcessorFamilyThirdGenerationAmdOpteron = 0x8B,
626 ProcessorFamilyAmdPhenomFxQuadCore = 0x8C,
627 ProcessorFamilyAmdPhenomX4QuadCore = 0x8D,
628 ProcessorFamilyAmdPhenomX2DualCore = 0x8E,
629 ProcessorFamilyAmdAthlonX2DualCore = 0x8F,
630 ProcessorFamilyPARISC = 0x90,
631 ProcessorFamilyPaRisc8500 = 0x91,
632 ProcessorFamilyPaRisc8000 = 0x92,
633 ProcessorFamilyPaRisc7300LC = 0x93,
634 ProcessorFamilyPaRisc7200 = 0x94,
635 ProcessorFamilyPaRisc7100LC = 0x95,
636 ProcessorFamilyPaRisc7100 = 0x96,
637 ProcessorFamilyV30 = 0xA0,
638 ProcessorFamilyQuadCoreIntelXeon3200Series = 0xA1,
639 ProcessorFamilyDualCoreIntelXeon3000Series = 0xA2,
640 ProcessorFamilyQuadCoreIntelXeon5300Series = 0xA3,
641 ProcessorFamilyDualCoreIntelXeon5100Series = 0xA4,
642 ProcessorFamilyDualCoreIntelXeon5000Series = 0xA5,
643 ProcessorFamilyDualCoreIntelXeonLV = 0xA6,
644 ProcessorFamilyDualCoreIntelXeonULV = 0xA7,
645 ProcessorFamilyDualCoreIntelXeon7100Series = 0xA8,
646 ProcessorFamilyQuadCoreIntelXeon5400Series = 0xA9,
647 ProcessorFamilyQuadCoreIntelXeon = 0xAA,
648 ProcessorFamilyDualCoreIntelXeon5200Series = 0xAB,
649 ProcessorFamilyDualCoreIntelXeon7200Series = 0xAC,
650 ProcessorFamilyQuadCoreIntelXeon7300Series = 0xAD,
651 ProcessorFamilyQuadCoreIntelXeon7400Series = 0xAE,
652 ProcessorFamilyMultiCoreIntelXeon7400Series = 0xAF,
653 ProcessorFamilyPentiumIIIXeon = 0xB0,
654 ProcessorFamilyPentiumIIISpeedStep = 0xB1,
655 ProcessorFamilyPentium4 = 0xB2,
656 ProcessorFamilyIntelXeon = 0xB3,
657 ProcessorFamilyAS400 = 0xB4,
658 ProcessorFamilyIntelXeonMP = 0xB5,
659 ProcessorFamilyAMDAthlonXP = 0xB6,
660 ProcessorFamilyAMDAthlonMP = 0xB7,
661 ProcessorFamilyIntelItanium2 = 0xB8,
662 ProcessorFamilyIntelPentiumM = 0xB9,
663 ProcessorFamilyIntelCeleronD = 0xBA,
664 ProcessorFamilyIntelPentiumD = 0xBB,
665 ProcessorFamilyIntelPentiumEx = 0xBC,
666 ProcessorFamilyIntelCoreSolo = 0xBD, ///< SMBIOS spec 2.6 updated this value
667 ProcessorFamilyReserved = 0xBE,
668 ProcessorFamilyIntelCore2 = 0xBF,
669 ProcessorFamilyIntelCore2Solo = 0xC0,
670 ProcessorFamilyIntelCore2Extreme = 0xC1,
671 ProcessorFamilyIntelCore2Quad = 0xC2,
672 ProcessorFamilyIntelCore2ExtremeMobile = 0xC3,
673 ProcessorFamilyIntelCore2DuoMobile = 0xC4,
674 ProcessorFamilyIntelCore2SoloMobile = 0xC5,
675 ProcessorFamilyIntelCoreI7 = 0xC6,
676 ProcessorFamilyDualCoreIntelCeleron = 0xC7,
677 ProcessorFamilyIBM390 = 0xC8,
678 ProcessorFamilyG4 = 0xC9,
679 ProcessorFamilyG5 = 0xCA,
680 ProcessorFamilyG6 = 0xCB,
681 ProcessorFamilyzArchitecture = 0xCC,
682 ProcessorFamilyIntelCoreI5 = 0xCD,
683 ProcessorFamilyIntelCoreI3 = 0xCE,
684 ProcessorFamilyIntelCoreI9 = 0xCF,
685 ProcessorFamilyViaC7M = 0xD2,
686 ProcessorFamilyViaC7D = 0xD3,
687 ProcessorFamilyViaC7 = 0xD4,
688 ProcessorFamilyViaEden = 0xD5,
689 ProcessorFamilyMultiCoreIntelXeon = 0xD6,
690 ProcessorFamilyDualCoreIntelXeon3Series = 0xD7,
691 ProcessorFamilyQuadCoreIntelXeon3Series = 0xD8,
692 ProcessorFamilyViaNano = 0xD9,
693 ProcessorFamilyDualCoreIntelXeon5Series = 0xDA,
694 ProcessorFamilyQuadCoreIntelXeon5Series = 0xDB,
695 ProcessorFamilyDualCoreIntelXeon7Series = 0xDD,
696 ProcessorFamilyQuadCoreIntelXeon7Series = 0xDE,
697 ProcessorFamilyMultiCoreIntelXeon7Series = 0xDF,
698 ProcessorFamilyMultiCoreIntelXeon3400Series = 0xE0,
699 ProcessorFamilyAmdOpteron3000Series = 0xE4,
700 ProcessorFamilyAmdSempronII = 0xE5,
701 ProcessorFamilyEmbeddedAmdOpteronQuadCore = 0xE6,
702 ProcessorFamilyAmdPhenomTripleCore = 0xE7,
703 ProcessorFamilyAmdTurionUltraDualCoreMobile = 0xE8,
704 ProcessorFamilyAmdTurionDualCoreMobile = 0xE9,
705 ProcessorFamilyAmdAthlonDualCore = 0xEA,
706 ProcessorFamilyAmdSempronSI = 0xEB,
707 ProcessorFamilyAmdPhenomII = 0xEC,
708 ProcessorFamilyAmdAthlonII = 0xED,
709 ProcessorFamilySixCoreAmdOpteron = 0xEE,
710 ProcessorFamilyAmdSempronM = 0xEF,
711 ProcessorFamilyi860 = 0xFA,
712 ProcessorFamilyi960 = 0xFB,
713 ProcessorFamilyIndicatorFamily2 = 0xFE,
714 ProcessorFamilyReserved1 = 0xFF
715 } PROCESSOR_FAMILY_DATA;
716
717 ///
718 /// Processor Information2 - Processor Family2.
719 ///
720 typedef enum {
721 ProcessorFamilyARMv7 = 0x0100,
722 ProcessorFamilyARMv8 = 0x0101,
723 ProcessorFamilySH3 = 0x0104,
724 ProcessorFamilySH4 = 0x0105,
725 ProcessorFamilyARM = 0x0118,
726 ProcessorFamilyStrongARM = 0x0119,
727 ProcessorFamily6x86 = 0x012C,
728 ProcessorFamilyMediaGX = 0x012D,
729 ProcessorFamilyMII = 0x012E,
730 ProcessorFamilyWinChip = 0x0140,
731 ProcessorFamilyDSP = 0x015E,
732 ProcessorFamilyVideoProcessor = 0x01F4,
733 ProcessorFamilyRiscvRV32 = 0x0200,
734 ProcessorFamilyRiscVRV64 = 0x0201,
735 ProcessorFamilyRiscVRV128 = 0x0202
736 } PROCESSOR_FAMILY2_DATA;
737
738 ///
739 /// Processor Information - Voltage.
740 ///
741 typedef struct {
742 UINT8 ProcessorVoltageCapability5V :1;
743 UINT8 ProcessorVoltageCapability3_3V :1;
744 UINT8 ProcessorVoltageCapability2_9V :1;
745 UINT8 ProcessorVoltageCapabilityReserved :1; ///< Bit 3, must be zero.
746 UINT8 ProcessorVoltageReserved :3; ///< Bits 4-6, must be zero.
747 UINT8 ProcessorVoltageIndicateLegacy :1;
748 } PROCESSOR_VOLTAGE;
749
750 ///
751 /// Processor Information - Processor Upgrade.
752 ///
753 typedef enum {
754 ProcessorUpgradeOther = 0x01,
755 ProcessorUpgradeUnknown = 0x02,
756 ProcessorUpgradeDaughterBoard = 0x03,
757 ProcessorUpgradeZIFSocket = 0x04,
758 ProcessorUpgradePiggyBack = 0x05, ///< Replaceable.
759 ProcessorUpgradeNone = 0x06,
760 ProcessorUpgradeLIFSocket = 0x07,
761 ProcessorUpgradeSlot1 = 0x08,
762 ProcessorUpgradeSlot2 = 0x09,
763 ProcessorUpgrade370PinSocket = 0x0A,
764 ProcessorUpgradeSlotA = 0x0B,
765 ProcessorUpgradeSlotM = 0x0C,
766 ProcessorUpgradeSocket423 = 0x0D,
767 ProcessorUpgradeSocketA = 0x0E, ///< Socket 462.
768 ProcessorUpgradeSocket478 = 0x0F,
769 ProcessorUpgradeSocket754 = 0x10,
770 ProcessorUpgradeSocket940 = 0x11,
771 ProcessorUpgradeSocket939 = 0x12,
772 ProcessorUpgradeSocketmPGA604 = 0x13,
773 ProcessorUpgradeSocketLGA771 = 0x14,
774 ProcessorUpgradeSocketLGA775 = 0x15,
775 ProcessorUpgradeSocketS1 = 0x16,
776 ProcessorUpgradeAM2 = 0x17,
777 ProcessorUpgradeF1207 = 0x18,
778 ProcessorSocketLGA1366 = 0x19,
779 ProcessorUpgradeSocketG34 = 0x1A,
780 ProcessorUpgradeSocketAM3 = 0x1B,
781 ProcessorUpgradeSocketC32 = 0x1C,
782 ProcessorUpgradeSocketLGA1156 = 0x1D,
783 ProcessorUpgradeSocketLGA1567 = 0x1E,
784 ProcessorUpgradeSocketPGA988A = 0x1F,
785 ProcessorUpgradeSocketBGA1288 = 0x20,
786 ProcessorUpgradeSocketrPGA988B = 0x21,
787 ProcessorUpgradeSocketBGA1023 = 0x22,
788 ProcessorUpgradeSocketBGA1224 = 0x23,
789 ProcessorUpgradeSocketLGA1155 = 0x24, ///< SMBIOS spec 2.8.0 updated the name
790 ProcessorUpgradeSocketLGA1356 = 0x25,
791 ProcessorUpgradeSocketLGA2011 = 0x26,
792 ProcessorUpgradeSocketFS1 = 0x27,
793 ProcessorUpgradeSocketFS2 = 0x28,
794 ProcessorUpgradeSocketFM1 = 0x29,
795 ProcessorUpgradeSocketFM2 = 0x2A,
796 ProcessorUpgradeSocketLGA2011_3 = 0x2B,
797 ProcessorUpgradeSocketLGA1356_3 = 0x2C,
798 ProcessorUpgradeSocketLGA1150 = 0x2D,
799 ProcessorUpgradeSocketBGA1168 = 0x2E,
800 ProcessorUpgradeSocketBGA1234 = 0x2F,
801 ProcessorUpgradeSocketBGA1364 = 0x30,
802 ProcessorUpgradeSocketAM4 = 0x31,
803 ProcessorUpgradeSocketLGA1151 = 0x32,
804 ProcessorUpgradeSocketBGA1356 = 0x33,
805 ProcessorUpgradeSocketBGA1440 = 0x34,
806 ProcessorUpgradeSocketBGA1515 = 0x35,
807 ProcessorUpgradeSocketLGA3647_1 = 0x36,
808 ProcessorUpgradeSocketSP3 = 0x37,
809 ProcessorUpgradeSocketSP3r2 = 0x38,
810 ProcessorUpgradeSocketLGA2066 = 0x39,
811 ProcessorUpgradeSocketBGA1392 = 0x3A,
812 ProcessorUpgradeSocketBGA1510 = 0x3B,
813 ProcessorUpgradeSocketBGA1528 = 0x3C,
814 ProcessorUpgradeSocketLGA4189 = 0x3D,
815 ProcessorUpgradeSocketLGA1200 = 0x3E,
816 ProcessorUpgradeSocketLGA4677 = 0x3F
817 } PROCESSOR_UPGRADE;
818
819 ///
820 /// Processor ID Field Description
821 ///
822 typedef struct {
823 UINT32 ProcessorSteppingId:4;
824 UINT32 ProcessorModel: 4;
825 UINT32 ProcessorFamily: 4;
826 UINT32 ProcessorType: 2;
827 UINT32 ProcessorReserved1: 2;
828 UINT32 ProcessorXModel: 4;
829 UINT32 ProcessorXFamily: 8;
830 UINT32 ProcessorReserved2: 4;
831 } PROCESSOR_SIGNATURE;
832
833 typedef struct {
834 UINT32 ProcessorFpu :1;
835 UINT32 ProcessorVme :1;
836 UINT32 ProcessorDe :1;
837 UINT32 ProcessorPse :1;
838 UINT32 ProcessorTsc :1;
839 UINT32 ProcessorMsr :1;
840 UINT32 ProcessorPae :1;
841 UINT32 ProcessorMce :1;
842 UINT32 ProcessorCx8 :1;
843 UINT32 ProcessorApic :1;
844 UINT32 ProcessorReserved1 :1;
845 UINT32 ProcessorSep :1;
846 UINT32 ProcessorMtrr :1;
847 UINT32 ProcessorPge :1;
848 UINT32 ProcessorMca :1;
849 UINT32 ProcessorCmov :1;
850 UINT32 ProcessorPat :1;
851 UINT32 ProcessorPse36 :1;
852 UINT32 ProcessorPsn :1;
853 UINT32 ProcessorClfsh :1;
854 UINT32 ProcessorReserved2 :1;
855 UINT32 ProcessorDs :1;
856 UINT32 ProcessorAcpi :1;
857 UINT32 ProcessorMmx :1;
858 UINT32 ProcessorFxsr :1;
859 UINT32 ProcessorSse :1;
860 UINT32 ProcessorSse2 :1;
861 UINT32 ProcessorSs :1;
862 UINT32 ProcessorReserved3 :1;
863 UINT32 ProcessorTm :1;
864 UINT32 ProcessorReserved4 :2;
865 } PROCESSOR_FEATURE_FLAGS;
866
867 typedef struct {
868 UINT16 ProcessorReserved1 :1;
869 UINT16 ProcessorUnknown :1;
870 UINT16 Processor64BitCapable :1;
871 UINT16 ProcessorMultiCore :1;
872 UINT16 ProcessorHardwareThread :1;
873 UINT16 ProcessorExecuteProtection :1;
874 UINT16 ProcessorEnhancedVirtualization :1;
875 UINT16 ProcessorPowerPerformanceCtrl :1;
876 UINT16 Processor128BitCapable :1;
877 UINT16 ProcessorArm64SocId :1;
878 UINT16 ProcessorReserved2 :6;
879 } PROCESSOR_CHARACTERISTIC_FLAGS;
880
881 ///
882 /// Processor Information - Status
883 ///
884 typedef union {
885 struct {
886 UINT8 CpuStatus :3; ///< Indicates the status of the processor.
887 UINT8 Reserved1 :3; ///< Reserved for future use. Must be set to zero.
888 UINT8 SocketPopulated :1; ///< Indicates if the processor socket is populated or not.
889 UINT8 Reserved2 :1; ///< Reserved for future use. Must be set to zero.
890 } Bits;
891 UINT8 Data;
892 } PROCESSOR_STATUS_DATA;
893
894 typedef struct {
895 PROCESSOR_SIGNATURE Signature;
896 PROCESSOR_FEATURE_FLAGS FeatureFlags;
897 } PROCESSOR_ID_DATA;
898
899 ///
900 /// Processor Information (Type 4).
901 ///
902 /// The information in this structure defines the attributes of a single processor;
903 /// a separate structure instance is provided for each system processor socket/slot.
904 /// For example, a system with an IntelDX2 processor would have a single
905 /// structure instance, while a system with an IntelSX2 processor would have a structure
906 /// to describe the main CPU, and a second structure to describe the 80487 co-processor.
907 ///
908 typedef struct {
909 SMBIOS_STRUCTURE Hdr;
910 SMBIOS_TABLE_STRING Socket;
911 UINT8 ProcessorType; ///< The enumeration value from PROCESSOR_TYPE_DATA.
912 UINT8 ProcessorFamily; ///< The enumeration value from PROCESSOR_FAMILY_DATA.
913 SMBIOS_TABLE_STRING ProcessorManufacturer;
914 PROCESSOR_ID_DATA ProcessorId;
915 SMBIOS_TABLE_STRING ProcessorVersion;
916 PROCESSOR_VOLTAGE Voltage;
917 UINT16 ExternalClock;
918 UINT16 MaxSpeed;
919 UINT16 CurrentSpeed;
920 UINT8 Status;
921 UINT8 ProcessorUpgrade; ///< The enumeration value from PROCESSOR_UPGRADE.
922 UINT16 L1CacheHandle;
923 UINT16 L2CacheHandle;
924 UINT16 L3CacheHandle;
925 SMBIOS_TABLE_STRING SerialNumber;
926 SMBIOS_TABLE_STRING AssetTag;
927 SMBIOS_TABLE_STRING PartNumber;
928 //
929 // Add for smbios 2.5
930 //
931 UINT8 CoreCount;
932 UINT8 EnabledCoreCount;
933 UINT8 ThreadCount;
934 UINT16 ProcessorCharacteristics;
935 //
936 // Add for smbios 2.6
937 //
938 UINT16 ProcessorFamily2;
939 //
940 // Add for smbios 3.0
941 //
942 UINT16 CoreCount2;
943 UINT16 EnabledCoreCount2;
944 UINT16 ThreadCount2;
945 } SMBIOS_TABLE_TYPE4;
946
947 ///
948 /// Memory Controller Error Detecting Method.
949 ///
950 typedef enum {
951 ErrorDetectingMethodOther = 0x01,
952 ErrorDetectingMethodUnknown = 0x02,
953 ErrorDetectingMethodNone = 0x03,
954 ErrorDetectingMethodParity = 0x04,
955 ErrorDetectingMethod32Ecc = 0x05,
956 ErrorDetectingMethod64Ecc = 0x06,
957 ErrorDetectingMethod128Ecc = 0x07,
958 ErrorDetectingMethodCrc = 0x08
959 } MEMORY_ERROR_DETECT_METHOD;
960
961 ///
962 /// Memory Controller Error Correcting Capability.
963 ///
964 typedef struct {
965 UINT8 Other :1;
966 UINT8 Unknown :1;
967 UINT8 None :1;
968 UINT8 SingleBitErrorCorrect :1;
969 UINT8 DoubleBitErrorCorrect :1;
970 UINT8 ErrorScrubbing :1;
971 UINT8 Reserved :2;
972 } MEMORY_ERROR_CORRECT_CAPABILITY;
973
974 ///
975 /// Memory Controller Information - Interleave Support.
976 ///
977 typedef enum {
978 MemoryInterleaveOther = 0x01,
979 MemoryInterleaveUnknown = 0x02,
980 MemoryInterleaveOneWay = 0x03,
981 MemoryInterleaveTwoWay = 0x04,
982 MemoryInterleaveFourWay = 0x05,
983 MemoryInterleaveEightWay = 0x06,
984 MemoryInterleaveSixteenWay = 0x07
985 } MEMORY_SUPPORT_INTERLEAVE_TYPE;
986
987 ///
988 /// Memory Controller Information - Memory Speeds.
989 ///
990 typedef struct {
991 UINT16 Other :1;
992 UINT16 Unknown :1;
993 UINT16 SeventyNs:1;
994 UINT16 SixtyNs :1;
995 UINT16 FiftyNs :1;
996 UINT16 Reserved :11;
997 } MEMORY_SPEED_TYPE;
998
999 ///
1000 /// Memory Controller Information (Type 5, Obsolete).
1001 ///
1002 /// The information in this structure defines the attributes of the system's memory controller(s)
1003 /// and the supported attributes of any memory-modules present in the sockets controlled by
1004 /// this controller.
1005 /// Note: This structure, and its companion Memory Module Information (Type 6, Obsolete),
1006 /// are obsolete starting with version 2.1 of this specification. The Physical Memory Array (Type 16)
1007 /// and Memory Device (Type 17) structures should be used instead. BIOS providers might
1008 /// choose to implement both memory description types to allow existing DMI browsers
1009 /// to properly display the system's memory attributes.
1010 ///
1011 typedef struct {
1012 SMBIOS_STRUCTURE Hdr;
1013 UINT8 ErrDetectMethod; ///< The enumeration value from MEMORY_ERROR_DETECT_METHOD.
1014 MEMORY_ERROR_CORRECT_CAPABILITY ErrCorrectCapability;
1015 UINT8 SupportInterleave; ///< The enumeration value from MEMORY_SUPPORT_INTERLEAVE_TYPE.
1016 UINT8 CurrentInterleave; ///< The enumeration value from MEMORY_SUPPORT_INTERLEAVE_TYPE .
1017 UINT8 MaxMemoryModuleSize;
1018 MEMORY_SPEED_TYPE SupportSpeed;
1019 UINT16 SupportMemoryType;
1020 UINT8 MemoryModuleVoltage;
1021 UINT8 AssociatedMemorySlotNum;
1022 UINT16 MemoryModuleConfigHandles[1];
1023 } SMBIOS_TABLE_TYPE5;
1024
1025 ///
1026 /// Memory Module Information - Memory Types
1027 ///
1028 typedef struct {
1029 UINT16 Other :1;
1030 UINT16 Unknown :1;
1031 UINT16 Standard :1;
1032 UINT16 FastPageMode:1;
1033 UINT16 Edo :1;
1034 UINT16 Parity :1;
1035 UINT16 Ecc :1;
1036 UINT16 Simm :1;
1037 UINT16 Dimm :1;
1038 UINT16 BurstEdo :1;
1039 UINT16 Sdram :1;
1040 UINT16 Reserved :5;
1041 } MEMORY_CURRENT_TYPE;
1042
1043 ///
1044 /// Memory Module Information - Memory Size.
1045 ///
1046 typedef struct {
1047 UINT8 InstalledOrEnabledSize :7; ///< Size (n), where 2**n is the size in MB.
1048 UINT8 SingleOrDoubleBank :1;
1049 } MEMORY_INSTALLED_ENABLED_SIZE;
1050
1051 ///
1052 /// Memory Module Information (Type 6, Obsolete)
1053 ///
1054 /// One Memory Module Information structure is included for each memory-module socket
1055 /// in the system. The structure describes the speed, type, size, and error status
1056 /// of each system memory module. The supported attributes of each module are described
1057 /// by the "owning" Memory Controller Information structure.
1058 /// Note: This structure, and its companion Memory Controller Information (Type 5, Obsolete),
1059 /// are obsolete starting with version 2.1 of this specification. The Physical Memory Array (Type 16)
1060 /// and Memory Device (Type 17) structures should be used instead.
1061 ///
1062 typedef struct {
1063 SMBIOS_STRUCTURE Hdr;
1064 SMBIOS_TABLE_STRING SocketDesignation;
1065 UINT8 BankConnections;
1066 UINT8 CurrentSpeed;
1067 MEMORY_CURRENT_TYPE CurrentMemoryType;
1068 MEMORY_INSTALLED_ENABLED_SIZE InstalledSize;
1069 MEMORY_INSTALLED_ENABLED_SIZE EnabledSize;
1070 UINT8 ErrorStatus;
1071 } SMBIOS_TABLE_TYPE6;
1072
1073 ///
1074 /// Cache Information - SRAM Type.
1075 ///
1076 typedef struct {
1077 UINT16 Other :1;
1078 UINT16 Unknown :1;
1079 UINT16 NonBurst :1;
1080 UINT16 Burst :1;
1081 UINT16 PipelineBurst :1;
1082 UINT16 Synchronous :1;
1083 UINT16 Asynchronous :1;
1084 UINT16 Reserved :9;
1085 } CACHE_SRAM_TYPE_DATA;
1086
1087 ///
1088 /// Cache Information - Error Correction Type.
1089 ///
1090 typedef enum {
1091 CacheErrorOther = 0x01,
1092 CacheErrorUnknown = 0x02,
1093 CacheErrorNone = 0x03,
1094 CacheErrorParity = 0x04,
1095 CacheErrorSingleBit = 0x05, ///< ECC
1096 CacheErrorMultiBit = 0x06 ///< ECC
1097 } CACHE_ERROR_TYPE_DATA;
1098
1099 ///
1100 /// Cache Information - System Cache Type.
1101 ///
1102 typedef enum {
1103 CacheTypeOther = 0x01,
1104 CacheTypeUnknown = 0x02,
1105 CacheTypeInstruction = 0x03,
1106 CacheTypeData = 0x04,
1107 CacheTypeUnified = 0x05
1108 } CACHE_TYPE_DATA;
1109
1110 ///
1111 /// Cache Information - Associativity.
1112 ///
1113 typedef enum {
1114 CacheAssociativityOther = 0x01,
1115 CacheAssociativityUnknown = 0x02,
1116 CacheAssociativityDirectMapped = 0x03,
1117 CacheAssociativity2Way = 0x04,
1118 CacheAssociativity4Way = 0x05,
1119 CacheAssociativityFully = 0x06,
1120 CacheAssociativity8Way = 0x07,
1121 CacheAssociativity16Way = 0x08,
1122 CacheAssociativity12Way = 0x09,
1123 CacheAssociativity24Way = 0x0A,
1124 CacheAssociativity32Way = 0x0B,
1125 CacheAssociativity48Way = 0x0C,
1126 CacheAssociativity64Way = 0x0D,
1127 CacheAssociativity20Way = 0x0E
1128 } CACHE_ASSOCIATIVITY_DATA;
1129
1130 ///
1131 /// Cache Information (Type 7).
1132 ///
1133 /// The information in this structure defines the attributes of CPU cache device in the system.
1134 /// One structure is specified for each such device, whether the device is internal to
1135 /// or external to the CPU module. Cache modules can be associated with a processor structure
1136 /// in one or two ways, depending on the SMBIOS version.
1137 ///
1138 typedef struct {
1139 SMBIOS_STRUCTURE Hdr;
1140 SMBIOS_TABLE_STRING SocketDesignation;
1141 UINT16 CacheConfiguration;
1142 UINT16 MaximumCacheSize;
1143 UINT16 InstalledSize;
1144 CACHE_SRAM_TYPE_DATA SupportedSRAMType;
1145 CACHE_SRAM_TYPE_DATA CurrentSRAMType;
1146 UINT8 CacheSpeed;
1147 UINT8 ErrorCorrectionType; ///< The enumeration value from CACHE_ERROR_TYPE_DATA.
1148 UINT8 SystemCacheType; ///< The enumeration value from CACHE_TYPE_DATA.
1149 UINT8 Associativity; ///< The enumeration value from CACHE_ASSOCIATIVITY_DATA.
1150 //
1151 // Add for smbios 3.1.0
1152 //
1153 UINT32 MaximumCacheSize2;
1154 UINT32 InstalledSize2;
1155 } SMBIOS_TABLE_TYPE7;
1156
1157 ///
1158 /// Port Connector Information - Connector Types.
1159 ///
1160 typedef enum {
1161 PortConnectorTypeNone = 0x00,
1162 PortConnectorTypeCentronics = 0x01,
1163 PortConnectorTypeMiniCentronics = 0x02,
1164 PortConnectorTypeProprietary = 0x03,
1165 PortConnectorTypeDB25Male = 0x04,
1166 PortConnectorTypeDB25Female = 0x05,
1167 PortConnectorTypeDB15Male = 0x06,
1168 PortConnectorTypeDB15Female = 0x07,
1169 PortConnectorTypeDB9Male = 0x08,
1170 PortConnectorTypeDB9Female = 0x09,
1171 PortConnectorTypeRJ11 = 0x0A,
1172 PortConnectorTypeRJ45 = 0x0B,
1173 PortConnectorType50PinMiniScsi = 0x0C,
1174 PortConnectorTypeMiniDin = 0x0D,
1175 PortConnectorTypeMicroDin = 0x0E,
1176 PortConnectorTypePS2 = 0x0F,
1177 PortConnectorTypeInfrared = 0x10,
1178 PortConnectorTypeHpHil = 0x11,
1179 PortConnectorTypeUsb = 0x12,
1180 PortConnectorTypeSsaScsi = 0x13,
1181 PortConnectorTypeCircularDin8Male = 0x14,
1182 PortConnectorTypeCircularDin8Female = 0x15,
1183 PortConnectorTypeOnboardIde = 0x16,
1184 PortConnectorTypeOnboardFloppy = 0x17,
1185 PortConnectorType9PinDualInline = 0x18,
1186 PortConnectorType25PinDualInline = 0x19,
1187 PortConnectorType50PinDualInline = 0x1A,
1188 PortConnectorType68PinDualInline = 0x1B,
1189 PortConnectorTypeOnboardSoundInput = 0x1C,
1190 PortConnectorTypeMiniCentronicsType14 = 0x1D,
1191 PortConnectorTypeMiniCentronicsType26 = 0x1E,
1192 PortConnectorTypeHeadPhoneMiniJack = 0x1F,
1193 PortConnectorTypeBNC = 0x20,
1194 PortConnectorType1394 = 0x21,
1195 PortConnectorTypeSasSata = 0x22,
1196 PortConnectorTypeUsbTypeC = 0x23,
1197 PortConnectorTypePC98 = 0xA0,
1198 PortConnectorTypePC98Hireso = 0xA1,
1199 PortConnectorTypePCH98 = 0xA2,
1200 PortConnectorTypePC98Note = 0xA3,
1201 PortConnectorTypePC98Full = 0xA4,
1202 PortConnectorTypeOther = 0xFF
1203 } MISC_PORT_CONNECTOR_TYPE;
1204
1205 ///
1206 /// Port Connector Information - Port Types
1207 ///
1208 typedef enum {
1209 PortTypeNone = 0x00,
1210 PortTypeParallelXtAtCompatible = 0x01,
1211 PortTypeParallelPortPs2 = 0x02,
1212 PortTypeParallelPortEcp = 0x03,
1213 PortTypeParallelPortEpp = 0x04,
1214 PortTypeParallelPortEcpEpp = 0x05,
1215 PortTypeSerialXtAtCompatible = 0x06,
1216 PortTypeSerial16450Compatible = 0x07,
1217 PortTypeSerial16550Compatible = 0x08,
1218 PortTypeSerial16550ACompatible = 0x09,
1219 PortTypeScsi = 0x0A,
1220 PortTypeMidi = 0x0B,
1221 PortTypeJoyStick = 0x0C,
1222 PortTypeKeyboard = 0x0D,
1223 PortTypeMouse = 0x0E,
1224 PortTypeSsaScsi = 0x0F,
1225 PortTypeUsb = 0x10,
1226 PortTypeFireWire = 0x11,
1227 PortTypePcmciaTypeI = 0x12,
1228 PortTypePcmciaTypeII = 0x13,
1229 PortTypePcmciaTypeIII = 0x14,
1230 PortTypeCardBus = 0x15,
1231 PortTypeAccessBusPort = 0x16,
1232 PortTypeScsiII = 0x17,
1233 PortTypeScsiWide = 0x18,
1234 PortTypePC98 = 0x19,
1235 PortTypePC98Hireso = 0x1A,
1236 PortTypePCH98 = 0x1B,
1237 PortTypeVideoPort = 0x1C,
1238 PortTypeAudioPort = 0x1D,
1239 PortTypeModemPort = 0x1E,
1240 PortTypeNetworkPort = 0x1F,
1241 PortTypeSata = 0x20,
1242 PortTypeSas = 0x21,
1243 PortTypeMfdp = 0x22, ///< Multi-Function Display Port
1244 PortTypeThunderbolt = 0x23,
1245 PortType8251Compatible = 0xA0,
1246 PortType8251FifoCompatible = 0xA1,
1247 PortTypeOther = 0xFF
1248 } MISC_PORT_TYPE;
1249
1250 ///
1251 /// Port Connector Information (Type 8).
1252 ///
1253 /// The information in this structure defines the attributes of a system port connector,
1254 /// e.g. parallel, serial, keyboard, or mouse ports. The port's type and connector information
1255 /// are provided. One structure is present for each port provided by the system.
1256 ///
1257 typedef struct {
1258 SMBIOS_STRUCTURE Hdr;
1259 SMBIOS_TABLE_STRING InternalReferenceDesignator;
1260 UINT8 InternalConnectorType; ///< The enumeration value from MISC_PORT_CONNECTOR_TYPE.
1261 SMBIOS_TABLE_STRING ExternalReferenceDesignator;
1262 UINT8 ExternalConnectorType; ///< The enumeration value from MISC_PORT_CONNECTOR_TYPE.
1263 UINT8 PortType; ///< The enumeration value from MISC_PORT_TYPE.
1264 } SMBIOS_TABLE_TYPE8;
1265
1266 ///
1267 /// System Slots - Slot Type
1268 ///
1269 typedef enum {
1270 SlotTypeOther = 0x01,
1271 SlotTypeUnknown = 0x02,
1272 SlotTypeIsa = 0x03,
1273 SlotTypeMca = 0x04,
1274 SlotTypeEisa = 0x05,
1275 SlotTypePci = 0x06,
1276 SlotTypePcmcia = 0x07,
1277 SlotTypeVlVesa = 0x08,
1278 SlotTypeProprietary = 0x09,
1279 SlotTypeProcessorCardSlot = 0x0A,
1280 SlotTypeProprietaryMemoryCardSlot = 0x0B,
1281 SlotTypeIORiserCardSlot = 0x0C,
1282 SlotTypeNuBus = 0x0D,
1283 SlotTypePci66MhzCapable = 0x0E,
1284 SlotTypeAgp = 0x0F,
1285 SlotTypeApg2X = 0x10,
1286 SlotTypeAgp4X = 0x11,
1287 SlotTypePciX = 0x12,
1288 SlotTypeAgp8X = 0x13,
1289 SlotTypeM2Socket1_DP = 0x14,
1290 SlotTypeM2Socket1_SD = 0x15,
1291 SlotTypeM2Socket2 = 0x16,
1292 SlotTypeM2Socket3 = 0x17,
1293 SlotTypeMxmTypeI = 0x18,
1294 SlotTypeMxmTypeII = 0x19,
1295 SlotTypeMxmTypeIIIStandard = 0x1A,
1296 SlotTypeMxmTypeIIIHe = 0x1B,
1297 SlotTypeMxmTypeIV = 0x1C,
1298 SlotTypeMxm30TypeA = 0x1D,
1299 SlotTypeMxm30TypeB = 0x1E,
1300 SlotTypePciExpressGen2Sff_8639 = 0x1F,
1301 SlotTypePciExpressGen3Sff_8639 = 0x20,
1302 SlotTypePciExpressMini52pinWithBSKO = 0x21, ///< PCI Express Mini 52-pin (CEM spec. 2.0) with bottom-side keep-outs.
1303 SlotTypePciExpressMini52pinWithoutBSKO = 0x22, ///< PCI Express Mini 52-pin (CEM spec. 2.0) without bottom-side keep-outs.
1304 SlotTypePciExpressMini76pin = 0x23, ///< PCI Express Mini 76-pin (CEM spec. 2.0) Corresponds to Display-Mini card.
1305 SlotTypeCXLFlexbus10 = 0x30,
1306 SlotTypePC98C20 = 0xA0,
1307 SlotTypePC98C24 = 0xA1,
1308 SlotTypePC98E = 0xA2,
1309 SlotTypePC98LocalBus = 0xA3,
1310 SlotTypePC98Card = 0xA4,
1311 SlotTypePciExpress = 0xA5,
1312 SlotTypePciExpressX1 = 0xA6,
1313 SlotTypePciExpressX2 = 0xA7,
1314 SlotTypePciExpressX4 = 0xA8,
1315 SlotTypePciExpressX8 = 0xA9,
1316 SlotTypePciExpressX16 = 0xAA,
1317 SlotTypePciExpressGen2 = 0xAB,
1318 SlotTypePciExpressGen2X1 = 0xAC,
1319 SlotTypePciExpressGen2X2 = 0xAD,
1320 SlotTypePciExpressGen2X4 = 0xAE,
1321 SlotTypePciExpressGen2X8 = 0xAF,
1322 SlotTypePciExpressGen2X16 = 0xB0,
1323 SlotTypePciExpressGen3 = 0xB1,
1324 SlotTypePciExpressGen3X1 = 0xB2,
1325 SlotTypePciExpressGen3X2 = 0xB3,
1326 SlotTypePciExpressGen3X4 = 0xB4,
1327 SlotTypePciExpressGen3X8 = 0xB5,
1328 SlotTypePciExpressGen3X16 = 0xB6,
1329 SlotTypePciExpressGen4 = 0xB8,
1330 SlotTypePciExpressGen4X1 = 0xB9,
1331 SlotTypePciExpressGen4X2 = 0xBA,
1332 SlotTypePciExpressGen4X4 = 0xBB,
1333 SlotTypePciExpressGen4X8 = 0xBC,
1334 SlotTypePciExpressGen4X16 = 0xBD
1335 } MISC_SLOT_TYPE;
1336
1337 ///
1338 /// System Slots - Slot Data Bus Width.
1339 ///
1340 typedef enum {
1341 SlotDataBusWidthOther = 0x01,
1342 SlotDataBusWidthUnknown = 0x02,
1343 SlotDataBusWidth8Bit = 0x03,
1344 SlotDataBusWidth16Bit = 0x04,
1345 SlotDataBusWidth32Bit = 0x05,
1346 SlotDataBusWidth64Bit = 0x06,
1347 SlotDataBusWidth128Bit = 0x07,
1348 SlotDataBusWidth1X = 0x08, ///< Or X1
1349 SlotDataBusWidth2X = 0x09, ///< Or X2
1350 SlotDataBusWidth4X = 0x0A, ///< Or X4
1351 SlotDataBusWidth8X = 0x0B, ///< Or X8
1352 SlotDataBusWidth12X = 0x0C, ///< Or X12
1353 SlotDataBusWidth16X = 0x0D, ///< Or X16
1354 SlotDataBusWidth32X = 0x0E ///< Or X32
1355 } MISC_SLOT_DATA_BUS_WIDTH;
1356
1357 ///
1358 /// System Slots - Current Usage.
1359 ///
1360 typedef enum {
1361 SlotUsageOther = 0x01,
1362 SlotUsageUnknown = 0x02,
1363 SlotUsageAvailable = 0x03,
1364 SlotUsageInUse = 0x04,
1365 SlotUsageUnavailable = 0x05
1366 } MISC_SLOT_USAGE;
1367
1368 ///
1369 /// System Slots - Slot Length.
1370 ///
1371 typedef enum {
1372 SlotLengthOther = 0x01,
1373 SlotLengthUnknown = 0x02,
1374 SlotLengthShort = 0x03,
1375 SlotLengthLong = 0x04
1376 } MISC_SLOT_LENGTH;
1377
1378 ///
1379 /// System Slots - Slot Characteristics 1.
1380 ///
1381 typedef struct {
1382 UINT8 CharacteristicsUnknown :1;
1383 UINT8 Provides50Volts :1;
1384 UINT8 Provides33Volts :1;
1385 UINT8 SharedSlot :1;
1386 UINT8 PcCard16Supported :1;
1387 UINT8 CardBusSupported :1;
1388 UINT8 ZoomVideoSupported :1;
1389 UINT8 ModemRingResumeSupported:1;
1390 } MISC_SLOT_CHARACTERISTICS1;
1391 ///
1392 /// System Slots - Slot Characteristics 2.
1393 ///
1394 typedef struct {
1395 UINT8 PmeSignalSupported :1;
1396 UINT8 HotPlugDevicesSupported :1;
1397 UINT8 SmbusSignalSupported :1;
1398 UINT8 BifurcationSupported :1;
1399 UINT8 AsyncSurpriseRemoval :1;
1400 UINT8 FlexbusSlotCxl10Capable :1;
1401 UINT8 FlexbusSlotCxl20Capable :1;
1402 UINT8 Reserved :1; ///< Set to 0.
1403 } MISC_SLOT_CHARACTERISTICS2;
1404
1405 ///
1406 /// System Slots - Peer Segment/Bus/Device/Function/Width Groups
1407 ///
1408 typedef struct {
1409 UINT16 SegmentGroupNum;
1410 UINT8 BusNum;
1411 UINT8 DevFuncNum;
1412 UINT8 DataBusWidth;
1413 } MISC_SLOT_PEER_GROUP;
1414
1415 ///
1416 /// System Slots (Type 9)
1417 ///
1418 /// The information in this structure defines the attributes of a system slot.
1419 /// One structure is provided for each slot in the system.
1420 ///
1421 ///
1422 typedef struct {
1423 SMBIOS_STRUCTURE Hdr;
1424 SMBIOS_TABLE_STRING SlotDesignation;
1425 UINT8 SlotType; ///< The enumeration value from MISC_SLOT_TYPE.
1426 UINT8 SlotDataBusWidth; ///< The enumeration value from MISC_SLOT_DATA_BUS_WIDTH.
1427 UINT8 CurrentUsage; ///< The enumeration value from MISC_SLOT_USAGE.
1428 UINT8 SlotLength; ///< The enumeration value from MISC_SLOT_LENGTH.
1429 UINT16 SlotID;
1430 MISC_SLOT_CHARACTERISTICS1 SlotCharacteristics1;
1431 MISC_SLOT_CHARACTERISTICS2 SlotCharacteristics2;
1432 //
1433 // Add for smbios 2.6
1434 //
1435 UINT16 SegmentGroupNum;
1436 UINT8 BusNum;
1437 UINT8 DevFuncNum;
1438 //
1439 // Add for smbios 3.2
1440 //
1441 UINT8 DataBusWidth;
1442 UINT8 PeerGroupingCount;
1443 MISC_SLOT_PEER_GROUP PeerGroups[1];
1444 //
1445 // Add for smbios 3.4
1446 //
1447 UINT8 SlotInformation;
1448 UINT8 SlotPhysicalWidth;
1449 UINT16 SlotPitch;
1450 } SMBIOS_TABLE_TYPE9;
1451
1452 ///
1453 /// On Board Devices Information - Device Types.
1454 ///
1455 typedef enum {
1456 OnBoardDeviceTypeOther = 0x01,
1457 OnBoardDeviceTypeUnknown = 0x02,
1458 OnBoardDeviceTypeVideo = 0x03,
1459 OnBoardDeviceTypeScsiController = 0x04,
1460 OnBoardDeviceTypeEthernet = 0x05,
1461 OnBoardDeviceTypeTokenRing = 0x06,
1462 OnBoardDeviceTypeSound = 0x07,
1463 OnBoardDeviceTypePATAController = 0x08,
1464 OnBoardDeviceTypeSATAController = 0x09,
1465 OnBoardDeviceTypeSASController = 0x0A
1466 } MISC_ONBOARD_DEVICE_TYPE;
1467
1468 ///
1469 /// Device Item Entry
1470 ///
1471 typedef struct {
1472 UINT8 DeviceType; ///< Bit [6:0] - enumeration type of device from MISC_ONBOARD_DEVICE_TYPE.
1473 ///< Bit 7 - 1 : device enabled, 0 : device disabled.
1474 SMBIOS_TABLE_STRING DescriptionString;
1475 } DEVICE_STRUCT;
1476
1477 ///
1478 /// On Board Devices Information (Type 10, obsolete).
1479 ///
1480 /// Note: This structure is obsolete starting with version 2.6 specification; the Onboard Devices Extended
1481 /// Information (Type 41) structure should be used instead . BIOS providers can choose to implement both
1482 /// types to allow existing SMBIOS browsers to properly display the system's onboard devices information.
1483 /// The information in this structure defines the attributes of devices that are onboard (soldered onto)
1484 /// a system element, usually the baseboard. In general, an entry in this table implies that the BIOS
1485 /// has some level of control over the enabling of the associated device for use by the system.
1486 ///
1487 typedef struct {
1488 SMBIOS_STRUCTURE Hdr;
1489 DEVICE_STRUCT Device[1];
1490 } SMBIOS_TABLE_TYPE10;
1491
1492 ///
1493 /// OEM Strings (Type 11).
1494 /// This structure contains free form strings defined by the OEM. Examples of this are:
1495 /// Part Numbers for Reference Documents for the system, contact information for the manufacturer, etc.
1496 ///
1497 typedef struct {
1498 SMBIOS_STRUCTURE Hdr;
1499 UINT8 StringCount;
1500 } SMBIOS_TABLE_TYPE11;
1501
1502 ///
1503 /// System Configuration Options (Type 12).
1504 ///
1505 /// This structure contains information required to configure the base board's Jumpers and Switches.
1506 ///
1507 typedef struct {
1508 SMBIOS_STRUCTURE Hdr;
1509 UINT8 StringCount;
1510 } SMBIOS_TABLE_TYPE12;
1511
1512
1513 ///
1514 /// BIOS Language Information (Type 13).
1515 ///
1516 /// The information in this structure defines the installable language attributes of the BIOS.
1517 ///
1518 typedef struct {
1519 SMBIOS_STRUCTURE Hdr;
1520 UINT8 InstallableLanguages;
1521 UINT8 Flags;
1522 UINT8 Reserved[15];
1523 SMBIOS_TABLE_STRING CurrentLanguages;
1524 } SMBIOS_TABLE_TYPE13;
1525
1526 ///
1527 /// Group Item Entry
1528 ///
1529 typedef struct {
1530 UINT8 ItemType;
1531 UINT16 ItemHandle;
1532 } GROUP_STRUCT;
1533
1534 ///
1535 /// Group Associations (Type 14).
1536 ///
1537 /// The Group Associations structure is provided for OEMs who want to specify
1538 /// the arrangement or hierarchy of certain components (including other Group Associations)
1539 /// within the system.
1540 ///
1541 typedef struct {
1542 SMBIOS_STRUCTURE Hdr;
1543 SMBIOS_TABLE_STRING GroupName;
1544 GROUP_STRUCT Group[1];
1545 } SMBIOS_TABLE_TYPE14;
1546
1547 ///
1548 /// System Event Log - Event Log Types.
1549 ///
1550 typedef enum {
1551 EventLogTypeReserved = 0x00,
1552 EventLogTypeSingleBitECC = 0x01,
1553 EventLogTypeMultiBitECC = 0x02,
1554 EventLogTypeParityMemErr = 0x03,
1555 EventLogTypeBusTimeOut = 0x04,
1556 EventLogTypeIOChannelCheck = 0x05,
1557 EventLogTypeSoftwareNMI = 0x06,
1558 EventLogTypePOSTMemResize = 0x07,
1559 EventLogTypePOSTErr = 0x08,
1560 EventLogTypePCIParityErr = 0x09,
1561 EventLogTypePCISystemErr = 0x0A,
1562 EventLogTypeCPUFailure = 0x0B,
1563 EventLogTypeEISATimeOut = 0x0C,
1564 EventLogTypeMemLogDisabled = 0x0D,
1565 EventLogTypeLoggingDisabled = 0x0E,
1566 EventLogTypeSysLimitExce = 0x10,
1567 EventLogTypeAsyncHWTimer = 0x11,
1568 EventLogTypeSysConfigInfo = 0x12,
1569 EventLogTypeHDInfo = 0x13,
1570 EventLogTypeSysReconfig = 0x14,
1571 EventLogTypeUncorrectCPUErr = 0x15,
1572 EventLogTypeAreaResetAndClr = 0x16,
1573 EventLogTypeSystemBoot = 0x17,
1574 EventLogTypeUnused = 0x18, ///< 0x18 - 0x7F
1575 EventLogTypeAvailForSys = 0x80, ///< 0x80 - 0xFE
1576 EventLogTypeEndOfLog = 0xFF
1577 } EVENT_LOG_TYPE_DATA;
1578
1579 ///
1580 /// System Event Log - Variable Data Format Types.
1581 ///
1582 typedef enum {
1583 EventLogVariableNone = 0x00,
1584 EventLogVariableHandle = 0x01,
1585 EventLogVariableMutilEvent = 0x02,
1586 EventLogVariableMutilEventHandle = 0x03,
1587 EventLogVariablePOSTResultBitmap = 0x04,
1588 EventLogVariableSysManagementType = 0x05,
1589 EventLogVariableMutliEventSysManagmentType = 0x06,
1590 EventLogVariableUnused = 0x07,
1591 EventLogVariableOEMAssigned = 0x80
1592 } EVENT_LOG_VARIABLE_DATA;
1593
1594 ///
1595 /// Event Log Type Descriptors
1596 ///
1597 typedef struct {
1598 UINT8 LogType; ///< The enumeration value from EVENT_LOG_TYPE_DATA.
1599 UINT8 DataFormatType;
1600 } EVENT_LOG_TYPE;
1601
1602 ///
1603 /// System Event Log (Type 15).
1604 ///
1605 /// The presence of this structure within the SMBIOS data returned for a system indicates
1606 /// that the system supports an event log. An event log is a fixed-length area within a
1607 /// non-volatile storage element, starting with a fixed-length (and vendor-specific) header
1608 /// record, followed by one or more variable-length log records.
1609 ///
1610 typedef struct {
1611 SMBIOS_STRUCTURE Hdr;
1612 UINT16 LogAreaLength;
1613 UINT16 LogHeaderStartOffset;
1614 UINT16 LogDataStartOffset;
1615 UINT8 AccessMethod;
1616 UINT8 LogStatus;
1617 UINT32 LogChangeToken;
1618 UINT32 AccessMethodAddress;
1619 UINT8 LogHeaderFormat;
1620 UINT8 NumberOfSupportedLogTypeDescriptors;
1621 UINT8 LengthOfLogTypeDescriptor;
1622 EVENT_LOG_TYPE EventLogTypeDescriptors[1];
1623 } SMBIOS_TABLE_TYPE15;
1624
1625 ///
1626 /// Physical Memory Array - Location.
1627 ///
1628 typedef enum {
1629 MemoryArrayLocationOther = 0x01,
1630 MemoryArrayLocationUnknown = 0x02,
1631 MemoryArrayLocationSystemBoard = 0x03,
1632 MemoryArrayLocationIsaAddonCard = 0x04,
1633 MemoryArrayLocationEisaAddonCard = 0x05,
1634 MemoryArrayLocationPciAddonCard = 0x06,
1635 MemoryArrayLocationMcaAddonCard = 0x07,
1636 MemoryArrayLocationPcmciaAddonCard = 0x08,
1637 MemoryArrayLocationProprietaryAddonCard = 0x09,
1638 MemoryArrayLocationNuBus = 0x0A,
1639 MemoryArrayLocationPc98C20AddonCard = 0xA0,
1640 MemoryArrayLocationPc98C24AddonCard = 0xA1,
1641 MemoryArrayLocationPc98EAddonCard = 0xA2,
1642 MemoryArrayLocationPc98LocalBusAddonCard = 0xA3,
1643 MemoryArrayLocationCXLAddonCard = 0xA4
1644 } MEMORY_ARRAY_LOCATION;
1645
1646 ///
1647 /// Physical Memory Array - Use.
1648 ///
1649 typedef enum {
1650 MemoryArrayUseOther = 0x01,
1651 MemoryArrayUseUnknown = 0x02,
1652 MemoryArrayUseSystemMemory = 0x03,
1653 MemoryArrayUseVideoMemory = 0x04,
1654 MemoryArrayUseFlashMemory = 0x05,
1655 MemoryArrayUseNonVolatileRam = 0x06,
1656 MemoryArrayUseCacheMemory = 0x07
1657 } MEMORY_ARRAY_USE;
1658
1659 ///
1660 /// Physical Memory Array - Error Correction Types.
1661 ///
1662 typedef enum {
1663 MemoryErrorCorrectionOther = 0x01,
1664 MemoryErrorCorrectionUnknown = 0x02,
1665 MemoryErrorCorrectionNone = 0x03,
1666 MemoryErrorCorrectionParity = 0x04,
1667 MemoryErrorCorrectionSingleBitEcc = 0x05,
1668 MemoryErrorCorrectionMultiBitEcc = 0x06,
1669 MemoryErrorCorrectionCrc = 0x07
1670 } MEMORY_ERROR_CORRECTION;
1671
1672 ///
1673 /// Physical Memory Array (Type 16).
1674 ///
1675 /// This structure describes a collection of memory devices that operate
1676 /// together to form a memory address space.
1677 ///
1678 typedef struct {
1679 SMBIOS_STRUCTURE Hdr;
1680 UINT8 Location; ///< The enumeration value from MEMORY_ARRAY_LOCATION.
1681 UINT8 Use; ///< The enumeration value from MEMORY_ARRAY_USE.
1682 UINT8 MemoryErrorCorrection; ///< The enumeration value from MEMORY_ERROR_CORRECTION.
1683 UINT32 MaximumCapacity;
1684 UINT16 MemoryErrorInformationHandle;
1685 UINT16 NumberOfMemoryDevices;
1686 //
1687 // Add for smbios 2.7
1688 //
1689 UINT64 ExtendedMaximumCapacity;
1690 } SMBIOS_TABLE_TYPE16;
1691
1692 ///
1693 /// Memory Device - Form Factor.
1694 ///
1695 typedef enum {
1696 MemoryFormFactorOther = 0x01,
1697 MemoryFormFactorUnknown = 0x02,
1698 MemoryFormFactorSimm = 0x03,
1699 MemoryFormFactorSip = 0x04,
1700 MemoryFormFactorChip = 0x05,
1701 MemoryFormFactorDip = 0x06,
1702 MemoryFormFactorZip = 0x07,
1703 MemoryFormFactorProprietaryCard = 0x08,
1704 MemoryFormFactorDimm = 0x09,
1705 MemoryFormFactorTsop = 0x0A,
1706 MemoryFormFactorRowOfChips = 0x0B,
1707 MemoryFormFactorRimm = 0x0C,
1708 MemoryFormFactorSodimm = 0x0D,
1709 MemoryFormFactorSrimm = 0x0E,
1710 MemoryFormFactorFbDimm = 0x0F,
1711 MemoryFormFactorDie = 0x10
1712 } MEMORY_FORM_FACTOR;
1713
1714 ///
1715 /// Memory Device - Type
1716 ///
1717 typedef enum {
1718 MemoryTypeOther = 0x01,
1719 MemoryTypeUnknown = 0x02,
1720 MemoryTypeDram = 0x03,
1721 MemoryTypeEdram = 0x04,
1722 MemoryTypeVram = 0x05,
1723 MemoryTypeSram = 0x06,
1724 MemoryTypeRam = 0x07,
1725 MemoryTypeRom = 0x08,
1726 MemoryTypeFlash = 0x09,
1727 MemoryTypeEeprom = 0x0A,
1728 MemoryTypeFeprom = 0x0B,
1729 MemoryTypeEprom = 0x0C,
1730 MemoryTypeCdram = 0x0D,
1731 MemoryType3Dram = 0x0E,
1732 MemoryTypeSdram = 0x0F,
1733 MemoryTypeSgram = 0x10,
1734 MemoryTypeRdram = 0x11,
1735 MemoryTypeDdr = 0x12,
1736 MemoryTypeDdr2 = 0x13,
1737 MemoryTypeDdr2FbDimm = 0x14,
1738 MemoryTypeDdr3 = 0x18,
1739 MemoryTypeFbd2 = 0x19,
1740 MemoryTypeDdr4 = 0x1A,
1741 MemoryTypeLpddr = 0x1B,
1742 MemoryTypeLpddr2 = 0x1C,
1743 MemoryTypeLpddr3 = 0x1D,
1744 MemoryTypeLpddr4 = 0x1E,
1745 MemoryTypeLogicalNonVolatileDevice = 0x1F,
1746 MemoryTypeHBM = 0x20,
1747 MemoryTypeHBM2 = 0x21,
1748 MemoryTypeDdr5 = 0x22,
1749 MemoryTypeLpddr5 = 0x23
1750 } MEMORY_DEVICE_TYPE;
1751
1752 ///
1753 /// Memory Device - Type Detail
1754 ///
1755 typedef struct {
1756 UINT16 Reserved :1;
1757 UINT16 Other :1;
1758 UINT16 Unknown :1;
1759 UINT16 FastPaged :1;
1760 UINT16 StaticColumn :1;
1761 UINT16 PseudoStatic :1;
1762 UINT16 Rambus :1;
1763 UINT16 Synchronous :1;
1764 UINT16 Cmos :1;
1765 UINT16 Edo :1;
1766 UINT16 WindowDram :1;
1767 UINT16 CacheDram :1;
1768 UINT16 Nonvolatile :1;
1769 UINT16 Registered :1;
1770 UINT16 Unbuffered :1;
1771 UINT16 LrDimm :1;
1772 } MEMORY_DEVICE_TYPE_DETAIL;
1773
1774 ///
1775 /// Memory Device - Memory Technology
1776 ///
1777 typedef enum {
1778 MemoryTechnologyOther = 0x01,
1779 MemoryTechnologyUnknown = 0x02,
1780 MemoryTechnologyDram = 0x03,
1781 MemoryTechnologyNvdimmN = 0x04,
1782 MemoryTechnologyNvdimmF = 0x05,
1783 MemoryTechnologyNvdimmP = 0x06,
1784 //
1785 // This definition is updated to represent Intel
1786 // Optane DC Persistent Memory in SMBIOS spec 3.4.0
1787 //
1788 MemoryTechnologyIntelOptanePersistentMemory = 0x07
1789
1790 } MEMORY_DEVICE_TECHNOLOGY;
1791
1792 ///
1793 /// Memory Device - Memory Operating Mode Capability
1794 ///
1795 typedef union {
1796 ///
1797 /// Individual bit fields
1798 ///
1799 struct {
1800 UINT16 Reserved :1; ///< Set to 0.
1801 UINT16 Other :1;
1802 UINT16 Unknown :1;
1803 UINT16 VolatileMemory :1;
1804 UINT16 ByteAccessiblePersistentMemory :1;
1805 UINT16 BlockAccessiblePersistentMemory :1;
1806 UINT16 Reserved2 :10; ///< Set to 0.
1807 } Bits;
1808 ///
1809 /// All bit fields as a 16-bit value
1810 ///
1811 UINT16 Uint16;
1812 } MEMORY_DEVICE_OPERATING_MODE_CAPABILITY;
1813
1814 ///
1815 /// Memory Device (Type 17).
1816 ///
1817 /// This structure describes a single memory device that is part of
1818 /// a larger Physical Memory Array (Type 16).
1819 /// Note: If a system includes memory-device sockets, the SMBIOS implementation
1820 /// includes a Memory Device structure instance for each slot, whether or not the
1821 /// socket is currently populated.
1822 ///
1823 typedef struct {
1824 SMBIOS_STRUCTURE Hdr;
1825 UINT16 MemoryArrayHandle;
1826 UINT16 MemoryErrorInformationHandle;
1827 UINT16 TotalWidth;
1828 UINT16 DataWidth;
1829 UINT16 Size;
1830 UINT8 FormFactor; ///< The enumeration value from MEMORY_FORM_FACTOR.
1831 UINT8 DeviceSet;
1832 SMBIOS_TABLE_STRING DeviceLocator;
1833 SMBIOS_TABLE_STRING BankLocator;
1834 UINT8 MemoryType; ///< The enumeration value from MEMORY_DEVICE_TYPE.
1835 MEMORY_DEVICE_TYPE_DETAIL TypeDetail;
1836 UINT16 Speed;
1837 SMBIOS_TABLE_STRING Manufacturer;
1838 SMBIOS_TABLE_STRING SerialNumber;
1839 SMBIOS_TABLE_STRING AssetTag;
1840 SMBIOS_TABLE_STRING PartNumber;
1841 //
1842 // Add for smbios 2.6
1843 //
1844 UINT8 Attributes;
1845 //
1846 // Add for smbios 2.7
1847 //
1848 UINT32 ExtendedSize;
1849 //
1850 // Keep using name "ConfiguredMemoryClockSpeed" for compatibility
1851 // although this field is renamed from "Configured Memory Clock Speed"
1852 // to "Configured Memory Speed" in smbios 3.2.0.
1853 //
1854 UINT16 ConfiguredMemoryClockSpeed;
1855 //
1856 // Add for smbios 2.8.0
1857 //
1858 UINT16 MinimumVoltage;
1859 UINT16 MaximumVoltage;
1860 UINT16 ConfiguredVoltage;
1861 //
1862 // Add for smbios 3.2.0
1863 //
1864 UINT8 MemoryTechnology; ///< The enumeration value from MEMORY_DEVICE_TECHNOLOGY
1865 MEMORY_DEVICE_OPERATING_MODE_CAPABILITY MemoryOperatingModeCapability;
1866 SMBIOS_TABLE_STRING FirmwareVersion;
1867 UINT16 ModuleManufacturerID;
1868 UINT16 ModuleProductID;
1869 UINT16 MemorySubsystemControllerManufacturerID;
1870 UINT16 MemorySubsystemControllerProductID;
1871 UINT64 NonVolatileSize;
1872 UINT64 VolatileSize;
1873 UINT64 CacheSize;
1874 UINT64 LogicalSize;
1875 //
1876 // Add for smbios 3.3.0
1877 //
1878 UINT32 ExtendedSpeed;
1879 UINT32 ExtendedConfiguredMemorySpeed;
1880 } SMBIOS_TABLE_TYPE17;
1881
1882 ///
1883 /// 32-bit Memory Error Information - Error Type.
1884 ///
1885 typedef enum {
1886 MemoryErrorOther = 0x01,
1887 MemoryErrorUnknown = 0x02,
1888 MemoryErrorOk = 0x03,
1889 MemoryErrorBadRead = 0x04,
1890 MemoryErrorParity = 0x05,
1891 MemoryErrorSigleBit = 0x06,
1892 MemoryErrorDoubleBit = 0x07,
1893 MemoryErrorMultiBit = 0x08,
1894 MemoryErrorNibble = 0x09,
1895 MemoryErrorChecksum = 0x0A,
1896 MemoryErrorCrc = 0x0B,
1897 MemoryErrorCorrectSingleBit = 0x0C,
1898 MemoryErrorCorrected = 0x0D,
1899 MemoryErrorUnCorrectable = 0x0E
1900 } MEMORY_ERROR_TYPE;
1901
1902 ///
1903 /// 32-bit Memory Error Information - Error Granularity.
1904 ///
1905 typedef enum {
1906 MemoryGranularityOther = 0x01,
1907 MemoryGranularityOtherUnknown = 0x02,
1908 MemoryGranularityDeviceLevel = 0x03,
1909 MemoryGranularityMemPartitionLevel = 0x04
1910 } MEMORY_ERROR_GRANULARITY;
1911
1912 ///
1913 /// 32-bit Memory Error Information - Error Operation.
1914 ///
1915 typedef enum {
1916 MemoryErrorOperationOther = 0x01,
1917 MemoryErrorOperationUnknown = 0x02,
1918 MemoryErrorOperationRead = 0x03,
1919 MemoryErrorOperationWrite = 0x04,
1920 MemoryErrorOperationPartialWrite = 0x05
1921 } MEMORY_ERROR_OPERATION;
1922
1923 ///
1924 /// 32-bit Memory Error Information (Type 18).
1925 ///
1926 /// This structure identifies the specifics of an error that might be detected
1927 /// within a Physical Memory Array.
1928 ///
1929 typedef struct {
1930 SMBIOS_STRUCTURE Hdr;
1931 UINT8 ErrorType; ///< The enumeration value from MEMORY_ERROR_TYPE.
1932 UINT8 ErrorGranularity; ///< The enumeration value from MEMORY_ERROR_GRANULARITY.
1933 UINT8 ErrorOperation; ///< The enumeration value from MEMORY_ERROR_OPERATION.
1934 UINT32 VendorSyndrome;
1935 UINT32 MemoryArrayErrorAddress;
1936 UINT32 DeviceErrorAddress;
1937 UINT32 ErrorResolution;
1938 } SMBIOS_TABLE_TYPE18;
1939
1940 ///
1941 /// Memory Array Mapped Address (Type 19).
1942 ///
1943 /// This structure provides the address mapping for a Physical Memory Array.
1944 /// One structure is present for each contiguous address range described.
1945 ///
1946 typedef struct {
1947 SMBIOS_STRUCTURE Hdr;
1948 UINT32 StartingAddress;
1949 UINT32 EndingAddress;
1950 UINT16 MemoryArrayHandle;
1951 UINT8 PartitionWidth;
1952 //
1953 // Add for smbios 2.7
1954 //
1955 UINT64 ExtendedStartingAddress;
1956 UINT64 ExtendedEndingAddress;
1957 } SMBIOS_TABLE_TYPE19;
1958
1959 ///
1960 /// Memory Device Mapped Address (Type 20).
1961 ///
1962 /// This structure maps memory address space usually to a device-level granularity.
1963 /// One structure is present for each contiguous address range described.
1964 ///
1965 typedef struct {
1966 SMBIOS_STRUCTURE Hdr;
1967 UINT32 StartingAddress;
1968 UINT32 EndingAddress;
1969 UINT16 MemoryDeviceHandle;
1970 UINT16 MemoryArrayMappedAddressHandle;
1971 UINT8 PartitionRowPosition;
1972 UINT8 InterleavePosition;
1973 UINT8 InterleavedDataDepth;
1974 //
1975 // Add for smbios 2.7
1976 //
1977 UINT64 ExtendedStartingAddress;
1978 UINT64 ExtendedEndingAddress;
1979 } SMBIOS_TABLE_TYPE20;
1980
1981 ///
1982 /// Built-in Pointing Device - Type
1983 ///
1984 typedef enum {
1985 PointingDeviceTypeOther = 0x01,
1986 PointingDeviceTypeUnknown = 0x02,
1987 PointingDeviceTypeMouse = 0x03,
1988 PointingDeviceTypeTrackBall = 0x04,
1989 PointingDeviceTypeTrackPoint = 0x05,
1990 PointingDeviceTypeGlidePoint = 0x06,
1991 PointingDeviceTouchPad = 0x07,
1992 PointingDeviceTouchScreen = 0x08,
1993 PointingDeviceOpticalSensor = 0x09
1994 } BUILTIN_POINTING_DEVICE_TYPE;
1995
1996 ///
1997 /// Built-in Pointing Device - Interface.
1998 ///
1999 typedef enum {
2000 PointingDeviceInterfaceOther = 0x01,
2001 PointingDeviceInterfaceUnknown = 0x02,
2002 PointingDeviceInterfaceSerial = 0x03,
2003 PointingDeviceInterfacePs2 = 0x04,
2004 PointingDeviceInterfaceInfrared = 0x05,
2005 PointingDeviceInterfaceHpHil = 0x06,
2006 PointingDeviceInterfaceBusMouse = 0x07,
2007 PointingDeviceInterfaceADB = 0x08,
2008 PointingDeviceInterfaceBusMouseDB9 = 0xA0,
2009 PointingDeviceInterfaceBusMouseMicroDin = 0xA1,
2010 PointingDeviceInterfaceUsb = 0xA2
2011 } BUILTIN_POINTING_DEVICE_INTERFACE;
2012
2013 ///
2014 /// Built-in Pointing Device (Type 21).
2015 ///
2016 /// This structure describes the attributes of the built-in pointing device for the
2017 /// system. The presence of this structure does not imply that the built-in
2018 /// pointing device is active for the system's use!
2019 ///
2020 typedef struct {
2021 SMBIOS_STRUCTURE Hdr;
2022 UINT8 Type; ///< The enumeration value from BUILTIN_POINTING_DEVICE_TYPE.
2023 UINT8 Interface; ///< The enumeration value from BUILTIN_POINTING_DEVICE_INTERFACE.
2024 UINT8 NumberOfButtons;
2025 } SMBIOS_TABLE_TYPE21;
2026
2027 ///
2028 /// Portable Battery - Device Chemistry
2029 ///
2030 typedef enum {
2031 PortableBatteryDeviceChemistryOther = 0x01,
2032 PortableBatteryDeviceChemistryUnknown = 0x02,
2033 PortableBatteryDeviceChemistryLeadAcid = 0x03,
2034 PortableBatteryDeviceChemistryNickelCadmium = 0x04,
2035 PortableBatteryDeviceChemistryNickelMetalHydride = 0x05,
2036 PortableBatteryDeviceChemistryLithiumIon = 0x06,
2037 PortableBatteryDeviceChemistryZincAir = 0x07,
2038 PortableBatteryDeviceChemistryLithiumPolymer = 0x08
2039 } PORTABLE_BATTERY_DEVICE_CHEMISTRY;
2040
2041 ///
2042 /// Portable Battery (Type 22).
2043 ///
2044 /// This structure describes the attributes of the portable battery(s) for the system.
2045 /// The structure contains the static attributes for the group. Each structure describes
2046 /// a single battery pack's attributes.
2047 ///
2048 typedef struct {
2049 SMBIOS_STRUCTURE Hdr;
2050 SMBIOS_TABLE_STRING Location;
2051 SMBIOS_TABLE_STRING Manufacturer;
2052 SMBIOS_TABLE_STRING ManufactureDate;
2053 SMBIOS_TABLE_STRING SerialNumber;
2054 SMBIOS_TABLE_STRING DeviceName;
2055 UINT8 DeviceChemistry; ///< The enumeration value from PORTABLE_BATTERY_DEVICE_CHEMISTRY.
2056 UINT16 DeviceCapacity;
2057 UINT16 DesignVoltage;
2058 SMBIOS_TABLE_STRING SBDSVersionNumber;
2059 UINT8 MaximumErrorInBatteryData;
2060 UINT16 SBDSSerialNumber;
2061 UINT16 SBDSManufactureDate;
2062 SMBIOS_TABLE_STRING SBDSDeviceChemistry;
2063 UINT8 DesignCapacityMultiplier;
2064 UINT32 OEMSpecific;
2065 } SMBIOS_TABLE_TYPE22;
2066
2067 ///
2068 /// System Reset (Type 23)
2069 ///
2070 /// This structure describes whether Automatic System Reset functions enabled (Status).
2071 /// If the system has a watchdog Timer and the timer is not reset (Timer Reset)
2072 /// before the Interval elapses, an automatic system reset will occur. The system will re-boot
2073 /// according to the Boot Option. This function may repeat until the Limit is reached, at which time
2074 /// the system will re-boot according to the Boot Option at Limit.
2075 ///
2076 typedef struct {
2077 SMBIOS_STRUCTURE Hdr;
2078 UINT8 Capabilities;
2079 UINT16 ResetCount;
2080 UINT16 ResetLimit;
2081 UINT16 TimerInterval;
2082 UINT16 Timeout;
2083 } SMBIOS_TABLE_TYPE23;
2084
2085 ///
2086 /// Hardware Security (Type 24).
2087 ///
2088 /// This structure describes the system-wide hardware security settings.
2089 ///
2090 typedef struct {
2091 SMBIOS_STRUCTURE Hdr;
2092 UINT8 HardwareSecuritySettings;
2093 } SMBIOS_TABLE_TYPE24;
2094
2095 ///
2096 /// System Power Controls (Type 25).
2097 ///
2098 /// This structure describes the attributes for controlling the main power supply to the system.
2099 /// Software that interprets this structure uses the month, day, hour, minute, and second values
2100 /// to determine the number of seconds until the next power-on of the system. The presence of
2101 /// this structure implies that a timed power-on facility is available for the system.
2102 ///
2103 typedef struct {
2104 SMBIOS_STRUCTURE Hdr;
2105 UINT8 NextScheduledPowerOnMonth;
2106 UINT8 NextScheduledPowerOnDayOfMonth;
2107 UINT8 NextScheduledPowerOnHour;
2108 UINT8 NextScheduledPowerOnMinute;
2109 UINT8 NextScheduledPowerOnSecond;
2110 } SMBIOS_TABLE_TYPE25;
2111
2112 ///
2113 /// Voltage Probe - Location and Status.
2114 ///
2115 typedef struct {
2116 UINT8 VoltageProbeSite :5;
2117 UINT8 VoltageProbeStatus :3;
2118 } MISC_VOLTAGE_PROBE_LOCATION;
2119
2120 ///
2121 /// Voltage Probe (Type 26)
2122 ///
2123 /// This describes the attributes for a voltage probe in the system.
2124 /// Each structure describes a single voltage probe.
2125 ///
2126 typedef struct {
2127 SMBIOS_STRUCTURE Hdr;
2128 SMBIOS_TABLE_STRING Description;
2129 MISC_VOLTAGE_PROBE_LOCATION LocationAndStatus;
2130 UINT16 MaximumValue;
2131 UINT16 MinimumValue;
2132 UINT16 Resolution;
2133 UINT16 Tolerance;
2134 UINT16 Accuracy;
2135 UINT32 OEMDefined;
2136 UINT16 NominalValue;
2137 } SMBIOS_TABLE_TYPE26;
2138
2139 ///
2140 /// Cooling Device - Device Type and Status.
2141 ///
2142 typedef struct {
2143 UINT8 CoolingDevice :5;
2144 UINT8 CoolingDeviceStatus :3;
2145 } MISC_COOLING_DEVICE_TYPE;
2146
2147 ///
2148 /// Cooling Device (Type 27)
2149 ///
2150 /// This structure describes the attributes for a cooling device in the system.
2151 /// Each structure describes a single cooling device.
2152 ///
2153 typedef struct {
2154 SMBIOS_STRUCTURE Hdr;
2155 UINT16 TemperatureProbeHandle;
2156 MISC_COOLING_DEVICE_TYPE DeviceTypeAndStatus;
2157 UINT8 CoolingUnitGroup;
2158 UINT32 OEMDefined;
2159 UINT16 NominalSpeed;
2160 //
2161 // Add for smbios 2.7
2162 //
2163 SMBIOS_TABLE_STRING Description;
2164 } SMBIOS_TABLE_TYPE27;
2165
2166 ///
2167 /// Temperature Probe - Location and Status.
2168 ///
2169 typedef struct {
2170 UINT8 TemperatureProbeSite :5;
2171 UINT8 TemperatureProbeStatus :3;
2172 } MISC_TEMPERATURE_PROBE_LOCATION;
2173
2174 ///
2175 /// Temperature Probe (Type 28).
2176 ///
2177 /// This structure describes the attributes for a temperature probe in the system.
2178 /// Each structure describes a single temperature probe.
2179 ///
2180 typedef struct {
2181 SMBIOS_STRUCTURE Hdr;
2182 SMBIOS_TABLE_STRING Description;
2183 MISC_TEMPERATURE_PROBE_LOCATION LocationAndStatus;
2184 UINT16 MaximumValue;
2185 UINT16 MinimumValue;
2186 UINT16 Resolution;
2187 UINT16 Tolerance;
2188 UINT16 Accuracy;
2189 UINT32 OEMDefined;
2190 UINT16 NominalValue;
2191 } SMBIOS_TABLE_TYPE28;
2192
2193 ///
2194 /// Electrical Current Probe - Location and Status.
2195 ///
2196 typedef struct {
2197 UINT8 ElectricalCurrentProbeSite :5;
2198 UINT8 ElectricalCurrentProbeStatus :3;
2199 } MISC_ELECTRICAL_CURRENT_PROBE_LOCATION;
2200
2201 ///
2202 /// Electrical Current Probe (Type 29).
2203 ///
2204 /// This structure describes the attributes for an electrical current probe in the system.
2205 /// Each structure describes a single electrical current probe.
2206 ///
2207 typedef struct {
2208 SMBIOS_STRUCTURE Hdr;
2209 SMBIOS_TABLE_STRING Description;
2210 MISC_ELECTRICAL_CURRENT_PROBE_LOCATION LocationAndStatus;
2211 UINT16 MaximumValue;
2212 UINT16 MinimumValue;
2213 UINT16 Resolution;
2214 UINT16 Tolerance;
2215 UINT16 Accuracy;
2216 UINT32 OEMDefined;
2217 UINT16 NominalValue;
2218 } SMBIOS_TABLE_TYPE29;
2219
2220 ///
2221 /// Out-of-Band Remote Access (Type 30).
2222 ///
2223 /// This structure describes the attributes and policy settings of a hardware facility
2224 /// that may be used to gain remote access to a hardware system when the operating system
2225 /// is not available due to power-down status, hardware failures, or boot failures.
2226 ///
2227 typedef struct {
2228 SMBIOS_STRUCTURE Hdr;
2229 SMBIOS_TABLE_STRING ManufacturerName;
2230 UINT8 Connections;
2231 } SMBIOS_TABLE_TYPE30;
2232
2233 ///
2234 /// Boot Integrity Services (BIS) Entry Point (Type 31).
2235 ///
2236 /// Structure type 31 (decimal) is reserved for use by the Boot Integrity Services (BIS).
2237 ///
2238 typedef struct {
2239 SMBIOS_STRUCTURE Hdr;
2240 UINT8 Checksum;
2241 UINT8 Reserved1;
2242 UINT16 Reserved2;
2243 UINT32 BisEntry16;
2244 UINT32 BisEntry32;
2245 UINT64 Reserved3;
2246 UINT32 Reserved4;
2247 } SMBIOS_TABLE_TYPE31;
2248
2249 ///
2250 /// System Boot Information - System Boot Status.
2251 ///
2252 typedef enum {
2253 BootInformationStatusNoError = 0x00,
2254 BootInformationStatusNoBootableMedia = 0x01,
2255 BootInformationStatusNormalOSFailedLoading = 0x02,
2256 BootInformationStatusFirmwareDetectedFailure = 0x03,
2257 BootInformationStatusOSDetectedFailure = 0x04,
2258 BootInformationStatusUserRequestedBoot = 0x05,
2259 BootInformationStatusSystemSecurityViolation = 0x06,
2260 BootInformationStatusPreviousRequestedImage = 0x07,
2261 BootInformationStatusWatchdogTimerExpired = 0x08,
2262 BootInformationStatusStartReserved = 0x09,
2263 BootInformationStatusStartOemSpecific = 0x80,
2264 BootInformationStatusStartProductSpecific = 0xC0
2265 } MISC_BOOT_INFORMATION_STATUS_DATA_TYPE;
2266
2267 ///
2268 /// System Boot Information (Type 32).
2269 ///
2270 /// The client system firmware, e.g. BIOS, communicates the System Boot Status to the
2271 /// client's Pre-boot Execution Environment (PXE) boot image or OS-present management
2272 /// application via this structure. When used in the PXE environment, for example,
2273 /// this code identifies the reason the PXE was initiated and can be used by boot-image
2274 /// software to further automate an enterprise's PXE sessions. For example, an enterprise
2275 /// could choose to automatically download a hardware-diagnostic image to a client whose
2276 /// reason code indicated either a firmware- or operating system-detected hardware failure.
2277 ///
2278 typedef struct {
2279 SMBIOS_STRUCTURE Hdr;
2280 UINT8 Reserved[6];
2281 UINT8 BootStatus; ///< The enumeration value from MISC_BOOT_INFORMATION_STATUS_DATA_TYPE.
2282 } SMBIOS_TABLE_TYPE32;
2283
2284 ///
2285 /// 64-bit Memory Error Information (Type 33).
2286 ///
2287 /// This structure describes an error within a Physical Memory Array,
2288 /// when the error address is above 4G (0xFFFFFFFF).
2289 ///
2290 typedef struct {
2291 SMBIOS_STRUCTURE Hdr;
2292 UINT8 ErrorType; ///< The enumeration value from MEMORY_ERROR_TYPE.
2293 UINT8 ErrorGranularity; ///< The enumeration value from MEMORY_ERROR_GRANULARITY.
2294 UINT8 ErrorOperation; ///< The enumeration value from MEMORY_ERROR_OPERATION.
2295 UINT32 VendorSyndrome;
2296 UINT64 MemoryArrayErrorAddress;
2297 UINT64 DeviceErrorAddress;
2298 UINT32 ErrorResolution;
2299 } SMBIOS_TABLE_TYPE33;
2300
2301 ///
2302 /// Management Device - Type.
2303 ///
2304 typedef enum {
2305 ManagementDeviceTypeOther = 0x01,
2306 ManagementDeviceTypeUnknown = 0x02,
2307 ManagementDeviceTypeLm75 = 0x03,
2308 ManagementDeviceTypeLm78 = 0x04,
2309 ManagementDeviceTypeLm79 = 0x05,
2310 ManagementDeviceTypeLm80 = 0x06,
2311 ManagementDeviceTypeLm81 = 0x07,
2312 ManagementDeviceTypeAdm9240 = 0x08,
2313 ManagementDeviceTypeDs1780 = 0x09,
2314 ManagementDeviceTypeMaxim1617 = 0x0A,
2315 ManagementDeviceTypeGl518Sm = 0x0B,
2316 ManagementDeviceTypeW83781D = 0x0C,
2317 ManagementDeviceTypeHt82H791 = 0x0D
2318 } MISC_MANAGEMENT_DEVICE_TYPE;
2319
2320 ///
2321 /// Management Device - Address Type.
2322 ///
2323 typedef enum {
2324 ManagementDeviceAddressTypeOther = 0x01,
2325 ManagementDeviceAddressTypeUnknown = 0x02,
2326 ManagementDeviceAddressTypeIOPort = 0x03,
2327 ManagementDeviceAddressTypeMemory = 0x04,
2328 ManagementDeviceAddressTypeSmbus = 0x05
2329 } MISC_MANAGEMENT_DEVICE_ADDRESS_TYPE;
2330
2331 ///
2332 /// Management Device (Type 34).
2333 ///
2334 /// The information in this structure defines the attributes of a Management Device.
2335 /// A Management Device might control one or more fans or voltage, current, or temperature
2336 /// probes as defined by one or more Management Device Component structures.
2337 ///
2338 typedef struct {
2339 SMBIOS_STRUCTURE Hdr;
2340 SMBIOS_TABLE_STRING Description;
2341 UINT8 Type; ///< The enumeration value from MISC_MANAGEMENT_DEVICE_TYPE.
2342 UINT32 Address;
2343 UINT8 AddressType; ///< The enumeration value from MISC_MANAGEMENT_DEVICE_ADDRESS_TYPE.
2344 } SMBIOS_TABLE_TYPE34;
2345
2346 ///
2347 /// Management Device Component (Type 35)
2348 ///
2349 /// This structure associates a cooling device or environmental probe with structures
2350 /// that define the controlling hardware device and (optionally) the component's thresholds.
2351 ///
2352 typedef struct {
2353 SMBIOS_STRUCTURE Hdr;
2354 SMBIOS_TABLE_STRING Description;
2355 UINT16 ManagementDeviceHandle;
2356 UINT16 ComponentHandle;
2357 UINT16 ThresholdHandle;
2358 } SMBIOS_TABLE_TYPE35;
2359
2360 ///
2361 /// Management Device Threshold Data (Type 36).
2362 ///
2363 /// The information in this structure defines threshold information for
2364 /// a component (probe or cooling-unit) contained within a Management Device.
2365 ///
2366 typedef struct {
2367 SMBIOS_STRUCTURE Hdr;
2368 UINT16 LowerThresholdNonCritical;
2369 UINT16 UpperThresholdNonCritical;
2370 UINT16 LowerThresholdCritical;
2371 UINT16 UpperThresholdCritical;
2372 UINT16 LowerThresholdNonRecoverable;
2373 UINT16 UpperThresholdNonRecoverable;
2374 } SMBIOS_TABLE_TYPE36;
2375
2376 ///
2377 /// Memory Channel Entry.
2378 ///
2379 typedef struct {
2380 UINT8 DeviceLoad;
2381 UINT16 DeviceHandle;
2382 } MEMORY_DEVICE;
2383
2384 ///
2385 /// Memory Channel - Channel Type.
2386 ///
2387 typedef enum {
2388 MemoryChannelTypeOther = 0x01,
2389 MemoryChannelTypeUnknown = 0x02,
2390 MemoryChannelTypeRambus = 0x03,
2391 MemoryChannelTypeSyncLink = 0x04
2392 } MEMORY_CHANNEL_TYPE;
2393
2394 ///
2395 /// Memory Channel (Type 37)
2396 ///
2397 /// The information in this structure provides the correlation between a Memory Channel
2398 /// and its associated Memory Devices. Each device presents one or more loads to the channel.
2399 /// The sum of all device loads cannot exceed the channel's defined maximum.
2400 ///
2401 typedef struct {
2402 SMBIOS_STRUCTURE Hdr;
2403 UINT8 ChannelType;
2404 UINT8 MaximumChannelLoad;
2405 UINT8 MemoryDeviceCount;
2406 MEMORY_DEVICE MemoryDevice[1];
2407 } SMBIOS_TABLE_TYPE37;
2408
2409 ///
2410 /// IPMI Device Information - BMC Interface Type
2411 ///
2412 typedef enum {
2413 IPMIDeviceInfoInterfaceTypeUnknown = 0x00,
2414 IPMIDeviceInfoInterfaceTypeKCS = 0x01, ///< The Keyboard Controller Style.
2415 IPMIDeviceInfoInterfaceTypeSMIC = 0x02, ///< The Server Management Interface Chip.
2416 IPMIDeviceInfoInterfaceTypeBT = 0x03, ///< The Block Transfer
2417 IPMIDeviceInfoInterfaceTypeSSIF = 0x04 ///< SMBus System Interface
2418 } BMC_INTERFACE_TYPE;
2419
2420 ///
2421 /// IPMI Device Information (Type 38).
2422 ///
2423 /// The information in this structure defines the attributes of an
2424 /// Intelligent Platform Management Interface (IPMI) Baseboard Management Controller (BMC).
2425 ///
2426 /// The Type 42 structure can also be used to describe a physical management controller
2427 /// host interface and one or more protocols that share that interface. If IPMI is not
2428 /// shared with other protocols, either the Type 38 or Type 42 structures can be used.
2429 /// Providing Type 38 is recommended for backward compatibility.
2430 ///
2431 typedef struct {
2432 SMBIOS_STRUCTURE Hdr;
2433 UINT8 InterfaceType; ///< The enumeration value from BMC_INTERFACE_TYPE.
2434 UINT8 IPMISpecificationRevision;
2435 UINT8 I2CSlaveAddress;
2436 UINT8 NVStorageDeviceAddress;
2437 UINT64 BaseAddress;
2438 UINT8 BaseAddressModifier_InterruptInfo;
2439 UINT8 InterruptNumber;
2440 } SMBIOS_TABLE_TYPE38;
2441
2442 ///
2443 /// System Power Supply - Power Supply Characteristics.
2444 ///
2445 typedef struct {
2446 UINT16 PowerSupplyHotReplaceable:1;
2447 UINT16 PowerSupplyPresent :1;
2448 UINT16 PowerSupplyUnplugged :1;
2449 UINT16 InputVoltageRangeSwitch :4;
2450 UINT16 PowerSupplyStatus :3;
2451 UINT16 PowerSupplyType :4;
2452 UINT16 Reserved :2;
2453 } SYS_POWER_SUPPLY_CHARACTERISTICS;
2454
2455 ///
2456 /// System Power Supply (Type 39).
2457 ///
2458 /// This structure identifies attributes of a system power supply. One instance
2459 /// of this record is present for each possible power supply in a system.
2460 ///
2461 typedef struct {
2462 SMBIOS_STRUCTURE Hdr;
2463 UINT8 PowerUnitGroup;
2464 SMBIOS_TABLE_STRING Location;
2465 SMBIOS_TABLE_STRING DeviceName;
2466 SMBIOS_TABLE_STRING Manufacturer;
2467 SMBIOS_TABLE_STRING SerialNumber;
2468 SMBIOS_TABLE_STRING AssetTagNumber;
2469 SMBIOS_TABLE_STRING ModelPartNumber;
2470 SMBIOS_TABLE_STRING RevisionLevel;
2471 UINT16 MaxPowerCapacity;
2472 SYS_POWER_SUPPLY_CHARACTERISTICS PowerSupplyCharacteristics;
2473 UINT16 InputVoltageProbeHandle;
2474 UINT16 CoolingDeviceHandle;
2475 UINT16 InputCurrentProbeHandle;
2476 } SMBIOS_TABLE_TYPE39;
2477
2478 ///
2479 /// Additional Information Entry Format.
2480 ///
2481 typedef struct {
2482 UINT8 EntryLength;
2483 UINT16 ReferencedHandle;
2484 UINT8 ReferencedOffset;
2485 SMBIOS_TABLE_STRING EntryString;
2486 UINT8 Value[1];
2487 } ADDITIONAL_INFORMATION_ENTRY;
2488
2489 ///
2490 /// Additional Information (Type 40).
2491 ///
2492 /// This structure is intended to provide additional information for handling unspecified
2493 /// enumerated values and interim field updates in another structure.
2494 ///
2495 typedef struct {
2496 SMBIOS_STRUCTURE Hdr;
2497 UINT8 NumberOfAdditionalInformationEntries;
2498 ADDITIONAL_INFORMATION_ENTRY AdditionalInfoEntries[1];
2499 } SMBIOS_TABLE_TYPE40;
2500
2501 ///
2502 /// Onboard Devices Extended Information - Onboard Device Types.
2503 ///
2504 typedef enum{
2505 OnBoardDeviceExtendedTypeOther = 0x01,
2506 OnBoardDeviceExtendedTypeUnknown = 0x02,
2507 OnBoardDeviceExtendedTypeVideo = 0x03,
2508 OnBoardDeviceExtendedTypeScsiController = 0x04,
2509 OnBoardDeviceExtendedTypeEthernet = 0x05,
2510 OnBoardDeviceExtendedTypeTokenRing = 0x06,
2511 OnBoardDeviceExtendedTypeSound = 0x07,
2512 OnBoardDeviceExtendedTypePATAController = 0x08,
2513 OnBoardDeviceExtendedTypeSATAController = 0x09,
2514 OnBoardDeviceExtendedTypeSASController = 0x0A
2515 } ONBOARD_DEVICE_EXTENDED_INFO_TYPE;
2516
2517 ///
2518 /// Onboard Devices Extended Information (Type 41).
2519 ///
2520 /// The information in this structure defines the attributes of devices that
2521 /// are onboard (soldered onto) a system element, usually the baseboard.
2522 /// In general, an entry in this table implies that the BIOS has some level of
2523 /// control over the enabling of the associated device for use by the system.
2524 ///
2525 typedef struct {
2526 SMBIOS_STRUCTURE Hdr;
2527 SMBIOS_TABLE_STRING ReferenceDesignation;
2528 UINT8 DeviceType; ///< The enumeration value from ONBOARD_DEVICE_EXTENDED_INFO_TYPE
2529 UINT8 DeviceTypeInstance;
2530 UINT16 SegmentGroupNum;
2531 UINT8 BusNum;
2532 UINT8 DevFuncNum;
2533 } SMBIOS_TABLE_TYPE41;
2534
2535 ///
2536 /// Management Controller Host Interface - Protocol Record Data Format.
2537 ///
2538 typedef struct {
2539 UINT8 ProtocolType;
2540 UINT8 ProtocolTypeDataLen;
2541 UINT8 ProtocolTypeData[1];
2542 } MC_HOST_INTERFACE_PROTOCOL_RECORD;
2543
2544 ///
2545 /// Management Controller Host Interface - Interface Types.
2546 /// 00h - 3Fh: MCTP Host Interfaces
2547 ///
2548 typedef enum{
2549 MCHostInterfaceTypeNetworkHostInterface = 0x40,
2550 MCHostInterfaceTypeOemDefined = 0xF0
2551 } MC_HOST_INTERFACE_TYPE;
2552
2553 ///
2554 /// Management Controller Host Interface - Protocol Types.
2555 ///
2556 typedef enum{
2557 MCHostInterfaceProtocolTypeIPMI = 0x02,
2558 MCHostInterfaceProtocolTypeMCTP = 0x03,
2559 MCHostInterfaceProtocolTypeRedfishOverIP = 0x04,
2560 MCHostInterfaceProtocolTypeOemDefined = 0xF0
2561 } MC_HOST_INTERFACE_PROTOCOL_TYPE;
2562
2563 ///
2564 /// Management Controller Host Interface (Type 42).
2565 ///
2566 /// The information in this structure defines the attributes of a Management
2567 /// Controller Host Interface that is not discoverable by "Plug and Play" mechanisms.
2568 ///
2569 /// Type 42 should be used for management controller host interfaces that use protocols
2570 /// other than IPMI or that use multiple protocols on a single host interface type.
2571 ///
2572 /// This structure should also be provided if IPMI is shared with other protocols
2573 /// over the same interface hardware. If IPMI is not shared with other protocols,
2574 /// either the Type 38 or Type 42 structures can be used. Providing Type 38 is
2575 /// recommended for backward compatibility. The structures are not required to
2576 /// be mutually exclusive. Type 38 and Type 42 structures may be implemented
2577 /// simultaneously to provide backward compatibility with IPMI applications or drivers
2578 /// that do not yet recognize the Type 42 structure.
2579 ///
2580 typedef struct {
2581 SMBIOS_STRUCTURE Hdr;
2582 UINT8 InterfaceType; ///< The enumeration value from MC_HOST_INTERFACE_TYPE
2583 UINT8 InterfaceTypeSpecificDataLength;
2584 UINT8 InterfaceTypeSpecificData[4]; ///< This field has a minimum of four bytes
2585 } SMBIOS_TABLE_TYPE42;
2586
2587
2588 ///
2589 /// Processor Specific Block - Processor Architecture Type
2590 ///
2591 typedef enum{
2592 ProcessorSpecificBlockArchTypeReserved = 0x00,
2593 ProcessorSpecificBlockArchTypeIa32 = 0x01,
2594 ProcessorSpecificBlockArchTypeX64 = 0x02,
2595 ProcessorSpecificBlockArchTypeItanium = 0x03,
2596 ProcessorSpecificBlockArchTypeAarch32 = 0x04,
2597 ProcessorSpecificBlockArchTypeAarch64 = 0x05,
2598 ProcessorSpecificBlockArchTypeRiscVRV32 = 0x06,
2599 ProcessorSpecificBlockArchTypeRiscVRV64 = 0x07,
2600 ProcessorSpecificBlockArchTypeRiscVRV128 = 0x08
2601 } PROCESSOR_SPECIFIC_BLOCK_ARCH_TYPE;
2602
2603 ///
2604 /// Processor Specific Block is the standard container of processor-specific data.
2605 ///
2606 typedef struct {
2607 UINT8 Length;
2608 UINT8 ProcessorArchType;
2609 ///
2610 /// Below followed by Processor-specific data
2611 ///
2612 ///
2613 } PROCESSOR_SPECIFIC_BLOCK;
2614
2615 ///
2616 /// Processor Additional Information(Type 44).
2617 ///
2618 /// The information in this structure defines the processor additional information in case
2619 /// SMBIOS type 4 is not sufficient to describe processor characteristics.
2620 /// The SMBIOS type 44 structure has a reference handle field to link back to the related
2621 /// SMBIOS type 4 structure. There may be multiple SMBIOS type 44 structures linked to the
2622 /// same SMBIOS type 4 structure. For example, when cores are not identical in a processor,
2623 /// SMBIOS type 44 structures describe different core-specific information.
2624 ///
2625 /// SMBIOS type 44 defines the standard header for the processor-specific block, while the
2626 /// contents of processor-specific data are maintained by processor
2627 /// architecture workgroups or vendors in separate documents.
2628 ///
2629 typedef struct {
2630 SMBIOS_STRUCTURE Hdr;
2631 SMBIOS_HANDLE RefHandle; ///< This field refer to associated SMBIOS type 4
2632 ///
2633 /// Below followed by Processor-specific block
2634 ///
2635 PROCESSOR_SPECIFIC_BLOCK ProcessorSpecificBlock;
2636 } SMBIOS_TABLE_TYPE44;
2637
2638 ///
2639 /// TPM Device (Type 43).
2640 ///
2641 typedef struct {
2642 SMBIOS_STRUCTURE Hdr;
2643 UINT8 VendorID[4];
2644 UINT8 MajorSpecVersion;
2645 UINT8 MinorSpecVersion;
2646 UINT32 FirmwareVersion1;
2647 UINT32 FirmwareVersion2;
2648 SMBIOS_TABLE_STRING Description;
2649 UINT64 Characteristics;
2650 UINT32 OemDefined;
2651 } SMBIOS_TABLE_TYPE43;
2652
2653 ///
2654 /// Inactive (Type 126)
2655 ///
2656 typedef struct {
2657 SMBIOS_STRUCTURE Hdr;
2658 } SMBIOS_TABLE_TYPE126;
2659
2660 ///
2661 /// End-of-Table (Type 127)
2662 ///
2663 typedef struct {
2664 SMBIOS_STRUCTURE Hdr;
2665 } SMBIOS_TABLE_TYPE127;
2666
2667 ///
2668 /// Union of all the possible SMBIOS record types.
2669 ///
2670 typedef union {
2671 SMBIOS_STRUCTURE *Hdr;
2672 SMBIOS_TABLE_TYPE0 *Type0;
2673 SMBIOS_TABLE_TYPE1 *Type1;
2674 SMBIOS_TABLE_TYPE2 *Type2;
2675 SMBIOS_TABLE_TYPE3 *Type3;
2676 SMBIOS_TABLE_TYPE4 *Type4;
2677 SMBIOS_TABLE_TYPE5 *Type5;
2678 SMBIOS_TABLE_TYPE6 *Type6;
2679 SMBIOS_TABLE_TYPE7 *Type7;
2680 SMBIOS_TABLE_TYPE8 *Type8;
2681 SMBIOS_TABLE_TYPE9 *Type9;
2682 SMBIOS_TABLE_TYPE10 *Type10;
2683 SMBIOS_TABLE_TYPE11 *Type11;
2684 SMBIOS_TABLE_TYPE12 *Type12;
2685 SMBIOS_TABLE_TYPE13 *Type13;
2686 SMBIOS_TABLE_TYPE14 *Type14;
2687 SMBIOS_TABLE_TYPE15 *Type15;
2688 SMBIOS_TABLE_TYPE16 *Type16;
2689 SMBIOS_TABLE_TYPE17 *Type17;
2690 SMBIOS_TABLE_TYPE18 *Type18;
2691 SMBIOS_TABLE_TYPE19 *Type19;
2692 SMBIOS_TABLE_TYPE20 *Type20;
2693 SMBIOS_TABLE_TYPE21 *Type21;
2694 SMBIOS_TABLE_TYPE22 *Type22;
2695 SMBIOS_TABLE_TYPE23 *Type23;
2696 SMBIOS_TABLE_TYPE24 *Type24;
2697 SMBIOS_TABLE_TYPE25 *Type25;
2698 SMBIOS_TABLE_TYPE26 *Type26;
2699 SMBIOS_TABLE_TYPE27 *Type27;
2700 SMBIOS_TABLE_TYPE28 *Type28;
2701 SMBIOS_TABLE_TYPE29 *Type29;
2702 SMBIOS_TABLE_TYPE30 *Type30;
2703 SMBIOS_TABLE_TYPE31 *Type31;
2704 SMBIOS_TABLE_TYPE32 *Type32;
2705 SMBIOS_TABLE_TYPE33 *Type33;
2706 SMBIOS_TABLE_TYPE34 *Type34;
2707 SMBIOS_TABLE_TYPE35 *Type35;
2708 SMBIOS_TABLE_TYPE36 *Type36;
2709 SMBIOS_TABLE_TYPE37 *Type37;
2710 SMBIOS_TABLE_TYPE38 *Type38;
2711 SMBIOS_TABLE_TYPE39 *Type39;
2712 SMBIOS_TABLE_TYPE40 *Type40;
2713 SMBIOS_TABLE_TYPE41 *Type41;
2714 SMBIOS_TABLE_TYPE42 *Type42;
2715 SMBIOS_TABLE_TYPE43 *Type43;
2716 SMBIOS_TABLE_TYPE44 *Type44;
2717 SMBIOS_TABLE_TYPE126 *Type126;
2718 SMBIOS_TABLE_TYPE127 *Type127;
2719 UINT8 *Raw;
2720 } SMBIOS_STRUCTURE_POINTER;
2721
2722 #pragma pack()
2723
2724 #endif
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