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MdePkg : Add IPMI Macro and Structure Defintions to resolve build errors
[mirror_edk2.git] / MdePkg / Include / IndustryStandard / SmBios.h
1 /** @file
2 Industry Standard Definitions of SMBIOS Table Specification v3.3.0.
3
4 Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
5 (C) Copyright 2015-2017 Hewlett Packard Enterprise Development LP<BR>
6 (C) Copyright 2015 - 2019 Hewlett Packard Enterprise Development LP<BR>
7 SPDX-License-Identifier: BSD-2-Clause-Patent
8
9 **/
10
11 #ifndef __SMBIOS_STANDARD_H__
12 #define __SMBIOS_STANDARD_H__
13
14 ///
15 /// Reference SMBIOS 2.6, chapter 3.1.2.
16 /// For v2.1 and later, handle values in the range 0FF00h to 0FFFFh are reserved for
17 /// use by this specification.
18 ///
19 #define SMBIOS_HANDLE_RESERVED_BEGIN 0xFF00
20
21 ///
22 /// Reference SMBIOS 2.7, chapter 6.1.2.
23 /// The UEFI Platform Initialization Specification reserves handle number FFFEh for its
24 /// EFI_SMBIOS_PROTOCOL.Add() function to mean "assign an unused handle number automatically."
25 /// This number is not used for any other purpose by the SMBIOS specification.
26 ///
27 #define SMBIOS_HANDLE_PI_RESERVED 0xFFFE
28
29 ///
30 /// Reference SMBIOS 2.6, chapter 3.1.3.
31 /// Each text string is limited to 64 significant characters due to system MIF limitations.
32 /// Reference SMBIOS 2.7, chapter 6.1.3.
33 /// It will have no limit on the length of each individual text string.
34 ///
35 #define SMBIOS_STRING_MAX_LENGTH 64
36
37 //
38 // The length of the entire structure table (including all strings) must be reported
39 // in the Structure Table Length field of the SMBIOS Structure Table Entry Point,
40 // which is a WORD field limited to 65,535 bytes.
41 //
42 #define SMBIOS_TABLE_MAX_LENGTH 0xFFFF
43
44 //
45 // For SMBIOS 3.0, Structure table maximum size in Entry Point structure is DWORD field limited to 0xFFFFFFFF bytes.
46 //
47 #define SMBIOS_3_0_TABLE_MAX_LENGTH 0xFFFFFFFF
48
49 //
50 // SMBIOS type macros which is according to SMBIOS 3.3.0 specification.
51 //
52 #define SMBIOS_TYPE_BIOS_INFORMATION 0
53 #define SMBIOS_TYPE_SYSTEM_INFORMATION 1
54 #define SMBIOS_TYPE_BASEBOARD_INFORMATION 2
55 #define SMBIOS_TYPE_SYSTEM_ENCLOSURE 3
56 #define SMBIOS_TYPE_PROCESSOR_INFORMATION 4
57 #define SMBIOS_TYPE_MEMORY_CONTROLLER_INFORMATION 5
58 #define SMBIOS_TYPE_MEMORY_MODULE_INFORMATON 6
59 #define SMBIOS_TYPE_CACHE_INFORMATION 7
60 #define SMBIOS_TYPE_PORT_CONNECTOR_INFORMATION 8
61 #define SMBIOS_TYPE_SYSTEM_SLOTS 9
62 #define SMBIOS_TYPE_ONBOARD_DEVICE_INFORMATION 10
63 #define SMBIOS_TYPE_OEM_STRINGS 11
64 #define SMBIOS_TYPE_SYSTEM_CONFIGURATION_OPTIONS 12
65 #define SMBIOS_TYPE_BIOS_LANGUAGE_INFORMATION 13
66 #define SMBIOS_TYPE_GROUP_ASSOCIATIONS 14
67 #define SMBIOS_TYPE_SYSTEM_EVENT_LOG 15
68 #define SMBIOS_TYPE_PHYSICAL_MEMORY_ARRAY 16
69 #define SMBIOS_TYPE_MEMORY_DEVICE 17
70 #define SMBIOS_TYPE_32BIT_MEMORY_ERROR_INFORMATION 18
71 #define SMBIOS_TYPE_MEMORY_ARRAY_MAPPED_ADDRESS 19
72 #define SMBIOS_TYPE_MEMORY_DEVICE_MAPPED_ADDRESS 20
73 #define SMBIOS_TYPE_BUILT_IN_POINTING_DEVICE 21
74 #define SMBIOS_TYPE_PORTABLE_BATTERY 22
75 #define SMBIOS_TYPE_SYSTEM_RESET 23
76 #define SMBIOS_TYPE_HARDWARE_SECURITY 24
77 #define SMBIOS_TYPE_SYSTEM_POWER_CONTROLS 25
78 #define SMBIOS_TYPE_VOLTAGE_PROBE 26
79 #define SMBIOS_TYPE_COOLING_DEVICE 27
80 #define SMBIOS_TYPE_TEMPERATURE_PROBE 28
81 #define SMBIOS_TYPE_ELECTRICAL_CURRENT_PROBE 29
82 #define SMBIOS_TYPE_OUT_OF_BAND_REMOTE_ACCESS 30
83 #define SMBIOS_TYPE_BOOT_INTEGRITY_SERVICE 31
84 #define SMBIOS_TYPE_SYSTEM_BOOT_INFORMATION 32
85 #define SMBIOS_TYPE_64BIT_MEMORY_ERROR_INFORMATION 33
86 #define SMBIOS_TYPE_MANAGEMENT_DEVICE 34
87 #define SMBIOS_TYPE_MANAGEMENT_DEVICE_COMPONENT 35
88 #define SMBIOS_TYPE_MANAGEMENT_DEVICE_THRESHOLD_DATA 36
89 #define SMBIOS_TYPE_MEMORY_CHANNEL 37
90 #define SMBIOS_TYPE_IPMI_DEVICE_INFORMATION 38
91 #define SMBIOS_TYPE_SYSTEM_POWER_SUPPLY 39
92 #define SMBIOS_TYPE_ADDITIONAL_INFORMATION 40
93 #define SMBIOS_TYPE_ONBOARD_DEVICES_EXTENDED_INFORMATION 41
94 #define SMBIOS_TYPE_MANAGEMENT_CONTROLLER_HOST_INTERFACE 42
95 #define SMBIOS_TYPE_TPM_DEVICE 43
96 #define SMBIOS_TYPE_PROCESSOR_ADDITIONAL_INFORMATION 44
97
98 ///
99 /// Inactive type is added from SMBIOS 2.2. Reference SMBIOS 2.6, chapter 3.3.43.
100 /// Upper-level software that interprets the SMBIOS structure-table should bypass an
101 /// Inactive structure just like a structure type that the software does not recognize.
102 ///
103 #define SMBIOS_TYPE_INACTIVE 0x007E
104
105 ///
106 /// End-of-table type is added from SMBIOS 2.2. Reference SMBIOS 2.6, chapter 3.3.44.
107 /// The end-of-table indicator is used in the last physical structure in a table
108 ///
109 #define SMBIOS_TYPE_END_OF_TABLE 0x007F
110
111 #define SMBIOS_OEM_BEGIN 128
112 #define SMBIOS_OEM_END 255
113
114 ///
115 /// Types 0 through 127 (7Fh) are reserved for and defined by this
116 /// specification. Types 128 through 256 (80h to FFh) are available for system- and OEM-specific information.
117 ///
118 typedef UINT8 SMBIOS_TYPE;
119
120 ///
121 /// Specifies the structure's handle, a unique 16-bit number in the range 0 to 0FFFEh (for version
122 /// 2.0) or 0 to 0FEFFh (for version 2.1 and later). The handle can be used with the Get SMBIOS
123 /// Structure function to retrieve a specific structure; the handle numbers are not required to be
124 /// contiguous. For v2.1 and later, handle values in the range 0FF00h to 0FFFFh are reserved for
125 /// use by this specification.
126 /// If the system configuration changes, a previously assigned handle might no longer exist.
127 /// However once a handle has been assigned by the BIOS, the BIOS cannot re-assign that handle
128 /// number to another structure.
129 ///
130 typedef UINT16 SMBIOS_HANDLE;
131
132 ///
133 /// Smbios Table Entry Point Structure.
134 ///
135 #pragma pack(1)
136 typedef struct {
137 UINT8 AnchorString[4];
138 UINT8 EntryPointStructureChecksum;
139 UINT8 EntryPointLength;
140 UINT8 MajorVersion;
141 UINT8 MinorVersion;
142 UINT16 MaxStructureSize;
143 UINT8 EntryPointRevision;
144 UINT8 FormattedArea[5];
145 UINT8 IntermediateAnchorString[5];
146 UINT8 IntermediateChecksum;
147 UINT16 TableLength;
148 UINT32 TableAddress;
149 UINT16 NumberOfSmbiosStructures;
150 UINT8 SmbiosBcdRevision;
151 } SMBIOS_TABLE_ENTRY_POINT;
152
153 typedef struct {
154 UINT8 AnchorString[5];
155 UINT8 EntryPointStructureChecksum;
156 UINT8 EntryPointLength;
157 UINT8 MajorVersion;
158 UINT8 MinorVersion;
159 UINT8 DocRev;
160 UINT8 EntryPointRevision;
161 UINT8 Reserved;
162 UINT32 TableMaximumSize;
163 UINT64 TableAddress;
164 } SMBIOS_TABLE_3_0_ENTRY_POINT;
165
166 ///
167 /// The Smbios structure header.
168 ///
169 typedef struct {
170 SMBIOS_TYPE Type;
171 UINT8 Length;
172 SMBIOS_HANDLE Handle;
173 } SMBIOS_STRUCTURE;
174
175 ///
176 /// Text strings associated with a given SMBIOS structure are returned in the dmiStrucBuffer, appended directly after
177 /// the formatted portion of the structure. This method of returning string information eliminates the need for
178 /// application software to deal with pointers embedded in the SMBIOS structure. Each string is terminated with a null
179 /// (00h) BYTE and the set of strings is terminated with an additional null (00h) BYTE. When the formatted portion of
180 /// a SMBIOS structure references a string, it does so by specifying a non-zero string number within the structure's
181 /// string-set. For example, if a string field contains 02h, it references the second string following the formatted portion
182 /// of the SMBIOS structure. If a string field references no string, a null (0) is placed in that string field. If the
183 /// formatted portion of the structure contains string-reference fields and all the string fields are set to 0 (no string
184 /// references), the formatted section of the structure is followed by two null (00h) BYTES.
185 ///
186 typedef UINT8 SMBIOS_TABLE_STRING;
187
188 ///
189 /// BIOS Characteristics
190 /// Defines which functions the BIOS supports. PCI, PCMCIA, Flash, etc.
191 ///
192 typedef struct {
193 UINT32 Reserved :2; ///< Bits 0-1.
194 UINT32 Unknown :1;
195 UINT32 BiosCharacteristicsNotSupported :1;
196 UINT32 IsaIsSupported :1;
197 UINT32 McaIsSupported :1;
198 UINT32 EisaIsSupported :1;
199 UINT32 PciIsSupported :1;
200 UINT32 PcmciaIsSupported :1;
201 UINT32 PlugAndPlayIsSupported :1;
202 UINT32 ApmIsSupported :1;
203 UINT32 BiosIsUpgradable :1;
204 UINT32 BiosShadowingAllowed :1;
205 UINT32 VlVesaIsSupported :1;
206 UINT32 EscdSupportIsAvailable :1;
207 UINT32 BootFromCdIsSupported :1;
208 UINT32 SelectableBootIsSupported :1;
209 UINT32 RomBiosIsSocketed :1;
210 UINT32 BootFromPcmciaIsSupported :1;
211 UINT32 EDDSpecificationIsSupported :1;
212 UINT32 JapaneseNecFloppyIsSupported :1;
213 UINT32 JapaneseToshibaFloppyIsSupported :1;
214 UINT32 Floppy525_360IsSupported :1;
215 UINT32 Floppy525_12IsSupported :1;
216 UINT32 Floppy35_720IsSupported :1;
217 UINT32 Floppy35_288IsSupported :1;
218 UINT32 PrintScreenIsSupported :1;
219 UINT32 Keyboard8042IsSupported :1;
220 UINT32 SerialIsSupported :1;
221 UINT32 PrinterIsSupported :1;
222 UINT32 CgaMonoIsSupported :1;
223 UINT32 NecPc98 :1;
224 UINT32 ReservedForVendor :32; ///< Bits 32-63. Bits 32-47 reserved for BIOS vendor
225 ///< and bits 48-63 reserved for System Vendor.
226 } MISC_BIOS_CHARACTERISTICS;
227
228 ///
229 /// BIOS Characteristics Extension Byte 1.
230 /// This information, available for SMBIOS version 2.1 and later, appears at offset 12h
231 /// within the BIOS Information structure.
232 ///
233 typedef struct {
234 UINT8 AcpiIsSupported :1;
235 UINT8 UsbLegacyIsSupported :1;
236 UINT8 AgpIsSupported :1;
237 UINT8 I2OBootIsSupported :1;
238 UINT8 Ls120BootIsSupported :1;
239 UINT8 AtapiZipDriveBootIsSupported :1;
240 UINT8 Boot1394IsSupported :1;
241 UINT8 SmartBatteryIsSupported :1;
242 } MBCE_BIOS_RESERVED;
243
244 ///
245 /// BIOS Characteristics Extension Byte 2.
246 /// This information, available for SMBIOS version 2.3 and later, appears at offset 13h
247 /// within the BIOS Information structure.
248 ///
249 typedef struct {
250 UINT8 BiosBootSpecIsSupported :1;
251 UINT8 FunctionKeyNetworkBootIsSupported :1;
252 UINT8 TargetContentDistributionEnabled :1;
253 UINT8 UefiSpecificationSupported :1;
254 UINT8 VirtualMachineSupported :1;
255 UINT8 ExtensionByte2Reserved :3;
256 } MBCE_SYSTEM_RESERVED;
257
258 ///
259 /// BIOS Characteristics Extension Bytes.
260 ///
261 typedef struct {
262 MBCE_BIOS_RESERVED BiosReserved;
263 MBCE_SYSTEM_RESERVED SystemReserved;
264 } MISC_BIOS_CHARACTERISTICS_EXTENSION;
265
266 ///
267 /// Extended BIOS ROM size.
268 ///
269 typedef struct {
270 UINT16 Size :14;
271 UINT16 Unit :2;
272 } EXTENDED_BIOS_ROM_SIZE;
273
274 ///
275 /// BIOS Information (Type 0).
276 ///
277 typedef struct {
278 SMBIOS_STRUCTURE Hdr;
279 SMBIOS_TABLE_STRING Vendor;
280 SMBIOS_TABLE_STRING BiosVersion;
281 UINT16 BiosSegment;
282 SMBIOS_TABLE_STRING BiosReleaseDate;
283 UINT8 BiosSize;
284 MISC_BIOS_CHARACTERISTICS BiosCharacteristics;
285 UINT8 BIOSCharacteristicsExtensionBytes[2];
286 UINT8 SystemBiosMajorRelease;
287 UINT8 SystemBiosMinorRelease;
288 UINT8 EmbeddedControllerFirmwareMajorRelease;
289 UINT8 EmbeddedControllerFirmwareMinorRelease;
290 //
291 // Add for smbios 3.1.0
292 //
293 EXTENDED_BIOS_ROM_SIZE ExtendedBiosSize;
294 } SMBIOS_TABLE_TYPE0;
295
296 ///
297 /// System Wake-up Type.
298 ///
299 typedef enum {
300 SystemWakeupTypeReserved = 0x00,
301 SystemWakeupTypeOther = 0x01,
302 SystemWakeupTypeUnknown = 0x02,
303 SystemWakeupTypeApmTimer = 0x03,
304 SystemWakeupTypeModemRing = 0x04,
305 SystemWakeupTypeLanRemote = 0x05,
306 SystemWakeupTypePowerSwitch = 0x06,
307 SystemWakeupTypePciPme = 0x07,
308 SystemWakeupTypeAcPowerRestored = 0x08
309 } MISC_SYSTEM_WAKEUP_TYPE;
310
311 ///
312 /// System Information (Type 1).
313 ///
314 /// The information in this structure defines attributes of the overall system and is
315 /// intended to be associated with the Component ID group of the system's MIF.
316 /// An SMBIOS implementation is associated with a single system instance and contains
317 /// one and only one System Information (Type 1) structure.
318 ///
319 typedef struct {
320 SMBIOS_STRUCTURE Hdr;
321 SMBIOS_TABLE_STRING Manufacturer;
322 SMBIOS_TABLE_STRING ProductName;
323 SMBIOS_TABLE_STRING Version;
324 SMBIOS_TABLE_STRING SerialNumber;
325 GUID Uuid;
326 UINT8 WakeUpType; ///< The enumeration value from MISC_SYSTEM_WAKEUP_TYPE.
327 SMBIOS_TABLE_STRING SKUNumber;
328 SMBIOS_TABLE_STRING Family;
329 } SMBIOS_TABLE_TYPE1;
330
331 ///
332 /// Base Board - Feature Flags.
333 ///
334 typedef struct {
335 UINT8 Motherboard :1;
336 UINT8 RequiresDaughterCard :1;
337 UINT8 Removable :1;
338 UINT8 Replaceable :1;
339 UINT8 HotSwappable :1;
340 UINT8 Reserved :3;
341 } BASE_BOARD_FEATURE_FLAGS;
342
343 ///
344 /// Base Board - Board Type.
345 ///
346 typedef enum {
347 BaseBoardTypeUnknown = 0x1,
348 BaseBoardTypeOther = 0x2,
349 BaseBoardTypeServerBlade = 0x3,
350 BaseBoardTypeConnectivitySwitch = 0x4,
351 BaseBoardTypeSystemManagementModule = 0x5,
352 BaseBoardTypeProcessorModule = 0x6,
353 BaseBoardTypeIOModule = 0x7,
354 BaseBoardTypeMemoryModule = 0x8,
355 BaseBoardTypeDaughterBoard = 0x9,
356 BaseBoardTypeMotherBoard = 0xA,
357 BaseBoardTypeProcessorMemoryModule = 0xB,
358 BaseBoardTypeProcessorIOModule = 0xC,
359 BaseBoardTypeInterconnectBoard = 0xD
360 } BASE_BOARD_TYPE;
361
362 ///
363 /// Base Board (or Module) Information (Type 2).
364 ///
365 /// The information in this structure defines attributes of a system baseboard -
366 /// for example a motherboard, planar, or server blade or other standard system module.
367 ///
368 typedef struct {
369 SMBIOS_STRUCTURE Hdr;
370 SMBIOS_TABLE_STRING Manufacturer;
371 SMBIOS_TABLE_STRING ProductName;
372 SMBIOS_TABLE_STRING Version;
373 SMBIOS_TABLE_STRING SerialNumber;
374 SMBIOS_TABLE_STRING AssetTag;
375 BASE_BOARD_FEATURE_FLAGS FeatureFlag;
376 SMBIOS_TABLE_STRING LocationInChassis;
377 UINT16 ChassisHandle;
378 UINT8 BoardType; ///< The enumeration value from BASE_BOARD_TYPE.
379 UINT8 NumberOfContainedObjectHandles;
380 UINT16 ContainedObjectHandles[1];
381 } SMBIOS_TABLE_TYPE2;
382
383 ///
384 /// System Enclosure or Chassis Types
385 ///
386 typedef enum {
387 MiscChassisTypeOther = 0x01,
388 MiscChassisTypeUnknown = 0x02,
389 MiscChassisTypeDeskTop = 0x03,
390 MiscChassisTypeLowProfileDesktop = 0x04,
391 MiscChassisTypePizzaBox = 0x05,
392 MiscChassisTypeMiniTower = 0x06,
393 MiscChassisTypeTower = 0x07,
394 MiscChassisTypePortable = 0x08,
395 MiscChassisTypeLapTop = 0x09,
396 MiscChassisTypeNotebook = 0x0A,
397 MiscChassisTypeHandHeld = 0x0B,
398 MiscChassisTypeDockingStation = 0x0C,
399 MiscChassisTypeAllInOne = 0x0D,
400 MiscChassisTypeSubNotebook = 0x0E,
401 MiscChassisTypeSpaceSaving = 0x0F,
402 MiscChassisTypeLunchBox = 0x10,
403 MiscChassisTypeMainServerChassis = 0x11,
404 MiscChassisTypeExpansionChassis = 0x12,
405 MiscChassisTypeSubChassis = 0x13,
406 MiscChassisTypeBusExpansionChassis = 0x14,
407 MiscChassisTypePeripheralChassis = 0x15,
408 MiscChassisTypeRaidChassis = 0x16,
409 MiscChassisTypeRackMountChassis = 0x17,
410 MiscChassisTypeSealedCasePc = 0x18,
411 MiscChassisMultiSystemChassis = 0x19,
412 MiscChassisCompactPCI = 0x1A,
413 MiscChassisAdvancedTCA = 0x1B,
414 MiscChassisBlade = 0x1C,
415 MiscChassisBladeEnclosure = 0x1D,
416 MiscChassisTablet = 0x1E,
417 MiscChassisConvertible = 0x1F,
418 MiscChassisDetachable = 0x20,
419 MiscChassisIoTGateway = 0x21,
420 MiscChassisEmbeddedPc = 0x22,
421 MiscChassisMiniPc = 0x23,
422 MiscChassisStickPc = 0x24
423 } MISC_CHASSIS_TYPE;
424
425 ///
426 /// System Enclosure or Chassis States .
427 ///
428 typedef enum {
429 ChassisStateOther = 0x01,
430 ChassisStateUnknown = 0x02,
431 ChassisStateSafe = 0x03,
432 ChassisStateWarning = 0x04,
433 ChassisStateCritical = 0x05,
434 ChassisStateNonRecoverable = 0x06
435 } MISC_CHASSIS_STATE;
436
437 ///
438 /// System Enclosure or Chassis Security Status.
439 ///
440 typedef enum {
441 ChassisSecurityStatusOther = 0x01,
442 ChassisSecurityStatusUnknown = 0x02,
443 ChassisSecurityStatusNone = 0x03,
444 ChassisSecurityStatusExternalInterfaceLockedOut = 0x04,
445 ChassisSecurityStatusExternalInterfaceLockedEnabled = 0x05
446 } MISC_CHASSIS_SECURITY_STATE;
447
448 ///
449 /// Contained Element record
450 ///
451 typedef struct {
452 UINT8 ContainedElementType;
453 UINT8 ContainedElementMinimum;
454 UINT8 ContainedElementMaximum;
455 } CONTAINED_ELEMENT;
456
457
458 ///
459 /// System Enclosure or Chassis (Type 3).
460 ///
461 /// The information in this structure defines attributes of the system's mechanical enclosure(s).
462 /// For example, if a system included a separate enclosure for its peripheral devices,
463 /// two structures would be returned: one for the main, system enclosure and the second for
464 /// the peripheral device enclosure. The additions to this structure in v2.1 of this specification
465 /// support the population of the CIM_Chassis class.
466 ///
467 typedef struct {
468 SMBIOS_STRUCTURE Hdr;
469 SMBIOS_TABLE_STRING Manufacturer;
470 UINT8 Type;
471 SMBIOS_TABLE_STRING Version;
472 SMBIOS_TABLE_STRING SerialNumber;
473 SMBIOS_TABLE_STRING AssetTag;
474 UINT8 BootupState; ///< The enumeration value from MISC_CHASSIS_STATE.
475 UINT8 PowerSupplyState; ///< The enumeration value from MISC_CHASSIS_STATE.
476 UINT8 ThermalState; ///< The enumeration value from MISC_CHASSIS_STATE.
477 UINT8 SecurityStatus; ///< The enumeration value from MISC_CHASSIS_SECURITY_STATE.
478 UINT8 OemDefined[4];
479 UINT8 Height;
480 UINT8 NumberofPowerCords;
481 UINT8 ContainedElementCount;
482 UINT8 ContainedElementRecordLength;
483 //
484 // Can have 0 to (ContainedElementCount * ContainedElementRecordLength) contained elements
485 //
486 CONTAINED_ELEMENT ContainedElements[1];
487 //
488 // Add for smbios 2.7
489 //
490 // Since ContainedElements has a variable number of entries, must not define SKUNumber in
491 // the structure. Need to reference it by starting at offset 0x15 and adding
492 // (ContainedElementCount * ContainedElementRecordLength) bytes.
493 //
494 // SMBIOS_TABLE_STRING SKUNumber;
495 } SMBIOS_TABLE_TYPE3;
496
497 ///
498 /// Processor Information - Processor Type.
499 ///
500 typedef enum {
501 ProcessorOther = 0x01,
502 ProcessorUnknown = 0x02,
503 CentralProcessor = 0x03,
504 MathProcessor = 0x04,
505 DspProcessor = 0x05,
506 VideoProcessor = 0x06
507 } PROCESSOR_TYPE_DATA;
508
509 ///
510 /// Processor Information - Processor Family.
511 ///
512 typedef enum {
513 ProcessorFamilyOther = 0x01,
514 ProcessorFamilyUnknown = 0x02,
515 ProcessorFamily8086 = 0x03,
516 ProcessorFamily80286 = 0x04,
517 ProcessorFamilyIntel386 = 0x05,
518 ProcessorFamilyIntel486 = 0x06,
519 ProcessorFamily8087 = 0x07,
520 ProcessorFamily80287 = 0x08,
521 ProcessorFamily80387 = 0x09,
522 ProcessorFamily80487 = 0x0A,
523 ProcessorFamilyPentium = 0x0B,
524 ProcessorFamilyPentiumPro = 0x0C,
525 ProcessorFamilyPentiumII = 0x0D,
526 ProcessorFamilyPentiumMMX = 0x0E,
527 ProcessorFamilyCeleron = 0x0F,
528 ProcessorFamilyPentiumIIXeon = 0x10,
529 ProcessorFamilyPentiumIII = 0x11,
530 ProcessorFamilyM1 = 0x12,
531 ProcessorFamilyM2 = 0x13,
532 ProcessorFamilyIntelCeleronM = 0x14,
533 ProcessorFamilyIntelPentium4Ht = 0x15,
534 ProcessorFamilyAmdDuron = 0x18,
535 ProcessorFamilyK5 = 0x19,
536 ProcessorFamilyK6 = 0x1A,
537 ProcessorFamilyK6_2 = 0x1B,
538 ProcessorFamilyK6_3 = 0x1C,
539 ProcessorFamilyAmdAthlon = 0x1D,
540 ProcessorFamilyAmd29000 = 0x1E,
541 ProcessorFamilyK6_2Plus = 0x1F,
542 ProcessorFamilyPowerPC = 0x20,
543 ProcessorFamilyPowerPC601 = 0x21,
544 ProcessorFamilyPowerPC603 = 0x22,
545 ProcessorFamilyPowerPC603Plus = 0x23,
546 ProcessorFamilyPowerPC604 = 0x24,
547 ProcessorFamilyPowerPC620 = 0x25,
548 ProcessorFamilyPowerPCx704 = 0x26,
549 ProcessorFamilyPowerPC750 = 0x27,
550 ProcessorFamilyIntelCoreDuo = 0x28,
551 ProcessorFamilyIntelCoreDuoMobile = 0x29,
552 ProcessorFamilyIntelCoreSoloMobile = 0x2A,
553 ProcessorFamilyIntelAtom = 0x2B,
554 ProcessorFamilyIntelCoreM = 0x2C,
555 ProcessorFamilyIntelCorem3 = 0x2D,
556 ProcessorFamilyIntelCorem5 = 0x2E,
557 ProcessorFamilyIntelCorem7 = 0x2F,
558 ProcessorFamilyAlpha = 0x30,
559 ProcessorFamilyAlpha21064 = 0x31,
560 ProcessorFamilyAlpha21066 = 0x32,
561 ProcessorFamilyAlpha21164 = 0x33,
562 ProcessorFamilyAlpha21164PC = 0x34,
563 ProcessorFamilyAlpha21164a = 0x35,
564 ProcessorFamilyAlpha21264 = 0x36,
565 ProcessorFamilyAlpha21364 = 0x37,
566 ProcessorFamilyAmdTurionIIUltraDualCoreMobileM = 0x38,
567 ProcessorFamilyAmdTurionIIDualCoreMobileM = 0x39,
568 ProcessorFamilyAmdAthlonIIDualCoreM = 0x3A,
569 ProcessorFamilyAmdOpteron6100Series = 0x3B,
570 ProcessorFamilyAmdOpteron4100Series = 0x3C,
571 ProcessorFamilyAmdOpteron6200Series = 0x3D,
572 ProcessorFamilyAmdOpteron4200Series = 0x3E,
573 ProcessorFamilyAmdFxSeries = 0x3F,
574 ProcessorFamilyMips = 0x40,
575 ProcessorFamilyMIPSR4000 = 0x41,
576 ProcessorFamilyMIPSR4200 = 0x42,
577 ProcessorFamilyMIPSR4400 = 0x43,
578 ProcessorFamilyMIPSR4600 = 0x44,
579 ProcessorFamilyMIPSR10000 = 0x45,
580 ProcessorFamilyAmdCSeries = 0x46,
581 ProcessorFamilyAmdESeries = 0x47,
582 ProcessorFamilyAmdASeries = 0x48, ///< SMBIOS spec 2.8.0 updated the name
583 ProcessorFamilyAmdGSeries = 0x49,
584 ProcessorFamilyAmdZSeries = 0x4A,
585 ProcessorFamilyAmdRSeries = 0x4B,
586 ProcessorFamilyAmdOpteron4300 = 0x4C,
587 ProcessorFamilyAmdOpteron6300 = 0x4D,
588 ProcessorFamilyAmdOpteron3300 = 0x4E,
589 ProcessorFamilyAmdFireProSeries = 0x4F,
590 ProcessorFamilySparc = 0x50,
591 ProcessorFamilySuperSparc = 0x51,
592 ProcessorFamilymicroSparcII = 0x52,
593 ProcessorFamilymicroSparcIIep = 0x53,
594 ProcessorFamilyUltraSparc = 0x54,
595 ProcessorFamilyUltraSparcII = 0x55,
596 ProcessorFamilyUltraSparcIii = 0x56,
597 ProcessorFamilyUltraSparcIII = 0x57,
598 ProcessorFamilyUltraSparcIIIi = 0x58,
599 ProcessorFamily68040 = 0x60,
600 ProcessorFamily68xxx = 0x61,
601 ProcessorFamily68000 = 0x62,
602 ProcessorFamily68010 = 0x63,
603 ProcessorFamily68020 = 0x64,
604 ProcessorFamily68030 = 0x65,
605 ProcessorFamilyAmdAthlonX4QuadCore = 0x66,
606 ProcessorFamilyAmdOpteronX1000Series = 0x67,
607 ProcessorFamilyAmdOpteronX2000Series = 0x68,
608 ProcessorFamilyAmdOpteronASeries = 0x69,
609 ProcessorFamilyAmdOpteronX3000Series = 0x6A,
610 ProcessorFamilyAmdZen = 0x6B,
611 ProcessorFamilyHobbit = 0x70,
612 ProcessorFamilyCrusoeTM5000 = 0x78,
613 ProcessorFamilyCrusoeTM3000 = 0x79,
614 ProcessorFamilyEfficeonTM8000 = 0x7A,
615 ProcessorFamilyWeitek = 0x80,
616 ProcessorFamilyItanium = 0x82,
617 ProcessorFamilyAmdAthlon64 = 0x83,
618 ProcessorFamilyAmdOpteron = 0x84,
619 ProcessorFamilyAmdSempron = 0x85,
620 ProcessorFamilyAmdTurion64Mobile = 0x86,
621 ProcessorFamilyDualCoreAmdOpteron = 0x87,
622 ProcessorFamilyAmdAthlon64X2DualCore = 0x88,
623 ProcessorFamilyAmdTurion64X2Mobile = 0x89,
624 ProcessorFamilyQuadCoreAmdOpteron = 0x8A,
625 ProcessorFamilyThirdGenerationAmdOpteron = 0x8B,
626 ProcessorFamilyAmdPhenomFxQuadCore = 0x8C,
627 ProcessorFamilyAmdPhenomX4QuadCore = 0x8D,
628 ProcessorFamilyAmdPhenomX2DualCore = 0x8E,
629 ProcessorFamilyAmdAthlonX2DualCore = 0x8F,
630 ProcessorFamilyPARISC = 0x90,
631 ProcessorFamilyPaRisc8500 = 0x91,
632 ProcessorFamilyPaRisc8000 = 0x92,
633 ProcessorFamilyPaRisc7300LC = 0x93,
634 ProcessorFamilyPaRisc7200 = 0x94,
635 ProcessorFamilyPaRisc7100LC = 0x95,
636 ProcessorFamilyPaRisc7100 = 0x96,
637 ProcessorFamilyV30 = 0xA0,
638 ProcessorFamilyQuadCoreIntelXeon3200Series = 0xA1,
639 ProcessorFamilyDualCoreIntelXeon3000Series = 0xA2,
640 ProcessorFamilyQuadCoreIntelXeon5300Series = 0xA3,
641 ProcessorFamilyDualCoreIntelXeon5100Series = 0xA4,
642 ProcessorFamilyDualCoreIntelXeon5000Series = 0xA5,
643 ProcessorFamilyDualCoreIntelXeonLV = 0xA6,
644 ProcessorFamilyDualCoreIntelXeonULV = 0xA7,
645 ProcessorFamilyDualCoreIntelXeon7100Series = 0xA8,
646 ProcessorFamilyQuadCoreIntelXeon5400Series = 0xA9,
647 ProcessorFamilyQuadCoreIntelXeon = 0xAA,
648 ProcessorFamilyDualCoreIntelXeon5200Series = 0xAB,
649 ProcessorFamilyDualCoreIntelXeon7200Series = 0xAC,
650 ProcessorFamilyQuadCoreIntelXeon7300Series = 0xAD,
651 ProcessorFamilyQuadCoreIntelXeon7400Series = 0xAE,
652 ProcessorFamilyMultiCoreIntelXeon7400Series = 0xAF,
653 ProcessorFamilyPentiumIIIXeon = 0xB0,
654 ProcessorFamilyPentiumIIISpeedStep = 0xB1,
655 ProcessorFamilyPentium4 = 0xB2,
656 ProcessorFamilyIntelXeon = 0xB3,
657 ProcessorFamilyAS400 = 0xB4,
658 ProcessorFamilyIntelXeonMP = 0xB5,
659 ProcessorFamilyAMDAthlonXP = 0xB6,
660 ProcessorFamilyAMDAthlonMP = 0xB7,
661 ProcessorFamilyIntelItanium2 = 0xB8,
662 ProcessorFamilyIntelPentiumM = 0xB9,
663 ProcessorFamilyIntelCeleronD = 0xBA,
664 ProcessorFamilyIntelPentiumD = 0xBB,
665 ProcessorFamilyIntelPentiumEx = 0xBC,
666 ProcessorFamilyIntelCoreSolo = 0xBD, ///< SMBIOS spec 2.6 updated this value
667 ProcessorFamilyReserved = 0xBE,
668 ProcessorFamilyIntelCore2 = 0xBF,
669 ProcessorFamilyIntelCore2Solo = 0xC0,
670 ProcessorFamilyIntelCore2Extreme = 0xC1,
671 ProcessorFamilyIntelCore2Quad = 0xC2,
672 ProcessorFamilyIntelCore2ExtremeMobile = 0xC3,
673 ProcessorFamilyIntelCore2DuoMobile = 0xC4,
674 ProcessorFamilyIntelCore2SoloMobile = 0xC5,
675 ProcessorFamilyIntelCoreI7 = 0xC6,
676 ProcessorFamilyDualCoreIntelCeleron = 0xC7,
677 ProcessorFamilyIBM390 = 0xC8,
678 ProcessorFamilyG4 = 0xC9,
679 ProcessorFamilyG5 = 0xCA,
680 ProcessorFamilyG6 = 0xCB,
681 ProcessorFamilyzArchitecture = 0xCC,
682 ProcessorFamilyIntelCoreI5 = 0xCD,
683 ProcessorFamilyIntelCoreI3 = 0xCE,
684 ProcessorFamilyIntelCoreI9 = 0xCF,
685 ProcessorFamilyViaC7M = 0xD2,
686 ProcessorFamilyViaC7D = 0xD3,
687 ProcessorFamilyViaC7 = 0xD4,
688 ProcessorFamilyViaEden = 0xD5,
689 ProcessorFamilyMultiCoreIntelXeon = 0xD6,
690 ProcessorFamilyDualCoreIntelXeon3Series = 0xD7,
691 ProcessorFamilyQuadCoreIntelXeon3Series = 0xD8,
692 ProcessorFamilyViaNano = 0xD9,
693 ProcessorFamilyDualCoreIntelXeon5Series = 0xDA,
694 ProcessorFamilyQuadCoreIntelXeon5Series = 0xDB,
695 ProcessorFamilyDualCoreIntelXeon7Series = 0xDD,
696 ProcessorFamilyQuadCoreIntelXeon7Series = 0xDE,
697 ProcessorFamilyMultiCoreIntelXeon7Series = 0xDF,
698 ProcessorFamilyMultiCoreIntelXeon3400Series = 0xE0,
699 ProcessorFamilyAmdOpteron3000Series = 0xE4,
700 ProcessorFamilyAmdSempronII = 0xE5,
701 ProcessorFamilyEmbeddedAmdOpteronQuadCore = 0xE6,
702 ProcessorFamilyAmdPhenomTripleCore = 0xE7,
703 ProcessorFamilyAmdTurionUltraDualCoreMobile = 0xE8,
704 ProcessorFamilyAmdTurionDualCoreMobile = 0xE9,
705 ProcessorFamilyAmdAthlonDualCore = 0xEA,
706 ProcessorFamilyAmdSempronSI = 0xEB,
707 ProcessorFamilyAmdPhenomII = 0xEC,
708 ProcessorFamilyAmdAthlonII = 0xED,
709 ProcessorFamilySixCoreAmdOpteron = 0xEE,
710 ProcessorFamilyAmdSempronM = 0xEF,
711 ProcessorFamilyi860 = 0xFA,
712 ProcessorFamilyi960 = 0xFB,
713 ProcessorFamilyIndicatorFamily2 = 0xFE,
714 ProcessorFamilyReserved1 = 0xFF
715 } PROCESSOR_FAMILY_DATA;
716
717 ///
718 /// Processor Information2 - Processor Family2.
719 ///
720 typedef enum {
721 ProcessorFamilyARMv7 = 0x0100,
722 ProcessorFamilyARMv8 = 0x0101,
723 ProcessorFamilySH3 = 0x0104,
724 ProcessorFamilySH4 = 0x0105,
725 ProcessorFamilyARM = 0x0118,
726 ProcessorFamilyStrongARM = 0x0119,
727 ProcessorFamily6x86 = 0x012C,
728 ProcessorFamilyMediaGX = 0x012D,
729 ProcessorFamilyMII = 0x012E,
730 ProcessorFamilyWinChip = 0x0140,
731 ProcessorFamilyDSP = 0x015E,
732 ProcessorFamilyVideoProcessor = 0x01F4,
733 ProcessorFamilyRiscvRV32 = 0x0200,
734 ProcessorFamilyRiscVRV64 = 0x0201,
735 ProcessorFamilyRiscVRV128 = 0x0202
736 } PROCESSOR_FAMILY2_DATA;
737
738 ///
739 /// Processor Information - Voltage.
740 ///
741 typedef struct {
742 UINT8 ProcessorVoltageCapability5V :1;
743 UINT8 ProcessorVoltageCapability3_3V :1;
744 UINT8 ProcessorVoltageCapability2_9V :1;
745 UINT8 ProcessorVoltageCapabilityReserved :1; ///< Bit 3, must be zero.
746 UINT8 ProcessorVoltageReserved :3; ///< Bits 4-6, must be zero.
747 UINT8 ProcessorVoltageIndicateLegacy :1;
748 } PROCESSOR_VOLTAGE;
749
750 ///
751 /// Processor Information - Processor Upgrade.
752 ///
753 typedef enum {
754 ProcessorUpgradeOther = 0x01,
755 ProcessorUpgradeUnknown = 0x02,
756 ProcessorUpgradeDaughterBoard = 0x03,
757 ProcessorUpgradeZIFSocket = 0x04,
758 ProcessorUpgradePiggyBack = 0x05, ///< Replaceable.
759 ProcessorUpgradeNone = 0x06,
760 ProcessorUpgradeLIFSocket = 0x07,
761 ProcessorUpgradeSlot1 = 0x08,
762 ProcessorUpgradeSlot2 = 0x09,
763 ProcessorUpgrade370PinSocket = 0x0A,
764 ProcessorUpgradeSlotA = 0x0B,
765 ProcessorUpgradeSlotM = 0x0C,
766 ProcessorUpgradeSocket423 = 0x0D,
767 ProcessorUpgradeSocketA = 0x0E, ///< Socket 462.
768 ProcessorUpgradeSocket478 = 0x0F,
769 ProcessorUpgradeSocket754 = 0x10,
770 ProcessorUpgradeSocket940 = 0x11,
771 ProcessorUpgradeSocket939 = 0x12,
772 ProcessorUpgradeSocketmPGA604 = 0x13,
773 ProcessorUpgradeSocketLGA771 = 0x14,
774 ProcessorUpgradeSocketLGA775 = 0x15,
775 ProcessorUpgradeSocketS1 = 0x16,
776 ProcessorUpgradeAM2 = 0x17,
777 ProcessorUpgradeF1207 = 0x18,
778 ProcessorSocketLGA1366 = 0x19,
779 ProcessorUpgradeSocketG34 = 0x1A,
780 ProcessorUpgradeSocketAM3 = 0x1B,
781 ProcessorUpgradeSocketC32 = 0x1C,
782 ProcessorUpgradeSocketLGA1156 = 0x1D,
783 ProcessorUpgradeSocketLGA1567 = 0x1E,
784 ProcessorUpgradeSocketPGA988A = 0x1F,
785 ProcessorUpgradeSocketBGA1288 = 0x20,
786 ProcessorUpgradeSocketrPGA988B = 0x21,
787 ProcessorUpgradeSocketBGA1023 = 0x22,
788 ProcessorUpgradeSocketBGA1224 = 0x23,
789 ProcessorUpgradeSocketLGA1155 = 0x24, ///< SMBIOS spec 2.8.0 updated the name
790 ProcessorUpgradeSocketLGA1356 = 0x25,
791 ProcessorUpgradeSocketLGA2011 = 0x26,
792 ProcessorUpgradeSocketFS1 = 0x27,
793 ProcessorUpgradeSocketFS2 = 0x28,
794 ProcessorUpgradeSocketFM1 = 0x29,
795 ProcessorUpgradeSocketFM2 = 0x2A,
796 ProcessorUpgradeSocketLGA2011_3 = 0x2B,
797 ProcessorUpgradeSocketLGA1356_3 = 0x2C,
798 ProcessorUpgradeSocketLGA1150 = 0x2D,
799 ProcessorUpgradeSocketBGA1168 = 0x2E,
800 ProcessorUpgradeSocketBGA1234 = 0x2F,
801 ProcessorUpgradeSocketBGA1364 = 0x30,
802 ProcessorUpgradeSocketAM4 = 0x31,
803 ProcessorUpgradeSocketLGA1151 = 0x32,
804 ProcessorUpgradeSocketBGA1356 = 0x33,
805 ProcessorUpgradeSocketBGA1440 = 0x34,
806 ProcessorUpgradeSocketBGA1515 = 0x35,
807 ProcessorUpgradeSocketLGA3647_1 = 0x36,
808 ProcessorUpgradeSocketSP3 = 0x37,
809 ProcessorUpgradeSocketSP3r2 = 0x38,
810 ProcessorUpgradeSocketLGA2066 = 0x39,
811 ProcessorUpgradeSocketBGA1392 = 0x3A,
812 ProcessorUpgradeSocketBGA1510 = 0x3B,
813 ProcessorUpgradeSocketBGA1528 = 0x3C
814 } PROCESSOR_UPGRADE;
815
816 ///
817 /// Processor ID Field Description
818 ///
819 typedef struct {
820 UINT32 ProcessorSteppingId:4;
821 UINT32 ProcessorModel: 4;
822 UINT32 ProcessorFamily: 4;
823 UINT32 ProcessorType: 2;
824 UINT32 ProcessorReserved1: 2;
825 UINT32 ProcessorXModel: 4;
826 UINT32 ProcessorXFamily: 8;
827 UINT32 ProcessorReserved2: 4;
828 } PROCESSOR_SIGNATURE;
829
830 typedef struct {
831 UINT32 ProcessorFpu :1;
832 UINT32 ProcessorVme :1;
833 UINT32 ProcessorDe :1;
834 UINT32 ProcessorPse :1;
835 UINT32 ProcessorTsc :1;
836 UINT32 ProcessorMsr :1;
837 UINT32 ProcessorPae :1;
838 UINT32 ProcessorMce :1;
839 UINT32 ProcessorCx8 :1;
840 UINT32 ProcessorApic :1;
841 UINT32 ProcessorReserved1 :1;
842 UINT32 ProcessorSep :1;
843 UINT32 ProcessorMtrr :1;
844 UINT32 ProcessorPge :1;
845 UINT32 ProcessorMca :1;
846 UINT32 ProcessorCmov :1;
847 UINT32 ProcessorPat :1;
848 UINT32 ProcessorPse36 :1;
849 UINT32 ProcessorPsn :1;
850 UINT32 ProcessorClfsh :1;
851 UINT32 ProcessorReserved2 :1;
852 UINT32 ProcessorDs :1;
853 UINT32 ProcessorAcpi :1;
854 UINT32 ProcessorMmx :1;
855 UINT32 ProcessorFxsr :1;
856 UINT32 ProcessorSse :1;
857 UINT32 ProcessorSse2 :1;
858 UINT32 ProcessorSs :1;
859 UINT32 ProcessorReserved3 :1;
860 UINT32 ProcessorTm :1;
861 UINT32 ProcessorReserved4 :2;
862 } PROCESSOR_FEATURE_FLAGS;
863
864 typedef struct {
865 UINT16 ProcessorReserved1 :1;
866 UINT16 ProcessorUnknown :1;
867 UINT16 Processor64BitCapable :1;
868 UINT16 ProcessorMultiCore :1;
869 UINT16 ProcessorHardwareThread :1;
870 UINT16 ProcessorExecuteProtection :1;
871 UINT16 ProcessorEnhancedVirtualization :1;
872 UINT16 ProcessorPowerPerformanceCtrl :1;
873 UINT16 Processor128BitCapable :1;
874 UINT16 ProcessorArm64SocId :1;
875 UINT16 ProcessorReserved2 :6;
876 } PROCESSOR_CHARACTERISTIC_FLAGS;
877
878 ///
879 /// Processor Information - Status
880 ///
881 typedef union {
882 struct {
883 UINT8 CpuStatus :3; ///< Indicates the status of the processor.
884 UINT8 Reserved1 :3; ///< Reserved for future use. Must be set to zero.
885 UINT8 SocketPopulated :1; ///< Indicates if the processor socket is populated or not.
886 UINT8 Reserved2 :1; ///< Reserved for future use. Must be set to zero.
887 } Bits;
888 UINT8 Data;
889 } PROCESSOR_STATUS_DATA;
890
891 typedef struct {
892 PROCESSOR_SIGNATURE Signature;
893 PROCESSOR_FEATURE_FLAGS FeatureFlags;
894 } PROCESSOR_ID_DATA;
895
896 ///
897 /// Processor Information (Type 4).
898 ///
899 /// The information in this structure defines the attributes of a single processor;
900 /// a separate structure instance is provided for each system processor socket/slot.
901 /// For example, a system with an IntelDX2 processor would have a single
902 /// structure instance, while a system with an IntelSX2 processor would have a structure
903 /// to describe the main CPU, and a second structure to describe the 80487 co-processor.
904 ///
905 typedef struct {
906 SMBIOS_STRUCTURE Hdr;
907 SMBIOS_TABLE_STRING Socket;
908 UINT8 ProcessorType; ///< The enumeration value from PROCESSOR_TYPE_DATA.
909 UINT8 ProcessorFamily; ///< The enumeration value from PROCESSOR_FAMILY_DATA.
910 SMBIOS_TABLE_STRING ProcessorManufacturer;
911 PROCESSOR_ID_DATA ProcessorId;
912 SMBIOS_TABLE_STRING ProcessorVersion;
913 PROCESSOR_VOLTAGE Voltage;
914 UINT16 ExternalClock;
915 UINT16 MaxSpeed;
916 UINT16 CurrentSpeed;
917 UINT8 Status;
918 UINT8 ProcessorUpgrade; ///< The enumeration value from PROCESSOR_UPGRADE.
919 UINT16 L1CacheHandle;
920 UINT16 L2CacheHandle;
921 UINT16 L3CacheHandle;
922 SMBIOS_TABLE_STRING SerialNumber;
923 SMBIOS_TABLE_STRING AssetTag;
924 SMBIOS_TABLE_STRING PartNumber;
925 //
926 // Add for smbios 2.5
927 //
928 UINT8 CoreCount;
929 UINT8 EnabledCoreCount;
930 UINT8 ThreadCount;
931 UINT16 ProcessorCharacteristics;
932 //
933 // Add for smbios 2.6
934 //
935 UINT16 ProcessorFamily2;
936 //
937 // Add for smbios 3.0
938 //
939 UINT16 CoreCount2;
940 UINT16 EnabledCoreCount2;
941 UINT16 ThreadCount2;
942 } SMBIOS_TABLE_TYPE4;
943
944 ///
945 /// Memory Controller Error Detecting Method.
946 ///
947 typedef enum {
948 ErrorDetectingMethodOther = 0x01,
949 ErrorDetectingMethodUnknown = 0x02,
950 ErrorDetectingMethodNone = 0x03,
951 ErrorDetectingMethodParity = 0x04,
952 ErrorDetectingMethod32Ecc = 0x05,
953 ErrorDetectingMethod64Ecc = 0x06,
954 ErrorDetectingMethod128Ecc = 0x07,
955 ErrorDetectingMethodCrc = 0x08
956 } MEMORY_ERROR_DETECT_METHOD;
957
958 ///
959 /// Memory Controller Error Correcting Capability.
960 ///
961 typedef struct {
962 UINT8 Other :1;
963 UINT8 Unknown :1;
964 UINT8 None :1;
965 UINT8 SingleBitErrorCorrect :1;
966 UINT8 DoubleBitErrorCorrect :1;
967 UINT8 ErrorScrubbing :1;
968 UINT8 Reserved :2;
969 } MEMORY_ERROR_CORRECT_CAPABILITY;
970
971 ///
972 /// Memory Controller Information - Interleave Support.
973 ///
974 typedef enum {
975 MemoryInterleaveOther = 0x01,
976 MemoryInterleaveUnknown = 0x02,
977 MemoryInterleaveOneWay = 0x03,
978 MemoryInterleaveTwoWay = 0x04,
979 MemoryInterleaveFourWay = 0x05,
980 MemoryInterleaveEightWay = 0x06,
981 MemoryInterleaveSixteenWay = 0x07
982 } MEMORY_SUPPORT_INTERLEAVE_TYPE;
983
984 ///
985 /// Memory Controller Information - Memory Speeds.
986 ///
987 typedef struct {
988 UINT16 Other :1;
989 UINT16 Unknown :1;
990 UINT16 SeventyNs:1;
991 UINT16 SixtyNs :1;
992 UINT16 FiftyNs :1;
993 UINT16 Reserved :11;
994 } MEMORY_SPEED_TYPE;
995
996 ///
997 /// Memory Controller Information (Type 5, Obsolete).
998 ///
999 /// The information in this structure defines the attributes of the system's memory controller(s)
1000 /// and the supported attributes of any memory-modules present in the sockets controlled by
1001 /// this controller.
1002 /// Note: This structure, and its companion Memory Module Information (Type 6, Obsolete),
1003 /// are obsolete starting with version 2.1 of this specification. The Physical Memory Array (Type 16)
1004 /// and Memory Device (Type 17) structures should be used instead. BIOS providers might
1005 /// choose to implement both memory description types to allow existing DMI browsers
1006 /// to properly display the system's memory attributes.
1007 ///
1008 typedef struct {
1009 SMBIOS_STRUCTURE Hdr;
1010 UINT8 ErrDetectMethod; ///< The enumeration value from MEMORY_ERROR_DETECT_METHOD.
1011 MEMORY_ERROR_CORRECT_CAPABILITY ErrCorrectCapability;
1012 UINT8 SupportInterleave; ///< The enumeration value from MEMORY_SUPPORT_INTERLEAVE_TYPE.
1013 UINT8 CurrentInterleave; ///< The enumeration value from MEMORY_SUPPORT_INTERLEAVE_TYPE .
1014 UINT8 MaxMemoryModuleSize;
1015 MEMORY_SPEED_TYPE SupportSpeed;
1016 UINT16 SupportMemoryType;
1017 UINT8 MemoryModuleVoltage;
1018 UINT8 AssociatedMemorySlotNum;
1019 UINT16 MemoryModuleConfigHandles[1];
1020 } SMBIOS_TABLE_TYPE5;
1021
1022 ///
1023 /// Memory Module Information - Memory Types
1024 ///
1025 typedef struct {
1026 UINT16 Other :1;
1027 UINT16 Unknown :1;
1028 UINT16 Standard :1;
1029 UINT16 FastPageMode:1;
1030 UINT16 Edo :1;
1031 UINT16 Parity :1;
1032 UINT16 Ecc :1;
1033 UINT16 Simm :1;
1034 UINT16 Dimm :1;
1035 UINT16 BurstEdo :1;
1036 UINT16 Sdram :1;
1037 UINT16 Reserved :5;
1038 } MEMORY_CURRENT_TYPE;
1039
1040 ///
1041 /// Memory Module Information - Memory Size.
1042 ///
1043 typedef struct {
1044 UINT8 InstalledOrEnabledSize :7; ///< Size (n), where 2**n is the size in MB.
1045 UINT8 SingleOrDoubleBank :1;
1046 } MEMORY_INSTALLED_ENABLED_SIZE;
1047
1048 ///
1049 /// Memory Module Information (Type 6, Obsolete)
1050 ///
1051 /// One Memory Module Information structure is included for each memory-module socket
1052 /// in the system. The structure describes the speed, type, size, and error status
1053 /// of each system memory module. The supported attributes of each module are described
1054 /// by the "owning" Memory Controller Information structure.
1055 /// Note: This structure, and its companion Memory Controller Information (Type 5, Obsolete),
1056 /// are obsolete starting with version 2.1 of this specification. The Physical Memory Array (Type 16)
1057 /// and Memory Device (Type 17) structures should be used instead.
1058 ///
1059 typedef struct {
1060 SMBIOS_STRUCTURE Hdr;
1061 SMBIOS_TABLE_STRING SocketDesignation;
1062 UINT8 BankConnections;
1063 UINT8 CurrentSpeed;
1064 MEMORY_CURRENT_TYPE CurrentMemoryType;
1065 MEMORY_INSTALLED_ENABLED_SIZE InstalledSize;
1066 MEMORY_INSTALLED_ENABLED_SIZE EnabledSize;
1067 UINT8 ErrorStatus;
1068 } SMBIOS_TABLE_TYPE6;
1069
1070 ///
1071 /// Cache Information - SRAM Type.
1072 ///
1073 typedef struct {
1074 UINT16 Other :1;
1075 UINT16 Unknown :1;
1076 UINT16 NonBurst :1;
1077 UINT16 Burst :1;
1078 UINT16 PipelineBurst :1;
1079 UINT16 Synchronous :1;
1080 UINT16 Asynchronous :1;
1081 UINT16 Reserved :9;
1082 } CACHE_SRAM_TYPE_DATA;
1083
1084 ///
1085 /// Cache Information - Error Correction Type.
1086 ///
1087 typedef enum {
1088 CacheErrorOther = 0x01,
1089 CacheErrorUnknown = 0x02,
1090 CacheErrorNone = 0x03,
1091 CacheErrorParity = 0x04,
1092 CacheErrorSingleBit = 0x05, ///< ECC
1093 CacheErrorMultiBit = 0x06 ///< ECC
1094 } CACHE_ERROR_TYPE_DATA;
1095
1096 ///
1097 /// Cache Information - System Cache Type.
1098 ///
1099 typedef enum {
1100 CacheTypeOther = 0x01,
1101 CacheTypeUnknown = 0x02,
1102 CacheTypeInstruction = 0x03,
1103 CacheTypeData = 0x04,
1104 CacheTypeUnified = 0x05
1105 } CACHE_TYPE_DATA;
1106
1107 ///
1108 /// Cache Information - Associativity.
1109 ///
1110 typedef enum {
1111 CacheAssociativityOther = 0x01,
1112 CacheAssociativityUnknown = 0x02,
1113 CacheAssociativityDirectMapped = 0x03,
1114 CacheAssociativity2Way = 0x04,
1115 CacheAssociativity4Way = 0x05,
1116 CacheAssociativityFully = 0x06,
1117 CacheAssociativity8Way = 0x07,
1118 CacheAssociativity16Way = 0x08,
1119 CacheAssociativity12Way = 0x09,
1120 CacheAssociativity24Way = 0x0A,
1121 CacheAssociativity32Way = 0x0B,
1122 CacheAssociativity48Way = 0x0C,
1123 CacheAssociativity64Way = 0x0D,
1124 CacheAssociativity20Way = 0x0E
1125 } CACHE_ASSOCIATIVITY_DATA;
1126
1127 ///
1128 /// Cache Information (Type 7).
1129 ///
1130 /// The information in this structure defines the attributes of CPU cache device in the system.
1131 /// One structure is specified for each such device, whether the device is internal to
1132 /// or external to the CPU module. Cache modules can be associated with a processor structure
1133 /// in one or two ways, depending on the SMBIOS version.
1134 ///
1135 typedef struct {
1136 SMBIOS_STRUCTURE Hdr;
1137 SMBIOS_TABLE_STRING SocketDesignation;
1138 UINT16 CacheConfiguration;
1139 UINT16 MaximumCacheSize;
1140 UINT16 InstalledSize;
1141 CACHE_SRAM_TYPE_DATA SupportedSRAMType;
1142 CACHE_SRAM_TYPE_DATA CurrentSRAMType;
1143 UINT8 CacheSpeed;
1144 UINT8 ErrorCorrectionType; ///< The enumeration value from CACHE_ERROR_TYPE_DATA.
1145 UINT8 SystemCacheType; ///< The enumeration value from CACHE_TYPE_DATA.
1146 UINT8 Associativity; ///< The enumeration value from CACHE_ASSOCIATIVITY_DATA.
1147 //
1148 // Add for smbios 3.1.0
1149 //
1150 UINT32 MaximumCacheSize2;
1151 UINT32 InstalledSize2;
1152 } SMBIOS_TABLE_TYPE7;
1153
1154 ///
1155 /// Port Connector Information - Connector Types.
1156 ///
1157 typedef enum {
1158 PortConnectorTypeNone = 0x00,
1159 PortConnectorTypeCentronics = 0x01,
1160 PortConnectorTypeMiniCentronics = 0x02,
1161 PortConnectorTypeProprietary = 0x03,
1162 PortConnectorTypeDB25Male = 0x04,
1163 PortConnectorTypeDB25Female = 0x05,
1164 PortConnectorTypeDB15Male = 0x06,
1165 PortConnectorTypeDB15Female = 0x07,
1166 PortConnectorTypeDB9Male = 0x08,
1167 PortConnectorTypeDB9Female = 0x09,
1168 PortConnectorTypeRJ11 = 0x0A,
1169 PortConnectorTypeRJ45 = 0x0B,
1170 PortConnectorType50PinMiniScsi = 0x0C,
1171 PortConnectorTypeMiniDin = 0x0D,
1172 PortConnectorTypeMicroDin = 0x0E,
1173 PortConnectorTypePS2 = 0x0F,
1174 PortConnectorTypeInfrared = 0x10,
1175 PortConnectorTypeHpHil = 0x11,
1176 PortConnectorTypeUsb = 0x12,
1177 PortConnectorTypeSsaScsi = 0x13,
1178 PortConnectorTypeCircularDin8Male = 0x14,
1179 PortConnectorTypeCircularDin8Female = 0x15,
1180 PortConnectorTypeOnboardIde = 0x16,
1181 PortConnectorTypeOnboardFloppy = 0x17,
1182 PortConnectorType9PinDualInline = 0x18,
1183 PortConnectorType25PinDualInline = 0x19,
1184 PortConnectorType50PinDualInline = 0x1A,
1185 PortConnectorType68PinDualInline = 0x1B,
1186 PortConnectorTypeOnboardSoundInput = 0x1C,
1187 PortConnectorTypeMiniCentronicsType14 = 0x1D,
1188 PortConnectorTypeMiniCentronicsType26 = 0x1E,
1189 PortConnectorTypeHeadPhoneMiniJack = 0x1F,
1190 PortConnectorTypeBNC = 0x20,
1191 PortConnectorType1394 = 0x21,
1192 PortConnectorTypeSasSata = 0x22,
1193 PortConnectorTypeUsbTypeC = 0x23,
1194 PortConnectorTypePC98 = 0xA0,
1195 PortConnectorTypePC98Hireso = 0xA1,
1196 PortConnectorTypePCH98 = 0xA2,
1197 PortConnectorTypePC98Note = 0xA3,
1198 PortConnectorTypePC98Full = 0xA4,
1199 PortConnectorTypeOther = 0xFF
1200 } MISC_PORT_CONNECTOR_TYPE;
1201
1202 ///
1203 /// Port Connector Information - Port Types
1204 ///
1205 typedef enum {
1206 PortTypeNone = 0x00,
1207 PortTypeParallelXtAtCompatible = 0x01,
1208 PortTypeParallelPortPs2 = 0x02,
1209 PortTypeParallelPortEcp = 0x03,
1210 PortTypeParallelPortEpp = 0x04,
1211 PortTypeParallelPortEcpEpp = 0x05,
1212 PortTypeSerialXtAtCompatible = 0x06,
1213 PortTypeSerial16450Compatible = 0x07,
1214 PortTypeSerial16550Compatible = 0x08,
1215 PortTypeSerial16550ACompatible = 0x09,
1216 PortTypeScsi = 0x0A,
1217 PortTypeMidi = 0x0B,
1218 PortTypeJoyStick = 0x0C,
1219 PortTypeKeyboard = 0x0D,
1220 PortTypeMouse = 0x0E,
1221 PortTypeSsaScsi = 0x0F,
1222 PortTypeUsb = 0x10,
1223 PortTypeFireWire = 0x11,
1224 PortTypePcmciaTypeI = 0x12,
1225 PortTypePcmciaTypeII = 0x13,
1226 PortTypePcmciaTypeIII = 0x14,
1227 PortTypeCardBus = 0x15,
1228 PortTypeAccessBusPort = 0x16,
1229 PortTypeScsiII = 0x17,
1230 PortTypeScsiWide = 0x18,
1231 PortTypePC98 = 0x19,
1232 PortTypePC98Hireso = 0x1A,
1233 PortTypePCH98 = 0x1B,
1234 PortTypeVideoPort = 0x1C,
1235 PortTypeAudioPort = 0x1D,
1236 PortTypeModemPort = 0x1E,
1237 PortTypeNetworkPort = 0x1F,
1238 PortTypeSata = 0x20,
1239 PortTypeSas = 0x21,
1240 PortTypeMfdp = 0x22, ///< Multi-Function Display Port
1241 PortTypeThunderbolt = 0x23,
1242 PortType8251Compatible = 0xA0,
1243 PortType8251FifoCompatible = 0xA1,
1244 PortTypeOther = 0xFF
1245 } MISC_PORT_TYPE;
1246
1247 ///
1248 /// Port Connector Information (Type 8).
1249 ///
1250 /// The information in this structure defines the attributes of a system port connector,
1251 /// e.g. parallel, serial, keyboard, or mouse ports. The port's type and connector information
1252 /// are provided. One structure is present for each port provided by the system.
1253 ///
1254 typedef struct {
1255 SMBIOS_STRUCTURE Hdr;
1256 SMBIOS_TABLE_STRING InternalReferenceDesignator;
1257 UINT8 InternalConnectorType; ///< The enumeration value from MISC_PORT_CONNECTOR_TYPE.
1258 SMBIOS_TABLE_STRING ExternalReferenceDesignator;
1259 UINT8 ExternalConnectorType; ///< The enumeration value from MISC_PORT_CONNECTOR_TYPE.
1260 UINT8 PortType; ///< The enumeration value from MISC_PORT_TYPE.
1261 } SMBIOS_TABLE_TYPE8;
1262
1263 ///
1264 /// System Slots - Slot Type
1265 ///
1266 typedef enum {
1267 SlotTypeOther = 0x01,
1268 SlotTypeUnknown = 0x02,
1269 SlotTypeIsa = 0x03,
1270 SlotTypeMca = 0x04,
1271 SlotTypeEisa = 0x05,
1272 SlotTypePci = 0x06,
1273 SlotTypePcmcia = 0x07,
1274 SlotTypeVlVesa = 0x08,
1275 SlotTypeProprietary = 0x09,
1276 SlotTypeProcessorCardSlot = 0x0A,
1277 SlotTypeProprietaryMemoryCardSlot = 0x0B,
1278 SlotTypeIORiserCardSlot = 0x0C,
1279 SlotTypeNuBus = 0x0D,
1280 SlotTypePci66MhzCapable = 0x0E,
1281 SlotTypeAgp = 0x0F,
1282 SlotTypeApg2X = 0x10,
1283 SlotTypeAgp4X = 0x11,
1284 SlotTypePciX = 0x12,
1285 SlotTypeAgp8X = 0x13,
1286 SlotTypeM2Socket1_DP = 0x14,
1287 SlotTypeM2Socket1_SD = 0x15,
1288 SlotTypeM2Socket2 = 0x16,
1289 SlotTypeM2Socket3 = 0x17,
1290 SlotTypeMxmTypeI = 0x18,
1291 SlotTypeMxmTypeII = 0x19,
1292 SlotTypeMxmTypeIIIStandard = 0x1A,
1293 SlotTypeMxmTypeIIIHe = 0x1B,
1294 SlotTypeMxmTypeIV = 0x1C,
1295 SlotTypeMxm30TypeA = 0x1D,
1296 SlotTypeMxm30TypeB = 0x1E,
1297 SlotTypePciExpressGen2Sff_8639 = 0x1F,
1298 SlotTypePciExpressGen3Sff_8639 = 0x20,
1299 SlotTypePciExpressMini52pinWithBSKO = 0x21, ///< PCI Express Mini 52-pin (CEM spec. 2.0) with bottom-side keep-outs.
1300 SlotTypePciExpressMini52pinWithoutBSKO = 0x22, ///< PCI Express Mini 52-pin (CEM spec. 2.0) without bottom-side keep-outs.
1301 SlotTypePciExpressMini76pin = 0x23, ///< PCI Express Mini 76-pin (CEM spec. 2.0) Corresponds to Display-Mini card.
1302 SlotTypeCXLFlexbus10 = 0x30,
1303 SlotTypePC98C20 = 0xA0,
1304 SlotTypePC98C24 = 0xA1,
1305 SlotTypePC98E = 0xA2,
1306 SlotTypePC98LocalBus = 0xA3,
1307 SlotTypePC98Card = 0xA4,
1308 SlotTypePciExpress = 0xA5,
1309 SlotTypePciExpressX1 = 0xA6,
1310 SlotTypePciExpressX2 = 0xA7,
1311 SlotTypePciExpressX4 = 0xA8,
1312 SlotTypePciExpressX8 = 0xA9,
1313 SlotTypePciExpressX16 = 0xAA,
1314 SlotTypePciExpressGen2 = 0xAB,
1315 SlotTypePciExpressGen2X1 = 0xAC,
1316 SlotTypePciExpressGen2X2 = 0xAD,
1317 SlotTypePciExpressGen2X4 = 0xAE,
1318 SlotTypePciExpressGen2X8 = 0xAF,
1319 SlotTypePciExpressGen2X16 = 0xB0,
1320 SlotTypePciExpressGen3 = 0xB1,
1321 SlotTypePciExpressGen3X1 = 0xB2,
1322 SlotTypePciExpressGen3X2 = 0xB3,
1323 SlotTypePciExpressGen3X4 = 0xB4,
1324 SlotTypePciExpressGen3X8 = 0xB5,
1325 SlotTypePciExpressGen3X16 = 0xB6,
1326 SlotTypePciExpressGen4 = 0xB8,
1327 SlotTypePciExpressGen4X1 = 0xB9,
1328 SlotTypePciExpressGen4X2 = 0xBA,
1329 SlotTypePciExpressGen4X4 = 0xBB,
1330 SlotTypePciExpressGen4X8 = 0xBC,
1331 SlotTypePciExpressGen4X16 = 0xBD
1332 } MISC_SLOT_TYPE;
1333
1334 ///
1335 /// System Slots - Slot Data Bus Width.
1336 ///
1337 typedef enum {
1338 SlotDataBusWidthOther = 0x01,
1339 SlotDataBusWidthUnknown = 0x02,
1340 SlotDataBusWidth8Bit = 0x03,
1341 SlotDataBusWidth16Bit = 0x04,
1342 SlotDataBusWidth32Bit = 0x05,
1343 SlotDataBusWidth64Bit = 0x06,
1344 SlotDataBusWidth128Bit = 0x07,
1345 SlotDataBusWidth1X = 0x08, ///< Or X1
1346 SlotDataBusWidth2X = 0x09, ///< Or X2
1347 SlotDataBusWidth4X = 0x0A, ///< Or X4
1348 SlotDataBusWidth8X = 0x0B, ///< Or X8
1349 SlotDataBusWidth12X = 0x0C, ///< Or X12
1350 SlotDataBusWidth16X = 0x0D, ///< Or X16
1351 SlotDataBusWidth32X = 0x0E ///< Or X32
1352 } MISC_SLOT_DATA_BUS_WIDTH;
1353
1354 ///
1355 /// System Slots - Current Usage.
1356 ///
1357 typedef enum {
1358 SlotUsageOther = 0x01,
1359 SlotUsageUnknown = 0x02,
1360 SlotUsageAvailable = 0x03,
1361 SlotUsageInUse = 0x04,
1362 SlotUsageUnavailable = 0x05
1363 } MISC_SLOT_USAGE;
1364
1365 ///
1366 /// System Slots - Slot Length.
1367 ///
1368 typedef enum {
1369 SlotLengthOther = 0x01,
1370 SlotLengthUnknown = 0x02,
1371 SlotLengthShort = 0x03,
1372 SlotLengthLong = 0x04
1373 } MISC_SLOT_LENGTH;
1374
1375 ///
1376 /// System Slots - Slot Characteristics 1.
1377 ///
1378 typedef struct {
1379 UINT8 CharacteristicsUnknown :1;
1380 UINT8 Provides50Volts :1;
1381 UINT8 Provides33Volts :1;
1382 UINT8 SharedSlot :1;
1383 UINT8 PcCard16Supported :1;
1384 UINT8 CardBusSupported :1;
1385 UINT8 ZoomVideoSupported :1;
1386 UINT8 ModemRingResumeSupported:1;
1387 } MISC_SLOT_CHARACTERISTICS1;
1388 ///
1389 /// System Slots - Slot Characteristics 2.
1390 ///
1391 typedef struct {
1392 UINT8 PmeSignalSupported :1;
1393 UINT8 HotPlugDevicesSupported :1;
1394 UINT8 SmbusSignalSupported :1;
1395 UINT8 BifurcationSupported :1;
1396 UINT8 Reserved :4; ///< Set to 0.
1397 } MISC_SLOT_CHARACTERISTICS2;
1398
1399 ///
1400 /// System Slots - Peer Segment/Bus/Device/Function/Width Groups
1401 ///
1402 typedef struct {
1403 UINT16 SegmentGroupNum;
1404 UINT8 BusNum;
1405 UINT8 DevFuncNum;
1406 UINT8 DataBusWidth;
1407 } MISC_SLOT_PEER_GROUP;
1408
1409 ///
1410 /// System Slots (Type 9)
1411 ///
1412 /// The information in this structure defines the attributes of a system slot.
1413 /// One structure is provided for each slot in the system.
1414 ///
1415 ///
1416 typedef struct {
1417 SMBIOS_STRUCTURE Hdr;
1418 SMBIOS_TABLE_STRING SlotDesignation;
1419 UINT8 SlotType; ///< The enumeration value from MISC_SLOT_TYPE.
1420 UINT8 SlotDataBusWidth; ///< The enumeration value from MISC_SLOT_DATA_BUS_WIDTH.
1421 UINT8 CurrentUsage; ///< The enumeration value from MISC_SLOT_USAGE.
1422 UINT8 SlotLength; ///< The enumeration value from MISC_SLOT_LENGTH.
1423 UINT16 SlotID;
1424 MISC_SLOT_CHARACTERISTICS1 SlotCharacteristics1;
1425 MISC_SLOT_CHARACTERISTICS2 SlotCharacteristics2;
1426 //
1427 // Add for smbios 2.6
1428 //
1429 UINT16 SegmentGroupNum;
1430 UINT8 BusNum;
1431 UINT8 DevFuncNum;
1432 //
1433 // Add for smbios 3.2
1434 //
1435 UINT8 DataBusWidth;
1436 UINT8 PeerGroupingCount;
1437 MISC_SLOT_PEER_GROUP PeerGroups[1];
1438 } SMBIOS_TABLE_TYPE9;
1439
1440 ///
1441 /// On Board Devices Information - Device Types.
1442 ///
1443 typedef enum {
1444 OnBoardDeviceTypeOther = 0x01,
1445 OnBoardDeviceTypeUnknown = 0x02,
1446 OnBoardDeviceTypeVideo = 0x03,
1447 OnBoardDeviceTypeScsiController = 0x04,
1448 OnBoardDeviceTypeEthernet = 0x05,
1449 OnBoardDeviceTypeTokenRing = 0x06,
1450 OnBoardDeviceTypeSound = 0x07,
1451 OnBoardDeviceTypePATAController = 0x08,
1452 OnBoardDeviceTypeSATAController = 0x09,
1453 OnBoardDeviceTypeSASController = 0x0A
1454 } MISC_ONBOARD_DEVICE_TYPE;
1455
1456 ///
1457 /// Device Item Entry
1458 ///
1459 typedef struct {
1460 UINT8 DeviceType; ///< Bit [6:0] - enumeration type of device from MISC_ONBOARD_DEVICE_TYPE.
1461 ///< Bit 7 - 1 : device enabled, 0 : device disabled.
1462 SMBIOS_TABLE_STRING DescriptionString;
1463 } DEVICE_STRUCT;
1464
1465 ///
1466 /// On Board Devices Information (Type 10, obsolete).
1467 ///
1468 /// Note: This structure is obsolete starting with version 2.6 specification; the Onboard Devices Extended
1469 /// Information (Type 41) structure should be used instead . BIOS providers can choose to implement both
1470 /// types to allow existing SMBIOS browsers to properly display the system's onboard devices information.
1471 /// The information in this structure defines the attributes of devices that are onboard (soldered onto)
1472 /// a system element, usually the baseboard. In general, an entry in this table implies that the BIOS
1473 /// has some level of control over the enabling of the associated device for use by the system.
1474 ///
1475 typedef struct {
1476 SMBIOS_STRUCTURE Hdr;
1477 DEVICE_STRUCT Device[1];
1478 } SMBIOS_TABLE_TYPE10;
1479
1480 ///
1481 /// OEM Strings (Type 11).
1482 /// This structure contains free form strings defined by the OEM. Examples of this are:
1483 /// Part Numbers for Reference Documents for the system, contact information for the manufacturer, etc.
1484 ///
1485 typedef struct {
1486 SMBIOS_STRUCTURE Hdr;
1487 UINT8 StringCount;
1488 } SMBIOS_TABLE_TYPE11;
1489
1490 ///
1491 /// System Configuration Options (Type 12).
1492 ///
1493 /// This structure contains information required to configure the base board's Jumpers and Switches.
1494 ///
1495 typedef struct {
1496 SMBIOS_STRUCTURE Hdr;
1497 UINT8 StringCount;
1498 } SMBIOS_TABLE_TYPE12;
1499
1500
1501 ///
1502 /// BIOS Language Information (Type 13).
1503 ///
1504 /// The information in this structure defines the installable language attributes of the BIOS.
1505 ///
1506 typedef struct {
1507 SMBIOS_STRUCTURE Hdr;
1508 UINT8 InstallableLanguages;
1509 UINT8 Flags;
1510 UINT8 Reserved[15];
1511 SMBIOS_TABLE_STRING CurrentLanguages;
1512 } SMBIOS_TABLE_TYPE13;
1513
1514 ///
1515 /// Group Item Entry
1516 ///
1517 typedef struct {
1518 UINT8 ItemType;
1519 UINT16 ItemHandle;
1520 } GROUP_STRUCT;
1521
1522 ///
1523 /// Group Associations (Type 14).
1524 ///
1525 /// The Group Associations structure is provided for OEMs who want to specify
1526 /// the arrangement or hierarchy of certain components (including other Group Associations)
1527 /// within the system.
1528 ///
1529 typedef struct {
1530 SMBIOS_STRUCTURE Hdr;
1531 SMBIOS_TABLE_STRING GroupName;
1532 GROUP_STRUCT Group[1];
1533 } SMBIOS_TABLE_TYPE14;
1534
1535 ///
1536 /// System Event Log - Event Log Types.
1537 ///
1538 typedef enum {
1539 EventLogTypeReserved = 0x00,
1540 EventLogTypeSingleBitECC = 0x01,
1541 EventLogTypeMultiBitECC = 0x02,
1542 EventLogTypeParityMemErr = 0x03,
1543 EventLogTypeBusTimeOut = 0x04,
1544 EventLogTypeIOChannelCheck = 0x05,
1545 EventLogTypeSoftwareNMI = 0x06,
1546 EventLogTypePOSTMemResize = 0x07,
1547 EventLogTypePOSTErr = 0x08,
1548 EventLogTypePCIParityErr = 0x09,
1549 EventLogTypePCISystemErr = 0x0A,
1550 EventLogTypeCPUFailure = 0x0B,
1551 EventLogTypeEISATimeOut = 0x0C,
1552 EventLogTypeMemLogDisabled = 0x0D,
1553 EventLogTypeLoggingDisabled = 0x0E,
1554 EventLogTypeSysLimitExce = 0x10,
1555 EventLogTypeAsyncHWTimer = 0x11,
1556 EventLogTypeSysConfigInfo = 0x12,
1557 EventLogTypeHDInfo = 0x13,
1558 EventLogTypeSysReconfig = 0x14,
1559 EventLogTypeUncorrectCPUErr = 0x15,
1560 EventLogTypeAreaResetAndClr = 0x16,
1561 EventLogTypeSystemBoot = 0x17,
1562 EventLogTypeUnused = 0x18, ///< 0x18 - 0x7F
1563 EventLogTypeAvailForSys = 0x80, ///< 0x80 - 0xFE
1564 EventLogTypeEndOfLog = 0xFF
1565 } EVENT_LOG_TYPE_DATA;
1566
1567 ///
1568 /// System Event Log - Variable Data Format Types.
1569 ///
1570 typedef enum {
1571 EventLogVariableNone = 0x00,
1572 EventLogVariableHandle = 0x01,
1573 EventLogVariableMutilEvent = 0x02,
1574 EventLogVariableMutilEventHandle = 0x03,
1575 EventLogVariablePOSTResultBitmap = 0x04,
1576 EventLogVariableSysManagementType = 0x05,
1577 EventLogVariableMutliEventSysManagmentType = 0x06,
1578 EventLogVariableUnused = 0x07,
1579 EventLogVariableOEMAssigned = 0x80
1580 } EVENT_LOG_VARIABLE_DATA;
1581
1582 ///
1583 /// Event Log Type Descriptors
1584 ///
1585 typedef struct {
1586 UINT8 LogType; ///< The enumeration value from EVENT_LOG_TYPE_DATA.
1587 UINT8 DataFormatType;
1588 } EVENT_LOG_TYPE;
1589
1590 ///
1591 /// System Event Log (Type 15).
1592 ///
1593 /// The presence of this structure within the SMBIOS data returned for a system indicates
1594 /// that the system supports an event log. An event log is a fixed-length area within a
1595 /// non-volatile storage element, starting with a fixed-length (and vendor-specific) header
1596 /// record, followed by one or more variable-length log records.
1597 ///
1598 typedef struct {
1599 SMBIOS_STRUCTURE Hdr;
1600 UINT16 LogAreaLength;
1601 UINT16 LogHeaderStartOffset;
1602 UINT16 LogDataStartOffset;
1603 UINT8 AccessMethod;
1604 UINT8 LogStatus;
1605 UINT32 LogChangeToken;
1606 UINT32 AccessMethodAddress;
1607 UINT8 LogHeaderFormat;
1608 UINT8 NumberOfSupportedLogTypeDescriptors;
1609 UINT8 LengthOfLogTypeDescriptor;
1610 EVENT_LOG_TYPE EventLogTypeDescriptors[1];
1611 } SMBIOS_TABLE_TYPE15;
1612
1613 ///
1614 /// Physical Memory Array - Location.
1615 ///
1616 typedef enum {
1617 MemoryArrayLocationOther = 0x01,
1618 MemoryArrayLocationUnknown = 0x02,
1619 MemoryArrayLocationSystemBoard = 0x03,
1620 MemoryArrayLocationIsaAddonCard = 0x04,
1621 MemoryArrayLocationEisaAddonCard = 0x05,
1622 MemoryArrayLocationPciAddonCard = 0x06,
1623 MemoryArrayLocationMcaAddonCard = 0x07,
1624 MemoryArrayLocationPcmciaAddonCard = 0x08,
1625 MemoryArrayLocationProprietaryAddonCard = 0x09,
1626 MemoryArrayLocationNuBus = 0x0A,
1627 MemoryArrayLocationPc98C20AddonCard = 0xA0,
1628 MemoryArrayLocationPc98C24AddonCard = 0xA1,
1629 MemoryArrayLocationPc98EAddonCard = 0xA2,
1630 MemoryArrayLocationPc98LocalBusAddonCard = 0xA3,
1631 MemoryArrayLocationCXLFlexbus10AddonCard = 0xA4
1632 } MEMORY_ARRAY_LOCATION;
1633
1634 ///
1635 /// Physical Memory Array - Use.
1636 ///
1637 typedef enum {
1638 MemoryArrayUseOther = 0x01,
1639 MemoryArrayUseUnknown = 0x02,
1640 MemoryArrayUseSystemMemory = 0x03,
1641 MemoryArrayUseVideoMemory = 0x04,
1642 MemoryArrayUseFlashMemory = 0x05,
1643 MemoryArrayUseNonVolatileRam = 0x06,
1644 MemoryArrayUseCacheMemory = 0x07
1645 } MEMORY_ARRAY_USE;
1646
1647 ///
1648 /// Physical Memory Array - Error Correction Types.
1649 ///
1650 typedef enum {
1651 MemoryErrorCorrectionOther = 0x01,
1652 MemoryErrorCorrectionUnknown = 0x02,
1653 MemoryErrorCorrectionNone = 0x03,
1654 MemoryErrorCorrectionParity = 0x04,
1655 MemoryErrorCorrectionSingleBitEcc = 0x05,
1656 MemoryErrorCorrectionMultiBitEcc = 0x06,
1657 MemoryErrorCorrectionCrc = 0x07
1658 } MEMORY_ERROR_CORRECTION;
1659
1660 ///
1661 /// Physical Memory Array (Type 16).
1662 ///
1663 /// This structure describes a collection of memory devices that operate
1664 /// together to form a memory address space.
1665 ///
1666 typedef struct {
1667 SMBIOS_STRUCTURE Hdr;
1668 UINT8 Location; ///< The enumeration value from MEMORY_ARRAY_LOCATION.
1669 UINT8 Use; ///< The enumeration value from MEMORY_ARRAY_USE.
1670 UINT8 MemoryErrorCorrection; ///< The enumeration value from MEMORY_ERROR_CORRECTION.
1671 UINT32 MaximumCapacity;
1672 UINT16 MemoryErrorInformationHandle;
1673 UINT16 NumberOfMemoryDevices;
1674 //
1675 // Add for smbios 2.7
1676 //
1677 UINT64 ExtendedMaximumCapacity;
1678 } SMBIOS_TABLE_TYPE16;
1679
1680 ///
1681 /// Memory Device - Form Factor.
1682 ///
1683 typedef enum {
1684 MemoryFormFactorOther = 0x01,
1685 MemoryFormFactorUnknown = 0x02,
1686 MemoryFormFactorSimm = 0x03,
1687 MemoryFormFactorSip = 0x04,
1688 MemoryFormFactorChip = 0x05,
1689 MemoryFormFactorDip = 0x06,
1690 MemoryFormFactorZip = 0x07,
1691 MemoryFormFactorProprietaryCard = 0x08,
1692 MemoryFormFactorDimm = 0x09,
1693 MemoryFormFactorTsop = 0x0A,
1694 MemoryFormFactorRowOfChips = 0x0B,
1695 MemoryFormFactorRimm = 0x0C,
1696 MemoryFormFactorSodimm = 0x0D,
1697 MemoryFormFactorSrimm = 0x0E,
1698 MemoryFormFactorFbDimm = 0x0F,
1699 MemoryFormFactorDie = 0x10
1700 } MEMORY_FORM_FACTOR;
1701
1702 ///
1703 /// Memory Device - Type
1704 ///
1705 typedef enum {
1706 MemoryTypeOther = 0x01,
1707 MemoryTypeUnknown = 0x02,
1708 MemoryTypeDram = 0x03,
1709 MemoryTypeEdram = 0x04,
1710 MemoryTypeVram = 0x05,
1711 MemoryTypeSram = 0x06,
1712 MemoryTypeRam = 0x07,
1713 MemoryTypeRom = 0x08,
1714 MemoryTypeFlash = 0x09,
1715 MemoryTypeEeprom = 0x0A,
1716 MemoryTypeFeprom = 0x0B,
1717 MemoryTypeEprom = 0x0C,
1718 MemoryTypeCdram = 0x0D,
1719 MemoryType3Dram = 0x0E,
1720 MemoryTypeSdram = 0x0F,
1721 MemoryTypeSgram = 0x10,
1722 MemoryTypeRdram = 0x11,
1723 MemoryTypeDdr = 0x12,
1724 MemoryTypeDdr2 = 0x13,
1725 MemoryTypeDdr2FbDimm = 0x14,
1726 MemoryTypeDdr3 = 0x18,
1727 MemoryTypeFbd2 = 0x19,
1728 MemoryTypeDdr4 = 0x1A,
1729 MemoryTypeLpddr = 0x1B,
1730 MemoryTypeLpddr2 = 0x1C,
1731 MemoryTypeLpddr3 = 0x1D,
1732 MemoryTypeLpddr4 = 0x1E,
1733 MemoryTypeLogicalNonVolatileDevice = 0x1F,
1734 MemoryTypeHBM = 0x20,
1735 MemoryTypeHBM2 = 0x21,
1736 MemoryTypeDdr5 = 0x22,
1737 MemoryTypeLpddr5 = 0x23
1738 } MEMORY_DEVICE_TYPE;
1739
1740 ///
1741 /// Memory Device - Type Detail
1742 ///
1743 typedef struct {
1744 UINT16 Reserved :1;
1745 UINT16 Other :1;
1746 UINT16 Unknown :1;
1747 UINT16 FastPaged :1;
1748 UINT16 StaticColumn :1;
1749 UINT16 PseudoStatic :1;
1750 UINT16 Rambus :1;
1751 UINT16 Synchronous :1;
1752 UINT16 Cmos :1;
1753 UINT16 Edo :1;
1754 UINT16 WindowDram :1;
1755 UINT16 CacheDram :1;
1756 UINT16 Nonvolatile :1;
1757 UINT16 Registered :1;
1758 UINT16 Unbuffered :1;
1759 UINT16 LrDimm :1;
1760 } MEMORY_DEVICE_TYPE_DETAIL;
1761
1762 ///
1763 /// Memory Device - Memory Technology
1764 ///
1765 typedef enum {
1766 MemoryTechnologyOther = 0x01,
1767 MemoryTechnologyUnknown = 0x02,
1768 MemoryTechnologyDram = 0x03,
1769 MemoryTechnologyNvdimmN = 0x04,
1770 MemoryTechnologyNvdimmF = 0x05,
1771 MemoryTechnologyNvdimmP = 0x06,
1772 //
1773 // This definition is updated to represent Intel
1774 // Optane DC Presistent Memory in SMBIOS spec 3.3.0
1775 //
1776 MemoryTechnologyIntelPersistentMemory = 0x07
1777 } MEMORY_DEVICE_TECHNOLOGY;
1778
1779 ///
1780 /// Memory Device - Memory Operating Mode Capability
1781 ///
1782 typedef union {
1783 ///
1784 /// Individual bit fields
1785 ///
1786 struct {
1787 UINT16 Reserved :1; ///< Set to 0.
1788 UINT16 Other :1;
1789 UINT16 Unknown :1;
1790 UINT16 VolatileMemory :1;
1791 UINT16 ByteAccessiblePersistentMemory :1;
1792 UINT16 BlockAccessiblePersistentMemory :1;
1793 UINT16 Reserved2 :10; ///< Set to 0.
1794 } Bits;
1795 ///
1796 /// All bit fields as a 16-bit value
1797 ///
1798 UINT16 Uint16;
1799 } MEMORY_DEVICE_OPERATING_MODE_CAPABILITY;
1800
1801 ///
1802 /// Memory Device (Type 17).
1803 ///
1804 /// This structure describes a single memory device that is part of
1805 /// a larger Physical Memory Array (Type 16).
1806 /// Note: If a system includes memory-device sockets, the SMBIOS implementation
1807 /// includes a Memory Device structure instance for each slot, whether or not the
1808 /// socket is currently populated.
1809 ///
1810 typedef struct {
1811 SMBIOS_STRUCTURE Hdr;
1812 UINT16 MemoryArrayHandle;
1813 UINT16 MemoryErrorInformationHandle;
1814 UINT16 TotalWidth;
1815 UINT16 DataWidth;
1816 UINT16 Size;
1817 UINT8 FormFactor; ///< The enumeration value from MEMORY_FORM_FACTOR.
1818 UINT8 DeviceSet;
1819 SMBIOS_TABLE_STRING DeviceLocator;
1820 SMBIOS_TABLE_STRING BankLocator;
1821 UINT8 MemoryType; ///< The enumeration value from MEMORY_DEVICE_TYPE.
1822 MEMORY_DEVICE_TYPE_DETAIL TypeDetail;
1823 UINT16 Speed;
1824 SMBIOS_TABLE_STRING Manufacturer;
1825 SMBIOS_TABLE_STRING SerialNumber;
1826 SMBIOS_TABLE_STRING AssetTag;
1827 SMBIOS_TABLE_STRING PartNumber;
1828 //
1829 // Add for smbios 2.6
1830 //
1831 UINT8 Attributes;
1832 //
1833 // Add for smbios 2.7
1834 //
1835 UINT32 ExtendedSize;
1836 //
1837 // Keep using name "ConfiguredMemoryClockSpeed" for compatibility
1838 // although this field is renamed from "Configured Memory Clock Speed"
1839 // to "Configured Memory Speed" in smbios 3.2.0.
1840 //
1841 UINT16 ConfiguredMemoryClockSpeed;
1842 //
1843 // Add for smbios 2.8.0
1844 //
1845 UINT16 MinimumVoltage;
1846 UINT16 MaximumVoltage;
1847 UINT16 ConfiguredVoltage;
1848 //
1849 // Add for smbios 3.2.0
1850 //
1851 UINT8 MemoryTechnology; ///< The enumeration value from MEMORY_DEVICE_TECHNOLOGY
1852 MEMORY_DEVICE_OPERATING_MODE_CAPABILITY MemoryOperatingModeCapability;
1853 SMBIOS_TABLE_STRING FirmwareVersion;
1854 UINT16 ModuleManufacturerID;
1855 UINT16 ModuleProductID;
1856 UINT16 MemorySubsystemControllerManufacturerID;
1857 UINT16 MemorySubsystemControllerProductID;
1858 UINT64 NonVolatileSize;
1859 UINT64 VolatileSize;
1860 UINT64 CacheSize;
1861 UINT64 LogicalSize;
1862 //
1863 // Add for smbios 3.3.0
1864 //
1865 UINT32 ExtendedSpeed;
1866 UINT32 ExtendedConfiguredMemorySpeed;
1867 } SMBIOS_TABLE_TYPE17;
1868
1869 ///
1870 /// 32-bit Memory Error Information - Error Type.
1871 ///
1872 typedef enum {
1873 MemoryErrorOther = 0x01,
1874 MemoryErrorUnknown = 0x02,
1875 MemoryErrorOk = 0x03,
1876 MemoryErrorBadRead = 0x04,
1877 MemoryErrorParity = 0x05,
1878 MemoryErrorSigleBit = 0x06,
1879 MemoryErrorDoubleBit = 0x07,
1880 MemoryErrorMultiBit = 0x08,
1881 MemoryErrorNibble = 0x09,
1882 MemoryErrorChecksum = 0x0A,
1883 MemoryErrorCrc = 0x0B,
1884 MemoryErrorCorrectSingleBit = 0x0C,
1885 MemoryErrorCorrected = 0x0D,
1886 MemoryErrorUnCorrectable = 0x0E
1887 } MEMORY_ERROR_TYPE;
1888
1889 ///
1890 /// 32-bit Memory Error Information - Error Granularity.
1891 ///
1892 typedef enum {
1893 MemoryGranularityOther = 0x01,
1894 MemoryGranularityOtherUnknown = 0x02,
1895 MemoryGranularityDeviceLevel = 0x03,
1896 MemoryGranularityMemPartitionLevel = 0x04
1897 } MEMORY_ERROR_GRANULARITY;
1898
1899 ///
1900 /// 32-bit Memory Error Information - Error Operation.
1901 ///
1902 typedef enum {
1903 MemoryErrorOperationOther = 0x01,
1904 MemoryErrorOperationUnknown = 0x02,
1905 MemoryErrorOperationRead = 0x03,
1906 MemoryErrorOperationWrite = 0x04,
1907 MemoryErrorOperationPartialWrite = 0x05
1908 } MEMORY_ERROR_OPERATION;
1909
1910 ///
1911 /// 32-bit Memory Error Information (Type 18).
1912 ///
1913 /// This structure identifies the specifics of an error that might be detected
1914 /// within a Physical Memory Array.
1915 ///
1916 typedef struct {
1917 SMBIOS_STRUCTURE Hdr;
1918 UINT8 ErrorType; ///< The enumeration value from MEMORY_ERROR_TYPE.
1919 UINT8 ErrorGranularity; ///< The enumeration value from MEMORY_ERROR_GRANULARITY.
1920 UINT8 ErrorOperation; ///< The enumeration value from MEMORY_ERROR_OPERATION.
1921 UINT32 VendorSyndrome;
1922 UINT32 MemoryArrayErrorAddress;
1923 UINT32 DeviceErrorAddress;
1924 UINT32 ErrorResolution;
1925 } SMBIOS_TABLE_TYPE18;
1926
1927 ///
1928 /// Memory Array Mapped Address (Type 19).
1929 ///
1930 /// This structure provides the address mapping for a Physical Memory Array.
1931 /// One structure is present for each contiguous address range described.
1932 ///
1933 typedef struct {
1934 SMBIOS_STRUCTURE Hdr;
1935 UINT32 StartingAddress;
1936 UINT32 EndingAddress;
1937 UINT16 MemoryArrayHandle;
1938 UINT8 PartitionWidth;
1939 //
1940 // Add for smbios 2.7
1941 //
1942 UINT64 ExtendedStartingAddress;
1943 UINT64 ExtendedEndingAddress;
1944 } SMBIOS_TABLE_TYPE19;
1945
1946 ///
1947 /// Memory Device Mapped Address (Type 20).
1948 ///
1949 /// This structure maps memory address space usually to a device-level granularity.
1950 /// One structure is present for each contiguous address range described.
1951 ///
1952 typedef struct {
1953 SMBIOS_STRUCTURE Hdr;
1954 UINT32 StartingAddress;
1955 UINT32 EndingAddress;
1956 UINT16 MemoryDeviceHandle;
1957 UINT16 MemoryArrayMappedAddressHandle;
1958 UINT8 PartitionRowPosition;
1959 UINT8 InterleavePosition;
1960 UINT8 InterleavedDataDepth;
1961 //
1962 // Add for smbios 2.7
1963 //
1964 UINT64 ExtendedStartingAddress;
1965 UINT64 ExtendedEndingAddress;
1966 } SMBIOS_TABLE_TYPE20;
1967
1968 ///
1969 /// Built-in Pointing Device - Type
1970 ///
1971 typedef enum {
1972 PointingDeviceTypeOther = 0x01,
1973 PointingDeviceTypeUnknown = 0x02,
1974 PointingDeviceTypeMouse = 0x03,
1975 PointingDeviceTypeTrackBall = 0x04,
1976 PointingDeviceTypeTrackPoint = 0x05,
1977 PointingDeviceTypeGlidePoint = 0x06,
1978 PointingDeviceTouchPad = 0x07,
1979 PointingDeviceTouchScreen = 0x08,
1980 PointingDeviceOpticalSensor = 0x09
1981 } BUILTIN_POINTING_DEVICE_TYPE;
1982
1983 ///
1984 /// Built-in Pointing Device - Interface.
1985 ///
1986 typedef enum {
1987 PointingDeviceInterfaceOther = 0x01,
1988 PointingDeviceInterfaceUnknown = 0x02,
1989 PointingDeviceInterfaceSerial = 0x03,
1990 PointingDeviceInterfacePs2 = 0x04,
1991 PointingDeviceInterfaceInfrared = 0x05,
1992 PointingDeviceInterfaceHpHil = 0x06,
1993 PointingDeviceInterfaceBusMouse = 0x07,
1994 PointingDeviceInterfaceADB = 0x08,
1995 PointingDeviceInterfaceBusMouseDB9 = 0xA0,
1996 PointingDeviceInterfaceBusMouseMicroDin = 0xA1,
1997 PointingDeviceInterfaceUsb = 0xA2
1998 } BUILTIN_POINTING_DEVICE_INTERFACE;
1999
2000 ///
2001 /// Built-in Pointing Device (Type 21).
2002 ///
2003 /// This structure describes the attributes of the built-in pointing device for the
2004 /// system. The presence of this structure does not imply that the built-in
2005 /// pointing device is active for the system's use!
2006 ///
2007 typedef struct {
2008 SMBIOS_STRUCTURE Hdr;
2009 UINT8 Type; ///< The enumeration value from BUILTIN_POINTING_DEVICE_TYPE.
2010 UINT8 Interface; ///< The enumeration value from BUILTIN_POINTING_DEVICE_INTERFACE.
2011 UINT8 NumberOfButtons;
2012 } SMBIOS_TABLE_TYPE21;
2013
2014 ///
2015 /// Portable Battery - Device Chemistry
2016 ///
2017 typedef enum {
2018 PortableBatteryDeviceChemistryOther = 0x01,
2019 PortableBatteryDeviceChemistryUnknown = 0x02,
2020 PortableBatteryDeviceChemistryLeadAcid = 0x03,
2021 PortableBatteryDeviceChemistryNickelCadmium = 0x04,
2022 PortableBatteryDeviceChemistryNickelMetalHydride = 0x05,
2023 PortableBatteryDeviceChemistryLithiumIon = 0x06,
2024 PortableBatteryDeviceChemistryZincAir = 0x07,
2025 PortableBatteryDeviceChemistryLithiumPolymer = 0x08
2026 } PORTABLE_BATTERY_DEVICE_CHEMISTRY;
2027
2028 ///
2029 /// Portable Battery (Type 22).
2030 ///
2031 /// This structure describes the attributes of the portable battery(s) for the system.
2032 /// The structure contains the static attributes for the group. Each structure describes
2033 /// a single battery pack's attributes.
2034 ///
2035 typedef struct {
2036 SMBIOS_STRUCTURE Hdr;
2037 SMBIOS_TABLE_STRING Location;
2038 SMBIOS_TABLE_STRING Manufacturer;
2039 SMBIOS_TABLE_STRING ManufactureDate;
2040 SMBIOS_TABLE_STRING SerialNumber;
2041 SMBIOS_TABLE_STRING DeviceName;
2042 UINT8 DeviceChemistry; ///< The enumeration value from PORTABLE_BATTERY_DEVICE_CHEMISTRY.
2043 UINT16 DeviceCapacity;
2044 UINT16 DesignVoltage;
2045 SMBIOS_TABLE_STRING SBDSVersionNumber;
2046 UINT8 MaximumErrorInBatteryData;
2047 UINT16 SBDSSerialNumber;
2048 UINT16 SBDSManufactureDate;
2049 SMBIOS_TABLE_STRING SBDSDeviceChemistry;
2050 UINT8 DesignCapacityMultiplier;
2051 UINT32 OEMSpecific;
2052 } SMBIOS_TABLE_TYPE22;
2053
2054 ///
2055 /// System Reset (Type 23)
2056 ///
2057 /// This structure describes whether Automatic System Reset functions enabled (Status).
2058 /// If the system has a watchdog Timer and the timer is not reset (Timer Reset)
2059 /// before the Interval elapses, an automatic system reset will occur. The system will re-boot
2060 /// according to the Boot Option. This function may repeat until the Limit is reached, at which time
2061 /// the system will re-boot according to the Boot Option at Limit.
2062 ///
2063 typedef struct {
2064 SMBIOS_STRUCTURE Hdr;
2065 UINT8 Capabilities;
2066 UINT16 ResetCount;
2067 UINT16 ResetLimit;
2068 UINT16 TimerInterval;
2069 UINT16 Timeout;
2070 } SMBIOS_TABLE_TYPE23;
2071
2072 ///
2073 /// Hardware Security (Type 24).
2074 ///
2075 /// This structure describes the system-wide hardware security settings.
2076 ///
2077 typedef struct {
2078 SMBIOS_STRUCTURE Hdr;
2079 UINT8 HardwareSecuritySettings;
2080 } SMBIOS_TABLE_TYPE24;
2081
2082 ///
2083 /// System Power Controls (Type 25).
2084 ///
2085 /// This structure describes the attributes for controlling the main power supply to the system.
2086 /// Software that interprets this structure uses the month, day, hour, minute, and second values
2087 /// to determine the number of seconds until the next power-on of the system. The presence of
2088 /// this structure implies that a timed power-on facility is available for the system.
2089 ///
2090 typedef struct {
2091 SMBIOS_STRUCTURE Hdr;
2092 UINT8 NextScheduledPowerOnMonth;
2093 UINT8 NextScheduledPowerOnDayOfMonth;
2094 UINT8 NextScheduledPowerOnHour;
2095 UINT8 NextScheduledPowerOnMinute;
2096 UINT8 NextScheduledPowerOnSecond;
2097 } SMBIOS_TABLE_TYPE25;
2098
2099 ///
2100 /// Voltage Probe - Location and Status.
2101 ///
2102 typedef struct {
2103 UINT8 VoltageProbeSite :5;
2104 UINT8 VoltageProbeStatus :3;
2105 } MISC_VOLTAGE_PROBE_LOCATION;
2106
2107 ///
2108 /// Voltage Probe (Type 26)
2109 ///
2110 /// This describes the attributes for a voltage probe in the system.
2111 /// Each structure describes a single voltage probe.
2112 ///
2113 typedef struct {
2114 SMBIOS_STRUCTURE Hdr;
2115 SMBIOS_TABLE_STRING Description;
2116 MISC_VOLTAGE_PROBE_LOCATION LocationAndStatus;
2117 UINT16 MaximumValue;
2118 UINT16 MinimumValue;
2119 UINT16 Resolution;
2120 UINT16 Tolerance;
2121 UINT16 Accuracy;
2122 UINT32 OEMDefined;
2123 UINT16 NominalValue;
2124 } SMBIOS_TABLE_TYPE26;
2125
2126 ///
2127 /// Cooling Device - Device Type and Status.
2128 ///
2129 typedef struct {
2130 UINT8 CoolingDevice :5;
2131 UINT8 CoolingDeviceStatus :3;
2132 } MISC_COOLING_DEVICE_TYPE;
2133
2134 ///
2135 /// Cooling Device (Type 27)
2136 ///
2137 /// This structure describes the attributes for a cooling device in the system.
2138 /// Each structure describes a single cooling device.
2139 ///
2140 typedef struct {
2141 SMBIOS_STRUCTURE Hdr;
2142 UINT16 TemperatureProbeHandle;
2143 MISC_COOLING_DEVICE_TYPE DeviceTypeAndStatus;
2144 UINT8 CoolingUnitGroup;
2145 UINT32 OEMDefined;
2146 UINT16 NominalSpeed;
2147 //
2148 // Add for smbios 2.7
2149 //
2150 SMBIOS_TABLE_STRING Description;
2151 } SMBIOS_TABLE_TYPE27;
2152
2153 ///
2154 /// Temperature Probe - Location and Status.
2155 ///
2156 typedef struct {
2157 UINT8 TemperatureProbeSite :5;
2158 UINT8 TemperatureProbeStatus :3;
2159 } MISC_TEMPERATURE_PROBE_LOCATION;
2160
2161 ///
2162 /// Temperature Probe (Type 28).
2163 ///
2164 /// This structure describes the attributes for a temperature probe in the system.
2165 /// Each structure describes a single temperature probe.
2166 ///
2167 typedef struct {
2168 SMBIOS_STRUCTURE Hdr;
2169 SMBIOS_TABLE_STRING Description;
2170 MISC_TEMPERATURE_PROBE_LOCATION LocationAndStatus;
2171 UINT16 MaximumValue;
2172 UINT16 MinimumValue;
2173 UINT16 Resolution;
2174 UINT16 Tolerance;
2175 UINT16 Accuracy;
2176 UINT32 OEMDefined;
2177 UINT16 NominalValue;
2178 } SMBIOS_TABLE_TYPE28;
2179
2180 ///
2181 /// Electrical Current Probe - Location and Status.
2182 ///
2183 typedef struct {
2184 UINT8 ElectricalCurrentProbeSite :5;
2185 UINT8 ElectricalCurrentProbeStatus :3;
2186 } MISC_ELECTRICAL_CURRENT_PROBE_LOCATION;
2187
2188 ///
2189 /// Electrical Current Probe (Type 29).
2190 ///
2191 /// This structure describes the attributes for an electrical current probe in the system.
2192 /// Each structure describes a single electrical current probe.
2193 ///
2194 typedef struct {
2195 SMBIOS_STRUCTURE Hdr;
2196 SMBIOS_TABLE_STRING Description;
2197 MISC_ELECTRICAL_CURRENT_PROBE_LOCATION LocationAndStatus;
2198 UINT16 MaximumValue;
2199 UINT16 MinimumValue;
2200 UINT16 Resolution;
2201 UINT16 Tolerance;
2202 UINT16 Accuracy;
2203 UINT32 OEMDefined;
2204 UINT16 NominalValue;
2205 } SMBIOS_TABLE_TYPE29;
2206
2207 ///
2208 /// Out-of-Band Remote Access (Type 30).
2209 ///
2210 /// This structure describes the attributes and policy settings of a hardware facility
2211 /// that may be used to gain remote access to a hardware system when the operating system
2212 /// is not available due to power-down status, hardware failures, or boot failures.
2213 ///
2214 typedef struct {
2215 SMBIOS_STRUCTURE Hdr;
2216 SMBIOS_TABLE_STRING ManufacturerName;
2217 UINT8 Connections;
2218 } SMBIOS_TABLE_TYPE30;
2219
2220 ///
2221 /// Boot Integrity Services (BIS) Entry Point (Type 31).
2222 ///
2223 /// Structure type 31 (decimal) is reserved for use by the Boot Integrity Services (BIS).
2224 ///
2225 typedef struct {
2226 SMBIOS_STRUCTURE Hdr;
2227 UINT8 Checksum;
2228 UINT8 Reserved1;
2229 UINT16 Reserved2;
2230 UINT32 BisEntry16;
2231 UINT32 BisEntry32;
2232 UINT64 Reserved3;
2233 UINT32 Reserved4;
2234 } SMBIOS_TABLE_TYPE31;
2235
2236 ///
2237 /// System Boot Information - System Boot Status.
2238 ///
2239 typedef enum {
2240 BootInformationStatusNoError = 0x00,
2241 BootInformationStatusNoBootableMedia = 0x01,
2242 BootInformationStatusNormalOSFailedLoading = 0x02,
2243 BootInformationStatusFirmwareDetectedFailure = 0x03,
2244 BootInformationStatusOSDetectedFailure = 0x04,
2245 BootInformationStatusUserRequestedBoot = 0x05,
2246 BootInformationStatusSystemSecurityViolation = 0x06,
2247 BootInformationStatusPreviousRequestedImage = 0x07,
2248 BootInformationStatusWatchdogTimerExpired = 0x08,
2249 BootInformationStatusStartReserved = 0x09,
2250 BootInformationStatusStartOemSpecific = 0x80,
2251 BootInformationStatusStartProductSpecific = 0xC0
2252 } MISC_BOOT_INFORMATION_STATUS_DATA_TYPE;
2253
2254 ///
2255 /// System Boot Information (Type 32).
2256 ///
2257 /// The client system firmware, e.g. BIOS, communicates the System Boot Status to the
2258 /// client's Pre-boot Execution Environment (PXE) boot image or OS-present management
2259 /// application via this structure. When used in the PXE environment, for example,
2260 /// this code identifies the reason the PXE was initiated and can be used by boot-image
2261 /// software to further automate an enterprise's PXE sessions. For example, an enterprise
2262 /// could choose to automatically download a hardware-diagnostic image to a client whose
2263 /// reason code indicated either a firmware- or operating system-detected hardware failure.
2264 ///
2265 typedef struct {
2266 SMBIOS_STRUCTURE Hdr;
2267 UINT8 Reserved[6];
2268 UINT8 BootStatus; ///< The enumeration value from MISC_BOOT_INFORMATION_STATUS_DATA_TYPE.
2269 } SMBIOS_TABLE_TYPE32;
2270
2271 ///
2272 /// 64-bit Memory Error Information (Type 33).
2273 ///
2274 /// This structure describes an error within a Physical Memory Array,
2275 /// when the error address is above 4G (0xFFFFFFFF).
2276 ///
2277 typedef struct {
2278 SMBIOS_STRUCTURE Hdr;
2279 UINT8 ErrorType; ///< The enumeration value from MEMORY_ERROR_TYPE.
2280 UINT8 ErrorGranularity; ///< The enumeration value from MEMORY_ERROR_GRANULARITY.
2281 UINT8 ErrorOperation; ///< The enumeration value from MEMORY_ERROR_OPERATION.
2282 UINT32 VendorSyndrome;
2283 UINT64 MemoryArrayErrorAddress;
2284 UINT64 DeviceErrorAddress;
2285 UINT32 ErrorResolution;
2286 } SMBIOS_TABLE_TYPE33;
2287
2288 ///
2289 /// Management Device - Type.
2290 ///
2291 typedef enum {
2292 ManagementDeviceTypeOther = 0x01,
2293 ManagementDeviceTypeUnknown = 0x02,
2294 ManagementDeviceTypeLm75 = 0x03,
2295 ManagementDeviceTypeLm78 = 0x04,
2296 ManagementDeviceTypeLm79 = 0x05,
2297 ManagementDeviceTypeLm80 = 0x06,
2298 ManagementDeviceTypeLm81 = 0x07,
2299 ManagementDeviceTypeAdm9240 = 0x08,
2300 ManagementDeviceTypeDs1780 = 0x09,
2301 ManagementDeviceTypeMaxim1617 = 0x0A,
2302 ManagementDeviceTypeGl518Sm = 0x0B,
2303 ManagementDeviceTypeW83781D = 0x0C,
2304 ManagementDeviceTypeHt82H791 = 0x0D
2305 } MISC_MANAGEMENT_DEVICE_TYPE;
2306
2307 ///
2308 /// Management Device - Address Type.
2309 ///
2310 typedef enum {
2311 ManagementDeviceAddressTypeOther = 0x01,
2312 ManagementDeviceAddressTypeUnknown = 0x02,
2313 ManagementDeviceAddressTypeIOPort = 0x03,
2314 ManagementDeviceAddressTypeMemory = 0x04,
2315 ManagementDeviceAddressTypeSmbus = 0x05
2316 } MISC_MANAGEMENT_DEVICE_ADDRESS_TYPE;
2317
2318 ///
2319 /// Management Device (Type 34).
2320 ///
2321 /// The information in this structure defines the attributes of a Management Device.
2322 /// A Management Device might control one or more fans or voltage, current, or temperature
2323 /// probes as defined by one or more Management Device Component structures.
2324 ///
2325 typedef struct {
2326 SMBIOS_STRUCTURE Hdr;
2327 SMBIOS_TABLE_STRING Description;
2328 UINT8 Type; ///< The enumeration value from MISC_MANAGEMENT_DEVICE_TYPE.
2329 UINT32 Address;
2330 UINT8 AddressType; ///< The enumeration value from MISC_MANAGEMENT_DEVICE_ADDRESS_TYPE.
2331 } SMBIOS_TABLE_TYPE34;
2332
2333 ///
2334 /// Management Device Component (Type 35)
2335 ///
2336 /// This structure associates a cooling device or environmental probe with structures
2337 /// that define the controlling hardware device and (optionally) the component's thresholds.
2338 ///
2339 typedef struct {
2340 SMBIOS_STRUCTURE Hdr;
2341 SMBIOS_TABLE_STRING Description;
2342 UINT16 ManagementDeviceHandle;
2343 UINT16 ComponentHandle;
2344 UINT16 ThresholdHandle;
2345 } SMBIOS_TABLE_TYPE35;
2346
2347 ///
2348 /// Management Device Threshold Data (Type 36).
2349 ///
2350 /// The information in this structure defines threshold information for
2351 /// a component (probe or cooling-unit) contained within a Management Device.
2352 ///
2353 typedef struct {
2354 SMBIOS_STRUCTURE Hdr;
2355 UINT16 LowerThresholdNonCritical;
2356 UINT16 UpperThresholdNonCritical;
2357 UINT16 LowerThresholdCritical;
2358 UINT16 UpperThresholdCritical;
2359 UINT16 LowerThresholdNonRecoverable;
2360 UINT16 UpperThresholdNonRecoverable;
2361 } SMBIOS_TABLE_TYPE36;
2362
2363 ///
2364 /// Memory Channel Entry.
2365 ///
2366 typedef struct {
2367 UINT8 DeviceLoad;
2368 UINT16 DeviceHandle;
2369 } MEMORY_DEVICE;
2370
2371 ///
2372 /// Memory Channel - Channel Type.
2373 ///
2374 typedef enum {
2375 MemoryChannelTypeOther = 0x01,
2376 MemoryChannelTypeUnknown = 0x02,
2377 MemoryChannelTypeRambus = 0x03,
2378 MemoryChannelTypeSyncLink = 0x04
2379 } MEMORY_CHANNEL_TYPE;
2380
2381 ///
2382 /// Memory Channel (Type 37)
2383 ///
2384 /// The information in this structure provides the correlation between a Memory Channel
2385 /// and its associated Memory Devices. Each device presents one or more loads to the channel.
2386 /// The sum of all device loads cannot exceed the channel's defined maximum.
2387 ///
2388 typedef struct {
2389 SMBIOS_STRUCTURE Hdr;
2390 UINT8 ChannelType;
2391 UINT8 MaximumChannelLoad;
2392 UINT8 MemoryDeviceCount;
2393 MEMORY_DEVICE MemoryDevice[1];
2394 } SMBIOS_TABLE_TYPE37;
2395
2396 ///
2397 /// IPMI Device Information - BMC Interface Type
2398 ///
2399 typedef enum {
2400 IPMIDeviceInfoInterfaceTypeUnknown = 0x00,
2401 IPMIDeviceInfoInterfaceTypeKCS = 0x01, ///< The Keyboard Controller Style.
2402 IPMIDeviceInfoInterfaceTypeSMIC = 0x02, ///< The Server Management Interface Chip.
2403 IPMIDeviceInfoInterfaceTypeBT = 0x03, ///< The Block Transfer
2404 IPMIDeviceInfoInterfaceTypeSSIF = 0x04 ///< SMBus System Interface
2405 } BMC_INTERFACE_TYPE;
2406
2407 ///
2408 /// IPMI Device Information (Type 38).
2409 ///
2410 /// The information in this structure defines the attributes of an
2411 /// Intelligent Platform Management Interface (IPMI) Baseboard Management Controller (BMC).
2412 ///
2413 /// The Type 42 structure can also be used to describe a physical management controller
2414 /// host interface and one or more protocols that share that interface. If IPMI is not
2415 /// shared with other protocols, either the Type 38 or Type 42 structures can be used.
2416 /// Providing Type 38 is recommended for backward compatibility.
2417 ///
2418 typedef struct {
2419 SMBIOS_STRUCTURE Hdr;
2420 UINT8 InterfaceType; ///< The enumeration value from BMC_INTERFACE_TYPE.
2421 UINT8 IPMISpecificationRevision;
2422 UINT8 I2CSlaveAddress;
2423 UINT8 NVStorageDeviceAddress;
2424 UINT64 BaseAddress;
2425 UINT8 BaseAddressModifier_InterruptInfo;
2426 UINT8 InterruptNumber;
2427 } SMBIOS_TABLE_TYPE38;
2428
2429 ///
2430 /// System Power Supply - Power Supply Characteristics.
2431 ///
2432 typedef struct {
2433 UINT16 PowerSupplyHotReplaceable:1;
2434 UINT16 PowerSupplyPresent :1;
2435 UINT16 PowerSupplyUnplugged :1;
2436 UINT16 InputVoltageRangeSwitch :4;
2437 UINT16 PowerSupplyStatus :3;
2438 UINT16 PowerSupplyType :4;
2439 UINT16 Reserved :2;
2440 } SYS_POWER_SUPPLY_CHARACTERISTICS;
2441
2442 ///
2443 /// System Power Supply (Type 39).
2444 ///
2445 /// This structure identifies attributes of a system power supply. One instance
2446 /// of this record is present for each possible power supply in a system.
2447 ///
2448 typedef struct {
2449 SMBIOS_STRUCTURE Hdr;
2450 UINT8 PowerUnitGroup;
2451 SMBIOS_TABLE_STRING Location;
2452 SMBIOS_TABLE_STRING DeviceName;
2453 SMBIOS_TABLE_STRING Manufacturer;
2454 SMBIOS_TABLE_STRING SerialNumber;
2455 SMBIOS_TABLE_STRING AssetTagNumber;
2456 SMBIOS_TABLE_STRING ModelPartNumber;
2457 SMBIOS_TABLE_STRING RevisionLevel;
2458 UINT16 MaxPowerCapacity;
2459 SYS_POWER_SUPPLY_CHARACTERISTICS PowerSupplyCharacteristics;
2460 UINT16 InputVoltageProbeHandle;
2461 UINT16 CoolingDeviceHandle;
2462 UINT16 InputCurrentProbeHandle;
2463 } SMBIOS_TABLE_TYPE39;
2464
2465 ///
2466 /// Additional Information Entry Format.
2467 ///
2468 typedef struct {
2469 UINT8 EntryLength;
2470 UINT16 ReferencedHandle;
2471 UINT8 ReferencedOffset;
2472 SMBIOS_TABLE_STRING EntryString;
2473 UINT8 Value[1];
2474 } ADDITIONAL_INFORMATION_ENTRY;
2475
2476 ///
2477 /// Additional Information (Type 40).
2478 ///
2479 /// This structure is intended to provide additional information for handling unspecified
2480 /// enumerated values and interim field updates in another structure.
2481 ///
2482 typedef struct {
2483 SMBIOS_STRUCTURE Hdr;
2484 UINT8 NumberOfAdditionalInformationEntries;
2485 ADDITIONAL_INFORMATION_ENTRY AdditionalInfoEntries[1];
2486 } SMBIOS_TABLE_TYPE40;
2487
2488 ///
2489 /// Onboard Devices Extended Information - Onboard Device Types.
2490 ///
2491 typedef enum{
2492 OnBoardDeviceExtendedTypeOther = 0x01,
2493 OnBoardDeviceExtendedTypeUnknown = 0x02,
2494 OnBoardDeviceExtendedTypeVideo = 0x03,
2495 OnBoardDeviceExtendedTypeScsiController = 0x04,
2496 OnBoardDeviceExtendedTypeEthernet = 0x05,
2497 OnBoardDeviceExtendedTypeTokenRing = 0x06,
2498 OnBoardDeviceExtendedTypeSound = 0x07,
2499 OnBoardDeviceExtendedTypePATAController = 0x08,
2500 OnBoardDeviceExtendedTypeSATAController = 0x09,
2501 OnBoardDeviceExtendedTypeSASController = 0x0A
2502 } ONBOARD_DEVICE_EXTENDED_INFO_TYPE;
2503
2504 ///
2505 /// Onboard Devices Extended Information (Type 41).
2506 ///
2507 /// The information in this structure defines the attributes of devices that
2508 /// are onboard (soldered onto) a system element, usually the baseboard.
2509 /// In general, an entry in this table implies that the BIOS has some level of
2510 /// control over the enabling of the associated device for use by the system.
2511 ///
2512 typedef struct {
2513 SMBIOS_STRUCTURE Hdr;
2514 SMBIOS_TABLE_STRING ReferenceDesignation;
2515 UINT8 DeviceType; ///< The enumeration value from ONBOARD_DEVICE_EXTENDED_INFO_TYPE
2516 UINT8 DeviceTypeInstance;
2517 UINT16 SegmentGroupNum;
2518 UINT8 BusNum;
2519 UINT8 DevFuncNum;
2520 } SMBIOS_TABLE_TYPE41;
2521
2522 ///
2523 /// Management Controller Host Interface - Protocol Record Data Format.
2524 ///
2525 typedef struct {
2526 UINT8 ProtocolType;
2527 UINT8 ProtocolTypeDataLen;
2528 UINT8 ProtocolTypeData[1];
2529 } MC_HOST_INTERFACE_PROTOCOL_RECORD;
2530
2531 ///
2532 /// Management Controller Host Interface - Interface Types.
2533 /// 00h - 3Fh: MCTP Host Interfaces
2534 ///
2535 typedef enum{
2536 MCHostInterfaceTypeNetworkHostInterface = 0x40,
2537 MCHostInterfaceTypeOemDefined = 0xF0
2538 } MC_HOST_INTERFACE_TYPE;
2539
2540 ///
2541 /// Management Controller Host Interface - Protocol Types.
2542 ///
2543 typedef enum{
2544 MCHostInterfaceProtocolTypeIPMI = 0x02,
2545 MCHostInterfaceProtocolTypeMCTP = 0x03,
2546 MCHostInterfaceProtocolTypeRedfishOverIP = 0x04,
2547 MCHostInterfaceProtocolTypeOemDefined = 0xF0
2548 } MC_HOST_INTERFACE_PROTOCOL_TYPE;
2549
2550 ///
2551 /// Management Controller Host Interface (Type 42).
2552 ///
2553 /// The information in this structure defines the attributes of a Management
2554 /// Controller Host Interface that is not discoverable by "Plug and Play" mechanisms.
2555 ///
2556 /// Type 42 should be used for management controller host interfaces that use protocols
2557 /// other than IPMI or that use multiple protocols on a single host interface type.
2558 ///
2559 /// This structure should also be provided if IPMI is shared with other protocols
2560 /// over the same interface hardware. If IPMI is not shared with other protocols,
2561 /// either the Type 38 or Type 42 structures can be used. Providing Type 38 is
2562 /// recommended for backward compatibility. The structures are not required to
2563 /// be mutually exclusive. Type 38 and Type 42 structures may be implemented
2564 /// simultaneously to provide backward compatibility with IPMI applications or drivers
2565 /// that do not yet recognize the Type 42 structure.
2566 ///
2567 typedef struct {
2568 SMBIOS_STRUCTURE Hdr;
2569 UINT8 InterfaceType; ///< The enumeration value from MC_HOST_INTERFACE_TYPE
2570 UINT8 InterfaceTypeSpecificDataLength;
2571 UINT8 InterfaceTypeSpecificData[4]; ///< This field has a minimum of four bytes
2572 } SMBIOS_TABLE_TYPE42;
2573
2574
2575 ///
2576 /// Processor Specific Block - Processor Architecture Type
2577 ///
2578 typedef enum{
2579 ProcessorSpecificBlockArchTypeReserved = 0x00,
2580 ProcessorSpecificBlockArchTypeIa32 = 0x01,
2581 ProcessorSpecificBlockArchTypeX64 = 0x02,
2582 ProcessorSpecificBlockArchTypeItanium = 0x03,
2583 ProcessorSpecificBlockArchTypeAarch32 = 0x04,
2584 ProcessorSpecificBlockArchTypeAarch64 = 0x05,
2585 ProcessorSpecificBlockArchTypeRiscVRV32 = 0x06,
2586 ProcessorSpecificBlockArchTypeRiscVRV64 = 0x07,
2587 ProcessorSpecificBlockArchTypeRiscVRV128 = 0x08
2588 } PROCESSOR_SPECIFIC_BLOCK_ARCH_TYPE;
2589
2590 ///
2591 /// Processor Specific Block is the standard container of processor-specific data.
2592 ///
2593 typedef struct {
2594 UINT8 Length;
2595 UINT8 ProcessorArchType;
2596 ///
2597 /// Below followed by Processor-specific data
2598 ///
2599 ///
2600 } PROCESSOR_SPECIFIC_BLOCK;
2601
2602 ///
2603 /// Processor Additional Information(Type 44).
2604 ///
2605 /// The information in this structure defines the processor additional information in case
2606 /// SMBIOS type 4 is not sufficient to describe processor characteristics.
2607 /// The SMBIOS type 44 structure has a reference handle field to link back to the related
2608 /// SMBIOS type 4 structure. There may be multiple SMBIOS type 44 structures linked to the
2609 /// same SMBIOS type 4 structure. For example, when cores are not identical in a processor,
2610 /// SMBIOS type 44 structures describe different core-specific information.
2611 ///
2612 /// SMBIOS type 44 defines the standard header for the processor-specific block, while the
2613 /// contents of processor-specific data are maintained by processor
2614 /// architecture workgroups or vendors in separate documents.
2615 ///
2616 typedef struct {
2617 SMBIOS_STRUCTURE Hdr;
2618 SMBIOS_HANDLE RefHandle; ///< This field refer to associated SMBIOS type 4
2619 ///
2620 /// Below followed by Processor-specific block
2621 ///
2622 PROCESSOR_SPECIFIC_BLOCK ProcessorSpecificBlock;
2623 } SMBIOS_TABLE_TYPE44;
2624
2625 ///
2626 /// TPM Device (Type 43).
2627 ///
2628 typedef struct {
2629 SMBIOS_STRUCTURE Hdr;
2630 UINT8 VendorID[4];
2631 UINT8 MajorSpecVersion;
2632 UINT8 MinorSpecVersion;
2633 UINT32 FirmwareVersion1;
2634 UINT32 FirmwareVersion2;
2635 SMBIOS_TABLE_STRING Description;
2636 UINT64 Characteristics;
2637 UINT32 OemDefined;
2638 } SMBIOS_TABLE_TYPE43;
2639
2640 ///
2641 /// Inactive (Type 126)
2642 ///
2643 typedef struct {
2644 SMBIOS_STRUCTURE Hdr;
2645 } SMBIOS_TABLE_TYPE126;
2646
2647 ///
2648 /// End-of-Table (Type 127)
2649 ///
2650 typedef struct {
2651 SMBIOS_STRUCTURE Hdr;
2652 } SMBIOS_TABLE_TYPE127;
2653
2654 ///
2655 /// Union of all the possible SMBIOS record types.
2656 ///
2657 typedef union {
2658 SMBIOS_STRUCTURE *Hdr;
2659 SMBIOS_TABLE_TYPE0 *Type0;
2660 SMBIOS_TABLE_TYPE1 *Type1;
2661 SMBIOS_TABLE_TYPE2 *Type2;
2662 SMBIOS_TABLE_TYPE3 *Type3;
2663 SMBIOS_TABLE_TYPE4 *Type4;
2664 SMBIOS_TABLE_TYPE5 *Type5;
2665 SMBIOS_TABLE_TYPE6 *Type6;
2666 SMBIOS_TABLE_TYPE7 *Type7;
2667 SMBIOS_TABLE_TYPE8 *Type8;
2668 SMBIOS_TABLE_TYPE9 *Type9;
2669 SMBIOS_TABLE_TYPE10 *Type10;
2670 SMBIOS_TABLE_TYPE11 *Type11;
2671 SMBIOS_TABLE_TYPE12 *Type12;
2672 SMBIOS_TABLE_TYPE13 *Type13;
2673 SMBIOS_TABLE_TYPE14 *Type14;
2674 SMBIOS_TABLE_TYPE15 *Type15;
2675 SMBIOS_TABLE_TYPE16 *Type16;
2676 SMBIOS_TABLE_TYPE17 *Type17;
2677 SMBIOS_TABLE_TYPE18 *Type18;
2678 SMBIOS_TABLE_TYPE19 *Type19;
2679 SMBIOS_TABLE_TYPE20 *Type20;
2680 SMBIOS_TABLE_TYPE21 *Type21;
2681 SMBIOS_TABLE_TYPE22 *Type22;
2682 SMBIOS_TABLE_TYPE23 *Type23;
2683 SMBIOS_TABLE_TYPE24 *Type24;
2684 SMBIOS_TABLE_TYPE25 *Type25;
2685 SMBIOS_TABLE_TYPE26 *Type26;
2686 SMBIOS_TABLE_TYPE27 *Type27;
2687 SMBIOS_TABLE_TYPE28 *Type28;
2688 SMBIOS_TABLE_TYPE29 *Type29;
2689 SMBIOS_TABLE_TYPE30 *Type30;
2690 SMBIOS_TABLE_TYPE31 *Type31;
2691 SMBIOS_TABLE_TYPE32 *Type32;
2692 SMBIOS_TABLE_TYPE33 *Type33;
2693 SMBIOS_TABLE_TYPE34 *Type34;
2694 SMBIOS_TABLE_TYPE35 *Type35;
2695 SMBIOS_TABLE_TYPE36 *Type36;
2696 SMBIOS_TABLE_TYPE37 *Type37;
2697 SMBIOS_TABLE_TYPE38 *Type38;
2698 SMBIOS_TABLE_TYPE39 *Type39;
2699 SMBIOS_TABLE_TYPE40 *Type40;
2700 SMBIOS_TABLE_TYPE41 *Type41;
2701 SMBIOS_TABLE_TYPE42 *Type42;
2702 SMBIOS_TABLE_TYPE43 *Type43;
2703 SMBIOS_TABLE_TYPE44 *Type44;
2704 SMBIOS_TABLE_TYPE126 *Type126;
2705 SMBIOS_TABLE_TYPE127 *Type127;
2706 UINT8 *Raw;
2707 } SMBIOS_STRUCTURE_POINTER;
2708
2709 #pragma pack()
2710
2711 #endif
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