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Fix the wrong structure definition in Smbios.h.
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1 /** @file
2 Industry Standard Definitions of SMBIOS Table Specification v2.6
3
4 Copyright (c) 2006 - 2009, Intel Corporation All rights
5 reserved. This program and the accompanying materials are
6 licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
9
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
12
13 **/
14
15 #ifndef __SMBIOS_STANDARD_H__
16 #define __SMBIOS_STANDARD_H__
17
18 ///
19 /// Smbios Table Entry Point Structure
20 ///
21 #pragma pack(1)
22 typedef struct {
23 UINT8 AnchorString[4];
24 UINT8 EntryPointStructureChecksum;
25 UINT8 EntryPointLength;
26 UINT8 MajorVersion;
27 UINT8 MinorVersion;
28 UINT16 MaxStructureSize;
29 UINT8 EntryPointRevision;
30 UINT8 FormattedArea[5];
31 UINT8 IntermediateAnchorString[5];
32 UINT8 IntermediateChecksum;
33 UINT16 TableLength;
34 UINT32 TableAddress;
35 UINT16 NumberOfSmbiosStructures;
36 UINT8 SmbiosBcdRevision;
37 } SMBIOS_TABLE_ENTRY_POINT;
38
39 ///
40 /// The Smbios structure header
41 ///
42 typedef struct {
43 UINT8 Type;
44 UINT8 Length;
45 UINT16 Handle;
46 } SMBIOS_STRUCTURE;
47
48 ///
49 /// String Number for a Null terminated string, 00h stands for no string available.
50 ///
51 typedef UINT8 SMBIOS_TABLE_STRING;
52
53 ///
54 /// BIOS Characteristics
55 /// Defines which functions the BIOS supports. PCI, PCMCIA, Flash, etc.
56 ///
57 typedef struct {
58 UINT32 Reserved :2; ///< Bits 0-1
59 UINT32 Unknown :1;
60 UINT32 BiosCharacteristicsNotSupported :1;
61 UINT32 IsaIsSupported :1;
62 UINT32 McaIsSupported :1;
63 UINT32 EisaIsSupported :1;
64 UINT32 PciIsSupported :1;
65 UINT32 PcmciaIsSupported :1;
66 UINT32 PlugAndPlayIsSupported :1;
67 UINT32 ApmIsSupported :1;
68 UINT32 BiosIsUpgradable :1;
69 UINT32 BiosShadowingAllowed :1;
70 UINT32 VlVesaIsSupported :1;
71 UINT32 EscdSupportIsAvailable :1;
72 UINT32 BootFromCdIsSupported :1;
73 UINT32 SelectableBootIsSupported :1;
74 UINT32 RomBiosIsSocketed :1;
75 UINT32 BootFromPcmciaIsSupported :1;
76 UINT32 EDDSpecificationIsSupported :1;
77 UINT32 JapaneseNecFloppyIsSupported :1;
78 UINT32 JapaneseToshibaFloppyIsSupported :1;
79 UINT32 Floppy525_360IsSupported :1;
80 UINT32 Floppy525_12IsSupported :1;
81 UINT32 Floppy35_720IsSupported :1;
82 UINT32 Floppy35_288IsSupported :1;
83 UINT32 PrintScreenIsSupported :1;
84 UINT32 Keyboard8042IsSupported :1;
85 UINT32 SerialIsSupported :1;
86 UINT32 PrinterIsSupported :1;
87 UINT32 CgaMonoIsSupported :1;
88 UINT32 NecPc98 :1;
89 UINT32 ReservedForVendor :32; ///< Bits 32-63. Bits 32-47 reserved for BIOS vendor
90 ///< and bits 48-63 reserved for System Vendor.
91 } MISC_BIOS_CHARACTERISTICS;
92
93 ///
94 /// BIOS Characteristics Extension Byte 1
95 /// This information, available for SMBIOS version 2.1 and later, appears at offset 12h
96 /// within the BIOS Information structure.
97 ///
98 typedef struct {
99 UINT8 AcpiIsSupported :1;
100 UINT8 UsbLegacyIsSupported :1;
101 UINT8 AgpIsSupported :1;
102 UINT8 I20BootIsSupported :1;
103 UINT8 Ls120BootIsSupported :1;
104 UINT8 AtapiZipDriveBootIsSupported :1;
105 UINT8 Boot1394IsSupported :1;
106 UINT8 SmartBatteryIsSupported :1;
107 } MBCE_BIOS_RESERVED;
108
109 ///
110 /// BIOS Characteristics Extension Byte 2
111 /// This information, available for SMBIOS version 2.3 and later, appears at offset 13h
112 /// within the BIOS Information structure.
113 ///
114 typedef struct {
115 UINT8 BiosBootSpecIsSupported :1;
116 UINT8 FunctionKeyNetworkBootIsSupported :1;
117 UINT8 TargetContentDistributionEnabled :1;
118 UINT8 ExtensionByte2Reserved :1;
119 } MBCE_SYSTEM_RESERVED;
120
121 ///
122 /// BIOS Characteristics Extension Bytes
123 ///
124 typedef struct {
125 MBCE_BIOS_RESERVED BiosReserved;
126 MBCE_SYSTEM_RESERVED SystemReserved;
127 UINT8 Reserved;
128 } MISC_BIOS_CHARACTERISTICS_EXTENSION;
129
130 ///
131 /// BIOS Information (Type 0)
132 ///
133 typedef struct {
134 SMBIOS_STRUCTURE Hdr;
135 SMBIOS_TABLE_STRING Vendor;
136 SMBIOS_TABLE_STRING BiosVersion;
137 UINT16 BiosSegment;
138 SMBIOS_TABLE_STRING BiosReleaseDate;
139 UINT8 BiosSize;
140 MISC_BIOS_CHARACTERISTICS BiosCharacteristics;
141 UINT8 BIOSCharacteristicsExtensionBytes[2];
142 UINT8 SystemBiosMajorRelease;
143 UINT8 SystemBiosMinorRelease;
144 UINT8 EmbeddedControllerFirmwareMajorRelease;
145 UINT8 EmbeddedControllerFirmwareMinorRelease;
146 } SMBIOS_TABLE_TYPE0;
147
148 ///
149 /// System Wake-up Type
150 ///
151 typedef enum {
152 SystemWakeupTypeReserved = 0x00,
153 SystemWakeupTypeOther = 0x01,
154 SystemWakeupTypeUnknown = 0x02,
155 SystemWakeupTypeApmTimer = 0x03,
156 SystemWakeupTypeModemRing = 0x04,
157 SystemWakeupTypeLanRemote = 0x05,
158 SystemWakeupTypePowerSwitch = 0x06,
159 SystemWakeupTypePciPme = 0x07,
160 SystemWakeupTypeAcPowerRestored = 0x08
161 } MISC_SYSTEM_WAKEUP_TYPE;
162
163 ///
164 /// System Information (Type 1)
165 ///
166 /// The information in this structure defines attributes of the overall system and is
167 /// intended to be associated with the Component ID group of the system's MIF.
168 /// An SMBIOS implementation is associated with a single system instance and contains
169 /// one and only one System Information (Type 1) structure.
170 ///
171 typedef struct {
172 SMBIOS_STRUCTURE Hdr;
173 SMBIOS_TABLE_STRING Manufacturer;
174 SMBIOS_TABLE_STRING ProductName;
175 SMBIOS_TABLE_STRING Version;
176 SMBIOS_TABLE_STRING SerialNumber;
177 GUID Uuid;
178 UINT8 WakeUpType; ///< enumeration value from MISC_SYSTEM_WAKEUP_TYPE
179 SMBIOS_TABLE_STRING SKUNumber;
180 SMBIOS_TABLE_STRING Family;
181 } SMBIOS_TABLE_TYPE1;
182
183 ///
184 /// Base Board - Feature Flags
185 ///
186 typedef struct {
187 UINT8 Motherboard :1;
188 UINT8 RequiresDaughterCard :1;
189 UINT8 Removable :1;
190 UINT8 Replaceable :1;
191 UINT8 HotSwappable :1;
192 UINT8 Reserved :3;
193 } BASE_BOARD_FEATURE_FLAGS;
194
195 ///
196 /// Base Board - Board Type
197 ///
198 typedef enum {
199 BaseBoardTypeUnknown = 0x1,
200 BaseBoardTypeOther = 0x2,
201 BaseBoardTypeServerBlade = 0x3,
202 BaseBoardTypeConnectivitySwitch = 0x4,
203 BaseBoardTypeSystemManagementModule = 0x5,
204 BaseBoardTypeProcessorModule = 0x6,
205 BaseBoardTypeIOModule = 0x7,
206 BaseBoardTypeMemoryModule = 0x8,
207 BaseBoardTypeDaughterBoard = 0x9,
208 BaseBoardTypeMotherBoard = 0xA,
209 BaseBoardTypeProcessorMemoryModule = 0xB,
210 BaseBoardTypeProcessorIOModule = 0xC,
211 BaseBoardTypeInterconnectBoard = 0xD
212 } BASE_BOARD_TYPE;
213
214 ///
215 /// Base Board (or Module) Information (Type 2)
216 ///
217 /// The information in this structure defines attributes of a system baseboard -
218 /// for example a motherboard, planar, or server blade or other standard system module.
219 ///
220 typedef struct {
221 SMBIOS_STRUCTURE Hdr;
222 SMBIOS_TABLE_STRING Manufacturer;
223 SMBIOS_TABLE_STRING ProductName;
224 SMBIOS_TABLE_STRING Version;
225 SMBIOS_TABLE_STRING SerialNumber;
226 SMBIOS_TABLE_STRING AssetTag;
227 BASE_BOARD_FEATURE_FLAGS FeatureFlag;
228 SMBIOS_TABLE_STRING LocationInChassis;
229 UINT16 ChassisHandle;
230 UINT8 BoardType; ///< enumeration value from BASE_BOARD_TYPE
231 UINT8 NumberOfContainedObjectHandles;
232 UINT16 ContainedObjectHandles[1];
233 } SMBIOS_TABLE_TYPE2;
234
235 ///
236 /// System Enclosure or Chassis Types
237 ///
238 typedef enum {
239 MiscChassisTypeOther = 0x01,
240 MiscChassisTypeUnknown = 0x02,
241 MiscChassisTypeDeskTop = 0x03,
242 MiscChassisTypeLowProfileDesktop = 0x04,
243 MiscChassisTypePizzaBox = 0x05,
244 MiscChassisTypeMiniTower = 0x06,
245 MiscChassisTypeTower = 0x07,
246 MiscChassisTypePortable = 0x08,
247 MiscChassisTypeLapTop = 0x09,
248 MiscChassisTypeNotebook = 0x0A,
249 MiscChassisTypeHandHeld = 0x0B,
250 MiscChassisTypeDockingStation = 0x0C,
251 MiscChassisTypeAllInOne = 0x0D,
252 MiscChassisTypeSubNotebook = 0x0E,
253 MiscChassisTypeSpaceSaving = 0x0F,
254 MiscChassisTypeLunchBox = 0x10,
255 MiscChassisTypeMainServerChassis = 0x11,
256 MiscChassisTypeExpansionChassis = 0x12,
257 MiscChassisTypeSubChassis = 0x13,
258 MiscChassisTypeBusExpansionChassis = 0x14,
259 MiscChassisTypePeripheralChassis = 0x15,
260 MiscChassisTypeRaidChassis = 0x16,
261 MiscChassisTypeRackMountChassis = 0x17,
262 MiscChassisTypeSealedCasePc = 0x18,
263 MiscChassisMultiSystemChassis = 0x19,
264 MiscChassisCompactPCI = 0x1A,
265 MiscChassisAdvancedTCA = 0x1B,
266 MiscChassisBlade = 0x1C,
267 MiscChassisBladeEnclosure = 0x1D
268 } MISC_CHASSIS_TYPE;
269
270 ///
271 /// System Enclosure or Chassis States
272 ///
273 typedef enum {
274 ChassisStateOther = 0x01,
275 ChassisStateUnknown = 0x02,
276 ChassisStateSafe = 0x03,
277 ChassisStateWarning = 0x04,
278 ChassisStateCritical = 0x05,
279 ChassisStateNonRecoverable = 0x06
280 } MISC_CHASSIS_STATE;
281
282 ///
283 /// System Enclosure or Chassis Security Status
284 ///
285 typedef enum {
286 ChassisSecurityStatusOther = 0x01,
287 ChassisSecurityStatusUnknown = 0x02,
288 ChassisSecurityStatusNone = 0x03,
289 ChassisSecurityStatusExternalInterfaceLockedOut = 0x04,
290 ChassisSecurityStatusExternalInterfaceLockedEnabled = 0x05
291 } MISC_CHASSIS_SECURITY_STATE;
292
293 ///
294 /// Contained Element record
295 ///
296 typedef struct {
297 UINT8 ContainedElementType;
298 UINT8 ContainedElementMinimum;
299 UINT8 ContainedElementMaximum;
300 } CONTAINED_ELEMENT;
301
302
303 ///
304 /// System Enclosure or Chassis (Type 3)
305 ///
306 /// The information in this structure defines attributes of the system's mechanical enclosure(s).
307 /// For example, if a system included a separate enclosure for its peripheral devices,
308 /// two structures would be returned: one for the main, system enclosure and the second for
309 /// the peripheral device enclosure. The additions to this structure in v2.1 of this specification
310 /// support the population of the CIM_Chassis class.
311 ///
312 typedef struct {
313 SMBIOS_STRUCTURE Hdr;
314 SMBIOS_TABLE_STRING Manufacturer;
315 UINT8 Type;
316 SMBIOS_TABLE_STRING Version;
317 SMBIOS_TABLE_STRING SerialNumber;
318 SMBIOS_TABLE_STRING AssetTag;
319 UINT8 BootupState; ///< enumeration value from MISC_CHASSIS_STATE
320 UINT8 PowerSupplyState; ///< enumeration value from MISC_CHASSIS_STATE
321 UINT8 ThermalState; ///< enumeration value from MISC_CHASSIS_STATE
322 UINT8 SecurityStatus; ///< enumeration value from MISC_CHASSIS_SECURITY_STATE
323 UINT8 OemDefined[4];
324 UINT8 Height;
325 UINT8 NumberofPowerCords;
326 UINT8 ContainedElementCount;
327 UINT8 ContainedElementRecordLength;
328 CONTAINED_ELEMENT ContainedElements[1];
329 } SMBIOS_TABLE_TYPE3;
330
331 ///
332 /// Processor Information - Processor Type
333 ///
334 typedef enum {
335 ProcessorOther = 0x01,
336 ProcessorUnknown = 0x02,
337 CentralProcessor = 0x03,
338 MathProcessor = 0x04,
339 DspProcessor = 0x05,
340 VideoProcessor = 0x06
341 } PROCESSOR_TYPE_DATA;
342
343 ///
344 /// Processor Information - Processor Family
345 ///
346 typedef enum {
347 ProcessorFamilyOther = 0x01,
348 ProcessorFamilyUnknown = 0x02,
349 ProcessorFamily8086 = 0x03,
350 ProcessorFamily80286 = 0x04,
351 ProcessorFamilyIntel386 = 0x05,
352 ProcessorFamilyIntel486 = 0x06,
353 ProcessorFamily8087 = 0x07,
354 ProcessorFamily80287 = 0x08,
355 ProcessorFamily80387 = 0x09,
356 ProcessorFamily80487 = 0x0A,
357 ProcessorFamilyPentium = 0x0B,
358 ProcessorFamilyPentiumPro = 0x0C,
359 ProcessorFamilyPentiumII = 0x0D,
360 ProcessorFamilyPentiumMMX = 0x0E,
361 ProcessorFamilyCeleron = 0x0F,
362 ProcessorFamilyPentiumIIXeon = 0x10,
363 ProcessorFamilyPentiumIII = 0x11,
364 ProcessorFamilyM1 = 0x12,
365 ProcessorFamilyM2 = 0x13,
366 ProcessorFamilyM1Reserved2 = 0x14,
367 ProcessorFamilyM1Reserved3 = 0x15,
368 ProcessorFamilyM1Reserved4 = 0x16,
369 ProcessorFamilyM1Reserved5 = 0x17,
370 ProcessorFamilyAmdDuron = 0x18,
371 ProcessorFamilyK5 = 0x19,
372 ProcessorFamilyK6 = 0x1A,
373 ProcessorFamilyK6_2 = 0x1B,
374 ProcessorFamilyK6_3 = 0x1C,
375 ProcessorFamilyAmdAthlon = 0x1D,
376 ProcessorFamilyAmd29000 = 0x1E,
377 ProcessorFamilyK6_2Plus = 0x1F,
378 ProcessorFamilyPowerPC = 0x20,
379 ProcessorFamilyPowerPC601 = 0x21,
380 ProcessorFamilyPowerPC603 = 0x22,
381 ProcessorFamilyPowerPC603Plus = 0x23,
382 ProcessorFamilyPowerPC604 = 0x24,
383 ProcessorFamilyPowerPC620 = 0x25,
384 ProcessorFamilyPowerPCx704 = 0x26,
385 ProcessorFamilyPowerPC750 = 0x27,
386 ProcessorFamilyAlpha3 = 0x30,
387 ProcessorFamilyAlpha21064 = 0x31,
388 ProcessorFamilyAlpha21066 = 0x32,
389 ProcessorFamilyAlpha21164 = 0x33,
390 ProcessorFamilyAlpha21164PC = 0x34,
391 ProcessorFamilyAlpha21164a = 0x35,
392 ProcessorFamilyAlpha21264 = 0x36,
393 ProcessorFamilyAlpha21364 = 0x37,
394 ProcessorFamilyMips = 0x40,
395 ProcessorFamilyMIPSR4000 = 0x41,
396 ProcessorFamilyMIPSR4200 = 0x42,
397 ProcessorFamilyMIPSR4400 = 0x43,
398 ProcessorFamilyMIPSR4600 = 0x44,
399 ProcessorFamilyMIPSR10000 = 0x45,
400 ProcessorFamilySparc = 0x50,
401 ProcessorFamilySuperSparc = 0x51,
402 ProcessorFamilymicroSparcII = 0x52,
403 ProcessorFamilymicroSparcIIep = 0x53,
404 ProcessorFamilyUltraSparc = 0x54,
405 ProcessorFamilyUltraSparcII = 0x55,
406 ProcessorFamilyUltraSparcIIi = 0x56,
407 ProcessorFamilyUltraSparcIII = 0x57,
408 ProcessorFamilyUltraSparcIIIi = 0x58,
409 ProcessorFamily68040 = 0x60,
410 ProcessorFamily68xxx = 0x61,
411 ProcessorFamily68000 = 0x62,
412 ProcessorFamily68010 = 0x63,
413 ProcessorFamily68020 = 0x64,
414 ProcessorFamily68030 = 0x65,
415 ProcessorFamilyHobbit = 0x70,
416 ProcessorFamilyCrusoeTM5000 = 0x78,
417 ProcessorFamilyCrusoeTM3000 = 0x79,
418 ProcessorFamilyEfficeonTM8000 = 0x7A,
419 ProcessorFamilyWeitek = 0x80,
420 ProcessorFamilyItanium = 0x82,
421 ProcessorFamilyAmdAthlon64 = 0x83,
422 ProcessorFamilyAmdOpteron = 0x84,
423 ProcessorFamilyAmdSempron = 0x85,
424 ProcessorFamilyAmdTurion64Mobile = 0x86,
425 ProcessorFamilyDualCoreAmdOpteron = 0x87,
426 ProcessorFamilyAmdAthlon64X2DualCore = 0x88,
427 ProcessorFamilyAmdTurion64X2Mobile = 0x89,
428 ProcessorFamilyPARISC = 0x90,
429 ProcessorFamilyPaRisc8500 = 0x91,
430 ProcessorFamilyPaRisc8000 = 0x92,
431 ProcessorFamilyPaRisc7300LC = 0x93,
432 ProcessorFamilyPaRisc7200 = 0x94,
433 ProcessorFamilyPaRisc7100LC = 0x95,
434 ProcessorFamilyPaRisc7100 = 0x96,
435 ProcessorFamilyV30 = 0xA0,
436 ProcessorFamilyPentiumIIIXeon = 0xB0,
437 ProcessorFamilyPentiumIIISpeedStep = 0xB1,
438 ProcessorFamilyPentium4 = 0xB2,
439 ProcessorFamilyIntelXeon = 0xB3,
440 ProcessorFamilyAS400 = 0xB4,
441 ProcessorFamilyIntelXeonMP = 0xB5,
442 ProcessorFamilyAMDAthlonXP = 0xB6,
443 ProcessorFamilyAMDAthlonMP = 0xB7,
444 ProcessorFamilyIntelItanium2 = 0xB8,
445 ProcessorFamilyIntelPentiumM = 0xB9,
446 ProcessorFamilyIntelCeleronD = 0xBA,
447 ProcessorFamilyIntelPentiumD = 0xBB,
448 ProcessorFamilyIntelPentiumEx = 0xBC,
449 ProcessorFamilyIntelCoreSolo = 0xBD, ///< SMBIOS spec 2.6 correct this value
450 ProcessorFamilyReserved = 0xBE,
451 ProcessorFamilyIntelCore2 = 0xBF,
452 ProcessorFamilyIBM390 = 0xC8,
453 ProcessorFamilyG4 = 0xC9,
454 ProcessorFamilyG5 = 0xCA,
455 ProcessorFamilyG6 = 0xCB,
456 ProcessorFamilyzArchitectur = 0xCC,
457 ProcessorFamilyViaC7M = 0xD2,
458 ProcessorFamilyViaC7D = 0xD3,
459 ProcessorFamilyViaC7 = 0xD4,
460 ProcessorFamilyViaEden = 0xD5,
461 ProcessorFamilyi860 = 0xFA,
462 ProcessorFamilyi960 = 0xFB,
463 ProcessorFamilyIndicatorFamily2 = 0xFE,
464 ProcessorFamilyReserved1 = 0xFF
465 } PROCESSOR_FAMILY_DATA;
466
467 ///
468 /// Processor Information - Voltage
469 ///
470 typedef struct {
471 UINT8 ProcessorVoltageCapability5V :1;
472 UINT8 ProcessorVoltageCapability3_3V :1;
473 UINT8 ProcessorVoltageCapability2_9V :1;
474 UINT8 ProcessorVoltageCapabilityReserved :1; ///< Bit 3, must be zero.
475 UINT8 ProcessorVoltageReserved :3; ///< Bits 4-6, must be zero.
476 UINT8 ProcessorVoltageIndicateLegacy :1;
477 } PROCESSOR_VOLTAGE;
478
479 ///
480 /// Processor Information - Processor Upgrade
481 ///
482 typedef enum {
483 ProcessorUpgradeOther = 0x01,
484 ProcessorUpgradeUnknown = 0x02,
485 ProcessorUpgradeDaughterBoard = 0x03,
486 ProcessorUpgradeZIFSocket = 0x04,
487 ProcessorUpgradePiggyBack = 0x05, ///< Replaceable
488 ProcessorUpgradeNone = 0x06,
489 ProcessorUpgradeLIFSocket = 0x07,
490 ProcessorUpgradeSlot1 = 0x08,
491 ProcessorUpgradeSlot2 = 0x09,
492 ProcessorUpgrade370PinSocket = 0x0A,
493 ProcessorUpgradeSlotA = 0x0B,
494 ProcessorUpgradeSlotM = 0x0C,
495 ProcessorUpgradeSocket423 = 0x0D,
496 ProcessorUpgradeSocketA = 0x0E, ///< Socket 462
497 ProcessorUpgradeSocket478 = 0x0F,
498 ProcessorUpgradeSocket754 = 0x10,
499 ProcessorUpgradeSocket940 = 0x11,
500 ProcessorUpgradeSocket939 = 0x12,
501 ProcessorUpgradeSocketmPGA604 = 0x13,
502 ProcessorUpgradeSocketLGA771 = 0x14,
503 ProcessorUpgradeSocketLGA775 = 0x15,
504 ProcessorUpgradeSocketS1 = 0x16,
505 ProcessorUpgradeAM2 = 0x17,
506 ProcessorUpgradeF1207 = 0x18
507 } PROCESSOR_UPGRADE;
508
509 ///
510 /// Processor ID Field Description
511 ///
512 typedef struct {
513 UINT32 ProcessorSteppingId:4;
514 UINT32 ProcessorModel: 4;
515 UINT32 ProcessorFamily: 4;
516 UINT32 ProcessorType: 2;
517 UINT32 ProcessorReserved1: 2;
518 UINT32 ProcessorXModel: 4;
519 UINT32 ProcessorXFamily: 8;
520 UINT32 ProcessorReserved2: 4;
521 } PROCESSOR_SIGNATURE;
522
523 typedef struct {
524 UINT32 ProcessorFpu :1;
525 UINT32 ProcessorVme :1;
526 UINT32 ProcessorDe :1;
527 UINT32 ProcessorPse :1;
528 UINT32 ProcessorTsc :1;
529 UINT32 ProcessorMsr :1;
530 UINT32 ProcessorPae :1;
531 UINT32 ProcessorMce :1;
532 UINT32 ProcessorCx8 :1;
533 UINT32 ProcessorApic :1;
534 UINT32 ProcessorReserved1 :1;
535 UINT32 ProcessorSep :1;
536 UINT32 ProcessorMtrr :1;
537 UINT32 ProcessorPge :1;
538 UINT32 ProcessorMca :1;
539 UINT32 ProcessorCmov :1;
540 UINT32 ProcessorPat :1;
541 UINT32 ProcessorPse36 :1;
542 UINT32 ProcessorPsn :1;
543 UINT32 ProcessorClfsh :1;
544 UINT32 ProcessorReserved2 :1;
545 UINT32 ProcessorDs :1;
546 UINT32 ProcessorAcpi :1;
547 UINT32 ProcessorMmx :1;
548 UINT32 ProcessorFxsr :1;
549 UINT32 ProcessorSse :1;
550 UINT32 ProcessorSse2 :1;
551 UINT32 ProcessorSs :1;
552 UINT32 ProcessorReserved3 :1;
553 UINT32 ProcessorTm :1;
554 UINT32 ProcessorReserved4 :2;
555 } PROCESSOR_FEATURE_FLAGS;
556
557 typedef struct {
558 PROCESSOR_SIGNATURE Signature;
559 PROCESSOR_FEATURE_FLAGS FeatureFlags;
560 } PROCESSOR_ID_DATA;
561
562 ///
563 /// Processor Information (Type 4)
564 ///
565 /// The information in this structure defines the attributes of a single processor;
566 /// a separate structure instance is provided for each system processor socket/slot.
567 /// For example, a system with an IntelDX2 processor would have a single
568 /// structure instance while a system with an IntelSX2 processor would have a structure
569 /// to describe the main CPU and a second structure to describe the 80487 co-processor.
570 ///
571 typedef struct {
572 SMBIOS_STRUCTURE Hdr;
573 SMBIOS_TABLE_STRING Socket;
574 UINT8 ProcessorType; ///< enumeration value from PROCESSOR_TYPE_DATA
575 UINT8 ProcessorFamily; ///< enumeration value from PROCESSOR_FAMILY_DATA
576 SMBIOS_TABLE_STRING ProcessorManufacture;
577 PROCESSOR_ID_DATA ProcessorId;
578 SMBIOS_TABLE_STRING ProcessorVersion;
579 PROCESSOR_VOLTAGE Voltage;
580 UINT16 ExternalClock;
581 UINT16 MaxSpeed;
582 UINT16 CurrentSpeed;
583 UINT8 Status;
584 UINT8 ProcessorUpgrade; ///< enumeration value from PROCESSOR_UPGRADE
585 UINT16 L1CacheHandle;
586 UINT16 L2CacheHandle;
587 UINT16 L3CacheHandle;
588 SMBIOS_TABLE_STRING SerialNumber;
589 SMBIOS_TABLE_STRING AssetTag;
590 SMBIOS_TABLE_STRING PartNumber;
591 //
592 // Add for smbios 2.5
593 //
594 UINT8 CoreCount;
595 UINT8 EnabledCoreCount;
596 UINT8 ThreadCount;
597 UINT16 ProcessorCharacteristics;
598 //
599 // Add for smbios 2.6
600 //
601 UINT16 ProcessorFamily2;
602 } SMBIOS_TABLE_TYPE4;
603
604 ///
605 /// Memory Controller Error Detecting Method
606 ///
607 typedef enum {
608 ErrorDetectingMethodOther = 0x01,
609 ErrorDetectingMethodUnknown = 0x02,
610 ErrorDetectingMethodNone = 0x03,
611 ErrorDetectingMethodParity = 0x04,
612 ErrorDetectingMethod32Ecc = 0x05,
613 ErrorDetectingMethod64Ecc = 0x06,
614 ErrorDetectingMethod128Ecc = 0x07,
615 ErrorDetectingMethodCrc = 0x08
616 } MEMORY_ERROR_DETECT_METHOD;
617
618 ///
619 /// Memory Controller Error Correcting Capability
620 ///
621 typedef struct {
622 UINT8 Other :1;
623 UINT8 Unknown :1;
624 UINT8 None :1;
625 UINT8 SingleBitErrorCorrect :1;
626 UINT8 DoubleBitErrorCorrect :1;
627 UINT8 ErrorScrubbing :1;
628 UINT8 Reserved :2;
629 } MEMORY_ERROR_CORRECT_CAPABILITY;
630
631 ///
632 /// Memory Controller Information - Interleave Support
633 ///
634 typedef enum {
635 MemoryInterleaveOther = 0x01,
636 MemoryInterleaveUnknown = 0x02,
637 MemoryInterleaveOneWay = 0x03,
638 MemoryInterleaveTwoWay = 0x04,
639 MemoryInterleaveFourWay = 0x05,
640 MemoryInterleaveEightWay = 0x06,
641 MemoryInterleaveSixteenWay = 0x07
642 } MEMORY_SUPPORT_INTERLEAVE_TYPE;
643
644 ///
645 /// Memory Controller Information - Memory Speeds
646 ///
647 typedef struct {
648 UINT16 Other :1;
649 UINT16 Unknown :1;
650 UINT16 SeventyNs:1;
651 UINT16 SixtyNs :1;
652 UINT16 FiftyNs :1;
653 UINT16 Reserved :11;
654 } MEMORY_SPEED_TYPE;
655
656 ///
657 /// Memory Controller Information (Type 5, Obsolete)
658 ///
659 /// The information in this structure defines the attributes of the system's memory controller(s)
660 /// and the supported attributes of any memory-modules present in the sockets controlled by
661 /// this controller.
662 /// Note: This structure, and its companion Memory Module Information (Type 6, Obsolete),
663 /// are obsolete starting with version 2.1 of this specification; the Physical Memory Array (Type 16)
664 /// and Memory Device (Type 17) structures should be used instead. BIOS providers might
665 /// choose to implement both memory description types to allow existing DMI browsers
666 /// to properly display the system's memory attributes.
667 ///
668 typedef struct {
669 SMBIOS_STRUCTURE Hdr;
670 UINT8 ErrDetectMethod; ///< enumeration value from MEMORY_ERROR_DETECT_METHOD
671 MEMORY_ERROR_CORRECT_CAPABILITY ErrCorrectCapability;
672 UINT8 SupportInterleave; ///< enumeration value from MEMORY_SUPPORT_INTERLEAVE_TYPE
673 UINT8 CurrentInterleave; ///< enumeration value from MEMORY_SUPPORT_INTERLEAVE_TYPE
674 UINT8 MaxMemoryModuleSize;
675 MEMORY_SPEED_TYPE SupportSpeed;
676 UINT16 SupportMemoryType;
677 UINT8 MemoryModuleVoltage;
678 UINT8 AssociatedMemorySlotNum;
679 UINT16 MemoryModuleConfigHandles[1];
680 } SMBIOS_TABLE_TYPE5;
681
682 ///
683 /// Memory Module Information - Memory Types
684 ///
685 typedef struct {
686 UINT16 Other :1;
687 UINT16 Unknown :1;
688 UINT16 Standard :1;
689 UINT16 FastPageMode:1;
690 UINT16 Edo :1;
691 UINT16 Parity :1;
692 UINT16 Ecc :1;
693 UINT16 Simm :1;
694 UINT16 Dimm :1;
695 UINT16 BurstEdo :1;
696 UINT16 Sdram :1;
697 UINT16 Reserved :5;
698 } MEMORY_CURRENT_TYPE;
699
700 ///
701 /// Memory Module Information - Memory Size
702 ///
703 typedef struct {
704 UINT8 InstalledOrEnabledSize :7; ///< Size (n), where 2**n is the size in MB.
705 UINT8 SingleOrDoubleBank :1;
706 } MEMORY_INSTALLED_ENABLED_SIZE;
707
708 ///
709 /// Memory Module Information (Type 6, Obsolete)
710 ///
711 /// One Memory Module Information structure is included for each memory-module socket
712 /// in the system. The structure describes the speed, type, size, and error status
713 /// of each system memory module. The supported attributes of each module are described
714 /// by the "owning" Memory Controller Information structure.
715 /// Note: This structure, and its companion Memory Controller Information (Type 5, Obsolete),
716 /// are obsolete starting with version 2.1 of this specification; the Physical Memory Array (Type 16)
717 /// and Memory Device (Type 17) structures should be used instead.
718 ///
719 typedef struct {
720 SMBIOS_STRUCTURE Hdr;
721 SMBIOS_TABLE_STRING SocketDesignation;
722 UINT8 BankConnections;
723 UINT8 CurrentSpeed;
724 MEMORY_CURRENT_TYPE CurrentMemoryType;
725 MEMORY_INSTALLED_ENABLED_SIZE InstalledSize;
726 MEMORY_INSTALLED_ENABLED_SIZE EnabledSize;
727 UINT8 ErrorStatus;
728 } SMBIOS_TABLE_TYPE6;
729
730 ///
731 /// Cache Information - SRAM Type
732 ///
733 typedef struct {
734 UINT16 Other :1;
735 UINT16 Unknown :1;
736 UINT16 NonBurst :1;
737 UINT16 Burst :1;
738 UINT16 PipelineBurst :1;
739 UINT16 Asynchronous :1;
740 UINT16 Synchronous :1;
741 UINT16 Reserved :9;
742 } CACHE_SRAM_TYPE_DATA;
743
744 ///
745 /// Cache Information - Error Correction Type
746 ///
747 typedef enum {
748 CacheErrorOther = 0x01,
749 CacheErrorUnknown = 0x02,
750 CacheErrorNone = 0x03,
751 CacheErrorParity = 0x04,
752 CacheErrorSingleBit = 0x05, ///< ECC
753 CacheErrorMultiBit = 0x06 ///< ECC
754 } CACHE_ERROR_TYPE_DATA;
755
756 ///
757 /// Cache Information - System Cache Type
758 ///
759 typedef enum {
760 CacheTypeOther = 0x01,
761 CacheTypeUnknown = 0x02,
762 CacheTypeInstruction = 0x03,
763 CacheTypeData = 0x04,
764 CacheTypeUnified = 0x05
765 } CACHE_TYPE_DATA;
766
767 ///
768 /// Cache Information - Associativity
769 ///
770 typedef enum {
771 CacheAssociativityOther = 0x01,
772 CacheAssociativityUnknown = 0x02,
773 CacheAssociativityDirectMapped = 0x03,
774 CacheAssociativity2Way = 0x04,
775 CacheAssociativity4Way = 0x05,
776 CacheAssociativityFully = 0x06,
777 CacheAssociativity8Way = 0x07,
778 CacheAssociativity16Way = 0x08,
779 CacheAssociativity24Way = 0x09
780 } CACHE_ASSOCIATIVITY_DATA;
781
782 ///
783 /// Cache Information (Type 7)
784 ///
785 /// he information in this structure defines the attributes of CPU cache device in the system.
786 /// One structure is specified for each such device, whether the device is internal to
787 /// or external to the CPU module. Cache modules can be associated with a processor structure
788 /// in one or two ways depending on the SMBIOS version.
789 ///
790 typedef struct {
791 SMBIOS_STRUCTURE Hdr;
792 SMBIOS_TABLE_STRING SocketDesignation;
793 UINT16 CacheConfiguration;
794 UINT16 MaximumCacheSize;
795 UINT16 InstalledSize;
796 CACHE_SRAM_TYPE_DATA SupportedSRAMType;
797 CACHE_SRAM_TYPE_DATA CurrentSRAMType;
798 UINT8 CacheSpeed;
799 UINT8 ErrorCorrectionType; ///< enumeration value from CACHE_ERROR_TYPE_DATA
800 UINT8 SystemCacheType; ///< enumeration value from CACHE_TYPE_DATA
801 UINT8 Associativity; ///< enumeration value from CACHE_ASSOCIATIVITY_DATA
802 } SMBIOS_TABLE_TYPE7;
803
804 ///
805 /// Port Connector Information - Connector Types
806 ///
807 typedef enum {
808 PortConnectorTypeNone = 0x00,
809 PortConnectorTypeCentronics = 0x01,
810 PortConnectorTypeMiniCentronics = 0x02,
811 PortConnectorTypeProprietary = 0x03,
812 PortConnectorTypeDB25Male = 0x04,
813 PortConnectorTypeDB25Female = 0x05,
814 PortConnectorTypeDB15Male = 0x06,
815 PortConnectorTypeDB15Female = 0x07,
816 PortConnectorTypeDB9Male = 0x08,
817 PortConnectorTypeDB9Female = 0x09,
818 PortConnectorTypeRJ11 = 0x0A,
819 PortConnectorTypeRJ45 = 0x0B,
820 PortConnectorType50PinMiniScsi = 0x0C,
821 PortConnectorTypeMiniDin = 0x0D,
822 PortConnectorTypeMicriDin = 0x0E,
823 PortConnectorTypePS2 = 0x0F,
824 PortConnectorTypeInfrared = 0x10,
825 PortConnectorTypeHpHil = 0x11,
826 PortConnectorTypeUsb = 0x12,
827 PortConnectorTypeSsaScsi = 0x13,
828 PortConnectorTypeCircularDin8Male = 0x14,
829 PortConnectorTypeCircularDin8Female = 0x15,
830 PortConnectorTypeOnboardIde = 0x16,
831 PortConnectorTypeOnboardFloppy = 0x17,
832 PortConnectorType9PinDualInline = 0x18,
833 PortConnectorType25PinDualInline = 0x19,
834 PortConnectorType50PinDualInline = 0x1A,
835 PortConnectorType68PinDualInline = 0x1B,
836 PortConnectorTypeOnboardSoundInput = 0x1C,
837 PortConnectorTypeMiniCentronicsType14 = 0x1D,
838 PortConnectorTypeMiniCentronicsType26 = 0x1E,
839 PortConnectorTypeHeadPhoneMiniJack = 0x1F,
840 PortConnectorTypeBNC = 0x20,
841 PortConnectorType1394 = 0x21,
842 PortConnectorTypePC98 = 0xA0,
843 PortConnectorTypePC98Hireso = 0xA1,
844 PortConnectorTypePCH98 = 0xA2,
845 PortConnectorTypePC98Note = 0xA3,
846 PortConnectorTypePC98Full = 0xA4,
847 PortConnectorTypeOther = 0xFF
848 } MISC_PORT_CONNECTOR_TYPE;
849
850 ///
851 /// Port Connector Information - Port Types
852 ///
853 typedef enum {
854 PortTypeNone = 0x00,
855 PortTypeParallelXtAtCompatible = 0x01,
856 PortTypeParallelPortPs2 = 0x02,
857 PortTypeParallelPortEcp = 0x03,
858 PortTypeParallelPortEpp = 0x04,
859 PortTypeParallelPortEcpEpp = 0x05,
860 PortTypeSerialXtAtCompatible = 0x06,
861 PortTypeSerial16450Compatible = 0x07,
862 PortTypeSerial16550Compatible = 0x08,
863 PortTypeSerial16550ACompatible = 0x09,
864 PortTypeScsi = 0x0A,
865 PortTypeMidi = 0x0B,
866 PortTypeJoyStick = 0x0C,
867 PortTypeKeyboard = 0x0D,
868 PortTypeMouse = 0x0E,
869 PortTypeSsaScsi = 0x0F,
870 PortTypeUsb = 0x10,
871 PortTypeFireWire = 0x11,
872 PortTypePcmciaTypeI = 0x12,
873 PortTypePcmciaTypeII = 0x13,
874 PortTypePcmciaTypeIII = 0x14,
875 PortTypeCardBus = 0x15,
876 PortTypeAccessBusPort = 0x16,
877 PortTypeScsiII = 0x17,
878 PortTypeScsiWide = 0x18,
879 PortTypePC98 = 0x19,
880 PortTypePC98Hireso = 0x1A,
881 PortTypePCH98 = 0x1B,
882 PortTypeVideoPort = 0x1C,
883 PortTypeAudioPort = 0x1D,
884 PortTypeModemPort = 0x1E,
885 PortTypeNetworkPort = 0x1F,
886 PortType8251Compatible = 0xA0,
887 PortType8251FifoCompatible = 0xA1,
888 PortTypeOther = 0xFF
889 } MISC_PORT_TYPE;
890
891 ///
892 /// Port Connector Information (Type 8)
893 ///
894 /// The information in this structure defines the attributes of a system port connector,
895 /// e.g. parallel, serial, keyboard, or mouse ports. The port's type and connector information
896 /// are provided. One structure is present for each port provided by the system.
897 ///
898 typedef struct {
899 SMBIOS_STRUCTURE Hdr;
900 SMBIOS_TABLE_STRING InternalReferenceDesignator;
901 UINT8 InternalConnectorType; ///< enumeration value from MISC_PORT_CONNECTOR_TYPE
902 SMBIOS_TABLE_STRING ExternalReferenceDesignator;
903 UINT8 ExternalConnectorType; ///< enumeration value from MISC_PORT_CONNECTOR_TYPE
904 UINT8 PortType; ///< enumeration value from MISC_PORT_TYPE
905 } SMBIOS_TABLE_TYPE8;
906
907 ///
908 /// System Slots - Slot Type
909 ///
910 typedef enum {
911 SlotTypeOther = 0x01,
912 SlotTypeUnknown = 0x02,
913 SlotTypeIsa = 0x03,
914 SlotTypeMca = 0x04,
915 SlotTypeEisa = 0x05,
916 SlotTypePci = 0x06,
917 SlotTypePcmcia = 0x07,
918 SlotTypeVlVesa = 0x08,
919 SlotTypeProprietary = 0x09,
920 SlotTypeProcessorCardSlot = 0x0A,
921 SlotTypeProprietaryMemoryCardSlot = 0x0B,
922 SlotTypeIORiserCardSlot = 0x0C,
923 SlotTypeNuBus = 0x0D,
924 SlotTypePci66MhzCapable = 0x0E,
925 SlotTypeAgp = 0x0F,
926 SlotTypeApg2X = 0x10,
927 SlotTypeAgp4X = 0x11,
928 SlotTypePciX = 0x12,
929 SlotTypeAgp4x = 0x13,
930 SlotTypePC98C20 = 0xA0,
931 SlotTypePC98C24 = 0xA1,
932 SlotTypePC98E = 0xA2,
933 SlotTypePC98LocalBus = 0xA3,
934 SlotTypePC98Card = 0xA4,
935 SlotTypePciExpress = 0xA5,
936 SlotTypePciExpressX1 = 0xA6,
937 SlotTypePciExpressX2 = 0xA7,
938 SlotTypePciExpressX4 = 0xA8,
939 SlotTypePciExpressX8 = 0xA9,
940 SlotTypePciExpressX16 = 0xAA
941 } MISC_SLOT_TYPE;
942
943 ///
944 /// System Slots - Slot Data Bus Width
945 ///
946 typedef enum {
947 SlotDataBusWidthOther = 0x01,
948 SlotDataBusWidthUnknown = 0x02,
949 SlotDataBusWidth8Bit = 0x03,
950 SlotDataBusWidth16Bit = 0x04,
951 SlotDataBusWidth32Bit = 0x05,
952 SlotDataBusWidth64Bit = 0x06,
953 SlotDataBusWidth128Bit = 0x07,
954 SlotDataBusWidth1X = 0x08, ///< Or X1
955 SlotDataBusWidth2X = 0x09, ///< Or X2
956 SlotDataBusWidth4X = 0x0A, ///< Or X4
957 SlotDataBusWidth8X = 0x0B, ///< Or X8
958 SlotDataBusWidth12X = 0x0C, ///< Or X12
959 SlotDataBusWidth16X = 0x0D, ///< Or X16
960 SlotDataBusWidth32X = 0x0E ///< Or X32
961 } MISC_SLOT_DATA_BUS_WIDTH;
962
963 ///
964 /// System Slots - Current Usage
965 ///
966 typedef enum {
967 SlotUsageOther = 0x01,
968 SlotUsageUnknown = 0x02,
969 SlotUsageAvailable = 0x03,
970 SlotUsageInUse = 0x04
971 } MISC_SLOT_USAGE;
972
973 ///
974 /// System Slots - Slot Length
975 ///
976 typedef enum {
977 SlotLengthOther = 0x01,
978 SlotLengthUnknown = 0x02,
979 SlotLengthShort = 0x03,
980 SlotLengthLong = 0x04
981 } MISC_SLOT_LENGTH;
982
983 ///
984 /// System Slots - Slot Characteristics 1
985 ///
986 typedef struct {
987 UINT8 CharacteristicsUnknown :1;
988 UINT8 Provides50Volts :1;
989 UINT8 Provides33Volts :1;
990 UINT8 SharedSlot :1;
991 UINT8 PcCard16Supported :1;
992 UINT8 CardBusSupported :1;
993 UINT8 ZoomVideoSupported :1;
994 UINT8 ModemRingResumeSupported:1;
995 } MISC_SLOT_CHARACTERISTICS1;
996 ///
997 /// System Slots - Slot Characteristics 2
998 ///
999 typedef struct {
1000 UINT8 PmeSignalSupported :1;
1001 UINT8 HotPlugDevicesSupported :1;
1002 UINT8 SmbusSignalSupported :1;
1003 UINT8 Reserved :5; ///< Set to 0.
1004 } MISC_SLOT_CHARACTERISTICS2;
1005
1006 ///
1007 /// System Slots (Type 9)
1008 ///
1009 /// The information in this structure defines the attributes of a system slot.
1010 /// One structure is provided for each slot in the system.
1011 ///
1012 ///
1013 typedef struct {
1014 SMBIOS_STRUCTURE Hdr;
1015 SMBIOS_TABLE_STRING SlotDesignation;
1016 UINT8 SlotType; ///< enumeration value from MISC_SLOT_TYPE
1017 UINT8 SlotDataBusWidth; ///< enumeration value from MISC_SLOT_DATA_BUS_WIDTH
1018 UINT8 CurrentUsage; ///< enumeration value from MISC_SLOT_USAGE
1019 UINT8 SlotLength; ///< enumeration value from MISC_SLOT_LENGTH
1020 UINT16 SlotID;
1021 MISC_SLOT_CHARACTERISTICS1 SlotCharacteristics1;
1022 MISC_SLOT_CHARACTERISTICS2 SlotCharacteristics2;
1023 //
1024 // Add for smbios 2.6
1025 //
1026 UINT16 SegmentGroupNum;
1027 UINT8 BusNum;
1028 UINT8 DevFuncNum;
1029 } SMBIOS_TABLE_TYPE9;
1030
1031 ///
1032 /// On Board Devices Information - Device Types
1033 ///
1034 typedef enum {
1035 OnBoardDeviceTypeOther = 0x01,
1036 OnBoardDeviceTypeUnknown = 0x02,
1037 OnBoardDeviceTypeVideo = 0x03,
1038 OnBoardDeviceTypeScsiController = 0x04,
1039 OnBoardDeviceTypeEthernet = 0x05,
1040 OnBoardDeviceTypeTokenRing = 0x06,
1041 OnBoardDeviceTypeSound = 0x07
1042 } MISC_ONBOARD_DEVICE_TYPE;
1043
1044 ///
1045 /// Device Item Entry
1046 ///
1047 typedef struct {
1048 UINT8 DeviceType; ///< Bit [6:0] - enumeration type of device from MISC_ONBOARD_DEVICE_TYPE
1049 ///< Bit 7 - 1 : device enabled, 0 : device disabled
1050 SMBIOS_TABLE_STRING DescriptionString;
1051 } DEVICE_STRUCT;
1052
1053 ///
1054 /// On Board Devices Information (Type 10, obsolete)
1055 ///
1056 /// Note: This structure is obsolete starting with version 2.6 specification; the Onboard Devices Extended
1057 /// Information (Type 41) structure should be used instead . BIOS providers can choose to implement both
1058 /// types to allow existing SMBIOS browsers to properly display the system's onboard devices information.
1059 /// The information in this structure defines the attributes of devices that are onboard (soldered onto)
1060 /// a system element, usually the baseboard. In general, an entry in this table implies that the BIOS
1061 /// has some level of control over the enabling of the associated device for use by the system.
1062 ///
1063 typedef struct {
1064 SMBIOS_STRUCTURE Hdr;
1065 DEVICE_STRUCT Device[1];
1066 } SMBIOS_TABLE_TYPE10;
1067
1068 ///
1069 /// OEM Strings (Type 11)
1070 /// This structure contains free form strings defined by the OEM. Examples of this are:
1071 /// Part Numbers for Reference Documents for the system, contact information for the manufacturer, etc.
1072 ///
1073 typedef struct {
1074 SMBIOS_STRUCTURE Hdr;
1075 UINT8 StringCount;
1076 } SMBIOS_TABLE_TYPE11;
1077
1078 ///
1079 /// System Configuration Options (Type 12)
1080 ///
1081 /// This structure contains information required to configure the base board's Jumpers and Switches.
1082 ///
1083 typedef struct {
1084 SMBIOS_STRUCTURE Hdr;
1085 UINT8 StringCount;
1086 } SMBIOS_TABLE_TYPE12;
1087
1088
1089 ///
1090 /// BIOS Language Information (Type 13)
1091 ///
1092 /// The information in this structure defines the installable language attributes of the BIOS.
1093 ///
1094 typedef struct {
1095 SMBIOS_STRUCTURE Hdr;
1096 UINT8 InstallableLanguages;
1097 UINT8 Flags;
1098 UINT8 Reserved[15];
1099 SMBIOS_TABLE_STRING CurrentLanguages;
1100 } SMBIOS_TABLE_TYPE13;
1101
1102 ///
1103 /// System Event Log - Event Log Types
1104 ///
1105 typedef enum {
1106 EventLogTypeReserved = 0x00,
1107 EventLogTypeSingleBitECC = 0x01,
1108 EventLogTypeMultiBitECC = 0x02,
1109 EventLogTypeParityMemErr = 0x03,
1110 EventLogTypeBusTimeOut = 0x04,
1111 EventLogTypeIOChannelCheck = 0x05,
1112 EventLogTypeSoftwareNMI = 0x06,
1113 EventLogTypePOSTMemResize = 0x07,
1114 EventLogTypePOSTErr = 0x08,
1115 EventLogTypePCIParityErr = 0x09,
1116 EventLogTypePCISystemErr = 0x0A,
1117 EventLogTypeCPUFailure = 0x0B,
1118 EventLogTypeEISATimeOut = 0x0C,
1119 EventLogTypeMemLogDisabled = 0x0D,
1120 EventLogTypeLoggingDisabled = 0x0E,
1121 EventLogTypeSysLimitExce = 0x10,
1122 EventLogTypeAsyncHWTimer = 0x11,
1123 EventLogTypeSysConfigInfo = 0x12,
1124 EventLogTypeHDInfo = 0x13,
1125 EventLogTypeSysReconfig = 0x14,
1126 EventLogTypeUncorrectCPUErr = 0x15,
1127 EventLogTypeAreaResetAndClr = 0x16,
1128 EventLogTypeSystemBoot = 0x17,
1129 EventLogTypeUnused = 0x18, ///< 0x18 - 0x7F
1130 EventLogTypeAvailForSys = 0x80, ///< 0x80 - 0xFE
1131 EventLogTypeEndOfLog = 0xFF
1132 } EVENT_LOG_TYPE_DATA;
1133
1134 ///
1135 /// System Event Log - Variable Data Format Types
1136 ///
1137 typedef enum {
1138 EventLogVariableNone = 0x00,
1139 EventLogVariableHandle = 0x01,
1140 EventLogVariableMutilEvent = 0x02,
1141 EventLogVariableMutilEventHandle = 0x03,
1142 EventLogVariablePOSTResultBitmap = 0x04,
1143 EventLogVariableSysManagementType = 0x05,
1144 EventLogVariableMutliEventSysManagmentType = 0x06,
1145 EventLogVariableUnused = 0x07,
1146 EventLogVariableOEMAssigned = 0x80
1147 } EVENT_LOG_VARIABLE_DATA;
1148
1149 ///
1150 /// Group Item Entry
1151 ///
1152 typedef struct {
1153 UINT8 ItemType;
1154 UINT16 ItemHandle;
1155 } GROUP_STRUCT;
1156
1157 ///
1158 /// Event Log Type Descriptors
1159 ///
1160 typedef struct {
1161 UINT8 LogType; ///< enumeration value from EVENT_LOG_TYPE_DATA
1162 UINT8 DataFormatType;
1163 } EVENT_LOG_TYPE;
1164
1165 ///
1166 /// Group Associations (Type 14)
1167 ///
1168 /// The Group Associations structure is provided for OEMs who want to specify
1169 /// the arrangement or hierarchy of certain components (including other Group Associations)
1170 /// within the system.
1171 ///
1172 typedef struct {
1173 SMBIOS_STRUCTURE Hdr;
1174 SMBIOS_TABLE_STRING GroupName;
1175 GROUP_STRUCT Group[1];
1176 } SMBIOS_TABLE_TYPE14;
1177
1178 ///
1179 /// System Event Log (Type 15)
1180 ///
1181 /// The presence of this structure within the SMBIOS data returned for a system indicates
1182 /// that the system supports an event log. An event log is a fixed-length area within a
1183 /// non-volatile storage element, starting with a fixed-length (and vendor-specific) header
1184 /// record, followed by one or more variable-length log records.
1185 ///
1186 typedef struct {
1187 SMBIOS_STRUCTURE Hdr;
1188 UINT16 LogAreaLength;
1189 UINT16 LogHeaderStartOffset;
1190 UINT16 LogDataStartOffset;
1191 UINT8 AccessMethod;
1192 UINT8 LogStatus;
1193 UINT32 LogChangeToken;
1194 UINT32 AccessMethodAddress;
1195 UINT8 LogHeaderFormat;
1196 UINT8 NumberOfSupportedLogTypeDescriptors;
1197 UINT8 LengthOfLogTypeDescriptor;
1198 EVENT_LOG_TYPE EventLogTypeDescriptors[1];
1199 } SMBIOS_TABLE_TYPE15;
1200
1201 ///
1202 /// Physical Memory Array - Location
1203 ///
1204 typedef enum {
1205 MemoryArrayLocationOther = 0x01,
1206 MemoryArrayLocationUnknown = 0x02,
1207 MemoryArrayLocationSystemBoard = 0x03,
1208 MemoryArrayLocationIsaAddonCard = 0x04,
1209 MemoryArrayLocationEisaAddonCard = 0x05,
1210 MemoryArrayLocationPciAddonCard = 0x06,
1211 MemoryArrayLocationMcaAddonCard = 0x07,
1212 MemoryArrayLocationPcmciaAddonCard = 0x08,
1213 MemoryArrayLocationProprietaryAddonCard = 0x09,
1214 MemoryArrayLocationNuBus = 0x0A,
1215 MemoryArrayLocationPc98C20AddonCard = 0xA0,
1216 MemoryArrayLocationPc98C24AddonCard = 0xA1,
1217 MemoryArrayLocationPc98EAddonCard = 0xA2,
1218 MemoryArrayLocationPc98LocalBusAddonCard = 0xA3
1219 } MEMORY_ARRAY_LOCATION;
1220
1221 ///
1222 /// Physical Memory Array - Use
1223 ///
1224 typedef enum {
1225 MemoryArrayUseOther = 0x01,
1226 MemoryArrayUseUnknown = 0x02,
1227 MemoryArrayUseSystemMemory = 0x03,
1228 MemoryArrayUseVideoMemory = 0x04,
1229 MemoryArrayUseFlashMemory = 0x05,
1230 MemoryArrayUseNonVolatileRam = 0x06,
1231 MemoryArrayUseCacheMemory = 0x07
1232 } MEMORY_ARRAY_USE;
1233
1234 ///
1235 /// Physical Memory Array - Error Correction Types
1236 ///
1237 typedef enum {
1238 MemoryErrorCorrectionOther = 0x01,
1239 MemoryErrorCorrectionUnknown = 0x02,
1240 MemoryErrorCorrectionNone = 0x03,
1241 MemoryErrorCorrectionParity = 0x04,
1242 MemoryErrorCorrectionSingleBitEcc = 0x05,
1243 MemoryErrorCorrectionMultiBitEcc = 0x06,
1244 MemoryErrorCorrectionCrc = 0x07
1245 } MEMORY_ERROR_CORRECTION;
1246
1247 ///
1248 /// Physical Memory Array (Type 16)
1249 ///
1250 /// This structure describes a collection of memory devices that operate
1251 /// together to form a memory address space.
1252 ///
1253 typedef struct {
1254 SMBIOS_STRUCTURE Hdr;
1255 UINT8 Location; ///< enumeration value from MEMORY_ARRAY_LOCATION
1256 UINT8 Use; ///< enumeration value from MEMORY_ARRAY_USE
1257 UINT8 MemoryErrorCorrection; ///< enumeration value from MEMORY_ERROR_CORRECTION
1258 UINT32 MaximumCapacity;
1259 UINT16 MemoryErrorInformationHandle;
1260 UINT16 NumberOfMemoryDevices;
1261 } SMBIOS_TABLE_TYPE16;
1262
1263 ///
1264 /// Memory Device - Form Factor
1265 ///
1266 typedef enum {
1267 MemoryFormFactorOther = 0x01,
1268 MemoryFormFactorUnknown = 0x02,
1269 MemoryFormFactorSimm = 0x03,
1270 MemoryFormFactorSip = 0x04,
1271 MemoryFormFactorChip = 0x05,
1272 MemoryFormFactorDip = 0x06,
1273 MemoryFormFactorZip = 0x07,
1274 MemoryFormFactorProprietaryCard = 0x08,
1275 MemoryFormFactorDimm = 0x09,
1276 MemoryFormFactorTsop = 0x0A,
1277 MemoryFormFactorRowOfChips = 0x0B,
1278 MemoryFormFactorRimm = 0x0C,
1279 MemoryFormFactorSodimm = 0x0D,
1280 MemoryFormFactorSrimm = 0x0E,
1281 MemoryFormFactorFbDimm = 0x0F
1282 } MEMORY_FORM_FACTOR;
1283
1284 ///
1285 /// Memory Device - Type
1286 ///
1287 typedef enum {
1288 MemoryTypeOther = 0x01,
1289 MemoryTypeUnknown = 0x02,
1290 MemoryTypeDram = 0x03,
1291 MemoryTypeEdram = 0x04,
1292 MemoryTypeVram = 0x05,
1293 MemoryTypeSram = 0x06,
1294 MemoryTypeRam = 0x07,
1295 MemoryTypeRom = 0x08,
1296 MemoryTypeFlash = 0x09,
1297 MemoryTypeEeprom = 0x0A,
1298 MemoryTypeFeprom = 0x0B,
1299 MemoryTypeEprom = 0x0C,
1300 MemoryTypeCdram = 0x0D,
1301 MemoryType3Dram = 0x0E,
1302 MemoryTypeSdram = 0x0F,
1303 MemoryTypeSgram = 0x10,
1304 MemoryTypeRdram = 0x11,
1305 MemoryTypeDdr = 0x12,
1306 MemoryTypeDdr2 = 0x13,
1307 MemoryTypeDdr2FbDimm = 0x14
1308 } MEMORY_DEVICE_TYPE;
1309
1310 typedef struct {
1311 UINT16 Reserved :1;
1312 UINT16 Other :1;
1313 UINT16 Unknown :1;
1314 UINT16 FastPaged :1;
1315 UINT16 StaticColumn :1;
1316 UINT16 PseudoStatic :1;
1317 UINT16 Rambus :1;
1318 UINT16 Synchronous :1;
1319 UINT16 Cmos :1;
1320 UINT16 Edo :1;
1321 UINT16 WindowDram :1;
1322 UINT16 CacheDram :1;
1323 UINT16 Nonvolatile :1;
1324 UINT16 Reserved1 :3;
1325 } MEMORY_DEVICE_TYPE_DETAIL;
1326
1327 ///
1328 /// Memory Device (Type 17)
1329 ///
1330 /// This structure describes a single memory device that is part of
1331 /// a larger Physical Memory Array (Type 16).
1332 /// Note: If a system includes memory-device sockets, the SMBIOS implementation
1333 /// includes a Memory Device structure instance for each slot whether or not the
1334 /// socket is currently populated.
1335 ///
1336 typedef struct {
1337 SMBIOS_STRUCTURE Hdr;
1338 UINT16 MemoryArrayHandle;
1339 UINT16 MemoryErrorInformationHandle;
1340 UINT16 TotalWidth;
1341 UINT16 DataWidth;
1342 UINT16 Size;
1343 UINT8 FormFactor; ///< enumeration value from MEMORY_FORM_FACTOR
1344 UINT8 DeviceSet;
1345 SMBIOS_TABLE_STRING DeviceLocator;
1346 SMBIOS_TABLE_STRING BankLocator;
1347 UINT8 MemoryType; ///< enumeration value from MEMORY_DEVICE_TYPE
1348 MEMORY_DEVICE_TYPE_DETAIL TypeDetail;
1349 UINT16 Speed;
1350 SMBIOS_TABLE_STRING Manufacturer;
1351 SMBIOS_TABLE_STRING SerialNumber;
1352 SMBIOS_TABLE_STRING AssetTag;
1353 SMBIOS_TABLE_STRING PartNumber;
1354 //
1355 // Add for smbios 2.6
1356 //
1357 UINT8 Attributes;
1358 } SMBIOS_TABLE_TYPE17;
1359
1360 ///
1361 /// 32-bit Memory Error Information - Error Type
1362 ///
1363 typedef enum {
1364 MemoryErrorOther = 0x01,
1365 MemoryErrorUnknown = 0x02,
1366 MemoryErrorOk = 0x03,
1367 MemoryErrorBadRead = 0x04,
1368 MemoryErrorParity = 0x05,
1369 MemoryErrorSigleBit = 0x06,
1370 MemoryErrorDoubleBit = 0x07,
1371 MemoryErrorMultiBit = 0x08,
1372 MemoryErrorNibble = 0x09,
1373 MemoryErrorChecksum = 0x0A,
1374 MemoryErrorCrc = 0x0B,
1375 MemoryErrorCorrectSingleBit = 0x0C,
1376 MemoryErrorCorrected = 0x0D,
1377 MemoryErrorUnCorrectable = 0x0E
1378 } MEMORY_ERROR_TYPE;
1379
1380 ///
1381 /// 32-bit Memory Error Information - Error Granularity
1382 ///
1383 typedef enum {
1384 MemoryGranularityOther = 0x01,
1385 MemoryGranularityOtherUnknown = 0x02,
1386 MemoryGranularityDeviceLevel = 0x03,
1387 MemoryGranularityMemPartitionLevel = 0x04
1388 } MEMORY_ERROR_GRANULARITY;
1389
1390 ///
1391 /// 32-bit Memory Error Information - Error Operation
1392 ///
1393 typedef enum {
1394 MemoryErrorOperationOther = 0x01,
1395 MemoryErrorOperationUnknown = 0x02,
1396 MemoryErrorOperationRead = 0x03,
1397 MemoryErrorOperationWrite = 0x04,
1398 MemoryErrorOperationPartialWrite = 0x05
1399 } MEMORY_ERROR_OPERATION;
1400
1401 ///
1402 /// 32-bit Memory Error Information (Type 18)
1403 ///
1404 /// This structure identifies the specifics of an error that might be detected
1405 /// within a Physical Memory Array.
1406 ///
1407 typedef struct {
1408 SMBIOS_STRUCTURE Hdr;
1409 UINT8 ErrorType; ///< enumeration value from MEMORY_ERROR_TYPE
1410 UINT8 ErrorGranularity; ///< enumeration value from MEMORY_ERROR_GRANULARITY
1411 UINT8 ErrorOperation; ///< enumeration value from MEMORY_ERROR_OPERATION
1412 UINT32 VendorSyndrome;
1413 UINT32 MemoryArrayErrorAddress;
1414 UINT32 DeviceErrorAddress;
1415 UINT32 ErrorResolution;
1416 } SMBIOS_TABLE_TYPE18;
1417
1418 ///
1419 /// Memory Array Mapped Address (Type 19)
1420 ///
1421 /// This structure provides the address mapping for a Physical Memory Array.
1422 /// One structure is present for each contiguous address range described.
1423 ///
1424 typedef struct {
1425 SMBIOS_STRUCTURE Hdr;
1426 UINT32 StartingAddress;
1427 UINT32 EndingAddress;
1428 UINT16 MemoryArrayHandle;
1429 UINT8 PartitionWidth;
1430 } SMBIOS_TABLE_TYPE19;
1431
1432 ///
1433 /// Memory Device Mapped Address (Type 20)
1434 ///
1435 /// This structure maps memory address space usually to a device-level granularity.
1436 /// One structure is present for each contiguous address range described.
1437 ///
1438 typedef struct {
1439 SMBIOS_STRUCTURE Hdr;
1440 UINT32 StartingAddress;
1441 UINT32 EndingAddress;
1442 UINT16 MemoryDeviceHandle;
1443 UINT16 MemoryArrayMappedAddressHandle;
1444 UINT8 PartitionRowPosition;
1445 UINT8 InterleavePosition;
1446 UINT8 InterleavedDataDepth;
1447 } SMBIOS_TABLE_TYPE20;
1448
1449 ///
1450 /// Built-in Pointing Device - Type
1451 ///
1452 typedef enum {
1453 PointingDeviceTypeOther = 0x01,
1454 PointingDeviceTypeUnknown = 0x02,
1455 PointingDeviceTypeMouse = 0x03,
1456 PointingDeviceTypeTrackBall = 0x04,
1457 PointingDeviceTypeTrackPoint = 0x05,
1458 PointingDeviceTypeGlidePoint = 0x06,
1459 PointingDeviceTouchPad = 0x07,
1460 PointingDeviceTouchScreen = 0x08,
1461 PointingDeviceOpticalSensor = 0x09
1462 } BUILTIN_POINTING_DEVICE_TYPE;
1463
1464 ///
1465 /// Built-in Pointing Device - Interface
1466 ///
1467 typedef enum {
1468 PointingDeviceInterfaceOther = 0x01,
1469 PointingDeviceInterfaceUnknown = 0x02,
1470 PointingDeviceInterfaceSerial = 0x03,
1471 PointingDeviceInterfacePs2 = 0x04,
1472 PointingDeviceInterfaceInfrared = 0x05,
1473 PointingDeviceInterfaceHpHil = 0x06,
1474 PointingDeviceInterfaceBusMouse = 0x07,
1475 PointingDeviceInterfaceADB = 0x08,
1476 PointingDeviceInterfaceBusMouseDB9 = 0xA0,
1477 PointingDeviceInterfaceBusMouseMicroDin = 0xA1,
1478 PointingDeviceInterfaceUsb = 0xA2
1479 } BUILTIN_POINTING_DEVICE_INTERFACE;
1480
1481 ///
1482 /// Built-in Pointing Device (Type 21)
1483 ///
1484 /// This structure describes the attributes of the built-in pointing device for the
1485 /// system - the presence of this structure does not imply that the built-in
1486 /// pointing device is active for the system's use!
1487 ///
1488 typedef struct {
1489 SMBIOS_STRUCTURE Hdr;
1490 UINT8 Type; ///< enumeration value from BUILTIN_POINTING_DEVICE_TYPE
1491 UINT8 Interface; ///< enumeration value from BUILTIN_POINTING_DEVICE_INTERFACE
1492 UINT8 NumberOfButtons;
1493 } SMBIOS_TABLE_TYPE21;
1494
1495 ///
1496 /// Portable Battery - Device Chemistry
1497 ///
1498 typedef enum {
1499 PortableBatteryDeviceChemistryOther = 0x01,
1500 PortableBatteryDeviceChemistryUnknown = 0x02,
1501 PortableBatteryDeviceChemistryLeadAcid = 0x03,
1502 PortableBatteryDeviceChemistryNickelCadmium = 0x04,
1503 PortableBatteryDeviceChemistryNickelMetalHydride = 0x05,
1504 PortableBatteryDeviceChemistryLithiumIon = 0x06,
1505 PortableBatteryDeviceChemistryZincAir = 0x07,
1506 PortableBatteryDeviceChemistryLithiumPolymer = 0x08
1507 } PORTABLE_BATTERY_DEVICE_CHEMISTRY;
1508
1509 ///
1510 /// Portable Battery (Type 22)
1511 ///
1512 /// This structure describes the attributes of the portable battery(s) for the system.
1513 /// The structure contains the static attributes for the group. Each structure describes
1514 /// a single battery pack's attributes.
1515 ///
1516 typedef struct {
1517 SMBIOS_STRUCTURE Hdr;
1518 SMBIOS_TABLE_STRING Location;
1519 SMBIOS_TABLE_STRING Manufacturer;
1520 SMBIOS_TABLE_STRING ManufactureDate;
1521 SMBIOS_TABLE_STRING SerialNumber;
1522 SMBIOS_TABLE_STRING DeviceName;
1523 UINT8 DeviceChemistry; ///< enumeration value from PORTABLE_BATTERY_DEVICE_CHEMISTRY
1524 UINT16 DeviceCapacity;
1525 UINT16 DesignVoltage;
1526 SMBIOS_TABLE_STRING SBDSVersionNumber;
1527 UINT8 MaximumErrorInBatteryData;
1528 UINT16 SBDSSerialNumber;
1529 UINT16 SBDSManufactureDate;
1530 SMBIOS_TABLE_STRING SBDSDeviceChemistry;
1531 UINT8 DesignCapacityMultiplier;
1532 UINT32 OEMSpecific;
1533 } SMBIOS_TABLE_TYPE22;
1534
1535 ///
1536 /// System Reset (Type 23)
1537 ///
1538 /// This structure describes whether Automatic System Reset functions enabled (Status).
1539 /// If the system has a watchdog Timer and the timer is not reset (Timer Reset)
1540 /// before the Interval elapses, an automatic system reset will occur. The system will re-boot
1541 /// according to the Boot Option. This function may repeat until the Limit is reached, at which time
1542 /// the system will re-boot according to the Boot Option at Limit.
1543 ///
1544 typedef struct {
1545 SMBIOS_STRUCTURE Hdr;
1546 UINT8 Capabilities;
1547 UINT16 ResetCount;
1548 UINT16 ResetLimit;
1549 UINT16 TimerInterval;
1550 UINT16 Timeout;
1551 } SMBIOS_TABLE_TYPE23;
1552
1553 ///
1554 /// Hardware Security (Type 24)
1555 ///
1556 /// This structure describes the system-wide hardware security settings.
1557 ///
1558 typedef struct {
1559 SMBIOS_STRUCTURE Hdr;
1560 UINT8 HardwareSecuritySettings;
1561 } SMBIOS_TABLE_TYPE24;
1562
1563 ///
1564 /// System Power Controls (Type 25)
1565 ///
1566 /// This structure describes the attributes for controlling the main power supply to the system.
1567 /// Software that interprets this structure uses the month, day, hour, minute, and second values
1568 /// to determine the number of seconds until the next power-on of the system. The presence of
1569 /// this structure implies that a timed power-on facility is available for the system.
1570 ///
1571 typedef struct {
1572 SMBIOS_STRUCTURE Hdr;
1573 UINT8 NextScheduledPowerOnMonth;
1574 UINT8 NextScheduledPowerOnDayOfMonth;
1575 UINT8 NextScheduledPowerOnHour;
1576 UINT8 NextScheduledPowerOnMinute;
1577 UINT8 NextScheduledPowerOnSecond;
1578 } SMBIOS_TABLE_TYPE25;
1579
1580 ///
1581 /// Voltage Probe - Location and Status
1582 ///
1583 typedef struct {
1584 UINT8 VoltageProbeSite :5;
1585 UINT8 VoltageProbeStatus :3;
1586 } MISC_VOLTAGE_PROBE_LOCATION;
1587
1588 ///
1589 /// Voltage Probe (Type 26)
1590 ///
1591 /// This describes the attributes for a voltage probe in the system.
1592 /// Each structure describes a single voltage probe.
1593 ///
1594 typedef struct {
1595 SMBIOS_STRUCTURE Hdr;
1596 SMBIOS_TABLE_STRING Description;
1597 MISC_VOLTAGE_PROBE_LOCATION LocationAndStatus;
1598 UINT16 MaximumValue;
1599 UINT16 MinimumValue;
1600 UINT16 Resolution;
1601 UINT16 Tolerance;
1602 UINT16 Accuracy;
1603 UINT32 OEMDefined;
1604 UINT16 NominalValue;
1605 } SMBIOS_TABLE_TYPE26;
1606
1607 ///
1608 /// Cooling Device - Device Type and Status
1609 ///
1610 typedef struct {
1611 UINT8 CoolingDevice :5;
1612 UINT8 CoolingDeviceStatus :3;
1613 } MISC_COOLING_DEVICE_TYPE;
1614
1615 ///
1616 /// Cooling Device (Type 27)
1617 ///
1618 /// This structure describes the attributes for a cooling device in the system.
1619 /// Each structure describes a single cooling device.
1620 ///
1621 typedef struct {
1622 SMBIOS_STRUCTURE Hdr;
1623 UINT16 TemperatureProbeHandle;
1624 MISC_COOLING_DEVICE_TYPE DeviceTypeAndStatus;
1625 UINT8 CoolingUnitGroup;
1626 UINT32 OEMDefined;
1627 UINT16 NominalSpeed;
1628 } SMBIOS_TABLE_TYPE27;
1629
1630 ///
1631 /// Temperature Probe - Location and Status
1632 ///
1633 typedef struct {
1634 UINT8 TemperatureProbeSite :5;
1635 UINT8 TemperatureProbeStatus :3;
1636 } MISC_TEMPERATURE_PROBE_LOCATION;
1637
1638 ///
1639 /// Temperature Probe (Type 28)
1640 ///
1641 /// This structure describes the attributes for a temperature probe in the system.
1642 /// Each structure describes a single temperature probe.
1643 ///
1644 typedef struct {
1645 SMBIOS_STRUCTURE Hdr;
1646 SMBIOS_TABLE_STRING Description;
1647 MISC_TEMPERATURE_PROBE_LOCATION LocationAndStatus;
1648 UINT16 MaximumValue;
1649 UINT16 MinimumValue;
1650 UINT16 Resolution;
1651 UINT16 Tolerance;
1652 UINT16 Accuracy;
1653 UINT32 OEMDefined;
1654 UINT16 NominalValue;
1655 } SMBIOS_TABLE_TYPE28;
1656
1657 ///
1658 /// Electrical Current Probe - Location and Status
1659 ///
1660 typedef struct {
1661 UINT8 ElectricalCurrentProbeSite :5;
1662 UINT8 ElectricalCurrentProbeStatus :3;
1663 } MISC_ELECTRICAL_CURRENT_PROBE_LOCATION;
1664
1665 ///
1666 /// Electrical Current Probe (Type 29)
1667 ///
1668 /// This structure describes the attributes for an electrical current probe in the system.
1669 /// Each structure describes a single electrical current probe.
1670 ///
1671 typedef struct {
1672 SMBIOS_STRUCTURE Hdr;
1673 SMBIOS_TABLE_STRING Description;
1674 MISC_ELECTRICAL_CURRENT_PROBE_LOCATION LocationAndStatus;
1675 UINT16 MaximumValue;
1676 UINT16 MinimumValue;
1677 UINT16 Resolution;
1678 UINT16 Tolerance;
1679 UINT16 Accuracy;
1680 UINT32 OEMDefined;
1681 UINT16 NominalValue;
1682 } SMBIOS_TABLE_TYPE29;
1683
1684 ///
1685 /// Out-of-Band Remote Access (Type 30)
1686 ///
1687 /// This structure describes the attributes and policy settings of a hardware facility
1688 /// that may be used to gain remote access to a hardware system when the operating system
1689 /// is not available due to power-down status, hardware failures, or boot failures.
1690 ///
1691 typedef struct {
1692 SMBIOS_STRUCTURE Hdr;
1693 SMBIOS_TABLE_STRING ManufacturerName;
1694 UINT8 Connections;
1695 } SMBIOS_TABLE_TYPE30;
1696
1697 ///
1698 /// Boot Integrity Services (BIS) Entry Point (Type 31)
1699 ///
1700 /// Structure type 31 (decimal) is reserved for use by the Boot Integrity Services (BIS).
1701 ///
1702 typedef struct {
1703 SMBIOS_STRUCTURE Hdr;
1704 UINT8 Checksum;
1705 UINT8 Reserved1;
1706 UINT16 Reserved2;
1707 UINT32 BisEntry16;
1708 UINT32 BisEntry32;
1709 UINT64 Reserved3;
1710 UINT32 Reserved4;
1711 } SMBIOS_TABLE_TYPE31;
1712
1713 ///
1714 /// System Boot Information - System Boot Status
1715 ///
1716 typedef enum {
1717 BootInformationStatusNoError = 0x00,
1718 BootInformationStatusNoBootableMedia = 0x01,
1719 BootInformationStatusNormalOSFailedLoading = 0x02,
1720 BootInformationStatusFirmwareDetectedFailure = 0x03,
1721 BootInformationStatusOSDetectedFailure = 0x04,
1722 BootInformationStatusUserRequestedBoot = 0x05,
1723 BootInformationStatusSystemSecurityViolation = 0x06,
1724 BootInformationStatusPreviousRequestedImage = 0x07,
1725 BootInformationStatusWatchdogTimerExpired = 0x08,
1726 BootInformationStatusStartReserved = 0x09,
1727 BootInformationStatusStartOemSpecific = 0x80,
1728 BootInformationStatusStartProductSpecific = 0xC0
1729 } MISC_BOOT_INFORMATION_STATUS_DATA_TYPE;
1730
1731 ///
1732 /// System Boot Information (Type 32)
1733 ///
1734 /// The client system firmware, e.g. BIOS, communicates the System Boot Status to the
1735 /// client's Pre-boot Execution Environment (PXE) boot image or OS-present management
1736 /// application via this structure. When used in the PXE environment, for example,
1737 /// this code identifies the reason the PXE was initiated and can be used by boot-image
1738 /// software to further automate an enterprise's PXE sessions. For example, an enterprise
1739 /// could choose to automatically download a hardware-diagnostic image to a client whose
1740 /// reason code indicated either a firmware- or operating system-detected hardware failure.
1741 ///
1742 typedef struct {
1743 SMBIOS_STRUCTURE Hdr;
1744 UINT8 Reserved[6];
1745 UINT8 BootStatus; ///< enumeration value from MISC_BOOT_INFORMATION_STATUS_DATA_TYPE
1746 } SMBIOS_TABLE_TYPE32;
1747
1748 ///
1749 /// 64-bit Memory Error Information (Type 33)
1750 ///
1751 /// This structure describes an error within a Physical Memory Array,
1752 /// when the error address is above 4G (0xFFFFFFFF).
1753 ///
1754 typedef struct {
1755 SMBIOS_STRUCTURE Hdr;
1756 UINT8 ErrorType; ///< enumeration value from MEMORY_ERROR_TYPE
1757 UINT8 ErrorGranularity; ///< enumeration value from MEMORY_ERROR_GRANULARITY
1758 UINT8 ErrorOperation; ///< enumeration value from MEMORY_ERROR_OPERATION
1759 UINT32 VendorSyndrome;
1760 UINT64 MemoryArrayErrorAddress;
1761 UINT64 DeviceErrorAddress;
1762 UINT32 ErrorResolution;
1763 } SMBIOS_TABLE_TYPE33;
1764
1765 ///
1766 /// Management Device - Type
1767 ///
1768 typedef enum {
1769 ManagementDeviceTypeOther = 0x01,
1770 ManagementDeviceTypeUnknown = 0x02,
1771 ManagementDeviceTypeLm75 = 0x03,
1772 ManagementDeviceTypeLm78 = 0x04,
1773 ManagementDeviceTypeLm79 = 0x05,
1774 ManagementDeviceTypeLm80 = 0x06,
1775 ManagementDeviceTypeLm81 = 0x07,
1776 ManagementDeviceTypeAdm9240 = 0x08,
1777 ManagementDeviceTypeDs1780 = 0x09,
1778 ManagementDeviceTypeMaxim1617 = 0x0A,
1779 ManagementDeviceTypeGl518Sm = 0x0B,
1780 ManagementDeviceTypeW83781D = 0x0C,
1781 ManagementDeviceTypeHt82H791 = 0x0D
1782 } MISC_MANAGEMENT_DEVICE_TYPE;
1783
1784 ///
1785 /// Management Device - Address Type
1786 ///
1787 typedef enum {
1788 ManagementDeviceAddressTypeOther = 0x01,
1789 ManagementDeviceAddressTypeUnknown = 0x02,
1790 ManagementDeviceAddressTypeIOPort = 0x03,
1791 ManagementDeviceAddressTypeMemory = 0x04,
1792 ManagementDeviceAddressTypeSmbus = 0x05
1793 } MISC_MANAGEMENT_DEVICE_ADDRESS_TYPE;
1794
1795 ///
1796 /// Management Device (Type 34)
1797 ///
1798 /// The information in this structure defines the attributes of a Management Device.
1799 /// A Management Device might control one or more fans or voltage, current, or temperature
1800 /// probes as defined by one or more Management Device Component structures.
1801 ///
1802 typedef struct {
1803 SMBIOS_STRUCTURE Hdr;
1804 SMBIOS_TABLE_STRING Description;
1805 UINT8 Type; ///< enumeration value from MISC_MANAGEMENT_DEVICE_TYPE
1806 UINT32 Address;
1807 UINT8 AddressType; ///< enumeration value from MISC_MANAGEMENT_DEVICE_ADDRESS_TYPE
1808 } SMBIOS_TABLE_TYPE34;
1809
1810 ///
1811 /// Management Device Component (Type 35)
1812 ///
1813 /// This structure associates a cooling device or environmental probe with structures
1814 /// that define the controlling hardware device and (optionally) the component's thresholds.
1815 ///
1816 typedef struct {
1817 SMBIOS_STRUCTURE Hdr;
1818 SMBIOS_TABLE_STRING Description;
1819 UINT16 ManagementDeviceHandle;
1820 UINT16 ComponentHandle;
1821 UINT16 ThresholdHandle;
1822 } SMBIOS_TABLE_TYPE35;
1823
1824 ///
1825 /// Management Device Threshold Data (Type 36)
1826 ///
1827 /// The information in this structure defines threshold information for
1828 /// a component (probe or cooling-unit) contained within a Management Device.
1829 ///
1830 typedef struct {
1831 SMBIOS_STRUCTURE Hdr;
1832 UINT16 LowerThresholdNonCritical;
1833 UINT16 UpperThresholdNonCritical;
1834 UINT16 LowerThresholdCritical;
1835 UINT16 UpperThresholdCritical;
1836 UINT16 LowerThresholdNonRecoverable;
1837 UINT16 UpperThresholdNonRecoverable;
1838 } SMBIOS_TABLE_TYPE36;
1839
1840 ///
1841 /// Memory Channel Entry
1842 ///
1843 typedef struct {
1844 UINT8 DeviceLoad;
1845 UINT16 DeviceHandle;
1846 } MEMORY_DEVICE;
1847
1848 ///
1849 /// Memory Channel - Channel Type
1850 ///
1851 typedef enum {
1852 MemoryChannelTypeOther = 0x01,
1853 MemoryChannelTypeUnknown = 0x02,
1854 MemoryChannelTypeRambus = 0x03,
1855 MemoryChannelTypeSyncLink = 0x04
1856 } MEMORY_CHANNEL_TYPE;
1857
1858 ///
1859 /// Memory Channel (Type 37)
1860 ///
1861 /// The information in this structure provides the correlation between a Memory Channel
1862 /// and its associated Memory Devices. Each device presents one or more loads to the channel;
1863 /// the sum of all device loads cannot exceed the channel's defined maximum.
1864 ///
1865 typedef struct {
1866 SMBIOS_STRUCTURE Hdr;
1867 UINT8 ChannelType;
1868 UINT8 MaximumChannelLoad;
1869 UINT8 MemoryDeviceCount;
1870 MEMORY_DEVICE MemoryDevice[1];
1871 } SMBIOS_TABLE_TYPE37;
1872
1873 ///
1874 /// IPMI Device Information - BMC Interface Type
1875 ///
1876 typedef enum {
1877 IPMIDeviceInfoInterfaceTypeUnknown = 0x00,
1878 IPMIDeviceInfoInterfaceTypeKCS = 0x01, ///< Keyboard Controller Style
1879 IPMIDeviceInfoInterfaceTypeSMIC = 0x02, ///< Server Management Interface Chip
1880 IPMIDeviceInfoInterfaceTypeBT = 0x03, ///< Block Transfer
1881 IPMIDeviceInfoInterfaceTypeReserved = 0x04
1882 } BMC_INTERFACE_TYPE;
1883
1884 ///
1885 /// IPMI Device Information (Type 38)
1886 ///
1887 /// The information in this structure defines the attributes of an
1888 /// Intelligent Platform Management Interface (IPMI) Baseboard Management Controller (BMC).
1889 ///
1890 typedef struct {
1891 SMBIOS_STRUCTURE Hdr;
1892 UINT8 InterfaceType; ///< enumeration value from BMC_INTERFACE_TYPE
1893 UINT8 IPMISpecificationRevision;
1894 UINT8 I2CSlaveAddress;
1895 UINT8 NVStorageDeviceAddress;
1896 UINT64 BaseAddress;
1897 UINT8 BaseAddressModifier_InterruptInfo;
1898 UINT8 InterruptNumber;
1899 } SMBIOS_TABLE_TYPE38;
1900
1901 ///
1902 /// System Power Supply - Power Supply Characteristics
1903 ///
1904 typedef struct {
1905 UINT16 PowerSupplyHotReplaceable:1;
1906 UINT16 PowerSupplyPresent :1;
1907 UINT16 PowerSupplyUnplugged :1;
1908 UINT16 InputVoltageRangeSwitch :4;
1909 UINT16 PowerSupplyStatus :3;
1910 UINT16 PowerSupplyType :4;
1911 UINT16 Reserved :2;
1912 } SYS_POWER_SUPPLY_CHARACTERISTICS;
1913
1914 ///
1915 /// System Power Supply (Type 39)
1916 ///
1917 /// This structure identifies attributes of a system power supply. One instance
1918 /// of this record is present for each possible power supply in a system.
1919 ///
1920 typedef struct {
1921 SMBIOS_STRUCTURE Hdr;
1922 UINT8 PowerUnitGroup;
1923 SMBIOS_TABLE_STRING Location;
1924 SMBIOS_TABLE_STRING DeviceName;
1925 SMBIOS_TABLE_STRING Manufacturer;
1926 SMBIOS_TABLE_STRING SerialNumber;
1927 SMBIOS_TABLE_STRING AssetTagNumber;
1928 SMBIOS_TABLE_STRING ModelPartNumber;
1929 SMBIOS_TABLE_STRING RevisionLevel;
1930 UINT16 MaxPowerCapacity;
1931 SYS_POWER_SUPPLY_CHARACTERISTICS PowerSupplyCharacteristics;
1932 UINT16 InputVoltageProbeHandle;
1933 UINT16 CoolingDeviceHandle;
1934 UINT16 InputCurrentProbeHandle;
1935 } SMBIOS_TABLE_TYPE39;
1936
1937 ///
1938 /// Additional Information Entry Format
1939 ///
1940 typedef struct {
1941 UINT8 EntryLength;
1942 UINT16 ReferencedHandle;
1943 UINT8 ReferencedOffset;
1944 SMBIOS_TABLE_STRING EntryString;
1945 UINT8 Value[1];
1946 }ADDITIONAL_INFORMATION_ENTRY;
1947
1948 ///
1949 /// Additional Information (Type 40)
1950 ///
1951 /// This structure is intended to provide additional information for handling unspecified
1952 /// enumerated values and interim field updates in another structure.
1953 ///
1954 typedef struct {
1955 SMBIOS_STRUCTURE Hdr;
1956 UINT8 NumberOfAdditionalInformationEntries;
1957 ADDITIONAL_INFORMATION_ENTRY AdditionalInfoEntries[1];
1958 } SMBIOS_TABLE_TYPE40;
1959
1960 ///
1961 /// Onboard Devices Extended Information - Onboard Device Types
1962 ///
1963 typedef enum{
1964 OnBoardDeviceExtendedTypeOther = 0x01,
1965 OnBoardDeviceExtendedTypeUnknown = 0x02,
1966 OnBoardDeviceExtendedTypeVideo = 0x03,
1967 OnBoardDeviceExtendedTypeScsiController = 0x04,
1968 OnBoardDeviceExtendedTypeEthernet = 0x05,
1969 OnBoardDeviceExtendedTypeTokenRing = 0x06,
1970 OnBoardDeviceExtendedTypeSound = 0x07,
1971 OnBoardDeviceExtendedTypePATAController = 0x08,
1972 OnBoardDeviceExtendedTypeSATAController = 0x09,
1973 OnBoardDeviceExtendedTypeSASController = 0x0A
1974 } ONBOARD_DEVICE_EXTENDED_INFO_TYPE;
1975
1976 ///
1977 /// Onboard Devices Extended Information (Type 41)
1978 ///
1979 /// The information in this structure defines the attributes of devices that
1980 /// are onboard (soldered onto) a system element, usually the baseboard.
1981 /// In general, an entry in this table implies that the BIOS has some level of
1982 /// control over the enabling of the associated device for use by the system.
1983 ///
1984 typedef struct {
1985 SMBIOS_STRUCTURE Hdr;
1986 SMBIOS_TABLE_STRING ReferenceDesignation;
1987 UINT8 DeviceType; ///< enumeration value from ONBOARD_DEVICE_EXTENDED_INFO_TYPE
1988 UINT8 DeviceTypeInstance;
1989 UINT16 SegmentGroupNum;
1990 UINT8 BusNum;
1991 UINT8 DevFuncNum;
1992 } SMBIOS_TABLE_TYPE41;
1993
1994 ///
1995 /// Inactive (Type 126)
1996 ///
1997 typedef struct {
1998 SMBIOS_STRUCTURE Hdr;
1999 } SMBIOS_TABLE_TYPE126;
2000
2001 ///
2002 /// End-of-Table (Type 127)
2003 ///
2004 typedef struct {
2005 SMBIOS_STRUCTURE Hdr;
2006 } SMBIOS_TABLE_TYPE127;
2007
2008 ///
2009 /// Union of all the possible SMBIOS record types
2010 ///
2011 typedef union {
2012 SMBIOS_STRUCTURE *Hdr;
2013 SMBIOS_TABLE_TYPE0 *Type0;
2014 SMBIOS_TABLE_TYPE1 *Type1;
2015 SMBIOS_TABLE_TYPE2 *Type2;
2016 SMBIOS_TABLE_TYPE3 *Type3;
2017 SMBIOS_TABLE_TYPE4 *Type4;
2018 SMBIOS_TABLE_TYPE5 *Type5;
2019 SMBIOS_TABLE_TYPE6 *Type6;
2020 SMBIOS_TABLE_TYPE7 *Type7;
2021 SMBIOS_TABLE_TYPE8 *Type8;
2022 SMBIOS_TABLE_TYPE9 *Type9;
2023 SMBIOS_TABLE_TYPE10 *Type10;
2024 SMBIOS_TABLE_TYPE11 *Type11;
2025 SMBIOS_TABLE_TYPE12 *Type12;
2026 SMBIOS_TABLE_TYPE13 *Type13;
2027 SMBIOS_TABLE_TYPE14 *Type14;
2028 SMBIOS_TABLE_TYPE15 *Type15;
2029 SMBIOS_TABLE_TYPE16 *Type16;
2030 SMBIOS_TABLE_TYPE17 *Type17;
2031 SMBIOS_TABLE_TYPE18 *Type18;
2032 SMBIOS_TABLE_TYPE19 *Type19;
2033 SMBIOS_TABLE_TYPE20 *Type20;
2034 SMBIOS_TABLE_TYPE21 *Type21;
2035 SMBIOS_TABLE_TYPE22 *Type22;
2036 SMBIOS_TABLE_TYPE23 *Type23;
2037 SMBIOS_TABLE_TYPE24 *Type24;
2038 SMBIOS_TABLE_TYPE25 *Type25;
2039 SMBIOS_TABLE_TYPE26 *Type26;
2040 SMBIOS_TABLE_TYPE27 *Type27;
2041 SMBIOS_TABLE_TYPE28 *Type28;
2042 SMBIOS_TABLE_TYPE29 *Type29;
2043 SMBIOS_TABLE_TYPE30 *Type30;
2044 SMBIOS_TABLE_TYPE31 *Type31;
2045 SMBIOS_TABLE_TYPE32 *Type32;
2046 SMBIOS_TABLE_TYPE33 *Type33;
2047 SMBIOS_TABLE_TYPE34 *Type34;
2048 SMBIOS_TABLE_TYPE35 *Type35;
2049 SMBIOS_TABLE_TYPE36 *Type36;
2050 SMBIOS_TABLE_TYPE37 *Type37;
2051 SMBIOS_TABLE_TYPE38 *Type38;
2052 SMBIOS_TABLE_TYPE39 *Type39;
2053 SMBIOS_TABLE_TYPE40 *Type40;
2054 SMBIOS_TABLE_TYPE41 *Type41;
2055 SMBIOS_TABLE_TYPE126 *Type126;
2056 SMBIOS_TABLE_TYPE127 *Type127;
2057 UINT8 *Raw;
2058 } SMBIOS_STRUCTURE_POINTER;
2059
2060 #pragma pack()
2061
2062 #endif