2 Main SAL API's defined in SAL 3.0 specification.
4 Copyright (c) 2006, Intel Corporation
5 All rights reserved. This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
20 typedef UINTN EFI_SAL_STATUS
;
23 // EFI_SAL_STATUS defines
25 #define EFI_SAL_SUCCESS ((EFI_SAL_STATUS) 0)
26 #define EFI_SAL_MORE_RECORDS ((EFI_SAL_STATUS) 3)
27 #define EFI_SAL_NOT_IMPLEMENTED ((EFI_SAL_STATUS) - 1)
28 #define EFI_SAL_INVALID_ARGUMENT ((EFI_SAL_STATUS) - 2)
29 #define EFI_SAL_ERROR ((EFI_SAL_STATUS) - 3)
30 #define EFI_SAL_VIRTUAL_ADDRESS_ERROR ((EFI_SAL_STATUS) - 4)
31 #define EFI_SAL_NO_INFORMATION ((EFI_SAL_STATUS) - 5)
32 #define EFI_SAL_NOT_ENOUGH_SCRATCH ((EFI_SAL_STATUS) - 9)
35 // Return values from SAL
38 EFI_SAL_STATUS Status
; // register r8
44 typedef SAL_RETURN_REGS (EFIAPI
*SAL_PROC
)
57 // SAL Procedure FunctionId definition
59 #define EFI_SAL_SET_VECTORS 0x01000000
60 #define EFI_SAL_GET_STATE_INFO 0x01000001
61 #define EFI_SAL_GET_STATE_INFO_SIZE 0x01000002
62 #define EFI_SAL_CLEAR_STATE_INFO 0x01000003
63 #define EFI_SAL_MC_RENDEZ 0x01000004
64 #define EFI_SAL_MC_SET_PARAMS 0x01000005
65 #define EFI_SAL_REGISTER_PHYSICAL_ADDR 0x01000006
66 #define EFI_SAL_CACHE_FLUSH 0x01000008
67 #define EFI_SAL_CACHE_INIT 0x01000009
68 #define EFI_SAL_PCI_CONFIG_READ 0x01000010
69 #define EFI_SAL_PCI_CONFIG_WRITE 0x01000011
70 #define EFI_SAL_FREQ_BASE 0x01000012
71 #define EFI_SAL_UPDATE_PAL 0x01000020
73 #define EFI_SAL_FUNCTION_ID_MASK 0x0000ffff
74 #define EFI_SAL_MAX_SAL_FUNCTION_ID 0x00000021
77 // SAL Procedure parameter definitions
78 // Not much point in using typedefs or enums because all params
79 // are UINT64 and the entry point is common
81 // EFI_SAL_SET_VECTORS
83 #define EFI_SAL_SET_MCA_VECTOR 0x0
84 #define EFI_SAL_SET_INIT_VECTOR 0x1
85 #define EFI_SAL_SET_BOOT_RENDEZ_VECTOR 0x2
89 UINT64 ChecksumValid
: 1;
91 UINT64 ByteChecksum
: 8;
92 UINT64 Reserved2
: 16;
93 } SAL_SET_VECTORS_CS_N
;
96 // EFI_SAL_GET_STATE_INFO, EFI_SAL_GET_STATE_INFO_SIZE,
97 // EFI_SAL_CLEAR_STATE_INFO
99 #define EFI_SAL_MCA_STATE_INFO 0x0
100 #define EFI_SAL_INIT_STATE_INFO 0x1
101 #define EFI_SAL_CMC_STATE_INFO 0x2
102 #define EFI_SAL_CP_STATE_INFO 0x3
105 // EFI_SAL_MC_SET_PARAMS
107 #define EFI_SAL_MC_SET_RENDEZ_PARAM 0x1
108 #define EFI_SAL_MC_SET_WAKEUP_PARAM 0x2
109 #define EFI_SAL_MC_SET_CPE_PARAM 0x3
111 #define EFI_SAL_MC_SET_INTR_PARAM 0x1
112 #define EFI_SAL_MC_SET_MEM_PARAM 0x2
115 // EFI_SAL_REGISTER_PAL_PHYSICAL_ADDR
117 #define EFI_SAL_REGISTER_PAL_ADDR 0x0
120 // EFI_SAL_CACHE_FLUSH
122 #define EFI_SAL_FLUSH_I_CACHE 0x01
123 #define EFI_SAL_FLUSH_D_CACHE 0x02
124 #define EFI_SAL_FLUSH_BOTH_CACHE 0x03
125 #define EFI_SAL_FLUSH_MAKE_COHERENT 0x04
128 // EFI_SAL_PCI_CONFIG_READ, EFI_SAL_PCI_CONFIG_WRITE
130 #define EFI_SAL_PCI_CONFIG_ONE_BYTE 0x1
131 #define EFI_SAL_PCI_CONFIG_TWO_BYTES 0x2
132 #define EFI_SAL_PCI_CONFIG_FOUR_BYTES 0x4
140 UINT64 Reserved
: 32;
146 #define EFI_SAL_CPU_INPUT_FREQ_BASE 0x0
147 #define EFI_SAL_PLATFORM_IT_FREQ_BASE 0x1
148 #define EFI_SAL_PLATFORM_RTC_FREQ_BASE 0x2
151 // EFI_SAL_UPDATE_PAL
153 #define EFI_SAL_UPDATE_BAD_PAL_VERSION ((UINT64) -1)
154 #define EFI_SAL_UPDATE_PAL_AUTH_FAIL ((UINT64) -2)
155 #define EFI_SAL_UPDATE_PAL_BAD_TYPE ((UINT64) -3)
156 #define EFI_SAL_UPDATE_PAL_READONLY ((UINT64) -4)
157 #define EFI_SAL_UPDATE_PAL_WRITE_FAIL ((UINT64) -10)
158 #define EFI_SAL_UPDATE_PAL_ERASE_FAIL ((UINT64) -11)
159 #define EFI_SAL_UPDATE_PAL_READ_FAIL ((UINT64) -12)
160 #define EFI_SAL_UPDATE_PAL_CANT_FIT ((UINT64) -13)
169 } SAL_UPDATE_PAL_DATA_BLOCK
;
171 typedef struct _SAL_UPDATE_PAL_INFO_BLOCK
{
172 struct _SAL_UPDATE_PAL_INFO_BLOCK
*Next
;
173 struct SAL_UPDATE_PAL_DATA_BLOCK
*DataBlock
;
176 } SAL_UPDATE_PAL_INFO_BLOCK
;
179 // SAL System Table Definitions
194 } SAL_SYSTEM_TABLE_HEADER
;
197 #define EFI_SAL_ST_HEADER_SIGNATURE "SST_"
198 #define EFI_SAL_REVISION 0x0300
202 #define EFI_SAL_ST_ENTRY_POINT 0
203 #define EFI_SAL_ST_MEMORY_DESCRIPTOR 1
204 #define EFI_SAL_ST_PLATFORM_FEATURES 2
205 #define EFI_SAL_ST_TR_USAGE 3
206 #define EFI_SAL_ST_PTC 4
207 #define EFI_SAL_ST_AP_WAKEUP 5
211 UINT8 Type
; // Type == 0
215 UINT64 SalGlobalDataPointer
;
217 } SAL_ST_ENTRY_POINT_DESCRIPTOR
;
220 // Not needed for Itanium-based OS boot
223 UINT8 Type
; // Type == 1
224 UINT8 NeedVirtualRegistration
;
225 UINT8 MemoryAttributes
;
226 UINT8 PageAccessRights
;
227 UINT8 SupportedAttributes
;
231 UINT64 PhysicalMemoryAddress
;
235 } SAL_ST_MEMORY_DESCRIPTOR_ENTRY
;
241 #define SAL_MDT_ATTRIB_WB 0x00
243 // #define SAL_MDT_ATTRIB_UC 0x02
245 #define SAL_MDT_ATTRIB_UC 0x04
246 #define SAL_MDT_ATTRIB_UCE 0x05
247 #define SAL_MDT_ATTRIB_WC 0x06
250 // Supported memory Attributes
252 #define SAL_MDT_SUPPORT_WB 0x1
253 #define SAL_MDT_SUPPORT_UC 0x2
254 #define SAL_MDT_SUPPORT_UCE 0x4
255 #define SAL_MDT_SUPPORT_WC 0x8
258 // Virtual address registration
260 #define SAL_MDT_NO_VA 0x00
261 #define SAL_MDT_NEED_VA 0x01
265 #define SAL_REGULAR_MEMORY 0x0000
266 #define SAL_MMIO_MAPPING 0x0001
267 #define SAL_SAPIC_IPI_BLOCK 0x0002
268 #define SAL_IO_PORT_MAPPING 0x0003
269 #define SAL_FIRMWARE_MEMORY 0x0004
270 #define SAL_BLACK_HOLE 0x000A
274 #define SAL_MDT_USAGE_UNSPECIFIED 0x00
275 #define SAL_PAL_CODE 0x01
276 #define SAL_BOOTSERVICE_CODE 0x02
277 #define SAL_BOOTSERVICE_DATA 0x03
278 #define SAL_RUNTIMESERVICE_CODE 0x04
279 #define SAL_RUNTIMESERVICE_DATA 0x05
280 #define SAL_IA32_OPTIONROM 0x06
281 #define SAL_IA32_SYSTEMROM 0x07
282 #define SAL_PMI_CODE 0x0a
283 #define SAL_PMI_DATA 0x0b
287 UINT8 Type
; // Type == 2
288 UINT8 PlatformFeatures
;
290 } SAL_ST_PLATFORM_FEATURES
;
293 #define SAL_PLAT_FEAT_BUS_LOCK 0x01
294 #define SAL_PLAT_FEAT_PLAT_IPI_HINT 0x02
295 #define SAL_PLAT_FEAT_PROC_IPI_HINT 0x04
299 UINT8 Type
; // Type == 3
303 UINT64 VirtualAddress
;
304 UINT64 EncodedPageSize
;
306 } SAL_ST_TR_DECRIPTOR
;
309 #define EFI_SAL_ST_TR_USAGE_INSTRUCTION 00
310 #define EFI_SAL_ST_TR_USAGE_DATA 01
314 UINT64 NumberOfProcessors
;
315 UINT64 LocalIDRegister
;
316 } SAL_COHERENCE_DOMAIN_INFO
;
321 UINT8 Type
; // Type == 4
323 UINT32 NumberOfDomains
;
324 SAL_COHERENCE_DOMAIN_INFO
*DomainInformation
;
325 } SAL_ST_CACHE_COHERENCE_DECRIPTOR
;
330 UINT8 Type
; // Type == 5
333 UINT64 ExternalInterruptVector
;
334 } SAL_ST_AP_WAKEUP_DECRIPTOR
;
339 #define EFI_SAL_FIT_ENTRY_PTR (0x100000000 - 32) // 4GB - 24
340 #define EFI_SAL_FIT_PALA_ENTRY (0x100000000 - 48) // 4GB - 32
341 #define EFI_SAL_FIT_PALB_TYPE 01
349 UINT8 CheckSumValid
: 1;
354 // SAL Common Record Header
376 UINT8 ValidationBits
;
378 SAL_TIME_STAMP TimeStamp
;
379 UINT8 OemPlatformId
[16];
385 UINT8 ErrorRecoveryInfo
;
387 UINT32 SectionLength
;
391 // SAL Processor Record
393 #define SAL_PROCESSOR_ERROR_RECORD_INFO \
395 0xe429faf1, 0x3cb7, 0x11d4, {0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } \
398 #define CHECK_INFO_VALID_BIT_MASK 0x1
399 #define REQUESTOR_ID_VALID_BIT_MASK 0x2
400 #define RESPONDER_ID_VALID_BIT_MASK 0x4
401 #define TARGER_ID_VALID_BIT_MASK 0x8
402 #define PRECISE_IP_VALID_BIT_MASK 0x10
405 UINT64 InfoValid
: 1;
407 UINT64 RespValid
: 1;
408 UINT64 TargetValid
: 1;
410 UINT64 Reserved
: 59;
428 #define MIN_STATE_VALID_BIT_MASK 0x1
429 #define BR_VALID_BIT_MASK 0x2
430 #define CR_VALID_BIT_MASK 0x4
431 #define AR_VALID_BIT_MASK 0x8
432 #define RR_VALID_BIT_MASK 0x10
433 #define FR_VALID_BIT_MASK 0x20
436 UINT64 ValidFieldBits
;
437 UINT8 MinStateInfo
[1024];
445 #define PROC_ERROR_MAP_VALID_BIT_MASK 0x1
446 #define PROC_STATE_PARAMETER_VALID_BIT_MASK 0x2
447 #define PROC_CR_LID_VALID_BIT_MASK 0x4
448 #define PROC_STATIC_STRUCT_VALID_BIT_MASK 0x8
449 #define CPU_INFO_VALID_BIT_MASK 0x1000000
452 SAL_SEC_HEADER SectionHeader
;
453 UINT64 ValidationBits
;
455 UINT64 ProcStateParameter
;
457 MOD_ERROR_INFO CacheError
[15];
458 MOD_ERROR_INFO TlbError
[15];
459 MOD_ERROR_INFO BusError
[15];
460 MOD_ERROR_INFO RegFileCheck
[15];
461 MOD_ERROR_INFO MsCheck
[15];
463 PSI_STATIC_STRUCT PsiValidData
;
464 } SAL_PROCESSOR_ERROR_RECORD
;
467 // Sal Platform memory Error Record
469 #define SAL_MEMORY_ERROR_RECORD_INFO \
471 0xe429faf2, 0x3cb7, 0x11d4, {0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } \
474 #define MEMORY_ERROR_STATUS_VALID_BIT_MASK 0x1
475 #define MEMORY_PHYSICAL_ADDRESS_VALID_BIT_MASK 0x2
476 #define MEMORY_ADDR_BIT_MASK 0x4
477 #define MEMORY_NODE_VALID_BIT_MASK 0x8
478 #define MEMORY_CARD_VALID_BIT_MASK 0x10
479 #define MEMORY_MODULE_VALID_BIT_MASK 0x20
480 #define MEMORY_BANK_VALID_BIT_MASK 0x40
481 #define MEMORY_DEVICE_VALID_BIT_MASK 0x80
482 #define MEMORY_ROW_VALID_BIT_MASK 0x100
483 #define MEMORY_COLUMN_VALID_BIT_MASK 0x200
484 #define MEMORY_BIT_POSITION_VALID_BIT_MASK 0x400
485 #define MEMORY_PLATFORM_REQUESTOR_ID_VALID_BIT_MASK 0x800
486 #define MEMORY_PLATFORM_RESPONDER_ID_VALID_BIT_MASK 0x1000
487 #define MEMORY_PLATFORM_TARGET_VALID_BIT_MASK 0x2000
488 #define MEMORY_PLATFORM_BUS_SPECIFIC_DATA_VALID_BIT_MASK 0x4000
489 #define MEMORY_PLATFORM_OEM_ID_VALID_BIT_MASK 0x8000
490 #define MEMORY_PLATFORM_OEM_DATA_STRUCT_VALID_BIT_MASK 0x10000
493 SAL_SEC_HEADER SectionHeader
;
494 UINT64 ValidationBits
;
495 UINT64 MemErrorStatus
;
496 UINT64 MemPhysicalAddress
;
497 UINT64 MemPhysicalAddressMask
;
505 UINT16 MemBitPosition
;
506 UINT64 ModRequestorId
;
507 UINT64 ModResponderId
;
509 UINT64 BusSpecificData
;
510 UINT8 MemPlatformOemId
[16];
511 } SAL_MEMORY_ERROR_RECORD
;
516 #define SAL_PCI_BUS_ERROR_RECORD_INFO \
518 0xe429faf4, 0x3cb7, 0x11d4, {0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } \
521 #define PCI_BUS_ERROR_STATUS_VALID_BIT_MASK 0x1
522 #define PCI_BUS_ERROR_TYPE_VALID_BIT_MASK 0x2
523 #define PCI_BUS_ID_VALID_BIT_MASK 0x4
524 #define PCI_BUS_ADDRESS_VALID_BIT_MASK 0x8
525 #define PCI_BUS_DATA_VALID_BIT_MASK 0x10
526 #define PCI_BUS_CMD_VALID_BIT_MASK 0x20
527 #define PCI_BUS_REQUESTOR_ID_VALID_BIT_MASK 0x40
528 #define PCI_BUS_RESPONDER_ID_VALID_BIT_MASK 0x80
529 #define PCI_BUS_TARGET_VALID_BIT_MASK 0x100
530 #define PCI_BUS_OEM_ID_VALID_BIT_MASK 0x200
531 #define PCI_BUS_OEM_DATA_STRUCT_VALID_BIT_MASK 0x400
539 SAL_SEC_HEADER SectionHeader
;
540 UINT64 ValidationBits
;
541 UINT64 PciBusErrorStatus
;
542 UINT16 PciBusErrorType
;
545 UINT64 PciBusAddress
;
547 UINT64 PciBusCommand
;
548 UINT64 PciBusRequestorId
;
549 UINT64 PciBusResponderId
;
550 UINT64 PciBusTargetId
;
551 UINT8 PciBusOemId
[16];
552 } SAL_PCI_BUS_ERROR_RECORD
;
555 // PCI Component Errors
557 #define SAL_PCI_COMP_ERROR_RECORD_INFO \
559 0xe429faf6, 0x3cb7, 0x11d4, {0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } \
562 #define PCI_COMP_ERROR_STATUS_VALID_BIT_MASK 0x1
563 #define PCI_COMP_INFO_VALID_BIT_MASK 0x2
564 #define PCI_COMP_MEM_NUM_VALID_BIT_MASK 0x4
565 #define PCI_COMP_IO_NUM_VALID_BIT_MASK 0x8
566 #define PCI_COMP_REG_DATA_PAIR_VALID_BIT_MASK 0x10
567 #define PCI_COMP_OEM_DATA_STRUCT_VALID_BIT_MASK 0x20
573 UINT8 FunctionNumber
;
581 SAL_SEC_HEADER SectionHeader
;
582 UINT64 ValidationBits
;
583 UINT64 PciComponentErrorStatus
;
584 PCI_COMP_INFO PciComponentInfo
;
585 UINT32 PciComponentMemNum
;
586 UINT32 PciComponentIoNum
;
587 UINT8 PciBusOemId
[16];
588 } SAL_PCI_COMPONENT_ERROR_RECORD
;
591 // Sal Device Errors Info.
593 #define SAL_DEVICE_ERROR_RECORD_INFO \
595 0xe429faf3, 0x3cb7, 0x11d4, {0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } \
598 #define SEL_RECORD_ID_VALID_BIT_MASK 0x1;
599 #define SEL_RECORD_TYPE_VALID_BIT_MASK 0x2;
600 #define SEL_GENERATOR_ID_VALID_BIT_MASK 0x4;
601 #define SEL_EVM_REV_VALID_BIT_MASK 0x8;
602 #define SEL_SENSOR_TYPE_VALID_BIT_MASK 0x10;
603 #define SEL_SENSOR_NUM_VALID_BIT_MASK 0x20;
604 #define SEL_EVENT_DIR_TYPE_VALID_BIT_MASK 0x40;
605 #define SEL_EVENT_DATA1_VALID_BIT_MASK 0x80;
606 #define SEL_EVENT_DATA2_VALID_BIT_MASK 0x100;
607 #define SEL_EVENT_DATA3_VALID_BIT_MASK 0x200;
610 SAL_SEC_HEADER SectionHeader
;
611 UINT64 ValidationBits
;
623 } SAL_DEVICE_ERROR_RECORD
;
626 // Sal SMBIOS Device Errors Info.
628 #define SAL_SMBIOS_ERROR_RECORD_INFO \
630 0xe429faf5, 0x3cb7, 0x11d4, {0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } \
633 #define SMBIOS_EVENT_TYPE_VALID_BIT_MASK 0x1
634 #define SMBIOS_LENGTH_VALID_BIT_MASK 0x2
635 #define SMBIOS_TIME_STAMP_VALID_BIT_MASK 0x4
636 #define SMBIOS_DATA_VALID_BIT_MASK 0x8
639 SAL_SEC_HEADER SectionHeader
;
640 UINT64 ValidationBits
;
641 UINT8 SmbiosEventType
;
643 UINT8 SmbiosBcdTimeStamp
[6];
644 } SAL_SMBIOS_DEVICE_ERROR_RECORD
;
647 // Sal Platform Specific Errors Info.
649 #define SAL_PLATFORM_ERROR_RECORD_INFO \
651 0xe429faf7, 0x3cb7, 0x11d4, {0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } \
654 #define PLATFORM_ERROR_STATUS_VALID_BIT_MASK 0x1
655 #define PLATFORM_REQUESTOR_ID_VALID_BIT_MASK 0x2
656 #define PLATFORM_RESPONDER_ID_VALID_BIT_MASK 0x4
657 #define PLATFORM_TARGET_VALID_BIT_MASK 0x8
658 #define PLATFORM_SPECIFIC_DATA_VALID_BIT_MASK 0x10
659 #define PLATFORM_OEM_ID_VALID_BIT_MASK 0x20
660 #define PLATFORM_OEM_DATA_STRUCT_VALID_BIT_MASK 0x40
661 #define PLATFORM_OEM_DEVICE_PATH_VALID_BIT_MASK 0x80
664 SAL_SEC_HEADER SectionHeader
;
665 UINT64 ValidationBits
;
666 UINT64 PlatformErrorStatus
;
667 UINT64 PlatformRequestorId
;
668 UINT64 PlatformResponderId
;
669 UINT64 PlatformTargetId
;
670 UINT64 PlatformBusSpecificData
;
671 UINT8 OemComponentId
[16];
672 } SAL_PLATFORM_SPECIFIC_ERROR_RECORD
;
675 // Union of all the possible Sal Record Types
678 SAL_RECORD_HEADER
*RecordHeader
;
679 SAL_PROCESSOR_ERROR_RECORD
*SalProcessorRecord
;
680 SAL_PCI_BUS_ERROR_RECORD
*SalPciBusRecord
;
681 SAL_PCI_COMPONENT_ERROR_RECORD
*SalPciComponentRecord
;
682 SAL_DEVICE_ERROR_RECORD
*ImpiRecord
;
683 SAL_SMBIOS_DEVICE_ERROR_RECORD
*SmbiosRecord
;
684 SAL_PLATFORM_SPECIFIC_ERROR_RECORD
*PlatformRecord
;
685 SAL_MEMORY_ERROR_RECORD
*MemoryRecord
;
687 } SAL_ERROR_RECORDS_POINTERS
;