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1 /** @file
2 Provides string functions, linked list functions, math functions, synchronization
3 functions, and CPU architecture specific functions.
4
5 Copyright (c) 2006 - 2008, Intel Corporation
6 All rights reserved. This program and the accompanying materials
7 are licensed and made available under the terms and conditions of the BSD License
8 which accompanies this distribution. The full text of the license may be found at
9 http://opensource.org/licenses/bsd-license.php
10
11 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
13
14 **/
15
16 #ifndef __BASE_LIB__
17 #define __BASE_LIB__
18
19 ///
20 /// Definitions for SPIN_LOCK
21 ///
22 typedef volatile UINTN SPIN_LOCK;
23
24 //
25 // Definitions for architecture specific types
26 //
27 #if defined (MDE_CPU_IA32)
28 ///
29 /// IA32 context buffer used by SetJump() and LongJump()
30 ///
31 typedef struct {
32 UINT32 Ebx;
33 UINT32 Esi;
34 UINT32 Edi;
35 UINT32 Ebp;
36 UINT32 Esp;
37 UINT32 Eip;
38 } BASE_LIBRARY_JUMP_BUFFER;
39
40 #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 4
41
42 #elif defined (MDE_CPU_IPF)
43
44 ///
45 /// IPF context buffer used by SetJump() and LongJump()
46 ///
47 typedef struct {
48 UINT64 F2[2];
49 UINT64 F3[2];
50 UINT64 F4[2];
51 UINT64 F5[2];
52 UINT64 F16[2];
53 UINT64 F17[2];
54 UINT64 F18[2];
55 UINT64 F19[2];
56 UINT64 F20[2];
57 UINT64 F21[2];
58 UINT64 F22[2];
59 UINT64 F23[2];
60 UINT64 F24[2];
61 UINT64 F25[2];
62 UINT64 F26[2];
63 UINT64 F27[2];
64 UINT64 F28[2];
65 UINT64 F29[2];
66 UINT64 F30[2];
67 UINT64 F31[2];
68 UINT64 R4;
69 UINT64 R5;
70 UINT64 R6;
71 UINT64 R7;
72 UINT64 SP;
73 UINT64 BR0;
74 UINT64 BR1;
75 UINT64 BR2;
76 UINT64 BR3;
77 UINT64 BR4;
78 UINT64 BR5;
79 UINT64 InitialUNAT;
80 UINT64 AfterSpillUNAT;
81 UINT64 PFS;
82 UINT64 BSP;
83 UINT64 Predicates;
84 UINT64 LoopCount;
85 UINT64 FPSR;
86 } BASE_LIBRARY_JUMP_BUFFER;
87
88 #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 0x10
89
90 #elif defined (MDE_CPU_X64)
91 ///
92 /// X64 context buffer used by SetJump() and LongJump()
93 ///
94 typedef struct {
95 UINT64 Rbx;
96 UINT64 Rsp;
97 UINT64 Rbp;
98 UINT64 Rdi;
99 UINT64 Rsi;
100 UINT64 R12;
101 UINT64 R13;
102 UINT64 R14;
103 UINT64 R15;
104 UINT64 Rip;
105 } BASE_LIBRARY_JUMP_BUFFER;
106
107 #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8
108
109 #elif defined (MDE_CPU_EBC)
110 ///
111 /// EBC context buffer used by SetJump() and LongJump()
112 ///
113 typedef struct {
114 UINT64 R0;
115 UINT64 R1;
116 UINT64 R2;
117 UINT64 R3;
118 UINT64 IP;
119 } BASE_LIBRARY_JUMP_BUFFER;
120
121 #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8
122
123 #else
124 #error Unknown Processor Type
125 #endif
126
127 //
128 // String Services
129 //
130
131 /**
132 Copies one Null-terminated Unicode string to another Null-terminated Unicode
133 string and returns the new Unicode string.
134
135 This function copies the contents of the Unicode string Source to the Unicode
136 string Destination, and returns Destination. If Source and Destination
137 overlap, then the results are undefined.
138
139 If Destination is NULL, then ASSERT().
140 If Destination is not aligned on a 16-bit boundary, then ASSERT().
141 If Source is NULL, then ASSERT().
142 If Source is not aligned on a 16-bit boundary, then ASSERT().
143 If Source and Destination overlap, then ASSERT().
144 If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
145 PcdMaximumUnicodeStringLength Unicode characters not including the
146 Null-terminator, then ASSERT().
147
148 @param Destination Pointer to a Null-terminated Unicode string.
149 @param Source Pointer to a Null-terminated Unicode string.
150
151 @return Destination.
152
153 **/
154 CHAR16 *
155 EFIAPI
156 StrCpy (
157 OUT CHAR16 *Destination,
158 IN CONST CHAR16 *Source
159 );
160
161
162 /**
163 Copies up to a specified length from one Null-terminated Unicode string to
164 another Null-terminated Unicode string and returns the new Unicode string.
165
166 This function copies the contents of the Unicode string Source to the Unicode
167 string Destination, and returns Destination. At most, Length Unicode
168 characters are copied from Source to Destination. If Length is 0, then
169 Destination is returned unmodified. If Length is greater that the number of
170 Unicode characters in Source, then Destination is padded with Null Unicode
171 characters. If Source and Destination overlap, then the results are
172 undefined.
173
174 If Length > 0 and Destination is NULL, then ASSERT().
175 If Length > 0 and Destination is not aligned on a 16-bit boundary, then ASSERT().
176 If Length > 0 and Source is NULL, then ASSERT().
177 If Length > 0 and Source is not aligned on a 16-bit bounadry, then ASSERT().
178 If Source and Destination overlap, then ASSERT().
179 If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
180 PcdMaximumUnicodeStringLength Unicode characters not including the
181 Null-terminator, then ASSERT().
182
183 @param Destination Pointer to a Null-terminated Unicode string.
184 @param Source Pointer to a Null-terminated Unicode string.
185 @param Length Maximum number of Unicode characters to copy.
186
187 @return Destination.
188
189 **/
190 CHAR16 *
191 EFIAPI
192 StrnCpy (
193 OUT CHAR16 *Destination,
194 IN CONST CHAR16 *Source,
195 IN UINTN Length
196 );
197
198
199 /**
200 Returns the length of a Null-terminated Unicode string.
201
202 This function returns the number of Unicode characters in the Null-terminated
203 Unicode string specified by String.
204
205 If String is NULL, then ASSERT().
206 If String is not aligned on a 16-bit boundary, then ASSERT().
207 If PcdMaximumUnicodeStringLength is not zero, and String contains more than
208 PcdMaximumUnicodeStringLength Unicode characters not including the
209 Null-terminator, then ASSERT().
210
211 @param String Pointer to a Null-terminated Unicode string.
212
213 @return The length of String.
214
215 **/
216 UINTN
217 EFIAPI
218 StrLen (
219 IN CONST CHAR16 *String
220 );
221
222
223 /**
224 Returns the size of a Null-terminated Unicode string in bytes, including the
225 Null terminator.
226
227 This function returns the size, in bytes, of the Null-terminated Unicode string
228 specified by String.
229
230 If String is NULL, then ASSERT().
231 If String is not aligned on a 16-bit boundary, then ASSERT().
232 If PcdMaximumUnicodeStringLength is not zero, and String contains more than
233 PcdMaximumUnicodeStringLength Unicode characters not including the
234 Null-terminator, then ASSERT().
235
236 @param String Pointer to a Null-terminated Unicode string.
237
238 @return The size of String.
239
240 **/
241 UINTN
242 EFIAPI
243 StrSize (
244 IN CONST CHAR16 *String
245 );
246
247
248 /**
249 Compares two Null-terminated Unicode strings, and returns the difference
250 between the first mismatched Unicode characters.
251
252 This function compares the Null-terminated Unicode string FirstString to the
253 Null-terminated Unicode string SecondString. If FirstString is identical to
254 SecondString, then 0 is returned. Otherwise, the value returned is the first
255 mismatched Unicode character in SecondString subtracted from the first
256 mismatched Unicode character in FirstString.
257
258 If FirstString is NULL, then ASSERT().
259 If FirstString is not aligned on a 16-bit boundary, then ASSERT().
260 If SecondString is NULL, then ASSERT().
261 If SecondString is not aligned on a 16-bit boundary, then ASSERT().
262 If PcdMaximumUnicodeStringLength is not zero, and FirstString contains more
263 than PcdMaximumUnicodeStringLength Unicode characters not including the
264 Null-terminator, then ASSERT().
265 If PcdMaximumUnicodeStringLength is not zero, and SecondString contains more
266 than PcdMaximumUnicodeStringLength Unicode characters not including the
267 Null-terminator, then ASSERT().
268
269 @param FirstString Pointer to a Null-terminated Unicode string.
270 @param SecondString Pointer to a Null-terminated Unicode string.
271
272 @retval 0 FirstString is identical to SecondString.
273 @return others FirstString is not identical to SecondString.
274
275 **/
276 INTN
277 EFIAPI
278 StrCmp (
279 IN CONST CHAR16 *FirstString,
280 IN CONST CHAR16 *SecondString
281 );
282
283
284 /**
285 Compares up to a specified length the contents of two Null-terminated Unicode strings,
286 and returns the difference between the first mismatched Unicode characters.
287
288 This function compares the Null-terminated Unicode string FirstString to the
289 Null-terminated Unicode string SecondString. At most, Length Unicode
290 characters will be compared. If Length is 0, then 0 is returned. If
291 FirstString is identical to SecondString, then 0 is returned. Otherwise, the
292 value returned is the first mismatched Unicode character in SecondString
293 subtracted from the first mismatched Unicode character in FirstString.
294
295 If Length > 0 and FirstString is NULL, then ASSERT().
296 If Length > 0 and FirstString is not aligned on a 16-bit bounadary, then ASSERT().
297 If Length > 0 and SecondString is NULL, then ASSERT().
298 If Length > 0 and SecondString is not aligned on a 16-bit bounadary, then ASSERT().
299 If PcdMaximumUnicodeStringLength is not zero, and FirstString contains more
300 than PcdMaximumUnicodeStringLength Unicode characters not including the
301 Null-terminator, then ASSERT().
302 If PcdMaximumUnicodeStringLength is not zero, and SecondString contains more
303 than PcdMaximumUnicodeStringLength Unicode characters not including the
304 Null-terminator, then ASSERT().
305
306 @param FirstString Pointer to a Null-terminated Unicode string.
307 @param SecondString Pointer to a Null-terminated Unicode string.
308 @param Length Maximum number of Unicode characters to compare.
309
310 @retval 0 FirstString is identical to SecondString.
311 @return others FirstString is not identical to SecondString.
312
313 **/
314 INTN
315 EFIAPI
316 StrnCmp (
317 IN CONST CHAR16 *FirstString,
318 IN CONST CHAR16 *SecondString,
319 IN UINTN Length
320 );
321
322
323 /**
324 Concatenates one Null-terminated Unicode string to another Null-terminated
325 Unicode string, and returns the concatenated Unicode string.
326
327 This function concatenates two Null-terminated Unicode strings. The contents
328 of Null-terminated Unicode string Source are concatenated to the end of
329 Null-terminated Unicode string Destination. The Null-terminated concatenated
330 Unicode String is returned. If Source and Destination overlap, then the
331 results are undefined.
332
333 If Destination is NULL, then ASSERT().
334 If Destination is not aligned on a 16-bit bounadary, then ASSERT().
335 If Source is NULL, then ASSERT().
336 If Source is not aligned on a 16-bit bounadary, then ASSERT().
337 If Source and Destination overlap, then ASSERT().
338 If PcdMaximumUnicodeStringLength is not zero, and Destination contains more
339 than PcdMaximumUnicodeStringLength Unicode characters not including the
340 Null-terminator, then ASSERT().
341 If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
342 PcdMaximumUnicodeStringLength Unicode characters not including the
343 Null-terminator, then ASSERT().
344 If PcdMaximumUnicodeStringLength is not zero, and concatenating Destination
345 and Source results in a Unicode string with more than
346 PcdMaximumUnicodeStringLength Unicode characters not including the
347 Null-terminator, then ASSERT().
348
349 @param Destination Pointer to a Null-terminated Unicode string.
350 @param Source Pointer to a Null-terminated Unicode string.
351
352 @return Destination.
353
354 **/
355 CHAR16 *
356 EFIAPI
357 StrCat (
358 IN OUT CHAR16 *Destination,
359 IN CONST CHAR16 *Source
360 );
361
362
363 /**
364 Concatenates up to a specified length one Null-terminated Unicode to the end
365 of another Null-terminated Unicode string, and returns the concatenated
366 Unicode string.
367
368 This function concatenates two Null-terminated Unicode strings. The contents
369 of Null-terminated Unicode string Source are concatenated to the end of
370 Null-terminated Unicode string Destination, and Destination is returned. At
371 most, Length Unicode characters are concatenated from Source to the end of
372 Destination, and Destination is always Null-terminated. If Length is 0, then
373 Destination is returned unmodified. If Source and Destination overlap, then
374 the results are undefined.
375
376 If Destination is NULL, then ASSERT().
377 If Length > 0 and Destination is not aligned on a 16-bit boundary, then ASSERT().
378 If Length > 0 and Source is NULL, then ASSERT().
379 If Length > 0 and Source is not aligned on a 16-bit boundary, then ASSERT().
380 If Source and Destination overlap, then ASSERT().
381 If PcdMaximumUnicodeStringLength is not zero, and Destination contains more
382 than PcdMaximumUnicodeStringLength Unicode characters not including the
383 Null-terminator, then ASSERT().
384 If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
385 PcdMaximumUnicodeStringLength Unicode characters not including the
386 Null-terminator, then ASSERT().
387 If PcdMaximumUnicodeStringLength is not zero, and concatenating Destination
388 and Source results in a Unicode string with more than
389 PcdMaximumUnicodeStringLength Unicode characters not including the
390 Null-terminator, then ASSERT().
391
392 @param Destination Pointer to a Null-terminated Unicode string.
393 @param Source Pointer to a Null-terminated Unicode string.
394 @param Length Maximum number of Unicode characters to concatenate from
395 Source.
396
397 @return Destination.
398
399 **/
400 CHAR16 *
401 EFIAPI
402 StrnCat (
403 IN OUT CHAR16 *Destination,
404 IN CONST CHAR16 *Source,
405 IN UINTN Length
406 );
407
408 /**
409 Returns the first occurrence of a Null-terminated Unicode sub-string
410 in a Null-terminated Unicode string.
411
412 This function scans the contents of the Null-terminated Unicode string
413 specified by String and returns the first occurrence of SearchString.
414 If SearchString is not found in String, then NULL is returned. If
415 the length of SearchString is zero, then String is
416 returned.
417
418 If String is NULL, then ASSERT().
419 If String is not aligned on a 16-bit boundary, then ASSERT().
420 If SearchString is NULL, then ASSERT().
421 If SearchString is not aligned on a 16-bit boundary, then ASSERT().
422
423 If PcdMaximumUnicodeStringLength is not zero, and SearchString
424 or String contains more than PcdMaximumUnicodeStringLength Unicode
425 characters not including the Null-terminator, then ASSERT().
426
427 @param String Pointer to a Null-terminated Unicode string.
428 @param SearchString Pointer to a Null-terminated Unicode string to search for.
429
430 @retval NULL If the SearchString does not appear in String.
431 @return others If there is a match.
432
433 **/
434 CHAR16 *
435 EFIAPI
436 StrStr (
437 IN CONST CHAR16 *String,
438 IN CONST CHAR16 *SearchString
439 );
440
441 /**
442 Convert a Null-terminated Unicode decimal string to a value of
443 type UINTN.
444
445 This function returns a value of type UINTN by interpreting the contents
446 of the Unicode string specified by String as a decimal number. The format
447 of the input Unicode string String is:
448
449 [spaces] [decimal digits].
450
451 The valid decimal digit character is in the range [0-9]. The
452 function will ignore the pad space, which includes spaces or
453 tab characters, before [decimal digits]. The running zero in the
454 beginning of [decimal digits] will be ignored. Then, the function
455 stops at the first character that is a not a valid decimal character
456 or a Null-terminator, whichever one comes first.
457
458 If String is NULL, then ASSERT().
459 If String is not aligned in a 16-bit boundary, then ASSERT().
460 If String has only pad spaces, then 0 is returned.
461 If String has no pad spaces or valid decimal digits,
462 then 0 is returned.
463 If the number represented by String overflows according
464 to the range defined by UINTN, then ASSERT().
465
466 If PcdMaximumUnicodeStringLength is not zero, and String contains
467 more than PcdMaximumUnicodeStringLength Unicode characters not including
468 the Null-terminator, then ASSERT().
469
470 @param String Pointer to a Null-terminated Unicode string.
471
472 @retval Value translated from String.
473
474 **/
475 UINTN
476 EFIAPI
477 StrDecimalToUintn (
478 IN CONST CHAR16 *String
479 );
480
481 /**
482 Convert a Null-terminated Unicode decimal string to a value of
483 type UINT64.
484
485 This function returns a value of type UINT64 by interpreting the contents
486 of the Unicode string specified by String as a decimal number. The format
487 of the input Unicode string String is:
488
489 [spaces] [decimal digits].
490
491 The valid decimal digit character is in the range [0-9]. The
492 function will ignore the pad space, which includes spaces or
493 tab characters, before [decimal digits]. The running zero in the
494 beginning of [decimal digits] will be ignored. Then, the function
495 stops at the first character that is a not a valid decimal character
496 or a Null-terminator, whichever one comes first.
497
498 If String is NULL, then ASSERT().
499 If String is not aligned in a 16-bit boundary, then ASSERT().
500 If String has only pad spaces, then 0 is returned.
501 If String has no pad spaces or valid decimal digits,
502 then 0 is returned.
503 If the number represented by String overflows according
504 to the range defined by UINT64, then ASSERT().
505
506 If PcdMaximumUnicodeStringLength is not zero, and String contains
507 more than PcdMaximumUnicodeStringLength Unicode characters not including
508 the Null-terminator, then ASSERT().
509
510 @param String Pointer to a Null-terminated Unicode string.
511
512 @retval Value translated from String.
513
514 **/
515 UINT64
516 EFIAPI
517 StrDecimalToUint64 (
518 IN CONST CHAR16 *String
519 );
520
521
522 /**
523 Convert a Null-terminated Unicode hexadecimal string to a value of type UINTN.
524
525 This function returns a value of type UINTN by interpreting the contents
526 of the Unicode string specified by String as a hexadecimal number.
527 The format of the input Unicode string String is:
528
529 [spaces][zeros][x][hexadecimal digits].
530
531 The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].
532 The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix.
533 If "x" appears in the input string, it must be prefixed with at least one 0.
534 The function will ignore the pad space, which includes spaces or tab characters,
535 before [zeros], [x] or [hexadecimal digit]. The running zero before [x] or
536 [hexadecimal digit] will be ignored. Then, the decoding starts after [x] or the
537 first valid hexadecimal digit. Then, the function stops at the first character that is
538 a not a valid hexadecimal character or NULL, whichever one comes first.
539
540 If String is NULL, then ASSERT().
541 If String is not aligned in a 16-bit boundary, then ASSERT().
542 If String has only pad spaces, then zero is returned.
543 If String has no leading pad spaces, leading zeros or valid hexadecimal digits,
544 then zero is returned.
545 If the number represented by String overflows according to the range defined by
546 UINTN, then ASSERT().
547
548 If PcdMaximumUnicodeStringLength is not zero, and String contains more than
549 PcdMaximumUnicodeStringLength Unicode characters not including the Null-terminator,
550 then ASSERT().
551
552 @param String Pointer to a Null-terminated Unicode string.
553
554 @retval Value translated from String.
555
556 **/
557 UINTN
558 EFIAPI
559 StrHexToUintn (
560 IN CONST CHAR16 *String
561 );
562
563
564 /**
565 Convert a Null-terminated Unicode hexadecimal string to a value of type UINT64.
566
567 This function returns a value of type UINT64 by interpreting the contents
568 of the Unicode string specified by String as a hexadecimal number.
569 The format of the input Unicode string String is
570
571 [spaces][zeros][x][hexadecimal digits].
572
573 The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].
574 The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix.
575 If "x" appears in the input string, it must be prefixed with at least one 0.
576 The function will ignore the pad space, which includes spaces or tab characters,
577 before [zeros], [x] or [hexadecimal digit]. The running zero before [x] or
578 [hexadecimal digit] will be ignored. Then, the decoding starts after [x] or the
579 first valid hexadecimal digit. Then, the function stops at the first character that is
580 a not a valid hexadecimal character or NULL, whichever one comes first.
581
582 If String is NULL, then ASSERT().
583 If String is not aligned in a 16-bit boundary, then ASSERT().
584 If String has only pad spaces, then zero is returned.
585 If String has no leading pad spaces, leading zeros or valid hexadecimal digits,
586 then zero is returned.
587 If the number represented by String overflows according to the range defined by
588 UINT64, then ASSERT().
589
590 If PcdMaximumUnicodeStringLength is not zero, and String contains more than
591 PcdMaximumUnicodeStringLength Unicode characters not including the Null-terminator,
592 then ASSERT().
593
594 @param String Pointer to a Null-terminated Unicode string.
595
596 @retval Value translated from String.
597
598 **/
599 UINT64
600 EFIAPI
601 StrHexToUint64 (
602 IN CONST CHAR16 *String
603 );
604
605 /**
606 Convert a Null-terminated Unicode string to a Null-terminated
607 ASCII string and returns the ASCII string.
608
609 This function converts the content of the Unicode string Source
610 to the ASCII string Destination by copying the lower 8 bits of
611 each Unicode character. It returns Destination.
612
613 If any Unicode characters in Source contain non-zero value in
614 the upper 8 bits, then ASSERT().
615
616 If Destination is NULL, then ASSERT().
617 If Source is NULL, then ASSERT().
618 If Source is not aligned on a 16-bit boundary, then ASSERT().
619 If Source and Destination overlap, then ASSERT().
620
621 If PcdMaximumUnicodeStringLength is not zero, and Source contains
622 more than PcdMaximumUnicodeStringLength Unicode characters not including
623 the Null-terminator, then ASSERT().
624
625 If PcdMaximumAsciiStringLength is not zero, and Source contains more
626 than PcdMaximumAsciiStringLength Unicode characters not including the
627 Null-terminator, then ASSERT().
628
629 @param Source Pointer to a Null-terminated Unicode string.
630 @param Destination Pointer to a Null-terminated ASCII string.
631
632 @return Destination.
633
634 **/
635 CHAR8 *
636 EFIAPI
637 UnicodeStrToAsciiStr (
638 IN CONST CHAR16 *Source,
639 OUT CHAR8 *Destination
640 );
641
642
643 /**
644 Copies one Null-terminated ASCII string to another Null-terminated ASCII
645 string and returns the new ASCII string.
646
647 This function copies the contents of the ASCII string Source to the ASCII
648 string Destination, and returns Destination. If Source and Destination
649 overlap, then the results are undefined.
650
651 If Destination is NULL, then ASSERT().
652 If Source is NULL, then ASSERT().
653 If Source and Destination overlap, then ASSERT().
654 If PcdMaximumAsciiStringLength is not zero and Source contains more than
655 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
656 then ASSERT().
657
658 @param Destination Pointer to a Null-terminated ASCII string.
659 @param Source Pointer to a Null-terminated ASCII string.
660
661 @return Destination
662
663 **/
664 CHAR8 *
665 EFIAPI
666 AsciiStrCpy (
667 OUT CHAR8 *Destination,
668 IN CONST CHAR8 *Source
669 );
670
671
672 /**
673 Copies up to a specified length one Null-terminated ASCII string to another
674 Null-terminated ASCII string and returns the new ASCII string.
675
676 This function copies the contents of the ASCII string Source to the ASCII
677 string Destination, and returns Destination. At most, Length ASCII characters
678 are copied from Source to Destination. If Length is 0, then Destination is
679 returned unmodified. If Length is greater that the number of ASCII characters
680 in Source, then Destination is padded with Null ASCII characters. If Source
681 and Destination overlap, then the results are undefined.
682
683 If Destination is NULL, then ASSERT().
684 If Source is NULL, then ASSERT().
685 If Source and Destination overlap, then ASSERT().
686 If PcdMaximumAsciiStringLength is not zero, and Source contains more than
687 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
688 then ASSERT().
689
690 @param Destination Pointer to a Null-terminated ASCII string.
691 @param Source Pointer to a Null-terminated ASCII string.
692 @param Length Maximum number of ASCII characters to copy.
693
694 @return Destination
695
696 **/
697 CHAR8 *
698 EFIAPI
699 AsciiStrnCpy (
700 OUT CHAR8 *Destination,
701 IN CONST CHAR8 *Source,
702 IN UINTN Length
703 );
704
705
706 /**
707 Returns the length of a Null-terminated ASCII string.
708
709 This function returns the number of ASCII characters in the Null-terminated
710 ASCII string specified by String.
711
712 If Length > 0 and Destination is NULL, then ASSERT().
713 If Length > 0 and Source is NULL, then ASSERT().
714 If PcdMaximumAsciiStringLength is not zero and String contains more than
715 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
716 then ASSERT().
717
718 @param String Pointer to a Null-terminated ASCII string.
719
720 @return The length of String.
721
722 **/
723 UINTN
724 EFIAPI
725 AsciiStrLen (
726 IN CONST CHAR8 *String
727 );
728
729
730 /**
731 Returns the size of a Null-terminated ASCII string in bytes, including the
732 Null terminator.
733
734 This function returns the size, in bytes, of the Null-terminated ASCII string
735 specified by String.
736
737 If String is NULL, then ASSERT().
738 If PcdMaximumAsciiStringLength is not zero and String contains more than
739 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
740 then ASSERT().
741
742 @param String Pointer to a Null-terminated ASCII string.
743
744 @return The size of String.
745
746 **/
747 UINTN
748 EFIAPI
749 AsciiStrSize (
750 IN CONST CHAR8 *String
751 );
752
753
754 /**
755 Compares two Null-terminated ASCII strings, and returns the difference
756 between the first mismatched ASCII characters.
757
758 This function compares the Null-terminated ASCII string FirstString to the
759 Null-terminated ASCII string SecondString. If FirstString is identical to
760 SecondString, then 0 is returned. Otherwise, the value returned is the first
761 mismatched ASCII character in SecondString subtracted from the first
762 mismatched ASCII character in FirstString.
763
764 If FirstString is NULL, then ASSERT().
765 If SecondString is NULL, then ASSERT().
766 If PcdMaximumAsciiStringLength is not zero and FirstString contains more than
767 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
768 then ASSERT().
769 If PcdMaximumAsciiStringLength is not zero and SecondString contains more
770 than PcdMaximumAsciiStringLength ASCII characters not including the
771 Null-terminator, then ASSERT().
772
773 @param FirstString Pointer to a Null-terminated ASCII string.
774 @param SecondString Pointer to a Null-terminated ASCII string.
775
776 @retval ==0 FirstString is identical to SecondString.
777 @retval !=0 FirstString is not identical to SecondString.
778
779 **/
780 INTN
781 EFIAPI
782 AsciiStrCmp (
783 IN CONST CHAR8 *FirstString,
784 IN CONST CHAR8 *SecondString
785 );
786
787
788 /**
789 Performs a case insensitive comparison of two Null-terminated ASCII strings,
790 and returns the difference between the first mismatched ASCII characters.
791
792 This function performs a case insensitive comparison of the Null-terminated
793 ASCII string FirstString to the Null-terminated ASCII string SecondString. If
794 FirstString is identical to SecondString, then 0 is returned. Otherwise, the
795 value returned is the first mismatched lower case ASCII character in
796 SecondString subtracted from the first mismatched lower case ASCII character
797 in FirstString.
798
799 If FirstString is NULL, then ASSERT().
800 If SecondString is NULL, then ASSERT().
801 If PcdMaximumAsciiStringLength is not zero and FirstString contains more than
802 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
803 then ASSERT().
804 If PcdMaximumAsciiStringLength is not zero and SecondString contains more
805 than PcdMaximumAsciiStringLength ASCII characters not including the
806 Null-terminator, then ASSERT().
807
808 @param FirstString Pointer to a Null-terminated ASCII string.
809 @param SecondString Pointer to a Null-terminated ASCII string.
810
811 @retval ==0 FirstString is identical to SecondString using case insensitive
812 comparisons.
813 @retval !=0 FirstString is not identical to SecondString using case
814 insensitive comparisons.
815
816 **/
817 INTN
818 EFIAPI
819 AsciiStriCmp (
820 IN CONST CHAR8 *FirstString,
821 IN CONST CHAR8 *SecondString
822 );
823
824
825 /**
826 Compares two Null-terminated ASCII strings with maximum lengths, and returns
827 the difference between the first mismatched ASCII characters.
828
829 This function compares the Null-terminated ASCII string FirstString to the
830 Null-terminated ASCII string SecondString. At most, Length ASCII characters
831 will be compared. If Length is 0, then 0 is returned. If FirstString is
832 identical to SecondString, then 0 is returned. Otherwise, the value returned
833 is the first mismatched ASCII character in SecondString subtracted from the
834 first mismatched ASCII character in FirstString.
835
836 If Length > 0 and FirstString is NULL, then ASSERT().
837 If Length > 0 and SecondString is NULL, then ASSERT().
838 If PcdMaximumAsciiStringLength is not zero and FirstString contains more than
839 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
840 then ASSERT().
841 If PcdMaximumAsciiStringLength is not zero and SecondString contains more than
842 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
843 then ASSERT().
844
845 @param FirstString Pointer to a Null-terminated ASCII string.
846 @param SecondString Pointer to a Null-terminated ASCII string.
847 @param Length Maximum number of ASCII characters for compare.
848
849 @retval ==0 FirstString is identical to SecondString.
850 @retval !=0 FirstString is not identical to SecondString.
851
852 **/
853 INTN
854 EFIAPI
855 AsciiStrnCmp (
856 IN CONST CHAR8 *FirstString,
857 IN CONST CHAR8 *SecondString,
858 IN UINTN Length
859 );
860
861
862 /**
863 Concatenates one Null-terminated ASCII string to another Null-terminated
864 ASCII string, and returns the concatenated ASCII string.
865
866 This function concatenates two Null-terminated ASCII strings. The contents of
867 Null-terminated ASCII string Source are concatenated to the end of Null-
868 terminated ASCII string Destination. The Null-terminated concatenated ASCII
869 String is returned.
870
871 If Destination is NULL, then ASSERT().
872 If Source is NULL, then ASSERT().
873 If PcdMaximumAsciiStringLength is not zero and Destination contains more than
874 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
875 then ASSERT().
876 If PcdMaximumAsciiStringLength is not zero and Source contains more than
877 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
878 then ASSERT().
879 If PcdMaximumAsciiStringLength is not zero and concatenating Destination and
880 Source results in a ASCII string with more than PcdMaximumAsciiStringLength
881 ASCII characters, then ASSERT().
882
883 @param Destination Pointer to a Null-terminated ASCII string.
884 @param Source Pointer to a Null-terminated ASCII string.
885
886 @return Destination
887
888 **/
889 CHAR8 *
890 EFIAPI
891 AsciiStrCat (
892 IN OUT CHAR8 *Destination,
893 IN CONST CHAR8 *Source
894 );
895
896
897 /**
898 Concatenates up to a specified length one Null-terminated ASCII string to
899 the end of another Null-terminated ASCII string, and returns the
900 concatenated ASCII string.
901
902 This function concatenates two Null-terminated ASCII strings. The contents
903 of Null-terminated ASCII string Source are concatenated to the end of Null-
904 terminated ASCII string Destination, and Destination is returned. At most,
905 Length ASCII characters are concatenated from Source to the end of
906 Destination, and Destination is always Null-terminated. If Length is 0, then
907 Destination is returned unmodified. If Source and Destination overlap, then
908 the results are undefined.
909
910 If Length > 0 and Destination is NULL, then ASSERT().
911 If Length > 0 and Source is NULL, then ASSERT().
912 If Source and Destination overlap, then ASSERT().
913 If PcdMaximumAsciiStringLength is not zero, and Destination contains more than
914 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
915 then ASSERT().
916 If PcdMaximumAsciiStringLength is not zero, and Source contains more than
917 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
918 then ASSERT().
919 If PcdMaximumAsciiStringLength is not zero, and concatenating Destination and
920 Source results in a ASCII string with more than PcdMaximumAsciiStringLength
921 ASCII characters not including the Null-terminator, then ASSERT().
922
923 @param Destination Pointer to a Null-terminated ASCII string.
924 @param Source Pointer to a Null-terminated ASCII string.
925 @param Length Maximum number of ASCII characters to concatenate from
926 Source.
927
928 @return Destination
929
930 **/
931 CHAR8 *
932 EFIAPI
933 AsciiStrnCat (
934 IN OUT CHAR8 *Destination,
935 IN CONST CHAR8 *Source,
936 IN UINTN Length
937 );
938
939
940 /**
941 Returns the first occurrence of a Null-terminated ASCII sub-string
942 in a Null-terminated ASCII string.
943
944 This function scans the contents of the ASCII string specified by String
945 and returns the first occurrence of SearchString. If SearchString is not
946 found in String, then NULL is returned. If the length of SearchString is zero,
947 then String is returned.
948
949 If String is NULL, then ASSERT().
950 If SearchString is NULL, then ASSERT().
951
952 If PcdMaximumAsciiStringLength is not zero, and SearchString or
953 String contains more than PcdMaximumAsciiStringLength Unicode characters
954 not including the Null-terminator, then ASSERT().
955
956 @param String Pointer to a Null-terminated ASCII string.
957 @param SearchString Pointer to a Null-terminated ASCII string to search for.
958
959 @retval NULL If the SearchString does not appear in String.
960 @retval others If there is a match return the first occurrence of SearchingString.
961 If the length of SearchString is zero,return String.
962
963 **/
964 CHAR8 *
965 EFIAPI
966 AsciiStrStr (
967 IN CONST CHAR8 *String,
968 IN CONST CHAR8 *SearchString
969 );
970
971
972 /**
973 Convert a Null-terminated ASCII decimal string to a value of type
974 UINTN.
975
976 This function returns a value of type UINTN by interpreting the contents
977 of the ASCII string String as a decimal number. The format of the input
978 ASCII string String is:
979
980 [spaces] [decimal digits].
981
982 The valid decimal digit character is in the range [0-9]. The function will
983 ignore the pad space, which includes spaces or tab characters, before the digits.
984 The running zero in the beginning of [decimal digits] will be ignored. Then, the
985 function stops at the first character that is a not a valid decimal character or
986 Null-terminator, whichever on comes first.
987
988 If String has only pad spaces, then 0 is returned.
989 If String has no pad spaces or valid decimal digits, then 0 is returned.
990 If the number represented by String overflows according to the range defined by
991 UINTN, then ASSERT().
992 If String is NULL, then ASSERT().
993 If PcdMaximumAsciiStringLength is not zero, and String contains more than
994 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
995 then ASSERT().
996
997 @param String Pointer to a Null-terminated ASCII string.
998
999 @retval Value translated from String.
1000
1001 **/
1002 UINTN
1003 EFIAPI
1004 AsciiStrDecimalToUintn (
1005 IN CONST CHAR8 *String
1006 );
1007
1008
1009 /**
1010 Convert a Null-terminated ASCII decimal string to a value of type
1011 UINT64.
1012
1013 This function returns a value of type UINT64 by interpreting the contents
1014 of the ASCII string String as a decimal number. The format of the input
1015 ASCII string String is:
1016
1017 [spaces] [decimal digits].
1018
1019 The valid decimal digit character is in the range [0-9]. The function will
1020 ignore the pad space, which includes spaces or tab characters, before the digits.
1021 The running zero in the beginning of [decimal digits] will be ignored. Then, the
1022 function stops at the first character that is a not a valid decimal character or
1023 Null-terminator, whichever on comes first.
1024
1025 If String has only pad spaces, then 0 is returned.
1026 If String has no pad spaces or valid decimal digits, then 0 is returned.
1027 If the number represented by String overflows according to the range defined by
1028 UINT64, then ASSERT().
1029 If String is NULL, then ASSERT().
1030 If PcdMaximumAsciiStringLength is not zero, and String contains more than
1031 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
1032 then ASSERT().
1033
1034 @param String Pointer to a Null-terminated ASCII string.
1035
1036 @retval Value translated from String.
1037
1038 **/
1039 UINT64
1040 EFIAPI
1041 AsciiStrDecimalToUint64 (
1042 IN CONST CHAR8 *String
1043 );
1044
1045
1046 /**
1047 Convert a Null-terminated ASCII hexadecimal string to a value of type UINTN.
1048
1049 This function returns a value of type UINTN by interpreting the contents of
1050 the ASCII string String as a hexadecimal number. The format of the input ASCII
1051 string String is:
1052
1053 [spaces][zeros][x][hexadecimal digits].
1054
1055 The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].
1056 The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix. If "x"
1057 appears in the input string, it must be prefixed with at least one 0. The function
1058 will ignore the pad space, which includes spaces or tab characters, before [zeros],
1059 [x] or [hexadecimal digits]. The running zero before [x] or [hexadecimal digits]
1060 will be ignored. Then, the decoding starts after [x] or the first valid hexadecimal
1061 digit. Then, the function stops at the first character that is a not a valid
1062 hexadecimal character or Null-terminator, whichever on comes first.
1063
1064 If String has only pad spaces, then 0 is returned.
1065 If String has no leading pad spaces, leading zeros or valid hexadecimal digits, then
1066 0 is returned.
1067
1068 If the number represented by String overflows according to the range defined by UINTN,
1069 then ASSERT().
1070 If String is NULL, then ASSERT().
1071 If PcdMaximumAsciiStringLength is not zero,
1072 and String contains more than PcdMaximumAsciiStringLength ASCII characters not including
1073 the Null-terminator, then ASSERT().
1074
1075 @param String Pointer to a Null-terminated ASCII string.
1076
1077 @retval Value translated from String.
1078
1079 **/
1080 UINTN
1081 EFIAPI
1082 AsciiStrHexToUintn (
1083 IN CONST CHAR8 *String
1084 );
1085
1086
1087 /**
1088 Convert a Null-terminated ASCII hexadecimal string to a value of type UINT64.
1089
1090 This function returns a value of type UINT64 by interpreting the contents of
1091 the ASCII string String as a hexadecimal number. The format of the input ASCII
1092 string String is:
1093
1094 [spaces][zeros][x][hexadecimal digits].
1095
1096 The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].
1097 The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix. If "x"
1098 appears in the input string, it must be prefixed with at least one 0. The function
1099 will ignore the pad space, which includes spaces or tab characters, before [zeros],
1100 [x] or [hexadecimal digits]. The running zero before [x] or [hexadecimal digits]
1101 will be ignored. Then, the decoding starts after [x] or the first valid hexadecimal
1102 digit. Then, the function stops at the first character that is a not a valid
1103 hexadecimal character or Null-terminator, whichever on comes first.
1104
1105 If String has only pad spaces, then 0 is returned.
1106 If String has no leading pad spaces, leading zeros or valid hexadecimal digits, then
1107 0 is returned.
1108
1109 If the number represented by String overflows according to the range defined by UINT64,
1110 then ASSERT().
1111 If String is NULL, then ASSERT().
1112 If PcdMaximumAsciiStringLength is not zero,
1113 and String contains more than PcdMaximumAsciiStringLength ASCII characters not including
1114 the Null-terminator, then ASSERT().
1115
1116 @param String Pointer to a Null-terminated ASCII string.
1117
1118 @retval Value translated from String.
1119
1120 **/
1121 UINT64
1122 EFIAPI
1123 AsciiStrHexToUint64 (
1124 IN CONST CHAR8 *String
1125 );
1126
1127
1128 /**
1129 Convert one Null-terminated ASCII string to a Null-terminated
1130 Unicode string and returns the Unicode string.
1131
1132 This function converts the contents of the ASCII string Source to the Unicode
1133 string Destination, and returns Destination. The function terminates the
1134 Unicode string Destination by appending a Null-terminator character at the end.
1135 The caller is responsible to make sure Destination points to a buffer with size
1136 equal or greater than ((AsciiStrLen (Source) + 1) * sizeof (CHAR16)) in bytes.
1137
1138 If Destination is NULL, then ASSERT().
1139 If Destination is not aligned on a 16-bit boundary, then ASSERT().
1140 If Source is NULL, then ASSERT().
1141 If Source and Destination overlap, then ASSERT().
1142 If PcdMaximumAsciiStringLength is not zero, and Source contains more than
1143 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
1144 then ASSERT().
1145 If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
1146 PcdMaximumUnicodeStringLength ASCII characters not including the
1147 Null-terminator, then ASSERT().
1148
1149 @param Source Pointer to a Null-terminated ASCII string.
1150 @param Destination Pointer to a Null-terminated Unicode string.
1151
1152 @return Destination.
1153
1154 **/
1155 CHAR16 *
1156 EFIAPI
1157 AsciiStrToUnicodeStr (
1158 IN CONST CHAR8 *Source,
1159 OUT CHAR16 *Destination
1160 );
1161
1162
1163 /**
1164 Converts an 8-bit value to an 8-bit BCD value.
1165
1166 Converts the 8-bit value specified by Value to BCD. The BCD value is
1167 returned.
1168
1169 If Value >= 100, then ASSERT().
1170
1171 @param Value The 8-bit value to convert to BCD. Range 0..99.
1172
1173 @return The BCD value.
1174
1175 **/
1176 UINT8
1177 EFIAPI
1178 DecimalToBcd8 (
1179 IN UINT8 Value
1180 );
1181
1182
1183 /**
1184 Converts an 8-bit BCD value to an 8-bit value.
1185
1186 Converts the 8-bit BCD value specified by Value to an 8-bit value. The 8-bit
1187 value is returned.
1188
1189 If Value >= 0xA0, then ASSERT().
1190 If (Value & 0x0F) >= 0x0A, then ASSERT().
1191
1192 @param Value The 8-bit BCD value to convert to an 8-bit value.
1193
1194 @return The 8-bit value is returned.
1195
1196 **/
1197 UINT8
1198 EFIAPI
1199 BcdToDecimal8 (
1200 IN UINT8 Value
1201 );
1202
1203
1204 //
1205 // Linked List Functions and Macros
1206 //
1207
1208 /**
1209 Initializes the head node of a doubly linked list that is declared as a
1210 global variable in a module.
1211
1212 Initializes the forward and backward links of a new linked list. After
1213 initializing a linked list with this macro, the other linked list functions
1214 may be used to add and remove nodes from the linked list. This macro results
1215 in smaller executables by initializing the linked list in the data section,
1216 instead if calling the InitializeListHead() function to perform the
1217 equivalent operation.
1218
1219 @param ListHead The head note of a list to initiailize.
1220
1221 **/
1222 #define INITIALIZE_LIST_HEAD_VARIABLE(ListHead) {&(ListHead), &(ListHead)}
1223
1224
1225 /**
1226 Initializes the head node of a doubly linked list, and returns the pointer to
1227 the head node of the doubly linked list.
1228
1229 Initializes the forward and backward links of a new linked list. After
1230 initializing a linked list with this function, the other linked list
1231 functions may be used to add and remove nodes from the linked list. It is up
1232 to the caller of this function to allocate the memory for ListHead.
1233
1234 If ListHead is NULL, then ASSERT().
1235
1236 @param ListHead A pointer to the head node of a new doubly linked list.
1237
1238 @return ListHead
1239
1240 **/
1241 LIST_ENTRY *
1242 EFIAPI
1243 InitializeListHead (
1244 IN OUT LIST_ENTRY *ListHead
1245 );
1246
1247
1248 /**
1249 Adds a node to the beginning of a doubly linked list, and returns the pointer
1250 to the head node of the doubly linked list.
1251
1252 Adds the node Entry at the beginning of the doubly linked list denoted by
1253 ListHead, and returns ListHead.
1254
1255 If ListHead is NULL, then ASSERT().
1256 If Entry is NULL, then ASSERT().
1257 If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
1258 InitializeListHead(), then ASSERT().
1259 If PcdMaximumLinkedListLenth is not zero, and prior to insertion the number
1260 of nodes in ListHead, including the ListHead node, is greater than or
1261 equal to PcdMaximumLinkedListLength, then ASSERT().
1262
1263 @param ListHead A pointer to the head node of a doubly linked list.
1264 @param Entry A pointer to a node that is to be inserted at the beginning
1265 of a doubly linked list.
1266
1267 @return ListHead
1268
1269 **/
1270 LIST_ENTRY *
1271 EFIAPI
1272 InsertHeadList (
1273 IN OUT LIST_ENTRY *ListHead,
1274 IN OUT LIST_ENTRY *Entry
1275 );
1276
1277
1278 /**
1279 Adds a node to the end of a doubly linked list, and returns the pointer to
1280 the head node of the doubly linked list.
1281
1282 Adds the node Entry to the end of the doubly linked list denoted by ListHead,
1283 and returns ListHead.
1284
1285 If ListHead is NULL, then ASSERT().
1286 If Entry is NULL, then ASSERT().
1287 If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
1288 InitializeListHead(), then ASSERT().
1289 If PcdMaximumLinkedListLenth is not zero, and prior to insertion the number
1290 of nodes in ListHead, including the ListHead node, is greater than or
1291 equal to PcdMaximumLinkedListLength, then ASSERT().
1292
1293 @param ListHead A pointer to the head node of a doubly linked list.
1294 @param Entry A pointer to a node that is to be added at the end of the
1295 doubly linked list.
1296
1297 @return ListHead
1298
1299 **/
1300 LIST_ENTRY *
1301 EFIAPI
1302 InsertTailList (
1303 IN OUT LIST_ENTRY *ListHead,
1304 IN OUT LIST_ENTRY *Entry
1305 );
1306
1307
1308 /**
1309 Retrieves the first node of a doubly linked list.
1310
1311 Returns the first node of a doubly linked list. List must have been
1312 initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().
1313 If List is empty, then List is returned.
1314
1315 If List is NULL, then ASSERT().
1316 If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
1317 InitializeListHead(), then ASSERT().
1318 If PcdMaximumLinkedListLenth is not zero, and the number of nodes
1319 in List, including the List node, is greater than or equal to
1320 PcdMaximumLinkedListLength, then ASSERT().
1321
1322 @param List A pointer to the head node of a doubly linked list.
1323
1324 @return The first node of a doubly linked list.
1325 @retval NULL The list is empty.
1326
1327 **/
1328 LIST_ENTRY *
1329 EFIAPI
1330 GetFirstNode (
1331 IN CONST LIST_ENTRY *List
1332 );
1333
1334
1335 /**
1336 Retrieves the next node of a doubly linked list.
1337
1338 Returns the node of a doubly linked list that follows Node.
1339 List must have been initialized with INTIALIZE_LIST_HEAD_VARIABLE()
1340 or InitializeListHead(). If List is empty, then List is returned.
1341
1342 If List is NULL, then ASSERT().
1343 If Node is NULL, then ASSERT().
1344 If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
1345 InitializeListHead(), then ASSERT().
1346 If PcdMaximumLinkedListLenth is not zero, and List contains more than
1347 PcdMaximumLinkedListLenth nodes, then ASSERT().
1348 If Node is not a node in List, then ASSERT().
1349
1350 @param List A pointer to the head node of a doubly linked list.
1351 @param Node A pointer to a node in the doubly linked list.
1352
1353 @return Pointer to the next node if one exists. Otherwise a null value which
1354 is actually List is returned.
1355
1356 **/
1357 LIST_ENTRY *
1358 EFIAPI
1359 GetNextNode (
1360 IN CONST LIST_ENTRY *List,
1361 IN CONST LIST_ENTRY *Node
1362 );
1363
1364
1365 /**
1366 Checks to see if a doubly linked list is empty or not.
1367
1368 Checks to see if the doubly linked list is empty. If the linked list contains
1369 zero nodes, this function returns TRUE. Otherwise, it returns FALSE.
1370
1371 If ListHead is NULL, then ASSERT().
1372 If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
1373 InitializeListHead(), then ASSERT().
1374 If PcdMaximumLinkedListLenth is not zero, and the number of nodes
1375 in List, including the List node, is greater than or equal to
1376 PcdMaximumLinkedListLength, then ASSERT().
1377
1378 @param ListHead A pointer to the head node of a doubly linked list.
1379
1380 @retval TRUE The linked list is empty.
1381 @retval FALSE The linked list is not empty.
1382
1383 **/
1384 BOOLEAN
1385 EFIAPI
1386 IsListEmpty (
1387 IN CONST LIST_ENTRY *ListHead
1388 );
1389
1390
1391 /**
1392 Determines if a node in a doubly linked list is the head node of a the same
1393 doubly linked list. This function is typically used to terminate a loop that
1394 traverses all the nodes in a doubly linked list starting with the head node.
1395
1396 Returns TRUE if Node is equal to List. Returns FALSE if Node is one of the
1397 nodes in the doubly linked list specified by List. List must have been
1398 initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().
1399
1400 If List is NULL, then ASSERT().
1401 If Node is NULL, then ASSERT().
1402 If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead(),
1403 then ASSERT().
1404 If PcdMaximumLinkedListLenth is not zero, and the number of nodes
1405 in List, including the List node, is greater than or equal to
1406 PcdMaximumLinkedListLength, then ASSERT().
1407 If Node is not a node in List and Node is not equal to List, then ASSERT().
1408
1409 @param List A pointer to the head node of a doubly linked list.
1410 @param Node A pointer to a node in the doubly linked list.
1411
1412 @retval TRUE Node is one of the nodes in the doubly linked list.
1413 @retval FALSE Node is not one of the nodes in the doubly linked list.
1414
1415 **/
1416 BOOLEAN
1417 EFIAPI
1418 IsNull (
1419 IN CONST LIST_ENTRY *List,
1420 IN CONST LIST_ENTRY *Node
1421 );
1422
1423
1424 /**
1425 Determines if a node the last node in a doubly linked list.
1426
1427 Returns TRUE if Node is the last node in the doubly linked list specified by
1428 List. Otherwise, FALSE is returned. List must have been initialized with
1429 INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().
1430
1431 If List is NULL, then ASSERT().
1432 If Node is NULL, then ASSERT().
1433 If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
1434 InitializeListHead(), then ASSERT().
1435 If PcdMaximumLinkedListLenth is not zero, and the number of nodes
1436 in List, including the List node, is greater than or equal to
1437 PcdMaximumLinkedListLength, then ASSERT().
1438 If Node is not a node in List, then ASSERT().
1439
1440 @param List A pointer to the head node of a doubly linked list.
1441 @param Node A pointer to a node in the doubly linked list.
1442
1443 @retval TRUE Node is the last node in the linked list.
1444 @retval FALSE Node is not the last node in the linked list.
1445
1446 **/
1447 BOOLEAN
1448 EFIAPI
1449 IsNodeAtEnd (
1450 IN CONST LIST_ENTRY *List,
1451 IN CONST LIST_ENTRY *Node
1452 );
1453
1454
1455 /**
1456 Swaps the location of two nodes in a doubly linked list, and returns the
1457 first node after the swap.
1458
1459 If FirstEntry is identical to SecondEntry, then SecondEntry is returned.
1460 Otherwise, the location of the FirstEntry node is swapped with the location
1461 of the SecondEntry node in a doubly linked list. SecondEntry must be in the
1462 same double linked list as FirstEntry and that double linked list must have
1463 been initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().
1464 SecondEntry is returned after the nodes are swapped.
1465
1466 If FirstEntry is NULL, then ASSERT().
1467 If SecondEntry is NULL, then ASSERT().
1468 If SecondEntry and FirstEntry are not in the same linked list, then ASSERT().
1469 If PcdMaximumLinkedListLength is not zero, and the number of nodes in the
1470 linked list containing the FirstEntry and SecondEntry nodes, including
1471 the FirstEntry and SecondEntry nodes, is greater than or equal to
1472 PcdMaximumLinkedListLength, then ASSERT().
1473
1474 @param FirstEntry A pointer to a node in a linked list.
1475 @param SecondEntry A pointer to another node in the same linked list.
1476
1477 @return SecondEntry.
1478
1479 **/
1480 LIST_ENTRY *
1481 EFIAPI
1482 SwapListEntries (
1483 IN OUT LIST_ENTRY *FirstEntry,
1484 IN OUT LIST_ENTRY *SecondEntry
1485 );
1486
1487
1488 /**
1489 Removes a node from a doubly linked list, and returns the node that follows
1490 the removed node.
1491
1492 Removes the node Entry from a doubly linked list. It is up to the caller of
1493 this function to release the memory used by this node if that is required. On
1494 exit, the node following Entry in the doubly linked list is returned. If
1495 Entry is the only node in the linked list, then the head node of the linked
1496 list is returned.
1497
1498 If Entry is NULL, then ASSERT().
1499 If Entry is the head node of an empty list, then ASSERT().
1500 If PcdMaximumLinkedListLength is not zero, and the number of nodes in the
1501 linked list containing Entry, including the Entry node, is greater than
1502 or equal to PcdMaximumLinkedListLength, then ASSERT().
1503
1504 @param Entry A pointer to a node in a linked list.
1505
1506 @return Entry.
1507
1508 **/
1509 LIST_ENTRY *
1510 EFIAPI
1511 RemoveEntryList (
1512 IN CONST LIST_ENTRY *Entry
1513 );
1514
1515 //
1516 // Math Services
1517 //
1518
1519 /**
1520 Shifts a 64-bit integer left between 0 and 63 bits. The low bits are filled
1521 with zeros. The shifted value is returned.
1522
1523 This function shifts the 64-bit value Operand to the left by Count bits. The
1524 low Count bits are set to zero. The shifted value is returned.
1525
1526 If Count is greater than 63, then ASSERT().
1527
1528 @param Operand The 64-bit operand to shift left.
1529 @param Count The number of bits to shift left.
1530
1531 @return Operand << Count.
1532
1533 **/
1534 UINT64
1535 EFIAPI
1536 LShiftU64 (
1537 IN UINT64 Operand,
1538 IN UINTN Count
1539 );
1540
1541
1542 /**
1543 Shifts a 64-bit integer right between 0 and 63 bits. This high bits are
1544 filled with zeros. The shifted value is returned.
1545
1546 This function shifts the 64-bit value Operand to the right by Count bits. The
1547 high Count bits are set to zero. The shifted value is returned.
1548
1549 If Count is greater than 63, then ASSERT().
1550
1551 @param Operand The 64-bit operand to shift right.
1552 @param Count The number of bits to shift right.
1553
1554 @return Operand >> Count
1555
1556 **/
1557 UINT64
1558 EFIAPI
1559 RShiftU64 (
1560 IN UINT64 Operand,
1561 IN UINTN Count
1562 );
1563
1564
1565 /**
1566 Shifts a 64-bit integer right between 0 and 63 bits. The high bits are filled
1567 with original integer's bit 63. The shifted value is returned.
1568
1569 This function shifts the 64-bit value Operand to the right by Count bits. The
1570 high Count bits are set to bit 63 of Operand. The shifted value is returned.
1571
1572 If Count is greater than 63, then ASSERT().
1573
1574 @param Operand The 64-bit operand to shift right.
1575 @param Count The number of bits to shift right.
1576
1577 @return Operand >> Count
1578
1579 **/
1580 UINT64
1581 EFIAPI
1582 ARShiftU64 (
1583 IN UINT64 Operand,
1584 IN UINTN Count
1585 );
1586
1587
1588 /**
1589 Rotates a 32-bit integer left between 0 and 31 bits, filling the low bits
1590 with the high bits that were rotated.
1591
1592 This function rotates the 32-bit value Operand to the left by Count bits. The
1593 low Count bits are fill with the high Count bits of Operand. The rotated
1594 value is returned.
1595
1596 If Count is greater than 31, then ASSERT().
1597
1598 @param Operand The 32-bit operand to rotate left.
1599 @param Count The number of bits to rotate left.
1600
1601 @return Operand << Count
1602
1603 **/
1604 UINT32
1605 EFIAPI
1606 LRotU32 (
1607 IN UINT32 Operand,
1608 IN UINTN Count
1609 );
1610
1611
1612 /**
1613 Rotates a 32-bit integer right between 0 and 31 bits, filling the high bits
1614 with the low bits that were rotated.
1615
1616 This function rotates the 32-bit value Operand to the right by Count bits.
1617 The high Count bits are fill with the low Count bits of Operand. The rotated
1618 value is returned.
1619
1620 If Count is greater than 31, then ASSERT().
1621
1622 @param Operand The 32-bit operand to rotate right.
1623 @param Count The number of bits to rotate right.
1624
1625 @return Operand >>> Count
1626
1627 **/
1628 UINT32
1629 EFIAPI
1630 RRotU32 (
1631 IN UINT32 Operand,
1632 IN UINTN Count
1633 );
1634
1635
1636 /**
1637 Rotates a 64-bit integer left between 0 and 63 bits, filling the low bits
1638 with the high bits that were rotated.
1639
1640 This function rotates the 64-bit value Operand to the left by Count bits. The
1641 low Count bits are fill with the high Count bits of Operand. The rotated
1642 value is returned.
1643
1644 If Count is greater than 63, then ASSERT().
1645
1646 @param Operand The 64-bit operand to rotate left.
1647 @param Count The number of bits to rotate left.
1648
1649 @return Operand << Count
1650
1651 **/
1652 UINT64
1653 EFIAPI
1654 LRotU64 (
1655 IN UINT64 Operand,
1656 IN UINTN Count
1657 );
1658
1659
1660 /**
1661 Rotates a 64-bit integer right between 0 and 63 bits, filling the high bits
1662 with the high low bits that were rotated.
1663
1664 This function rotates the 64-bit value Operand to the right by Count bits.
1665 The high Count bits are fill with the low Count bits of Operand. The rotated
1666 value is returned.
1667
1668 If Count is greater than 63, then ASSERT().
1669
1670 @param Operand The 64-bit operand to rotate right.
1671 @param Count The number of bits to rotate right.
1672
1673 @return Operand >> Count
1674
1675 **/
1676 UINT64
1677 EFIAPI
1678 RRotU64 (
1679 IN UINT64 Operand,
1680 IN UINTN Count
1681 );
1682
1683
1684 /**
1685 Returns the bit position of the lowest bit set in a 32-bit value.
1686
1687 This function computes the bit position of the lowest bit set in the 32-bit
1688 value specified by Operand. If Operand is zero, then -1 is returned.
1689 Otherwise, a value between 0 and 31 is returned.
1690
1691 @param Operand The 32-bit operand to evaluate.
1692
1693 @retval 0..31 The lowest bit set in Operand was found.
1694 @retval -1 Operand is zero.
1695
1696 **/
1697 INTN
1698 EFIAPI
1699 LowBitSet32 (
1700 IN UINT32 Operand
1701 );
1702
1703
1704 /**
1705 Returns the bit position of the lowest bit set in a 64-bit value.
1706
1707 This function computes the bit position of the lowest bit set in the 64-bit
1708 value specified by Operand. If Operand is zero, then -1 is returned.
1709 Otherwise, a value between 0 and 63 is returned.
1710
1711 @param Operand The 64-bit operand to evaluate.
1712
1713 @retval 0..63 The lowest bit set in Operand was found.
1714 @retval -1 Operand is zero.
1715
1716
1717 **/
1718 INTN
1719 EFIAPI
1720 LowBitSet64 (
1721 IN UINT64 Operand
1722 );
1723
1724
1725 /**
1726 Returns the bit position of the highest bit set in a 32-bit value. Equivalent
1727 to log2(x).
1728
1729 This function computes the bit position of the highest bit set in the 32-bit
1730 value specified by Operand. If Operand is zero, then -1 is returned.
1731 Otherwise, a value between 0 and 31 is returned.
1732
1733 @param Operand The 32-bit operand to evaluate.
1734
1735 @retval 0..31 Position of the highest bit set in Operand if found.
1736 @retval -1 Operand is zero.
1737
1738 **/
1739 INTN
1740 EFIAPI
1741 HighBitSet32 (
1742 IN UINT32 Operand
1743 );
1744
1745
1746 /**
1747 Returns the bit position of the highest bit set in a 64-bit value. Equivalent
1748 to log2(x).
1749
1750 This function computes the bit position of the highest bit set in the 64-bit
1751 value specified by Operand. If Operand is zero, then -1 is returned.
1752 Otherwise, a value between 0 and 63 is returned.
1753
1754 @param Operand The 64-bit operand to evaluate.
1755
1756 @retval 0..63 Position of the highest bit set in Operand if found.
1757 @retval -1 Operand is zero.
1758
1759 **/
1760 INTN
1761 EFIAPI
1762 HighBitSet64 (
1763 IN UINT64 Operand
1764 );
1765
1766
1767 /**
1768 Returns the value of the highest bit set in a 32-bit value. Equivalent to
1769 1 << log2(x).
1770
1771 This function computes the value of the highest bit set in the 32-bit value
1772 specified by Operand. If Operand is zero, then zero is returned.
1773
1774 @param Operand The 32-bit operand to evaluate.
1775
1776 @return 1 << HighBitSet32(Operand)
1777 @retval 0 Operand is zero.
1778
1779 **/
1780 UINT32
1781 EFIAPI
1782 GetPowerOfTwo32 (
1783 IN UINT32 Operand
1784 );
1785
1786
1787 /**
1788 Returns the value of the highest bit set in a 64-bit value. Equivalent to
1789 1 << log2(x).
1790
1791 This function computes the value of the highest bit set in the 64-bit value
1792 specified by Operand. If Operand is zero, then zero is returned.
1793
1794 @param Operand The 64-bit operand to evaluate.
1795
1796 @return 1 << HighBitSet64(Operand)
1797 @retval 0 Operand is zero.
1798
1799 **/
1800 UINT64
1801 EFIAPI
1802 GetPowerOfTwo64 (
1803 IN UINT64 Operand
1804 );
1805
1806
1807 /**
1808 Switches the endianess of a 16-bit integer.
1809
1810 This function swaps the bytes in a 16-bit unsigned value to switch the value
1811 from little endian to big endian or vice versa. The byte swapped value is
1812 returned.
1813
1814 @param Value Operand A 16-bit unsigned value.
1815
1816 @return The byte swapped Operand.
1817
1818 **/
1819 UINT16
1820 EFIAPI
1821 SwapBytes16 (
1822 IN UINT16 Value
1823 );
1824
1825
1826 /**
1827 Switches the endianess of a 32-bit integer.
1828
1829 This function swaps the bytes in a 32-bit unsigned value to switch the value
1830 from little endian to big endian or vice versa. The byte swapped value is
1831 returned.
1832
1833 @param Value Operand A 32-bit unsigned value.
1834
1835 @return The byte swapped Operand.
1836
1837 **/
1838 UINT32
1839 EFIAPI
1840 SwapBytes32 (
1841 IN UINT32 Value
1842 );
1843
1844
1845 /**
1846 Switches the endianess of a 64-bit integer.
1847
1848 This function swaps the bytes in a 64-bit unsigned value to switch the value
1849 from little endian to big endian or vice versa. The byte swapped value is
1850 returned.
1851
1852 @param Value Operand A 64-bit unsigned value.
1853
1854 @return The byte swapped Operand.
1855
1856 **/
1857 UINT64
1858 EFIAPI
1859 SwapBytes64 (
1860 IN UINT64 Value
1861 );
1862
1863
1864 /**
1865 Multiples a 64-bit unsigned integer by a 32-bit unsigned integer and
1866 generates a 64-bit unsigned result.
1867
1868 This function multiples the 64-bit unsigned value Multiplicand by the 32-bit
1869 unsigned value Multiplier and generates a 64-bit unsigned result. This 64-
1870 bit unsigned result is returned.
1871
1872 @param Multiplicand A 64-bit unsigned value.
1873 @param Multiplier A 32-bit unsigned value.
1874
1875 @return Multiplicand * Multiplier
1876
1877 **/
1878 UINT64
1879 EFIAPI
1880 MultU64x32 (
1881 IN UINT64 Multiplicand,
1882 IN UINT32 Multiplier
1883 );
1884
1885
1886 /**
1887 Multiples a 64-bit unsigned integer by a 64-bit unsigned integer and
1888 generates a 64-bit unsigned result.
1889
1890 This function multiples the 64-bit unsigned value Multiplicand by the 64-bit
1891 unsigned value Multiplier and generates a 64-bit unsigned result. This 64-
1892 bit unsigned result is returned.
1893
1894 If the result overflows, then ASSERT().
1895
1896 @param Multiplicand A 64-bit unsigned value.
1897 @param Multiplier A 64-bit unsigned value.
1898
1899 @return Multiplicand * Multiplier
1900
1901 **/
1902 UINT64
1903 EFIAPI
1904 MultU64x64 (
1905 IN UINT64 Multiplicand,
1906 IN UINT64 Multiplier
1907 );
1908
1909
1910 /**
1911 Multiples a 64-bit signed integer by a 64-bit signed integer and generates a
1912 64-bit signed result.
1913
1914 This function multiples the 64-bit signed value Multiplicand by the 64-bit
1915 signed value Multiplier and generates a 64-bit signed result. This 64-bit
1916 signed result is returned.
1917
1918 @param Multiplicand A 64-bit signed value.
1919 @param Multiplier A 64-bit signed value.
1920
1921 @return Multiplicand * Multiplier
1922
1923 **/
1924 INT64
1925 EFIAPI
1926 MultS64x64 (
1927 IN INT64 Multiplicand,
1928 IN INT64 Multiplier
1929 );
1930
1931
1932 /**
1933 Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates
1934 a 64-bit unsigned result.
1935
1936 This function divides the 64-bit unsigned value Dividend by the 32-bit
1937 unsigned value Divisor and generates a 64-bit unsigned quotient. This
1938 function returns the 64-bit unsigned quotient.
1939
1940 If Divisor is 0, then ASSERT().
1941
1942 @param Dividend A 64-bit unsigned value.
1943 @param Divisor A 32-bit unsigned value.
1944
1945 @return Dividend / Divisor
1946
1947 **/
1948 UINT64
1949 EFIAPI
1950 DivU64x32 (
1951 IN UINT64 Dividend,
1952 IN UINT32 Divisor
1953 );
1954
1955
1956 /**
1957 Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates
1958 a 32-bit unsigned remainder.
1959
1960 This function divides the 64-bit unsigned value Dividend by the 32-bit
1961 unsigned value Divisor and generates a 32-bit remainder. This function
1962 returns the 32-bit unsigned remainder.
1963
1964 If Divisor is 0, then ASSERT().
1965
1966 @param Dividend A 64-bit unsigned value.
1967 @param Divisor A 32-bit unsigned value.
1968
1969 @return Dividend % Divisor
1970
1971 **/
1972 UINT32
1973 EFIAPI
1974 ModU64x32 (
1975 IN UINT64 Dividend,
1976 IN UINT32 Divisor
1977 );
1978
1979
1980 /**
1981 Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates
1982 a 64-bit unsigned result and an optional 32-bit unsigned remainder.
1983
1984 This function divides the 64-bit unsigned value Dividend by the 32-bit
1985 unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder
1986 is not NULL, then the 32-bit unsigned remainder is returned in Remainder.
1987 This function returns the 64-bit unsigned quotient.
1988
1989 If Divisor is 0, then ASSERT().
1990
1991 @param Dividend A 64-bit unsigned value.
1992 @param Divisor A 32-bit unsigned value.
1993 @param Remainder A pointer to a 32-bit unsigned value. This parameter is
1994 optional and may be NULL.
1995
1996 @return Dividend / Divisor
1997
1998 **/
1999 UINT64
2000 EFIAPI
2001 DivU64x32Remainder (
2002 IN UINT64 Dividend,
2003 IN UINT32 Divisor,
2004 OUT UINT32 *Remainder OPTIONAL
2005 );
2006
2007
2008 /**
2009 Divides a 64-bit unsigned integer by a 64-bit unsigned integer and generates
2010 a 64-bit unsigned result and an optional 64-bit unsigned remainder.
2011
2012 This function divides the 64-bit unsigned value Dividend by the 64-bit
2013 unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder
2014 is not NULL, then the 64-bit unsigned remainder is returned in Remainder.
2015 This function returns the 64-bit unsigned quotient.
2016
2017 If Divisor is 0, then ASSERT().
2018
2019 @param Dividend A 64-bit unsigned value.
2020 @param Divisor A 64-bit unsigned value.
2021 @param Remainder A pointer to a 64-bit unsigned value. This parameter is
2022 optional and may be NULL.
2023
2024 @return Dividend / Divisor
2025
2026 **/
2027 UINT64
2028 EFIAPI
2029 DivU64x64Remainder (
2030 IN UINT64 Dividend,
2031 IN UINT64 Divisor,
2032 OUT UINT64 *Remainder OPTIONAL
2033 );
2034
2035
2036 /**
2037 Divides a 64-bit signed integer by a 64-bit signed integer and generates a
2038 64-bit signed result and a optional 64-bit signed remainder.
2039
2040 This function divides the 64-bit signed value Dividend by the 64-bit signed
2041 value Divisor and generates a 64-bit signed quotient. If Remainder is not
2042 NULL, then the 64-bit signed remainder is returned in Remainder. This
2043 function returns the 64-bit signed quotient.
2044
2045 It is the caller's responsibility to not call this function with a Divisor of 0.
2046 If Divisor is 0, then the quotient and remainder should be assumed to be
2047 the largest negative integer.
2048
2049 If Divisor is 0, then ASSERT().
2050
2051 @param Dividend A 64-bit signed value.
2052 @param Divisor A 64-bit signed value.
2053 @param Remainder A pointer to a 64-bit signed value. This parameter is
2054 optional and may be NULL.
2055
2056 @return Dividend / Divisor
2057
2058 **/
2059 INT64
2060 EFIAPI
2061 DivS64x64Remainder (
2062 IN INT64 Dividend,
2063 IN INT64 Divisor,
2064 OUT INT64 *Remainder OPTIONAL
2065 );
2066
2067
2068 /**
2069 Reads a 16-bit value from memory that may be unaligned.
2070
2071 This function returns the 16-bit value pointed to by Buffer. The function
2072 guarantees that the read operation does not produce an alignment fault.
2073
2074 If the Buffer is NULL, then ASSERT().
2075
2076 @param Buffer Pointer to a 16-bit value that may be unaligned.
2077
2078 @return The 16-bit value read from Buffer.
2079
2080 **/
2081 UINT16
2082 EFIAPI
2083 ReadUnaligned16 (
2084 IN CONST UINT16 *Buffer
2085 );
2086
2087
2088 /**
2089 Writes a 16-bit value to memory that may be unaligned.
2090
2091 This function writes the 16-bit value specified by Value to Buffer. Value is
2092 returned. The function guarantees that the write operation does not produce
2093 an alignment fault.
2094
2095 If the Buffer is NULL, then ASSERT().
2096
2097 @param Buffer Pointer to a 16-bit value that may be unaligned.
2098 @param Value 16-bit value to write to Buffer.
2099
2100 @return The 16-bit value to write to Buffer.
2101
2102 **/
2103 UINT16
2104 EFIAPI
2105 WriteUnaligned16 (
2106 OUT UINT16 *Buffer,
2107 IN UINT16 Value
2108 );
2109
2110
2111 /**
2112 Reads a 24-bit value from memory that may be unaligned.
2113
2114 This function returns the 24-bit value pointed to by Buffer. The function
2115 guarantees that the read operation does not produce an alignment fault.
2116
2117 If the Buffer is NULL, then ASSERT().
2118
2119 @param Buffer Pointer to a 24-bit value that may be unaligned.
2120
2121 @return The 24-bit value read from Buffer.
2122
2123 **/
2124 UINT32
2125 EFIAPI
2126 ReadUnaligned24 (
2127 IN CONST UINT32 *Buffer
2128 );
2129
2130
2131 /**
2132 Writes a 24-bit value to memory that may be unaligned.
2133
2134 This function writes the 24-bit value specified by Value to Buffer. Value is
2135 returned. The function guarantees that the write operation does not produce
2136 an alignment fault.
2137
2138 If the Buffer is NULL, then ASSERT().
2139
2140 @param Buffer Pointer to a 24-bit value that may be unaligned.
2141 @param Value 24-bit value to write to Buffer.
2142
2143 @return The 24-bit value to write to Buffer.
2144
2145 **/
2146 UINT32
2147 EFIAPI
2148 WriteUnaligned24 (
2149 OUT UINT32 *Buffer,
2150 IN UINT32 Value
2151 );
2152
2153
2154 /**
2155 Reads a 32-bit value from memory that may be unaligned.
2156
2157 This function returns the 32-bit value pointed to by Buffer. The function
2158 guarantees that the read operation does not produce an alignment fault.
2159
2160 If the Buffer is NULL, then ASSERT().
2161
2162 @param Buffer Pointer to a 32-bit value that may be unaligned.
2163
2164 @return The 32-bit value read from Buffer.
2165
2166 **/
2167 UINT32
2168 EFIAPI
2169 ReadUnaligned32 (
2170 IN CONST UINT32 *Buffer
2171 );
2172
2173
2174 /**
2175 Writes a 32-bit value to memory that may be unaligned.
2176
2177 This function writes the 32-bit value specified by Value to Buffer. Value is
2178 returned. The function guarantees that the write operation does not produce
2179 an alignment fault.
2180
2181 If the Buffer is NULL, then ASSERT().
2182
2183 @param Buffer Pointer to a 32-bit value that may be unaligned.
2184 @param Value 32-bit value to write to Buffer.
2185
2186 @return The 32-bit value to write to Buffer.
2187
2188 **/
2189 UINT32
2190 EFIAPI
2191 WriteUnaligned32 (
2192 OUT UINT32 *Buffer,
2193 IN UINT32 Value
2194 );
2195
2196
2197 /**
2198 Reads a 64-bit value from memory that may be unaligned.
2199
2200 This function returns the 64-bit value pointed to by Buffer. The function
2201 guarantees that the read operation does not produce an alignment fault.
2202
2203 If the Buffer is NULL, then ASSERT().
2204
2205 @param Buffer Pointer to a 64-bit value that may be unaligned.
2206
2207 @return The 64-bit value read from Buffer.
2208
2209 **/
2210 UINT64
2211 EFIAPI
2212 ReadUnaligned64 (
2213 IN CONST UINT64 *Buffer
2214 );
2215
2216
2217 /**
2218 Writes a 64-bit value to memory that may be unaligned.
2219
2220 This function writes the 64-bit value specified by Value to Buffer. Value is
2221 returned. The function guarantees that the write operation does not produce
2222 an alignment fault.
2223
2224 If the Buffer is NULL, then ASSERT().
2225
2226 @param Buffer Pointer to a 64-bit value that may be unaligned.
2227 @param Value 64-bit value to write to Buffer.
2228
2229 @return The 64-bit value to write to Buffer.
2230
2231 **/
2232 UINT64
2233 EFIAPI
2234 WriteUnaligned64 (
2235 OUT UINT64 *Buffer,
2236 IN UINT64 Value
2237 );
2238
2239
2240 //
2241 // Bit Field Functions
2242 //
2243
2244 /**
2245 Returns a bit field from an 8-bit value.
2246
2247 Returns the bitfield specified by the StartBit and the EndBit from Operand.
2248
2249 If 8-bit operations are not supported, then ASSERT().
2250 If StartBit is greater than 7, then ASSERT().
2251 If EndBit is greater than 7, then ASSERT().
2252 If EndBit is less than StartBit, then ASSERT().
2253
2254 @param Operand Operand on which to perform the bitfield operation.
2255 @param StartBit The ordinal of the least significant bit in the bit field.
2256 Range 0..7.
2257 @param EndBit The ordinal of the most significant bit in the bit field.
2258 Range 0..7.
2259
2260 @return The bit field read.
2261
2262 **/
2263 UINT8
2264 EFIAPI
2265 BitFieldRead8 (
2266 IN UINT8 Operand,
2267 IN UINTN StartBit,
2268 IN UINTN EndBit
2269 );
2270
2271
2272 /**
2273 Writes a bit field to an 8-bit value, and returns the result.
2274
2275 Writes Value to the bit field specified by the StartBit and the EndBit in
2276 Operand. All other bits in Operand are preserved. The new 8-bit value is
2277 returned.
2278
2279 If 8-bit operations are not supported, then ASSERT().
2280 If StartBit is greater than 7, then ASSERT().
2281 If EndBit is greater than 7, then ASSERT().
2282 If EndBit is less than StartBit, then ASSERT().
2283
2284 @param Operand Operand on which to perform the bitfield operation.
2285 @param StartBit The ordinal of the least significant bit in the bit field.
2286 Range 0..7.
2287 @param EndBit The ordinal of the most significant bit in the bit field.
2288 Range 0..7.
2289 @param Value New value of the bit field.
2290
2291 @return The new 8-bit value.
2292
2293 **/
2294 UINT8
2295 EFIAPI
2296 BitFieldWrite8 (
2297 IN UINT8 Operand,
2298 IN UINTN StartBit,
2299 IN UINTN EndBit,
2300 IN UINT8 Value
2301 );
2302
2303
2304 /**
2305 Reads a bit field from an 8-bit value, performs a bitwise OR, and returns the
2306 result.
2307
2308 Performs a bitwise inclusive OR between the bit field specified by StartBit
2309 and EndBit in Operand and the value specified by OrData. All other bits in
2310 Operand are preserved. The new 8-bit value is returned.
2311
2312 If 8-bit operations are not supported, then ASSERT().
2313 If StartBit is greater than 7, then ASSERT().
2314 If EndBit is greater than 7, then ASSERT().
2315 If EndBit is less than StartBit, then ASSERT().
2316
2317 @param Operand Operand on which to perform the bitfield operation.
2318 @param StartBit The ordinal of the least significant bit in the bit field.
2319 Range 0..7.
2320 @param EndBit The ordinal of the most significant bit in the bit field.
2321 Range 0..7.
2322 @param OrData The value to OR with the read value from the value
2323
2324 @return The new 8-bit value.
2325
2326 **/
2327 UINT8
2328 EFIAPI
2329 BitFieldOr8 (
2330 IN UINT8 Operand,
2331 IN UINTN StartBit,
2332 IN UINTN EndBit,
2333 IN UINT8 OrData
2334 );
2335
2336
2337 /**
2338 Reads a bit field from an 8-bit value, performs a bitwise AND, and returns
2339 the result.
2340
2341 Performs a bitwise AND between the bit field specified by StartBit and EndBit
2342 in Operand and the value specified by AndData. All other bits in Operand are
2343 preserved. The new 8-bit value is returned.
2344
2345 If 8-bit operations are not supported, then ASSERT().
2346 If StartBit is greater than 7, then ASSERT().
2347 If EndBit is greater than 7, then ASSERT().
2348 If EndBit is less than StartBit, then ASSERT().
2349
2350 @param Operand Operand on which to perform the bitfield operation.
2351 @param StartBit The ordinal of the least significant bit in the bit field.
2352 Range 0..7.
2353 @param EndBit The ordinal of the most significant bit in the bit field.
2354 Range 0..7.
2355 @param AndData The value to AND with the read value from the value.
2356
2357 @return The new 8-bit value.
2358
2359 **/
2360 UINT8
2361 EFIAPI
2362 BitFieldAnd8 (
2363 IN UINT8 Operand,
2364 IN UINTN StartBit,
2365 IN UINTN EndBit,
2366 IN UINT8 AndData
2367 );
2368
2369
2370 /**
2371 Reads a bit field from an 8-bit value, performs a bitwise AND followed by a
2372 bitwise OR, and returns the result.
2373
2374 Performs a bitwise AND between the bit field specified by StartBit and EndBit
2375 in Operand and the value specified by AndData, followed by a bitwise
2376 inclusive OR with value specified by OrData. All other bits in Operand are
2377 preserved. The new 8-bit value is returned.
2378
2379 If 8-bit operations are not supported, then ASSERT().
2380 If StartBit is greater than 7, then ASSERT().
2381 If EndBit is greater than 7, then ASSERT().
2382 If EndBit is less than StartBit, then ASSERT().
2383
2384 @param Operand Operand on which to perform the bitfield operation.
2385 @param StartBit The ordinal of the least significant bit in the bit field.
2386 Range 0..7.
2387 @param EndBit The ordinal of the most significant bit in the bit field.
2388 Range 0..7.
2389 @param AndData The value to AND with the read value from the value.
2390 @param OrData The value to OR with the result of the AND operation.
2391
2392 @return The new 8-bit value.
2393
2394 **/
2395 UINT8
2396 EFIAPI
2397 BitFieldAndThenOr8 (
2398 IN UINT8 Operand,
2399 IN UINTN StartBit,
2400 IN UINTN EndBit,
2401 IN UINT8 AndData,
2402 IN UINT8 OrData
2403 );
2404
2405
2406 /**
2407 Returns a bit field from a 16-bit value.
2408
2409 Returns the bitfield specified by the StartBit and the EndBit from Operand.
2410
2411 If 16-bit operations are not supported, then ASSERT().
2412 If StartBit is greater than 15, then ASSERT().
2413 If EndBit is greater than 15, then ASSERT().
2414 If EndBit is less than StartBit, then ASSERT().
2415
2416 @param Operand Operand on which to perform the bitfield operation.
2417 @param StartBit The ordinal of the least significant bit in the bit field.
2418 Range 0..15.
2419 @param EndBit The ordinal of the most significant bit in the bit field.
2420 Range 0..15.
2421
2422 @return The bit field read.
2423
2424 **/
2425 UINT16
2426 EFIAPI
2427 BitFieldRead16 (
2428 IN UINT16 Operand,
2429 IN UINTN StartBit,
2430 IN UINTN EndBit
2431 );
2432
2433
2434 /**
2435 Writes a bit field to a 16-bit value, and returns the result.
2436
2437 Writes Value to the bit field specified by the StartBit and the EndBit in
2438 Operand. All other bits in Operand are preserved. The new 16-bit value is
2439 returned.
2440
2441 If 16-bit operations are not supported, then ASSERT().
2442 If StartBit is greater than 15, then ASSERT().
2443 If EndBit is greater than 15, then ASSERT().
2444 If EndBit is less than StartBit, then ASSERT().
2445
2446 @param Operand Operand on which to perform the bitfield operation.
2447 @param StartBit The ordinal of the least significant bit in the bit field.
2448 Range 0..15.
2449 @param EndBit The ordinal of the most significant bit in the bit field.
2450 Range 0..15.
2451 @param Value New value of the bit field.
2452
2453 @return The new 16-bit value.
2454
2455 **/
2456 UINT16
2457 EFIAPI
2458 BitFieldWrite16 (
2459 IN UINT16 Operand,
2460 IN UINTN StartBit,
2461 IN UINTN EndBit,
2462 IN UINT16 Value
2463 );
2464
2465
2466 /**
2467 Reads a bit field from a 16-bit value, performs a bitwise OR, and returns the
2468 result.
2469
2470 Performs a bitwise inclusive OR between the bit field specified by StartBit
2471 and EndBit in Operand and the value specified by OrData. All other bits in
2472 Operand are preserved. The new 16-bit value is returned.
2473
2474 If 16-bit operations are not supported, then ASSERT().
2475 If StartBit is greater than 15, then ASSERT().
2476 If EndBit is greater than 15, then ASSERT().
2477 If EndBit is less than StartBit, then ASSERT().
2478
2479 @param Operand Operand on which to perform the bitfield operation.
2480 @param StartBit The ordinal of the least significant bit in the bit field.
2481 Range 0..15.
2482 @param EndBit The ordinal of the most significant bit in the bit field.
2483 Range 0..15.
2484 @param OrData The value to OR with the read value from the value
2485
2486 @return The new 16-bit value.
2487
2488 **/
2489 UINT16
2490 EFIAPI
2491 BitFieldOr16 (
2492 IN UINT16 Operand,
2493 IN UINTN StartBit,
2494 IN UINTN EndBit,
2495 IN UINT16 OrData
2496 );
2497
2498
2499 /**
2500 Reads a bit field from a 16-bit value, performs a bitwise AND, and returns
2501 the result.
2502
2503 Performs a bitwise AND between the bit field specified by StartBit and EndBit
2504 in Operand and the value specified by AndData. All other bits in Operand are
2505 preserved. The new 16-bit value is returned.
2506
2507 If 16-bit operations are not supported, then ASSERT().
2508 If StartBit is greater than 15, then ASSERT().
2509 If EndBit is greater than 15, then ASSERT().
2510 If EndBit is less than StartBit, then ASSERT().
2511
2512 @param Operand Operand on which to perform the bitfield operation.
2513 @param StartBit The ordinal of the least significant bit in the bit field.
2514 Range 0..15.
2515 @param EndBit The ordinal of the most significant bit in the bit field.
2516 Range 0..15.
2517 @param AndData The value to AND with the read value from the value
2518
2519 @return The new 16-bit value.
2520
2521 **/
2522 UINT16
2523 EFIAPI
2524 BitFieldAnd16 (
2525 IN UINT16 Operand,
2526 IN UINTN StartBit,
2527 IN UINTN EndBit,
2528 IN UINT16 AndData
2529 );
2530
2531
2532 /**
2533 Reads a bit field from a 16-bit value, performs a bitwise AND followed by a
2534 bitwise OR, and returns the result.
2535
2536 Performs a bitwise AND between the bit field specified by StartBit and EndBit
2537 in Operand and the value specified by AndData, followed by a bitwise
2538 inclusive OR with value specified by OrData. All other bits in Operand are
2539 preserved. The new 16-bit value is returned.
2540
2541 If 16-bit operations are not supported, then ASSERT().
2542 If StartBit is greater than 15, then ASSERT().
2543 If EndBit is greater than 15, then ASSERT().
2544 If EndBit is less than StartBit, then ASSERT().
2545
2546 @param Operand Operand on which to perform the bitfield operation.
2547 @param StartBit The ordinal of the least significant bit in the bit field.
2548 Range 0..15.
2549 @param EndBit The ordinal of the most significant bit in the bit field.
2550 Range 0..15.
2551 @param AndData The value to AND with the read value from the value.
2552 @param OrData The value to OR with the result of the AND operation.
2553
2554 @return The new 16-bit value.
2555
2556 **/
2557 UINT16
2558 EFIAPI
2559 BitFieldAndThenOr16 (
2560 IN UINT16 Operand,
2561 IN UINTN StartBit,
2562 IN UINTN EndBit,
2563 IN UINT16 AndData,
2564 IN UINT16 OrData
2565 );
2566
2567
2568 /**
2569 Returns a bit field from a 32-bit value.
2570
2571 Returns the bitfield specified by the StartBit and the EndBit from Operand.
2572
2573 If 32-bit operations are not supported, then ASSERT().
2574 If StartBit is greater than 31, then ASSERT().
2575 If EndBit is greater than 31, then ASSERT().
2576 If EndBit is less than StartBit, then ASSERT().
2577
2578 @param Operand Operand on which to perform the bitfield operation.
2579 @param StartBit The ordinal of the least significant bit in the bit field.
2580 Range 0..31.
2581 @param EndBit The ordinal of the most significant bit in the bit field.
2582 Range 0..31.
2583
2584 @return The bit field read.
2585
2586 **/
2587 UINT32
2588 EFIAPI
2589 BitFieldRead32 (
2590 IN UINT32 Operand,
2591 IN UINTN StartBit,
2592 IN UINTN EndBit
2593 );
2594
2595
2596 /**
2597 Writes a bit field to a 32-bit value, and returns the result.
2598
2599 Writes Value to the bit field specified by the StartBit and the EndBit in
2600 Operand. All other bits in Operand are preserved. The new 32-bit value is
2601 returned.
2602
2603 If 32-bit operations are not supported, then ASSERT().
2604 If StartBit is greater than 31, then ASSERT().
2605 If EndBit is greater than 31, then ASSERT().
2606 If EndBit is less than StartBit, then ASSERT().
2607
2608 @param Operand Operand on which to perform the bitfield operation.
2609 @param StartBit The ordinal of the least significant bit in the bit field.
2610 Range 0..31.
2611 @param EndBit The ordinal of the most significant bit in the bit field.
2612 Range 0..31.
2613 @param Value New value of the bit field.
2614
2615 @return The new 32-bit value.
2616
2617 **/
2618 UINT32
2619 EFIAPI
2620 BitFieldWrite32 (
2621 IN UINT32 Operand,
2622 IN UINTN StartBit,
2623 IN UINTN EndBit,
2624 IN UINT32 Value
2625 );
2626
2627
2628 /**
2629 Reads a bit field from a 32-bit value, performs a bitwise OR, and returns the
2630 result.
2631
2632 Performs a bitwise inclusive OR between the bit field specified by StartBit
2633 and EndBit in Operand and the value specified by OrData. All other bits in
2634 Operand are preserved. The new 32-bit value is returned.
2635
2636 If 32-bit operations are not supported, then ASSERT().
2637 If StartBit is greater than 31, then ASSERT().
2638 If EndBit is greater than 31, then ASSERT().
2639 If EndBit is less than StartBit, then ASSERT().
2640
2641 @param Operand Operand on which to perform the bitfield operation.
2642 @param StartBit The ordinal of the least significant bit in the bit field.
2643 Range 0..31.
2644 @param EndBit The ordinal of the most significant bit in the bit field.
2645 Range 0..31.
2646 @param OrData The value to OR with the read value from the value
2647
2648 @return The new 32-bit value.
2649
2650 **/
2651 UINT32
2652 EFIAPI
2653 BitFieldOr32 (
2654 IN UINT32 Operand,
2655 IN UINTN StartBit,
2656 IN UINTN EndBit,
2657 IN UINT32 OrData
2658 );
2659
2660
2661 /**
2662 Reads a bit field from a 32-bit value, performs a bitwise AND, and returns
2663 the result.
2664
2665 Performs a bitwise AND between the bit field specified by StartBit and EndBit
2666 in Operand and the value specified by AndData. All other bits in Operand are
2667 preserved. The new 32-bit value is returned.
2668
2669 If 32-bit operations are not supported, then ASSERT().
2670 If StartBit is greater than 31, then ASSERT().
2671 If EndBit is greater than 31, then ASSERT().
2672 If EndBit is less than StartBit, then ASSERT().
2673
2674 @param Operand Operand on which to perform the bitfield operation.
2675 @param StartBit The ordinal of the least significant bit in the bit field.
2676 Range 0..31.
2677 @param EndBit The ordinal of the most significant bit in the bit field.
2678 Range 0..31.
2679 @param AndData The value to AND with the read value from the value
2680
2681 @return The new 32-bit value.
2682
2683 **/
2684 UINT32
2685 EFIAPI
2686 BitFieldAnd32 (
2687 IN UINT32 Operand,
2688 IN UINTN StartBit,
2689 IN UINTN EndBit,
2690 IN UINT32 AndData
2691 );
2692
2693
2694 /**
2695 Reads a bit field from a 32-bit value, performs a bitwise AND followed by a
2696 bitwise OR, and returns the result.
2697
2698 Performs a bitwise AND between the bit field specified by StartBit and EndBit
2699 in Operand and the value specified by AndData, followed by a bitwise
2700 inclusive OR with value specified by OrData. All other bits in Operand are
2701 preserved. The new 32-bit value is returned.
2702
2703 If 32-bit operations are not supported, then ASSERT().
2704 If StartBit is greater than 31, then ASSERT().
2705 If EndBit is greater than 31, then ASSERT().
2706 If EndBit is less than StartBit, then ASSERT().
2707
2708 @param Operand Operand on which to perform the bitfield operation.
2709 @param StartBit The ordinal of the least significant bit in the bit field.
2710 Range 0..31.
2711 @param EndBit The ordinal of the most significant bit in the bit field.
2712 Range 0..31.
2713 @param AndData The value to AND with the read value from the value.
2714 @param OrData The value to OR with the result of the AND operation.
2715
2716 @return The new 32-bit value.
2717
2718 **/
2719 UINT32
2720 EFIAPI
2721 BitFieldAndThenOr32 (
2722 IN UINT32 Operand,
2723 IN UINTN StartBit,
2724 IN UINTN EndBit,
2725 IN UINT32 AndData,
2726 IN UINT32 OrData
2727 );
2728
2729
2730 /**
2731 Returns a bit field from a 64-bit value.
2732
2733 Returns the bitfield specified by the StartBit and the EndBit from Operand.
2734
2735 If 64-bit operations are not supported, then ASSERT().
2736 If StartBit is greater than 63, then ASSERT().
2737 If EndBit is greater than 63, then ASSERT().
2738 If EndBit is less than StartBit, then ASSERT().
2739
2740 @param Operand Operand on which to perform the bitfield operation.
2741 @param StartBit The ordinal of the least significant bit in the bit field.
2742 Range 0..63.
2743 @param EndBit The ordinal of the most significant bit in the bit field.
2744 Range 0..63.
2745
2746 @return The bit field read.
2747
2748 **/
2749 UINT64
2750 EFIAPI
2751 BitFieldRead64 (
2752 IN UINT64 Operand,
2753 IN UINTN StartBit,
2754 IN UINTN EndBit
2755 );
2756
2757
2758 /**
2759 Writes a bit field to a 64-bit value, and returns the result.
2760
2761 Writes Value to the bit field specified by the StartBit and the EndBit in
2762 Operand. All other bits in Operand are preserved. The new 64-bit value is
2763 returned.
2764
2765 If 64-bit operations are not supported, then ASSERT().
2766 If StartBit is greater than 63, then ASSERT().
2767 If EndBit is greater than 63, then ASSERT().
2768 If EndBit is less than StartBit, then ASSERT().
2769
2770 @param Operand Operand on which to perform the bitfield operation.
2771 @param StartBit The ordinal of the least significant bit in the bit field.
2772 Range 0..63.
2773 @param EndBit The ordinal of the most significant bit in the bit field.
2774 Range 0..63.
2775 @param Value New value of the bit field.
2776
2777 @return The new 64-bit value.
2778
2779 **/
2780 UINT64
2781 EFIAPI
2782 BitFieldWrite64 (
2783 IN UINT64 Operand,
2784 IN UINTN StartBit,
2785 IN UINTN EndBit,
2786 IN UINT64 Value
2787 );
2788
2789
2790 /**
2791 Reads a bit field from a 64-bit value, performs a bitwise OR, and returns the
2792 result.
2793
2794 Performs a bitwise inclusive OR between the bit field specified by StartBit
2795 and EndBit in Operand and the value specified by OrData. All other bits in
2796 Operand are preserved. The new 64-bit value is returned.
2797
2798 If 64-bit operations are not supported, then ASSERT().
2799 If StartBit is greater than 63, then ASSERT().
2800 If EndBit is greater than 63, then ASSERT().
2801 If EndBit is less than StartBit, then ASSERT().
2802
2803 @param Operand Operand on which to perform the bitfield operation.
2804 @param StartBit The ordinal of the least significant bit in the bit field.
2805 Range 0..63.
2806 @param EndBit The ordinal of the most significant bit in the bit field.
2807 Range 0..63.
2808 @param OrData The value to OR with the read value from the value
2809
2810 @return The new 64-bit value.
2811
2812 **/
2813 UINT64
2814 EFIAPI
2815 BitFieldOr64 (
2816 IN UINT64 Operand,
2817 IN UINTN StartBit,
2818 IN UINTN EndBit,
2819 IN UINT64 OrData
2820 );
2821
2822
2823 /**
2824 Reads a bit field from a 64-bit value, performs a bitwise AND, and returns
2825 the result.
2826
2827 Performs a bitwise AND between the bit field specified by StartBit and EndBit
2828 in Operand and the value specified by AndData. All other bits in Operand are
2829 preserved. The new 64-bit value is returned.
2830
2831 If 64-bit operations are not supported, then ASSERT().
2832 If StartBit is greater than 63, then ASSERT().
2833 If EndBit is greater than 63, then ASSERT().
2834 If EndBit is less than StartBit, then ASSERT().
2835
2836 @param Operand Operand on which to perform the bitfield operation.
2837 @param StartBit The ordinal of the least significant bit in the bit field.
2838 Range 0..63.
2839 @param EndBit The ordinal of the most significant bit in the bit field.
2840 Range 0..63.
2841 @param AndData The value to AND with the read value from the value
2842
2843 @return The new 64-bit value.
2844
2845 **/
2846 UINT64
2847 EFIAPI
2848 BitFieldAnd64 (
2849 IN UINT64 Operand,
2850 IN UINTN StartBit,
2851 IN UINTN EndBit,
2852 IN UINT64 AndData
2853 );
2854
2855
2856 /**
2857 Reads a bit field from a 64-bit value, performs a bitwise AND followed by a
2858 bitwise OR, and returns the result.
2859
2860 Performs a bitwise AND between the bit field specified by StartBit and EndBit
2861 in Operand and the value specified by AndData, followed by a bitwise
2862 inclusive OR with value specified by OrData. All other bits in Operand are
2863 preserved. The new 64-bit value is returned.
2864
2865 If 64-bit operations are not supported, then ASSERT().
2866 If StartBit is greater than 63, then ASSERT().
2867 If EndBit is greater than 63, then ASSERT().
2868 If EndBit is less than StartBit, then ASSERT().
2869
2870 @param Operand Operand on which to perform the bitfield operation.
2871 @param StartBit The ordinal of the least significant bit in the bit field.
2872 Range 0..63.
2873 @param EndBit The ordinal of the most significant bit in the bit field.
2874 Range 0..63.
2875 @param AndData The value to AND with the read value from the value.
2876 @param OrData The value to OR with the result of the AND operation.
2877
2878 @return The new 64-bit value.
2879
2880 **/
2881 UINT64
2882 EFIAPI
2883 BitFieldAndThenOr64 (
2884 IN UINT64 Operand,
2885 IN UINTN StartBit,
2886 IN UINTN EndBit,
2887 IN UINT64 AndData,
2888 IN UINT64 OrData
2889 );
2890
2891
2892 //
2893 // Base Library Synchronization Functions
2894 //
2895
2896 /**
2897 Retrieves the architecture specific spin lock alignment requirements for
2898 optimal spin lock performance.
2899
2900 This function retrieves the spin lock alignment requirements for optimal
2901 performance on a given CPU architecture. The spin lock alignment must be a
2902 power of two and is returned by this function. If there are no alignment
2903 requirements, then 1 must be returned. The spin lock synchronization
2904 functions must function correctly if the spin lock size and alignment values
2905 returned by this function are not used at all. These values are hints to the
2906 consumers of the spin lock synchronization functions to obtain optimal spin
2907 lock performance.
2908
2909 @return The architecture specific spin lock alignment.
2910
2911 **/
2912 UINTN
2913 EFIAPI
2914 GetSpinLockProperties (
2915 VOID
2916 );
2917
2918
2919 /**
2920 Initializes a spin lock to the released state and returns the spin lock.
2921
2922 This function initializes the spin lock specified by SpinLock to the released
2923 state, and returns SpinLock. Optimal performance can be achieved by calling
2924 GetSpinLockProperties() to determine the size and alignment requirements for
2925 SpinLock.
2926
2927 If SpinLock is NULL, then ASSERT().
2928
2929 @param SpinLock A pointer to the spin lock to initialize to the released
2930 state.
2931
2932 @return SpinLock in release state.
2933
2934 **/
2935 SPIN_LOCK *
2936 EFIAPI
2937 InitializeSpinLock (
2938 OUT SPIN_LOCK *SpinLock
2939 );
2940
2941
2942 /**
2943 Waits until a spin lock can be placed in the acquired state.
2944
2945 This function checks the state of the spin lock specified by SpinLock. If
2946 SpinLock is in the released state, then this function places SpinLock in the
2947 acquired state and returns SpinLock. Otherwise, this function waits
2948 indefinitely for the spin lock to be released, and then places it in the
2949 acquired state and returns SpinLock. All state transitions of SpinLock must
2950 be performed using MP safe mechanisms.
2951
2952 If SpinLock is NULL, then ASSERT().
2953 If SpinLock was not initialized with InitializeSpinLock(), then ASSERT().
2954 If PcdSpinLockTimeout is not zero, and SpinLock is can not be acquired in
2955 PcdSpinLockTimeout microseconds, then ASSERT().
2956
2957 @param SpinLock A pointer to the spin lock to place in the acquired state.
2958
2959 @return SpinLock acquired lock.
2960
2961 **/
2962 SPIN_LOCK *
2963 EFIAPI
2964 AcquireSpinLock (
2965 IN OUT SPIN_LOCK *SpinLock
2966 );
2967
2968
2969 /**
2970 Attempts to place a spin lock in the acquired state.
2971
2972 This function checks the state of the spin lock specified by SpinLock. If
2973 SpinLock is in the released state, then this function places SpinLock in the
2974 acquired state and returns TRUE. Otherwise, FALSE is returned. All state
2975 transitions of SpinLock must be performed using MP safe mechanisms.
2976
2977 If SpinLock is NULL, then ASSERT().
2978 If SpinLock was not initialized with InitializeSpinLock(), then ASSERT().
2979
2980 @param SpinLock A pointer to the spin lock to place in the acquired state.
2981
2982 @retval TRUE SpinLock was placed in the acquired state.
2983 @retval FALSE SpinLock could not be acquired.
2984
2985 **/
2986 BOOLEAN
2987 EFIAPI
2988 AcquireSpinLockOrFail (
2989 IN OUT SPIN_LOCK *SpinLock
2990 );
2991
2992
2993 /**
2994 Releases a spin lock.
2995
2996 This function places the spin lock specified by SpinLock in the release state
2997 and returns SpinLock.
2998
2999 If SpinLock is NULL, then ASSERT().
3000 If SpinLock was not initialized with InitializeSpinLock(), then ASSERT().
3001
3002 @param SpinLock A pointer to the spin lock to release.
3003
3004 @return SpinLock released lock.
3005
3006 **/
3007 SPIN_LOCK *
3008 EFIAPI
3009 ReleaseSpinLock (
3010 IN OUT SPIN_LOCK *SpinLock
3011 );
3012
3013
3014 /**
3015 Performs an atomic increment of an 32-bit unsigned integer.
3016
3017 Performs an atomic increment of the 32-bit unsigned integer specified by
3018 Value and returns the incremented value. The increment operation must be
3019 performed using MP safe mechanisms. The state of the return value is not
3020 guaranteed to be MP safe.
3021
3022 If Value is NULL, then ASSERT().
3023
3024 @param Value A pointer to the 32-bit value to increment.
3025
3026 @return The incremented value.
3027
3028 **/
3029 UINT32
3030 EFIAPI
3031 InterlockedIncrement (
3032 IN UINT32 *Value
3033 );
3034
3035
3036 /**
3037 Performs an atomic decrement of an 32-bit unsigned integer.
3038
3039 Performs an atomic decrement of the 32-bit unsigned integer specified by
3040 Value and returns the decremented value. The decrement operation must be
3041 performed using MP safe mechanisms. The state of the return value is not
3042 guaranteed to be MP safe.
3043
3044 If Value is NULL, then ASSERT().
3045
3046 @param Value A pointer to the 32-bit value to decrement.
3047
3048 @return The decremented value.
3049
3050 **/
3051 UINT32
3052 EFIAPI
3053 InterlockedDecrement (
3054 IN UINT32 *Value
3055 );
3056
3057
3058 /**
3059 Performs an atomic compare exchange operation on a 32-bit unsigned integer.
3060
3061 Performs an atomic compare exchange operation on the 32-bit unsigned integer
3062 specified by Value. If Value is equal to CompareValue, then Value is set to
3063 ExchangeValue and CompareValue is returned. If Value is not equal to CompareValue,
3064 then Value is returned. The compare exchange operation must be performed using
3065 MP safe mechanisms.
3066
3067 If Value is NULL, then ASSERT().
3068
3069 @param Value A pointer to the 32-bit value for the compare exchange
3070 operation.
3071 @param CompareValue 32-bit value used in compare operation.
3072 @param ExchangeValue 32-bit value used in exchange operation.
3073
3074 @return The original *Value before exchange.
3075
3076 **/
3077 UINT32
3078 EFIAPI
3079 InterlockedCompareExchange32 (
3080 IN OUT UINT32 *Value,
3081 IN UINT32 CompareValue,
3082 IN UINT32 ExchangeValue
3083 );
3084
3085
3086 /**
3087 Performs an atomic compare exchange operation on a 64-bit unsigned integer.
3088
3089 Performs an atomic compare exchange operation on the 64-bit unsigned integer specified
3090 by Value. If Value is equal to CompareValue, then Value is set to ExchangeValue and
3091 CompareValue is returned. If Value is not equal to CompareValue, then Value is returned.
3092 The compare exchange operation must be performed using MP safe mechanisms.
3093
3094 If Value is NULL, then ASSERT().
3095
3096 @param Value A pointer to the 64-bit value for the compare exchange
3097 operation.
3098 @param CompareValue 64-bit value used in compare operation.
3099 @param ExchangeValue 64-bit value used in exchange operation.
3100
3101 @return The original *Value before exchange.
3102
3103 **/
3104 UINT64
3105 EFIAPI
3106 InterlockedCompareExchange64 (
3107 IN OUT UINT64 *Value,
3108 IN UINT64 CompareValue,
3109 IN UINT64 ExchangeValue
3110 );
3111
3112
3113 /**
3114 Performs an atomic compare exchange operation on a pointer value.
3115
3116 Performs an atomic compare exchange operation on the pointer value specified
3117 by Value. If Value is equal to CompareValue, then Value is set to
3118 ExchangeValue and CompareValue is returned. If Value is not equal to
3119 CompareValue, then Value is returned. The compare exchange operation must be
3120 performed using MP safe mechanisms.
3121
3122 If Value is NULL, then ASSERT().
3123
3124 @param Value A pointer to the pointer value for the compare exchange
3125 operation.
3126 @param CompareValue Pointer value used in compare operation.
3127 @param ExchangeValue Pointer value used in exchange operation.
3128
3129 @return The original *Value before exchange.
3130 **/
3131 VOID *
3132 EFIAPI
3133 InterlockedCompareExchangePointer (
3134 IN OUT VOID **Value,
3135 IN VOID *CompareValue,
3136 IN VOID *ExchangeValue
3137 );
3138
3139
3140 //
3141 // Base Library Checksum Functions
3142 //
3143
3144 /**
3145 Returns the sum of all elements in a buffer in unit of UINT8.
3146 During calculation, the carry bits are dropped.
3147
3148 This function calculates the sum of all elements in a buffer
3149 in unit of UINT8. The carry bits in result of addition are dropped.
3150 The result is returned as UINT8. If Length is Zero, then Zero is
3151 returned.
3152
3153 If Buffer is NULL, then ASSERT().
3154 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
3155
3156 @param Buffer Pointer to the buffer to carry out the sum operation.
3157 @param Length The size, in bytes, of Buffer.
3158
3159 @return Sum The sum of Buffer with carry bits dropped during additions.
3160
3161 **/
3162 UINT8
3163 EFIAPI
3164 CalculateSum8 (
3165 IN CONST UINT8 *Buffer,
3166 IN UINTN Length
3167 );
3168
3169
3170 /**
3171 Returns the two's complement checksum of all elements in a buffer
3172 of 8-bit values.
3173
3174 This function first calculates the sum of the 8-bit values in the
3175 buffer specified by Buffer and Length. The carry bits in the result
3176 of addition are dropped. Then, the two's complement of the sum is
3177 returned. If Length is 0, then 0 is returned.
3178
3179 If Buffer is NULL, then ASSERT().
3180 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
3181
3182 @param Buffer Pointer to the buffer to carry out the checksum operation.
3183 @param Length The size, in bytes, of Buffer.
3184
3185 @return Checksum The 2's complement checksum of Buffer.
3186
3187 **/
3188 UINT8
3189 EFIAPI
3190 CalculateCheckSum8 (
3191 IN CONST UINT8 *Buffer,
3192 IN UINTN Length
3193 );
3194
3195
3196 /**
3197 Returns the sum of all elements in a buffer of 16-bit values. During
3198 calculation, the carry bits are dropped.
3199
3200 This function calculates the sum of the 16-bit values in the buffer
3201 specified by Buffer and Length. The carry bits in result of addition are dropped.
3202 The 16-bit result is returned. If Length is 0, then 0 is returned.
3203
3204 If Buffer is NULL, then ASSERT().
3205 If Buffer is not aligned on a 16-bit boundary, then ASSERT().
3206 If Length is not aligned on a 16-bit boundary, then ASSERT().
3207 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
3208
3209 @param Buffer Pointer to the buffer to carry out the sum operation.
3210 @param Length The size, in bytes, of Buffer.
3211
3212 @return Sum The sum of Buffer with carry bits dropped during additions.
3213
3214 **/
3215 UINT16
3216 EFIAPI
3217 CalculateSum16 (
3218 IN CONST UINT16 *Buffer,
3219 IN UINTN Length
3220 );
3221
3222
3223 /**
3224 Returns the two's complement checksum of all elements in a buffer of
3225 16-bit values.
3226
3227 This function first calculates the sum of the 16-bit values in the buffer
3228 specified by Buffer and Length. The carry bits in the result of addition
3229 are dropped. Then, the two's complement of the sum is returned. If Length
3230 is 0, then 0 is returned.
3231
3232 If Buffer is NULL, then ASSERT().
3233 If Buffer is not aligned on a 16-bit boundary, then ASSERT().
3234 If Length is not aligned on a 16-bit boundary, then ASSERT().
3235 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
3236
3237 @param Buffer Pointer to the buffer to carry out the checksum operation.
3238 @param Length The size, in bytes, of Buffer.
3239
3240 @return Checksum The 2's complement checksum of Buffer.
3241
3242 **/
3243 UINT16
3244 EFIAPI
3245 CalculateCheckSum16 (
3246 IN CONST UINT16 *Buffer,
3247 IN UINTN Length
3248 );
3249
3250
3251 /**
3252 Returns the sum of all elements in a buffer of 32-bit values. During
3253 calculation, the carry bits are dropped.
3254
3255 This function calculates the sum of the 32-bit values in the buffer
3256 specified by Buffer and Length. The carry bits in result of addition are dropped.
3257 The 32-bit result is returned. If Length is 0, then 0 is returned.
3258
3259 If Buffer is NULL, then ASSERT().
3260 If Buffer is not aligned on a 32-bit boundary, then ASSERT().
3261 If Length is not aligned on a 32-bit boundary, then ASSERT().
3262 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
3263
3264 @param Buffer Pointer to the buffer to carry out the sum operation.
3265 @param Length The size, in bytes, of Buffer.
3266
3267 @return Sum The sum of Buffer with carry bits dropped during additions.
3268
3269 **/
3270 UINT32
3271 EFIAPI
3272 CalculateSum32 (
3273 IN CONST UINT32 *Buffer,
3274 IN UINTN Length
3275 );
3276
3277
3278 /**
3279 Returns the two's complement checksum of all elements in a buffer of
3280 32-bit values.
3281
3282 This function first calculates the sum of the 32-bit values in the buffer
3283 specified by Buffer and Length. The carry bits in the result of addition
3284 are dropped. Then, the two's complement of the sum is returned. If Length
3285 is 0, then 0 is returned.
3286
3287 If Buffer is NULL, then ASSERT().
3288 If Buffer is not aligned on a 32-bit boundary, then ASSERT().
3289 If Length is not aligned on a 32-bit boundary, then ASSERT().
3290 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
3291
3292 @param Buffer Pointer to the buffer to carry out the checksum operation.
3293 @param Length The size, in bytes, of Buffer.
3294
3295 @return Checksum The 2's complement checksum of Buffer.
3296
3297 **/
3298 UINT32
3299 EFIAPI
3300 CalculateCheckSum32 (
3301 IN CONST UINT32 *Buffer,
3302 IN UINTN Length
3303 );
3304
3305
3306 /**
3307 Returns the sum of all elements in a buffer of 64-bit values. During
3308 calculation, the carry bits are dropped.
3309
3310 This function calculates the sum of the 64-bit values in the buffer
3311 specified by Buffer and Length. The carry bits in result of addition are dropped.
3312 The 64-bit result is returned. If Length is 0, then 0 is returned.
3313
3314 If Buffer is NULL, then ASSERT().
3315 If Buffer is not aligned on a 64-bit boundary, then ASSERT().
3316 If Length is not aligned on a 64-bit boundary, then ASSERT().
3317 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
3318
3319 @param Buffer Pointer to the buffer to carry out the sum operation.
3320 @param Length The size, in bytes, of Buffer.
3321
3322 @return Sum The sum of Buffer with carry bits dropped during additions.
3323
3324 **/
3325 UINT64
3326 EFIAPI
3327 CalculateSum64 (
3328 IN CONST UINT64 *Buffer,
3329 IN UINTN Length
3330 );
3331
3332
3333 /**
3334 Returns the two's complement checksum of all elements in a buffer of
3335 64-bit values.
3336
3337 This function first calculates the sum of the 64-bit values in the buffer
3338 specified by Buffer and Length. The carry bits in the result of addition
3339 are dropped. Then, the two's complement of the sum is returned. If Length
3340 is 0, then 0 is returned.
3341
3342 If Buffer is NULL, then ASSERT().
3343 If Buffer is not aligned on a 64-bit boundary, then ASSERT().
3344 If Length is not aligned on a 64-bit boundary, then ASSERT().
3345 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
3346
3347 @param Buffer Pointer to the buffer to carry out the checksum operation.
3348 @param Length The size, in bytes, of Buffer.
3349
3350 @return Checksum The 2's complement checksum of Buffer.
3351
3352 **/
3353 UINT64
3354 EFIAPI
3355 CalculateCheckSum64 (
3356 IN CONST UINT64 *Buffer,
3357 IN UINTN Length
3358 );
3359
3360
3361 ///
3362 /// Base Library CPU Functions
3363 ///
3364 typedef
3365 VOID
3366 (EFIAPI *SWITCH_STACK_ENTRY_POINT)(
3367 IN VOID *Context1, OPTIONAL
3368 IN VOID *Context2 OPTIONAL
3369 );
3370
3371
3372 /**
3373 Used to serialize load and store operations.
3374
3375 All loads and stores that proceed calls to this function are guaranteed to be
3376 globally visible when this function returns.
3377
3378 **/
3379 VOID
3380 EFIAPI
3381 MemoryFence (
3382 VOID
3383 );
3384
3385
3386 /**
3387 Saves the current CPU context that can be restored with a call to LongJump()
3388 and returns 0.
3389
3390 Saves the current CPU context in the buffer specified by JumpBuffer and
3391 returns 0. The initial call to SetJump() must always return 0. Subsequent
3392 calls to LongJump() cause a non-zero value to be returned by SetJump().
3393
3394 If JumpBuffer is NULL, then ASSERT().
3395 For IPF CPUs, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT().
3396
3397 NOTE: The structure BASE_LIBRARY_JUMP_BUFFER is CPU architecture specific.
3398 The same structure must never be used for more than one CPU architecture context.
3399 For example, a BASE_LIBRARY_JUMP_BUFFER allocated by an IA-32 module must never be used from an x64 module.
3400 SetJump()/LongJump() is not currently supported for the EBC processor type.
3401
3402 @param JumpBuffer A pointer to CPU context buffer.
3403
3404 @retval 0 Indicates a return from SetJump().
3405
3406 **/
3407 UINTN
3408 EFIAPI
3409 SetJump (
3410 OUT BASE_LIBRARY_JUMP_BUFFER *JumpBuffer
3411 );
3412
3413
3414 /**
3415 Restores the CPU context that was saved with SetJump().
3416
3417 Restores the CPU context from the buffer specified by JumpBuffer. This
3418 function never returns to the caller. Instead is resumes execution based on
3419 the state of JumpBuffer.
3420
3421 If JumpBuffer is NULL, then ASSERT().
3422 For IPF CPUs, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT().
3423 If Value is 0, then ASSERT().
3424
3425 @param JumpBuffer A pointer to CPU context buffer.
3426 @param Value The value to return when the SetJump() context is
3427 restored and must be non-zero.
3428
3429 **/
3430 VOID
3431 EFIAPI
3432 LongJump (
3433 IN BASE_LIBRARY_JUMP_BUFFER *JumpBuffer,
3434 IN UINTN Value
3435 );
3436
3437
3438 /**
3439 Enables CPU interrupts.
3440
3441 **/
3442 VOID
3443 EFIAPI
3444 EnableInterrupts (
3445 VOID
3446 );
3447
3448
3449 /**
3450 Disables CPU interrupts.
3451
3452 **/
3453 VOID
3454 EFIAPI
3455 DisableInterrupts (
3456 VOID
3457 );
3458
3459
3460 /**
3461 Disables CPU interrupts and returns the interrupt state prior to the disable
3462 operation.
3463
3464 @retval TRUE CPU interrupts were enabled on entry to this call.
3465 @retval FALSE CPU interrupts were disabled on entry to this call.
3466
3467 **/
3468 BOOLEAN
3469 EFIAPI
3470 SaveAndDisableInterrupts (
3471 VOID
3472 );
3473
3474
3475 /**
3476 Enables CPU interrupts for the smallest window required to capture any
3477 pending interrupts.
3478
3479 **/
3480 VOID
3481 EFIAPI
3482 EnableDisableInterrupts (
3483 VOID
3484 );
3485
3486
3487 /**
3488 Retrieves the current CPU interrupt state.
3489
3490 Returns TRUE is interrupts are currently enabled. Otherwise
3491 returns FALSE.
3492
3493 @retval TRUE CPU interrupts are enabled.
3494 @retval FALSE CPU interrupts are disabled.
3495
3496 **/
3497 BOOLEAN
3498 EFIAPI
3499 GetInterruptState (
3500 VOID
3501 );
3502
3503
3504 /**
3505 Set the current CPU interrupt state.
3506
3507 Sets the current CPU interrupt state to the state specified by
3508 InterruptState. If InterruptState is TRUE, then interrupts are enabled. If
3509 InterruptState is FALSE, then interrupts are disabled. InterruptState is
3510 returned.
3511
3512 @param InterruptState TRUE if interrupts should enabled. FALSE if
3513 interrupts should be disabled.
3514
3515 @return InterruptState
3516
3517 **/
3518 BOOLEAN
3519 EFIAPI
3520 SetInterruptState (
3521 IN BOOLEAN InterruptState
3522 );
3523
3524
3525 /**
3526 Requests CPU to pause for a short period of time.
3527
3528 Requests CPU to pause for a short period of time. Typically used in MP
3529 systems to prevent memory starvation while waiting for a spin lock.
3530
3531 **/
3532 VOID
3533 EFIAPI
3534 CpuPause (
3535 VOID
3536 );
3537
3538
3539 /**
3540 Transfers control to a function starting with a new stack.
3541
3542 Transfers control to the function specified by EntryPoint using the
3543 new stack specified by NewStack and passing in the parameters specified
3544 by Context1 and Context2. Context1 and Context2 are optional and may
3545 be NULL. The function EntryPoint must never return. This function
3546 supports a variable number of arguments following the NewStack parameter.
3547 These additional arguments are ignored on IA-32, x64, and EBC.
3548 IPF CPUs expect one additional parameter of type VOID * that specifies
3549 the new backing store pointer.
3550
3551 If EntryPoint is NULL, then ASSERT().
3552 If NewStack is NULL, then ASSERT().
3553
3554 @param EntryPoint A pointer to function to call with the new stack.
3555 @param Context1 A pointer to the context to pass into the EntryPoint
3556 function.
3557 @param Context2 A pointer to the context to pass into the EntryPoint
3558 function.
3559 @param NewStack A pointer to the new stack to use for the EntryPoint
3560 function.
3561 @param ... This variable argument list is ignored for IA32, x64, and EBC.
3562 For IPF, this variable argument list is expected to contain
3563 a single parameter of type VOID * that specifies the new backing
3564 store pointer.
3565
3566
3567 **/
3568 VOID
3569 EFIAPI
3570 SwitchStack (
3571 IN SWITCH_STACK_ENTRY_POINT EntryPoint,
3572 IN VOID *Context1, OPTIONAL
3573 IN VOID *Context2, OPTIONAL
3574 IN VOID *NewStack,
3575 ...
3576 );
3577
3578
3579 /**
3580 Generates a breakpoint on the CPU.
3581
3582 Generates a breakpoint on the CPU. The breakpoint must be implemented such
3583 that code can resume normal execution after the breakpoint.
3584
3585 **/
3586 VOID
3587 EFIAPI
3588 CpuBreakpoint (
3589 VOID
3590 );
3591
3592
3593 /**
3594 Executes an infinite loop.
3595
3596 Forces the CPU to execute an infinite loop. A debugger may be used to skip
3597 past the loop and the code that follows the loop must execute properly. This
3598 implies that the infinite loop must not cause the code that follow it to be
3599 optimized away.
3600
3601 **/
3602 VOID
3603 EFIAPI
3604 CpuDeadLoop (
3605 VOID
3606 );
3607
3608 #if defined (MDE_CPU_IPF)
3609
3610 /**
3611 Flush a range of cache lines in the cache coherency domain of the calling
3612 CPU.
3613
3614 Invalidates the cache lines specified by Address and Length. If Address is
3615 not aligned on a cache line boundary, then entire cache line containing
3616 Address is invalidated. If Address + Length is not aligned on a cache line
3617 boundary, then the entire instruction cache line containing Address + Length
3618 -1 is invalidated. This function may choose to invalidate the entire
3619 instruction cache if that is more efficient than invalidating the specified
3620 range. If Length is 0, the no instruction cache lines are invalidated.
3621 Address is returned.
3622
3623 If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().
3624
3625 @param Address The base address of the instruction lines to invalidate. If
3626 the CPU is in a physical addressing mode, then Address is a
3627 physical address. If the CPU is in a virtual addressing mode,
3628 then Address is a virtual address.
3629
3630 @param Length The number of bytes to invalidate from the instruction cache.
3631
3632 @return Address
3633
3634 **/
3635 VOID *
3636 EFIAPI
3637 IpfFlushCacheRange (
3638 IN VOID *Address,
3639 IN UINTN Length
3640 );
3641
3642
3643 /**
3644 Executes a FC instruction
3645 Executes a FC instruction on the cache line specified by Address.
3646 The cache line size affected is at least 32-bytes (aligned on a 32-byte boundary).
3647 An implementation may flush a larger region. This function is only available on IPF.
3648
3649 @param Address The Address of cache line to be flushed.
3650
3651 @return The address of FC instruction executed.
3652
3653 **/
3654 UINT64
3655 EFIAPI
3656 AsmFc (
3657 IN UINT64 Address
3658 );
3659
3660
3661 /**
3662 Executes a FC.I instruction.
3663 Executes a FC.I instruction on the cache line specified by Address.
3664 The cache line size affected is at least 32-bytes (aligned on a 32-byte boundary).
3665 An implementation may flush a larger region. This function is only available on IPF.
3666
3667 @param Address The Address of cache line to be flushed.
3668
3669 @return The address of FC.I instruction executed.
3670
3671 **/
3672 UINT64
3673 EFIAPI
3674 AsmFci (
3675 IN UINT64 Address
3676 );
3677
3678
3679 /**
3680 Reads the current value of a Processor Identifier Register (CPUID).
3681
3682 Reads and returns the current value of Processor Identifier Register specified by Index.
3683 The Index of largest implemented CPUID (One less than the number of implemented CPUID
3684 registers) is determined by CPUID [3] bits {7:0}.
3685 No parameter checking is performed on Index. If the Index value is beyond the
3686 implemented CPUID register range, a Reserved Register/Field fault may occur. The caller
3687 must either guarantee that Index is valid, or the caller must set up fault handlers to
3688 catch the faults. This function is only available on IPF.
3689
3690 @param Index The 8-bit Processor Identifier Register index to read.
3691
3692 @return The current value of Processor Identifier Register specified by Index.
3693
3694 **/
3695 UINT64
3696 EFIAPI
3697 AsmReadCpuid (
3698 IN UINT8 Index
3699 );
3700
3701
3702 /**
3703 Reads the current value of 64-bit Processor Status Register (PSR).
3704 This function is only available on IPF.
3705
3706 @return The current value of PSR.
3707
3708 **/
3709 UINT64
3710 EFIAPI
3711 AsmReadPsr (
3712 VOID
3713 );
3714
3715
3716 /**
3717 Writes the current value of 64-bit Processor Status Register (PSR).
3718
3719 No parameter checking is performed on Value. All bits of Value corresponding to
3720 reserved fields of PSR must be 0 or a Reserved Register/Field fault may occur.
3721 The caller must either guarantee that Value is valid, or the caller must set up
3722 fault handlers to catch the faults. This function is only available on IPF.
3723
3724 @param Value The 64-bit value to write to PSR.
3725
3726 @return The 64-bit value written to the PSR.
3727
3728 **/
3729 UINT64
3730 EFIAPI
3731 AsmWritePsr (
3732 IN UINT64 Value
3733 );
3734
3735
3736 /**
3737 Reads the current value of 64-bit Kernel Register #0 (KR0).
3738 This function is only available on IPF.
3739
3740 @return The current value of KR0.
3741
3742 **/
3743 UINT64
3744 EFIAPI
3745 AsmReadKr0 (
3746 VOID
3747 );
3748
3749
3750 /**
3751 Reads the current value of 64-bit Kernel Register #1 (KR1).
3752 This function is only available on IPF.
3753
3754 @return The current value of KR1.
3755
3756 **/
3757 UINT64
3758 EFIAPI
3759 AsmReadKr1 (
3760 VOID
3761 );
3762
3763
3764 /**
3765 Reads the current value of 64-bit Kernel Register #2 (KR2).
3766 This function is only available on IPF.
3767
3768 @return The current value of KR2.
3769
3770 **/
3771 UINT64
3772 EFIAPI
3773 AsmReadKr2 (
3774 VOID
3775 );
3776
3777
3778 /**
3779 Reads the current value of 64-bit Kernel Register #3 (KR3).
3780 This function is only available on IPF.
3781
3782 @return The current value of KR3.
3783
3784 **/
3785 UINT64
3786 EFIAPI
3787 AsmReadKr3 (
3788 VOID
3789 );
3790
3791
3792 /**
3793 Reads the current value of 64-bit Kernel Register #4 (KR4).
3794 This function is only available on IPF.
3795
3796 @return The current value of KR4.
3797
3798 **/
3799 UINT64
3800 EFIAPI
3801 AsmReadKr4 (
3802 VOID
3803 );
3804
3805
3806 /**
3807 Reads the current value of 64-bit Kernel Register #5 (KR5).
3808 This function is only available on IPF.
3809
3810 @return The current value of KR5.
3811
3812 **/
3813 UINT64
3814 EFIAPI
3815 AsmReadKr5 (
3816 VOID
3817 );
3818
3819
3820 /**
3821 Reads the current value of 64-bit Kernel Register #6 (KR6).
3822 This function is only available on IPF.
3823
3824 @return The current value of KR6.
3825
3826 **/
3827 UINT64
3828 EFIAPI
3829 AsmReadKr6 (
3830 VOID
3831 );
3832
3833
3834 /**
3835 Reads the current value of 64-bit Kernel Register #7 (KR7).
3836 This function is only available on IPF.
3837
3838 @return The current value of KR7.
3839
3840 **/
3841 UINT64
3842 EFIAPI
3843 AsmReadKr7 (
3844 VOID
3845 );
3846
3847
3848 /**
3849 Write the current value of 64-bit Kernel Register #0 (KR0).
3850 This function is only available on IPF.
3851
3852 @param Value The 64-bit value to write to KR0.
3853
3854 @return The 64-bit value written to the KR0.
3855
3856 **/
3857 UINT64
3858 EFIAPI
3859 AsmWriteKr0 (
3860 IN UINT64 Value
3861 );
3862
3863
3864 /**
3865 Write the current value of 64-bit Kernel Register #1 (KR1).
3866 This function is only available on IPF.
3867
3868 @param Value The 64-bit value to write to KR1.
3869
3870 @return The 64-bit value written to the KR1.
3871
3872 **/
3873 UINT64
3874 EFIAPI
3875 AsmWriteKr1 (
3876 IN UINT64 Value
3877 );
3878
3879
3880 /**
3881 Write the current value of 64-bit Kernel Register #2 (KR2).
3882 This function is only available on IPF.
3883
3884 @param Value The 64-bit value to write to KR2.
3885
3886 @return The 64-bit value written to the KR2.
3887
3888 **/
3889 UINT64
3890 EFIAPI
3891 AsmWriteKr2 (
3892 IN UINT64 Value
3893 );
3894
3895
3896 /**
3897 Write the current value of 64-bit Kernel Register #3 (KR3).
3898 This function is only available on IPF.
3899
3900 @param Value The 64-bit value to write to KR3.
3901
3902 @return The 64-bit value written to the KR3.
3903
3904 **/
3905 UINT64
3906 EFIAPI
3907 AsmWriteKr3 (
3908 IN UINT64 Value
3909 );
3910
3911
3912 /**
3913 Write the current value of 64-bit Kernel Register #4 (KR4).
3914 This function is only available on IPF.
3915
3916 @param Value The 64-bit value to write to KR4.
3917
3918 @return The 64-bit value written to the KR4.
3919
3920 **/
3921 UINT64
3922 EFIAPI
3923 AsmWriteKr4 (
3924 IN UINT64 Value
3925 );
3926
3927
3928 /**
3929 Write the current value of 64-bit Kernel Register #5 (KR5).
3930 This function is only available on IPF.
3931
3932 @param Value The 64-bit value to write to KR5.
3933
3934 @return The 64-bit value written to the KR5.
3935
3936 **/
3937 UINT64
3938 EFIAPI
3939 AsmWriteKr5 (
3940 IN UINT64 Value
3941 );
3942
3943
3944 /**
3945 Write the current value of 64-bit Kernel Register #6 (KR6).
3946 This function is only available on IPF.
3947
3948 @param Value The 64-bit value to write to KR6.
3949
3950 @return The 64-bit value written to the KR6.
3951
3952 **/
3953 UINT64
3954 EFIAPI
3955 AsmWriteKr6 (
3956 IN UINT64 Value
3957 );
3958
3959
3960 /**
3961 Write the current value of 64-bit Kernel Register #7 (KR7).
3962 This function is only available on IPF.
3963
3964 @param Value The 64-bit value to write to KR7.
3965
3966 @return The 64-bit value written to the KR7.
3967
3968 **/
3969 UINT64
3970 EFIAPI
3971 AsmWriteKr7 (
3972 IN UINT64 Value
3973 );
3974
3975
3976 /**
3977 Reads the current value of Interval Timer Counter Register (ITC).
3978 This function is only available on IPF.
3979
3980 @return The current value of ITC.
3981
3982 **/
3983 UINT64
3984 EFIAPI
3985 AsmReadItc (
3986 VOID
3987 );
3988
3989
3990 /**
3991 Reads the current value of Interval Timer Vector Register (ITV).
3992 This function is only available on IPF.
3993
3994 @return The current value of ITV.
3995
3996 **/
3997 UINT64
3998 EFIAPI
3999 AsmReadItv (
4000 VOID
4001 );
4002
4003
4004 /**
4005 Reads the current value of Interval Timer Match Register (ITM).
4006 This function is only available on IPF.
4007
4008 @return The current value of ITM.
4009 **/
4010 UINT64
4011 EFIAPI
4012 AsmReadItm (
4013 VOID
4014 );
4015
4016
4017 /**
4018 Writes the current value of 64-bit Interval Timer Counter Register (ITC).
4019 This function is only available on IPF.
4020
4021 @param Value The 64-bit value to write to ITC.
4022
4023 @return The 64-bit value written to the ITC.
4024
4025 **/
4026 UINT64
4027 EFIAPI
4028 AsmWriteItc (
4029 IN UINT64 Value
4030 );
4031
4032
4033 /**
4034 Writes the current value of 64-bit Interval Timer Match Register (ITM).
4035 This function is only available on IPF.
4036
4037 @param Value The 64-bit value to write to ITM.
4038
4039 @return The 64-bit value written to the ITM.
4040
4041 **/
4042 UINT64
4043 EFIAPI
4044 AsmWriteItm (
4045 IN UINT64 Value
4046 );
4047
4048
4049 /**
4050 Writes the current value of 64-bit Interval Timer Vector Register (ITV).
4051 No parameter checking is performed on Value. All bits of Value corresponding to
4052 reserved fields of ITV must be 0 or a Reserved Register/Field fault may occur.
4053 The caller must either guarantee that Value is valid, or the caller must set up
4054 fault handlers to catch the faults.
4055 This function is only available on IPF.
4056
4057 @param Value The 64-bit value to write to ITV.
4058
4059 @return The 64-bit value written to the ITV.
4060
4061 **/
4062 UINT64
4063 EFIAPI
4064 AsmWriteItv (
4065 IN UINT64 Value
4066 );
4067
4068
4069 /**
4070 Reads the current value of Default Control Register (DCR).
4071 This function is only available on IPF.
4072
4073 @return The current value of DCR.
4074
4075 **/
4076 UINT64
4077 EFIAPI
4078 AsmReadDcr (
4079 VOID
4080 );
4081
4082
4083 /**
4084 Reads the current value of Interruption Vector Address Register (IVA).
4085 This function is only available on IPF.
4086
4087 @return The current value of IVA.
4088 **/
4089 UINT64
4090 EFIAPI
4091 AsmReadIva (
4092 VOID
4093 );
4094
4095
4096 /**
4097 Reads the current value of Page Table Address Register (PTA).
4098 This function is only available on IPF.
4099
4100 @return The current value of PTA.
4101
4102 **/
4103 UINT64
4104 EFIAPI
4105 AsmReadPta (
4106 VOID
4107 );
4108
4109
4110 /**
4111 Writes the current value of 64-bit Default Control Register (DCR).
4112 No parameter checking is performed on Value. All bits of Value corresponding to
4113 reserved fields of DCR must be 0 or a Reserved Register/Field fault may occur.
4114 The caller must either guarantee that Value is valid, or the caller must set up
4115 fault handlers to catch the faults.
4116 This function is only available on IPF.
4117
4118 @param Value The 64-bit value to write to DCR.
4119
4120 @return The 64-bit value written to the DCR.
4121
4122 **/
4123 UINT64
4124 EFIAPI
4125 AsmWriteDcr (
4126 IN UINT64 Value
4127 );
4128
4129
4130 /**
4131 Writes the current value of 64-bit Interruption Vector Address Register (IVA).
4132 The size of vector table is 32 K bytes and is 32 K bytes aligned
4133 the low 15 bits of Value is ignored when written.
4134 This function is only available on IPF.
4135
4136 @param Value The 64-bit value to write to IVA.
4137
4138 @return The 64-bit value written to the IVA.
4139
4140 **/
4141 UINT64
4142 EFIAPI
4143 AsmWriteIva (
4144 IN UINT64 Value
4145 );
4146
4147
4148 /**
4149 Writes the current value of 64-bit Page Table Address Register (PTA).
4150 No parameter checking is performed on Value. All bits of Value corresponding to
4151 reserved fields of DCR must be 0 or a Reserved Register/Field fault may occur.
4152 The caller must either guarantee that Value is valid, or the caller must set up
4153 fault handlers to catch the faults.
4154 This function is only available on IPF.
4155
4156 @param Value The 64-bit value to write to PTA.
4157
4158 @return The 64-bit value written to the PTA.
4159 **/
4160 UINT64
4161 EFIAPI
4162 AsmWritePta (
4163 IN UINT64 Value
4164 );
4165
4166
4167 /**
4168 Reads the current value of Local Interrupt ID Register (LID).
4169 This function is only available on IPF.
4170
4171 @return The current value of LID.
4172
4173 **/
4174 UINT64
4175 EFIAPI
4176 AsmReadLid (
4177 VOID
4178 );
4179
4180
4181 /**
4182 Reads the current value of External Interrupt Vector Register (IVR).
4183 This function is only available on IPF.
4184
4185 @return The current value of IVR.
4186
4187 **/
4188 UINT64
4189 EFIAPI
4190 AsmReadIvr (
4191 VOID
4192 );
4193
4194
4195 /**
4196 Reads the current value of Task Priority Register (TPR).
4197 This function is only available on IPF.
4198
4199 @return The current value of TPR.
4200
4201 **/
4202 UINT64
4203 EFIAPI
4204 AsmReadTpr (
4205 VOID
4206 );
4207
4208
4209 /**
4210 Reads the current value of External Interrupt Request Register #0 (IRR0).
4211 This function is only available on IPF.
4212
4213 @return The current value of IRR0.
4214
4215 **/
4216 UINT64
4217 EFIAPI
4218 AsmReadIrr0 (
4219 VOID
4220 );
4221
4222
4223 /**
4224 Reads the current value of External Interrupt Request Register #1 (IRR1).
4225 This function is only available on IPF.
4226
4227 @return The current value of IRR1.
4228
4229 **/
4230 UINT64
4231 EFIAPI
4232 AsmReadIrr1 (
4233 VOID
4234 );
4235
4236
4237 /**
4238 Reads the current value of External Interrupt Request Register #2 (IRR2).
4239 This function is only available on IPF.
4240
4241 @return The current value of IRR2.
4242
4243 **/
4244 UINT64
4245 EFIAPI
4246 AsmReadIrr2 (
4247 VOID
4248 );
4249
4250
4251 /**
4252 Reads the current value of External Interrupt Request Register #3 (IRR3).
4253 This function is only available on IPF.
4254
4255 @return The current value of IRR3.
4256
4257 **/
4258 UINT64
4259 EFIAPI
4260 AsmReadIrr3 (
4261 VOID
4262 );
4263
4264
4265 /**
4266 Reads the current value of Performance Monitor Vector Register (PMV).
4267 This function is only available on IPF.
4268
4269 @return The current value of PMV.
4270
4271 **/
4272 UINT64
4273 EFIAPI
4274 AsmReadPmv (
4275 VOID
4276 );
4277
4278
4279 /**
4280 Reads the current value of Corrected Machine Check Vector Register (CMCV).
4281 This function is only available on IPF.
4282
4283 @return The current value of CMCV.
4284
4285 **/
4286 UINT64
4287 EFIAPI
4288 AsmReadCmcv (
4289 VOID
4290 );
4291
4292
4293 /**
4294 Reads the current value of Local Redirection Register #0 (LRR0).
4295 This function is only available on IPF.
4296
4297 @return The current value of LRR0.
4298
4299 **/
4300 UINT64
4301 EFIAPI
4302 AsmReadLrr0 (
4303 VOID
4304 );
4305
4306
4307 /**
4308 Reads the current value of Local Redirection Register #1 (LRR1).
4309 This function is only available on IPF.
4310
4311 @return The current value of LRR1.
4312
4313 **/
4314 UINT64
4315 EFIAPI
4316 AsmReadLrr1 (
4317 VOID
4318 );
4319
4320
4321 /**
4322 Writes the current value of 64-bit Page Local Interrupt ID Register (LID).
4323 No parameter checking is performed on Value. All bits of Value corresponding to
4324 reserved fields of LID must be 0 or a Reserved Register/Field fault may occur.
4325 The caller must either guarantee that Value is valid, or the caller must set up
4326 fault handlers to catch the faults.
4327 This function is only available on IPF.
4328
4329 @param Value The 64-bit value to write to LID.
4330
4331 @return The 64-bit value written to the LID.
4332
4333 **/
4334 UINT64
4335 EFIAPI
4336 AsmWriteLid (
4337 IN UINT64 Value
4338 );
4339
4340
4341 /**
4342 Writes the current value of 64-bit Task Priority Register (TPR).
4343 No parameter checking is performed on Value. All bits of Value corresponding to
4344 reserved fields of TPR must be 0 or a Reserved Register/Field fault may occur.
4345 The caller must either guarantee that Value is valid, or the caller must set up
4346 fault handlers to catch the faults.
4347 This function is only available on IPF.
4348
4349 @param Value The 64-bit value to write to TPR.
4350
4351 @return The 64-bit value written to the TPR.
4352
4353 **/
4354 UINT64
4355 EFIAPI
4356 AsmWriteTpr (
4357 IN UINT64 Value
4358 );
4359
4360
4361 /**
4362 Performs a write operation on End OF External Interrupt Register (EOI).
4363 Writes a value of 0 to the EOI Register. This function is only available on IPF.
4364
4365 **/
4366 VOID
4367 EFIAPI
4368 AsmWriteEoi (
4369 VOID
4370 );
4371
4372
4373 /**
4374 Writes the current value of 64-bit Performance Monitor Vector Register (PMV).
4375 No parameter checking is performed on Value. All bits of Value corresponding
4376 to reserved fields of PMV must be 0 or a Reserved Register/Field fault may occur.
4377 The caller must either guarantee that Value is valid, or the caller must set up
4378 fault handlers to catch the faults.
4379 This function is only available on IPF.
4380
4381 @param Value The 64-bit value to write to PMV.
4382
4383 @return The 64-bit value written to the PMV.
4384
4385 **/
4386 UINT64
4387 EFIAPI
4388 AsmWritePmv (
4389 IN UINT64 Value
4390 );
4391
4392
4393 /**
4394 Writes the current value of 64-bit Corrected Machine Check Vector Register (CMCV).
4395 No parameter checking is performed on Value. All bits of Value corresponding
4396 to reserved fields of CMCV must be 0 or a Reserved Register/Field fault may occur.
4397 The caller must either guarantee that Value is valid, or the caller must set up
4398 fault handlers to catch the faults.
4399 This function is only available on IPF.
4400
4401 @param Value The 64-bit value to write to CMCV.
4402
4403 @return The 64-bit value written to the CMCV.
4404
4405 **/
4406 UINT64
4407 EFIAPI
4408 AsmWriteCmcv (
4409 IN UINT64 Value
4410 );
4411
4412
4413 /**
4414 Writes the current value of 64-bit Local Redirection Register #0 (LRR0).
4415 No parameter checking is performed on Value. All bits of Value corresponding
4416 to reserved fields of LRR0 must be 0 or a Reserved Register/Field fault may occur.
4417 The caller must either guarantee that Value is valid, or the caller must set up
4418 fault handlers to catch the faults.
4419 This function is only available on IPF.
4420
4421 @param Value The 64-bit value to write to LRR0.
4422
4423 @return The 64-bit value written to the LRR0.
4424
4425 **/
4426 UINT64
4427 EFIAPI
4428 AsmWriteLrr0 (
4429 IN UINT64 Value
4430 );
4431
4432
4433 /**
4434 Writes the current value of 64-bit Local Redirection Register #1 (LRR1).
4435 No parameter checking is performed on Value. All bits of Value corresponding
4436 to reserved fields of LRR1 must be 0 or a Reserved Register/Field fault may occur.
4437 The caller must either guarantee that Value is valid, or the caller must
4438 set up fault handlers to catch the faults.
4439 This function is only available on IPF.
4440
4441 @param Value The 64-bit value to write to LRR1.
4442
4443 @return The 64-bit value written to the LRR1.
4444
4445 **/
4446 UINT64
4447 EFIAPI
4448 AsmWriteLrr1 (
4449 IN UINT64 Value
4450 );
4451
4452
4453 /**
4454 Reads the current value of Instruction Breakpoint Register (IBR).
4455
4456 The Instruction Breakpoint Registers are used in pairs. The even numbered
4457 registers contain breakpoint addresses, and the odd numbered registers contain
4458 breakpoint mask conditions. At least 4 instruction registers pairs are implemented
4459 on all processor models. Implemented registers are contiguous starting with
4460 register 0. No parameter checking is performed on Index, and if the Index value
4461 is beyond the implemented IBR register range, a Reserved Register/Field fault may
4462 occur. The caller must either guarantee that Index is valid, or the caller must
4463 set up fault handlers to catch the faults.
4464 This function is only available on IPF.
4465
4466 @param Index The 8-bit Instruction Breakpoint Register index to read.
4467
4468 @return The current value of Instruction Breakpoint Register specified by Index.
4469
4470 **/
4471 UINT64
4472 EFIAPI
4473 AsmReadIbr (
4474 IN UINT8 Index
4475 );
4476
4477
4478 /**
4479 Reads the current value of Data Breakpoint Register (DBR).
4480
4481 The Data Breakpoint Registers are used in pairs. The even numbered registers
4482 contain breakpoint addresses, and odd numbered registers contain breakpoint
4483 mask conditions. At least 4 data registers pairs are implemented on all processor
4484 models. Implemented registers are contiguous starting with register 0.
4485 No parameter checking is performed on Index. If the Index value is beyond
4486 the implemented DBR register range, a Reserved Register/Field fault may occur.
4487 The caller must either guarantee that Index is valid, or the caller must set up
4488 fault handlers to catch the faults.
4489 This function is only available on IPF.
4490
4491 @param Index The 8-bit Data Breakpoint Register index to read.
4492
4493 @return The current value of Data Breakpoint Register specified by Index.
4494
4495 **/
4496 UINT64
4497 EFIAPI
4498 AsmReadDbr (
4499 IN UINT8 Index
4500 );
4501
4502
4503 /**
4504 Reads the current value of Performance Monitor Configuration Register (PMC).
4505
4506 All processor implementations provide at least 4 performance counters
4507 (PMC/PMD [4]...PMC/PMD [7] pairs), and 4 performance monitor counter overflow
4508 status registers (PMC [0]... PMC [3]). Processor implementations may provide
4509 additional implementation-dependent PMC and PMD to increase the number of
4510 'generic' performance counters (PMC/PMD pairs). The remainder of PMC and PMD
4511 register set is implementation dependent. No parameter checking is performed
4512 on Index. If the Index value is beyond the implemented PMC register range,
4513 zero value will be returned.
4514 This function is only available on IPF.
4515
4516 @param Index The 8-bit Performance Monitor Configuration Register index to read.
4517
4518 @return The current value of Performance Monitor Configuration Register
4519 specified by Index.
4520
4521 **/
4522 UINT64
4523 EFIAPI
4524 AsmReadPmc (
4525 IN UINT8 Index
4526 );
4527
4528
4529 /**
4530 Reads the current value of Performance Monitor Data Register (PMD).
4531
4532 All processor implementations provide at least 4 performance counters
4533 (PMC/PMD [4]...PMC/PMD [7] pairs), and 4 performance monitor counter
4534 overflow status registers (PMC [0]... PMC [3]). Processor implementations may
4535 provide additional implementation-dependent PMC and PMD to increase the number
4536 of 'generic' performance counters (PMC/PMD pairs). The remainder of PMC and PMD
4537 register set is implementation dependent. No parameter checking is performed
4538 on Index. If the Index value is beyond the implemented PMD register range,
4539 zero value will be returned.
4540 This function is only available on IPF.
4541
4542 @param Index The 8-bit Performance Monitor Data Register index to read.
4543
4544 @return The current value of Performance Monitor Data Register specified by Index.
4545
4546 **/
4547 UINT64
4548 EFIAPI
4549 AsmReadPmd (
4550 IN UINT8 Index
4551 );
4552
4553
4554 /**
4555 Writes the current value of 64-bit Instruction Breakpoint Register (IBR).
4556
4557 Writes current value of Instruction Breakpoint Register specified by Index.
4558 The Instruction Breakpoint Registers are used in pairs. The even numbered
4559 registers contain breakpoint addresses, and odd numbered registers contain
4560 breakpoint mask conditions. At least 4 instruction registers pairs are implemented
4561 on all processor models. Implemented registers are contiguous starting with
4562 register 0. No parameter checking is performed on Index. If the Index value
4563 is beyond the implemented IBR register range, a Reserved Register/Field fault may
4564 occur. The caller must either guarantee that Index is valid, or the caller must
4565 set up fault handlers to catch the faults.
4566 This function is only available on IPF.
4567
4568 @param Index The 8-bit Instruction Breakpoint Register index to write.
4569 @param Value The 64-bit value to write to IBR.
4570
4571 @return The 64-bit value written to the IBR.
4572
4573 **/
4574 UINT64
4575 EFIAPI
4576 AsmWriteIbr (
4577 IN UINT8 Index,
4578 IN UINT64 Value
4579 );
4580
4581
4582 /**
4583 Writes the current value of 64-bit Data Breakpoint Register (DBR).
4584
4585 Writes current value of Data Breakpoint Register specified by Index.
4586 The Data Breakpoint Registers are used in pairs. The even numbered registers
4587 contain breakpoint addresses, and odd numbered registers contain breakpoint
4588 mask conditions. At least 4 data registers pairs are implemented on all processor
4589 models. Implemented registers are contiguous starting with register 0. No parameter
4590 checking is performed on Index. If the Index value is beyond the implemented
4591 DBR register range, a Reserved Register/Field fault may occur. The caller must
4592 either guarantee that Index is valid, or the caller must set up fault handlers to
4593 catch the faults.
4594 This function is only available on IPF.
4595
4596 @param Index The 8-bit Data Breakpoint Register index to write.
4597 @param Value The 64-bit value to write to DBR.
4598
4599 @return The 64-bit value written to the DBR.
4600
4601 **/
4602 UINT64
4603 EFIAPI
4604 AsmWriteDbr (
4605 IN UINT8 Index,
4606 IN UINT64 Value
4607 );
4608
4609
4610 /**
4611 Writes the current value of 64-bit Performance Monitor Configuration Register (PMC).
4612
4613 Writes current value of Performance Monitor Configuration Register specified by Index.
4614 All processor implementations provide at least 4 performance counters
4615 (PMC/PMD [4]...PMC/PMD [7] pairs), and 4 performance monitor counter overflow status
4616 registers (PMC [0]... PMC [3]). Processor implementations may provide additional
4617 implementation-dependent PMC and PMD to increase the number of 'generic' performance
4618 counters (PMC/PMD pairs). The remainder of PMC and PMD register set is implementation
4619 dependent. No parameter checking is performed on Index. If the Index value is
4620 beyond the implemented PMC register range, the write is ignored.
4621 This function is only available on IPF.
4622
4623 @param Index The 8-bit Performance Monitor Configuration Register index to write.
4624 @param Value The 64-bit value to write to PMC.
4625
4626 @return The 64-bit value written to the PMC.
4627
4628 **/
4629 UINT64
4630 EFIAPI
4631 AsmWritePmc (
4632 IN UINT8 Index,
4633 IN UINT64 Value
4634 );
4635
4636
4637 /**
4638 Writes the current value of 64-bit Performance Monitor Data Register (PMD).
4639
4640 Writes current value of Performance Monitor Data Register specified by Index.
4641 All processor implementations provide at least 4 performance counters
4642 (PMC/PMD [4]...PMC/PMD [7] pairs), and 4 performance monitor counter overflow
4643 status registers (PMC [0]... PMC [3]). Processor implementations may provide
4644 additional implementation-dependent PMC and PMD to increase the number of 'generic'
4645 performance counters (PMC/PMD pairs). The remainder of PMC and PMD register set
4646 is implementation dependent. No parameter checking is performed on Index. If the
4647 Index value is beyond the implemented PMD register range, the write is ignored.
4648 This function is only available on IPF.
4649
4650 @param Index The 8-bit Performance Monitor Data Register index to write.
4651 @param Value The 64-bit value to write to PMD.
4652
4653 @return The 64-bit value written to the PMD.
4654
4655 **/
4656 UINT64
4657 EFIAPI
4658 AsmWritePmd (
4659 IN UINT8 Index,
4660 IN UINT64 Value
4661 );
4662
4663
4664 /**
4665 Reads the current value of 64-bit Global Pointer (GP).
4666
4667 Reads and returns the current value of GP.
4668 This function is only available on IPF.
4669
4670 @return The current value of GP.
4671
4672 **/
4673 UINT64
4674 EFIAPI
4675 AsmReadGp (
4676 VOID
4677 );
4678
4679
4680 /**
4681 Write the current value of 64-bit Global Pointer (GP).
4682
4683 Writes the current value of GP. The 64-bit value written to the GP is returned.
4684 No parameter checking is performed on Value.
4685 This function is only available on IPF.
4686
4687 @param Value The 64-bit value to write to GP.
4688
4689 @return The 64-bit value written to the GP.
4690
4691 **/
4692 UINT64
4693 EFIAPI
4694 AsmWriteGp (
4695 IN UINT64 Value
4696 );
4697
4698
4699 /**
4700 Reads the current value of 64-bit Stack Pointer (SP).
4701
4702 Reads and returns the current value of SP.
4703 This function is only available on IPF.
4704
4705 @return The current value of SP.
4706
4707 **/
4708 UINT64
4709 EFIAPI
4710 AsmReadSp (
4711 VOID
4712 );
4713
4714
4715 ///
4716 /// Valid Index value for AsmReadControlRegister()
4717 ///
4718 #define IPF_CONTROL_REGISTER_DCR 0
4719 #define IPF_CONTROL_REGISTER_ITM 1
4720 #define IPF_CONTROL_REGISTER_IVA 2
4721 #define IPF_CONTROL_REGISTER_PTA 8
4722 #define IPF_CONTROL_REGISTER_IPSR 16
4723 #define IPF_CONTROL_REGISTER_ISR 17
4724 #define IPF_CONTROL_REGISTER_IIP 19
4725 #define IPF_CONTROL_REGISTER_IFA 20
4726 #define IPF_CONTROL_REGISTER_ITIR 21
4727 #define IPF_CONTROL_REGISTER_IIPA 22
4728 #define IPF_CONTROL_REGISTER_IFS 23
4729 #define IPF_CONTROL_REGISTER_IIM 24
4730 #define IPF_CONTROL_REGISTER_IHA 25
4731 #define IPF_CONTROL_REGISTER_LID 64
4732 #define IPF_CONTROL_REGISTER_IVR 65
4733 #define IPF_CONTROL_REGISTER_TPR 66
4734 #define IPF_CONTROL_REGISTER_EOI 67
4735 #define IPF_CONTROL_REGISTER_IRR0 68
4736 #define IPF_CONTROL_REGISTER_IRR1 69
4737 #define IPF_CONTROL_REGISTER_IRR2 70
4738 #define IPF_CONTROL_REGISTER_IRR3 71
4739 #define IPF_CONTROL_REGISTER_ITV 72
4740 #define IPF_CONTROL_REGISTER_PMV 73
4741 #define IPF_CONTROL_REGISTER_CMCV 74
4742 #define IPF_CONTROL_REGISTER_LRR0 80
4743 #define IPF_CONTROL_REGISTER_LRR1 81
4744
4745 /**
4746 Reads a 64-bit control register.
4747
4748 Reads and returns the control register specified by Index. The valid Index valued are defined
4749 above in "Related Definitions".
4750 If Index is invalid then 0xFFFFFFFFFFFFFFFF is returned. This function is only available on IPF.
4751
4752 @param Index The index of the control register to read.
4753
4754 @return The control register specified by Index.
4755
4756 **/
4757 UINT64
4758 EFIAPI
4759 AsmReadControlRegister (
4760 IN UINT64 Index
4761 );
4762
4763
4764 ///
4765 /// Valid Index value for AsmReadApplicationRegister()
4766 ///
4767 #define IPF_APPLICATION_REGISTER_K0 0
4768 #define IPF_APPLICATION_REGISTER_K1 1
4769 #define IPF_APPLICATION_REGISTER_K2 2
4770 #define IPF_APPLICATION_REGISTER_K3 3
4771 #define IPF_APPLICATION_REGISTER_K4 4
4772 #define IPF_APPLICATION_REGISTER_K5 5
4773 #define IPF_APPLICATION_REGISTER_K6 6
4774 #define IPF_APPLICATION_REGISTER_K7 7
4775 #define IPF_APPLICATION_REGISTER_RSC 16
4776 #define IPF_APPLICATION_REGISTER_BSP 17
4777 #define IPF_APPLICATION_REGISTER_BSPSTORE 18
4778 #define IPF_APPLICATION_REGISTER_RNAT 19
4779 #define IPF_APPLICATION_REGISTER_FCR 21
4780 #define IPF_APPLICATION_REGISTER_EFLAG 24
4781 #define IPF_APPLICATION_REGISTER_CSD 25
4782 #define IPF_APPLICATION_REGISTER_SSD 26
4783 #define IPF_APPLICATION_REGISTER_CFLG 27
4784 #define IPF_APPLICATION_REGISTER_FSR 28
4785 #define IPF_APPLICATION_REGISTER_FIR 29
4786 #define IPF_APPLICATION_REGISTER_FDR 30
4787 #define IPF_APPLICATION_REGISTER_CCV 32
4788 #define IPF_APPLICATION_REGISTER_UNAT 36
4789 #define IPF_APPLICATION_REGISTER_FPSR 40
4790 #define IPF_APPLICATION_REGISTER_ITC 44
4791 #define IPF_APPLICATION_REGISTER_PFS 64
4792 #define IPF_APPLICATION_REGISTER_LC 65
4793 #define IPF_APPLICATION_REGISTER_EC 66
4794
4795 /**
4796 Reads a 64-bit application register.
4797
4798 Reads and returns the application register specified by Index. The valid Index valued are defined
4799 above in "Related Definitions".
4800 If Index is invalid then 0xFFFFFFFFFFFFFFFF is returned. This function is only available on IPF.
4801
4802 @param Index The index of the application register to read.
4803
4804 @return The application register specified by Index.
4805
4806 **/
4807 UINT64
4808 EFIAPI
4809 AsmReadApplicationRegister (
4810 IN UINT64 Index
4811 );
4812
4813
4814 /**
4815 Determines if the CPU is currently executing in virtual, physical, or mixed mode.
4816
4817 Determines the current execution mode of the CPU.
4818 If the CPU is in virtual mode(PSR.RT=1, PSR.DT=1, PSR.IT=1), then 1 is returned.
4819 If the CPU is in physical mode(PSR.RT=0, PSR.DT=0, PSR.IT=0), then 0 is returned.
4820 If the CPU is not in physical mode or virtual mode, then it is in mixed mode,
4821 and -1 is returned.
4822 This function is only available on IPF.
4823
4824 @retval 1 The CPU is in virtual mode.
4825 @retval 0 The CPU is in physical mode.
4826 @retval -1 The CPU is in mixed mode.
4827
4828 **/
4829 INT64
4830 EFIAPI
4831 AsmCpuVirtual (
4832 VOID
4833 );
4834
4835
4836 /**
4837 Makes a PAL procedure call.
4838
4839 This is a wrapper function to make a PAL procedure call. Based on the Index
4840 value this API will make static or stacked PAL call. The following table
4841 describes the usage of PAL Procedure Index Assignment. Architected procedures
4842 may be designated as required or optional. If a PAL procedure is specified
4843 as optional, a unique return code of 0xFFFFFFFFFFFFFFFF is returned in the
4844 Status field of the PAL_CALL_RETURN structure.
4845 This indicates that the procedure is not present in this PAL implementation.
4846 It is the caller's responsibility to check for this return code after calling
4847 any optional PAL procedure.
4848 No parameter checking is performed on the 5 input parameters, but there are
4849 some common rules that the caller should follow when making a PAL call. Any
4850 address passed to PAL as buffers for return parameters must be 8-byte aligned.
4851 Unaligned addresses may cause undefined results. For those parameters defined
4852 as reserved or some fields defined as reserved must be zero filled or the invalid
4853 argument return value may be returned or undefined result may occur during the
4854 execution of the procedure. If the PalEntryPoint does not point to a valid
4855 PAL entry point then the system behavior is undefined. This function is only
4856 available on IPF.
4857
4858 @param PalEntryPoint The PAL procedure calls entry point.
4859 @param Index The PAL procedure Index number.
4860 @param Arg2 The 2nd parameter for PAL procedure calls.
4861 @param Arg3 The 3rd parameter for PAL procedure calls.
4862 @param Arg4 The 4th parameter for PAL procedure calls.
4863
4864 @return structure returned from the PAL Call procedure, including the status and return value.
4865
4866 **/
4867 PAL_CALL_RETURN
4868 EFIAPI
4869 AsmPalCall (
4870 IN UINT64 PalEntryPoint,
4871 IN UINT64 Index,
4872 IN UINT64 Arg2,
4873 IN UINT64 Arg3,
4874 IN UINT64 Arg4
4875 );
4876
4877
4878 #elif defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)
4879 ///
4880 /// IA32 and X64 Specific Functions
4881 /// Byte packed structure for 16-bit Real Mode EFLAGS
4882 ///
4883 typedef union {
4884 struct {
4885 UINT32 CF:1; /// Carry Flag
4886 UINT32 Reserved_0:1; /// Reserved
4887 UINT32 PF:1; /// Parity Flag
4888 UINT32 Reserved_1:1; /// Reserved
4889 UINT32 AF:1; /// Auxiliary Carry Flag
4890 UINT32 Reserved_2:1; /// Reserved
4891 UINT32 ZF:1; /// Zero Flag
4892 UINT32 SF:1; /// Sign Flag
4893 UINT32 TF:1; /// Trap Flag
4894 UINT32 IF:1; /// Interrupt Enable Flag
4895 UINT32 DF:1; /// Direction Flag
4896 UINT32 OF:1; /// Overflow Flag
4897 UINT32 IOPL:2; /// I/O Privilege Level
4898 UINT32 NT:1; /// Nested Task
4899 UINT32 Reserved_3:1; /// Reserved
4900 } Bits;
4901 UINT16 Uint16;
4902 } IA32_FLAGS16;
4903
4904 ///
4905 /// Byte packed structure for EFLAGS/RFLAGS
4906 /// 32-bits on IA-32
4907 /// 64-bits on X64. The upper 32-bits on X64 are reserved
4908 ///
4909 typedef union {
4910 struct {
4911 UINT32 CF:1; /// Carry Flag
4912 UINT32 Reserved_0:1; /// Reserved
4913 UINT32 PF:1; /// Parity Flag
4914 UINT32 Reserved_1:1; /// Reserved
4915 UINT32 AF:1; /// Auxiliary Carry Flag
4916 UINT32 Reserved_2:1; /// Reserved
4917 UINT32 ZF:1; /// Zero Flag
4918 UINT32 SF:1; /// Sign Flag
4919 UINT32 TF:1; /// Trap Flag
4920 UINT32 IF:1; /// Interrupt Enable Flag
4921 UINT32 DF:1; /// Direction Flag
4922 UINT32 OF:1; /// Overflow Flag
4923 UINT32 IOPL:2; /// I/O Privilege Level
4924 UINT32 NT:1; /// Nested Task
4925 UINT32 Reserved_3:1; /// Reserved
4926 UINT32 RF:1; /// Resume Flag
4927 UINT32 VM:1; /// Virtual 8086 Mode
4928 UINT32 AC:1; /// Alignment Check
4929 UINT32 VIF:1; /// Virtual Interrupt Flag
4930 UINT32 VIP:1; /// Virtual Interrupt Pending
4931 UINT32 ID:1; /// ID Flag
4932 UINT32 Reserved_4:10; /// Reserved
4933 } Bits;
4934 UINTN UintN;
4935 } IA32_EFLAGS32;
4936
4937 ///
4938 /// Byte packed structure for Control Register 0 (CR0)
4939 /// 32-bits on IA-32
4940 /// 64-bits on X64. The upper 32-bits on X64 are reserved
4941 ///
4942 typedef union {
4943 struct {
4944 UINT32 PE:1; /// Protection Enable
4945 UINT32 MP:1; /// Monitor Coprocessor
4946 UINT32 EM:1; /// Emulation
4947 UINT32 TS:1; /// Task Switched
4948 UINT32 ET:1; /// Extension Type
4949 UINT32 NE:1; /// Numeric Error
4950 UINT32 Reserved_0:10; /// Reserved
4951 UINT32 WP:1; /// Write Protect
4952 UINT32 Reserved_1:1; /// Reserved
4953 UINT32 AM:1; /// Alignment Mask
4954 UINT32 Reserved_2:10; /// Reserved
4955 UINT32 NW:1; /// Mot Write-through
4956 UINT32 CD:1; /// Cache Disable
4957 UINT32 PG:1; /// Paging
4958 } Bits;
4959 UINTN UintN;
4960 } IA32_CR0;
4961
4962 ///
4963 /// Byte packed structure for Control Register 4 (CR4)
4964 /// 32-bits on IA-32
4965 /// 64-bits on X64. The upper 32-bits on X64 are reserved
4966 ///
4967 typedef union {
4968 struct {
4969 UINT32 VME:1; /// Virtual-8086 Mode Extensions
4970 UINT32 PVI:1; /// Protected-Mode Virtual Interrupts
4971 UINT32 TSD:1; /// Time Stamp Disable
4972 UINT32 DE:1; /// Debugging Extensions
4973 UINT32 PSE:1; /// Page Size Extensions
4974 UINT32 PAE:1; /// Physical Address Extension
4975 UINT32 MCE:1; /// Machine Check Enable
4976 UINT32 PGE:1; /// Page Global Enable
4977 UINT32 PCE:1; /// Performance Monitoring Counter
4978 /// Enable
4979 UINT32 OSFXSR:1; /// Operating System Support for
4980 /// FXSAVE and FXRSTOR instructions
4981 UINT32 OSXMMEXCPT:1; /// Operating System Support for
4982 /// Unmasked SIMD Floating Point
4983 /// Exceptions
4984 UINT32 Reserved_0:2; /// Reserved
4985 UINT32 VMXE:1; /// VMX Enable
4986 UINT32 Reserved_1:18; /// Reseved
4987 } Bits;
4988 UINTN UintN;
4989 } IA32_CR4;
4990
4991 ///
4992 /// Byte packed structure for an IDTR, GDTR, LDTR descriptor
4993 /// @todo How to make this structure byte-packed in a compiler independent way?
4994 ///
4995 #pragma pack (1)
4996 typedef struct {
4997 UINT16 Limit;
4998 UINTN Base;
4999 } IA32_DESCRIPTOR;
5000 #pragma pack ()
5001
5002 #define IA32_IDT_GATE_TYPE_TASK 0x85
5003 #define IA32_IDT_GATE_TYPE_INTERRUPT_16 0x86
5004 #define IA32_IDT_GATE_TYPE_TRAP_16 0x87
5005 #define IA32_IDT_GATE_TYPE_INTERRUPT_32 0x8E
5006 #define IA32_IDT_GATE_TYPE_TRAP_32 0x8F
5007
5008 ///
5009 /// Byte packed structure for an Interrupt Gate Descriptor
5010 ///
5011 #if defined (MDE_CPU_IA32)
5012
5013 typedef union {
5014 struct {
5015 UINT32 OffsetLow:16; // Offset bits 15..0
5016 UINT32 Selector:16; // Selector
5017 UINT32 Reserved_0:8; // Reserved
5018 UINT32 GateType:8; // Gate Type. See #defines above
5019 UINT32 OffsetHigh:16; // Offset bits 31..16
5020 } Bits;
5021 UINT64 Uint64;
5022 } IA32_IDT_GATE_DESCRIPTOR;
5023
5024 #endif
5025
5026 #if defined (MDE_CPU_X64)
5027
5028 typedef union {
5029 struct {
5030 UINT32 OffsetLow:16; // Offset bits 15..0
5031 UINT32 Selector:16; // Selector
5032 UINT32 Reserved_0:8; // Reserved
5033 UINT32 GateType:8; // Gate Type. See #defines above
5034 UINT32 OffsetHigh:16; // Offset bits 31..16
5035 UINT32 OffsetUpper:32; // Offset bits 63..32
5036 UINT32 Reserved_1:32; // Reserved
5037 } Bits;
5038 UINT64 Uint64;
5039 UINT64 Uint64_1;
5040 } IA32_IDT_GATE_DESCRIPTOR;
5041
5042 #endif
5043
5044 ///
5045 /// Byte packed structure for an FP/SSE/SSE2 context
5046 ///
5047 typedef struct {
5048 UINT8 Buffer[512];
5049 } IA32_FX_BUFFER;
5050
5051 ///
5052 /// Structures for the 16-bit real mode thunks
5053 ///
5054 typedef struct {
5055 UINT32 Reserved1;
5056 UINT32 Reserved2;
5057 UINT32 Reserved3;
5058 UINT32 Reserved4;
5059 UINT8 BL;
5060 UINT8 BH;
5061 UINT16 Reserved5;
5062 UINT8 DL;
5063 UINT8 DH;
5064 UINT16 Reserved6;
5065 UINT8 CL;
5066 UINT8 CH;
5067 UINT16 Reserved7;
5068 UINT8 AL;
5069 UINT8 AH;
5070 UINT16 Reserved8;
5071 } IA32_BYTE_REGS;
5072
5073 typedef struct {
5074 UINT16 DI;
5075 UINT16 Reserved1;
5076 UINT16 SI;
5077 UINT16 Reserved2;
5078 UINT16 BP;
5079 UINT16 Reserved3;
5080 UINT16 SP;
5081 UINT16 Reserved4;
5082 UINT16 BX;
5083 UINT16 Reserved5;
5084 UINT16 DX;
5085 UINT16 Reserved6;
5086 UINT16 CX;
5087 UINT16 Reserved7;
5088 UINT16 AX;
5089 UINT16 Reserved8;
5090 } IA32_WORD_REGS;
5091
5092 typedef struct {
5093 UINT32 EDI;
5094 UINT32 ESI;
5095 UINT32 EBP;
5096 UINT32 ESP;
5097 UINT32 EBX;
5098 UINT32 EDX;
5099 UINT32 ECX;
5100 UINT32 EAX;
5101 UINT16 DS;
5102 UINT16 ES;
5103 UINT16 FS;
5104 UINT16 GS;
5105 IA32_EFLAGS32 EFLAGS;
5106 UINT32 Eip;
5107 UINT16 CS;
5108 UINT16 SS;
5109 } IA32_DWORD_REGS;
5110
5111 typedef union {
5112 IA32_DWORD_REGS E;
5113 IA32_WORD_REGS X;
5114 IA32_BYTE_REGS H;
5115 } IA32_REGISTER_SET;
5116
5117 ///
5118 /// Byte packed structure for an 16-bit real mode thunks
5119 ///
5120 typedef struct {
5121 IA32_REGISTER_SET *RealModeState;
5122 VOID *RealModeBuffer;
5123 UINT32 RealModeBufferSize;
5124 UINT32 ThunkAttributes;
5125 } THUNK_CONTEXT;
5126
5127 #define THUNK_ATTRIBUTE_BIG_REAL_MODE 0x00000001
5128 #define THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 0x00000002
5129 #define THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL 0x00000004
5130
5131 /**
5132 Retrieves CPUID information.
5133
5134 Executes the CPUID instruction with EAX set to the value specified by Index.
5135 This function always returns Index.
5136 If Eax is not NULL, then the value of EAX after CPUID is returned in Eax.
5137 If Ebx is not NULL, then the value of EBX after CPUID is returned in Ebx.
5138 If Ecx is not NULL, then the value of ECX after CPUID is returned in Ecx.
5139 If Edx is not NULL, then the value of EDX after CPUID is returned in Edx.
5140 This function is only available on IA-32 and X64.
5141
5142 @param Index The 32-bit value to load into EAX prior to invoking the CPUID
5143 instruction.
5144 @param Eax Pointer to the 32-bit EAX value returned by the CPUID
5145 instruction. This is an optional parameter that may be NULL.
5146 @param Ebx Pointer to the 32-bit EBX value returned by the CPUID
5147 instruction. This is an optional parameter that may be NULL.
5148 @param Ecx Pointer to the 32-bit ECX value returned by the CPUID
5149 instruction. This is an optional parameter that may be NULL.
5150 @param Edx Pointer to the 32-bit EDX value returned by the CPUID
5151 instruction. This is an optional parameter that may be NULL.
5152
5153 @return Index
5154
5155 **/
5156 UINT32
5157 EFIAPI
5158 AsmCpuid (
5159 IN UINT32 Index,
5160 OUT UINT32 *Eax, OPTIONAL
5161 OUT UINT32 *Ebx, OPTIONAL
5162 OUT UINT32 *Ecx, OPTIONAL
5163 OUT UINT32 *Edx OPTIONAL
5164 );
5165
5166
5167 /**
5168 Retrieves CPUID information using an extended leaf identifier.
5169
5170 Executes the CPUID instruction with EAX set to the value specified by Index
5171 and ECX set to the value specified by SubIndex. This function always returns
5172 Index. This function is only available on IA-32 and x64.
5173
5174 If Eax is not NULL, then the value of EAX after CPUID is returned in Eax.
5175 If Ebx is not NULL, then the value of EBX after CPUID is returned in Ebx.
5176 If Ecx is not NULL, then the value of ECX after CPUID is returned in Ecx.
5177 If Edx is not NULL, then the value of EDX after CPUID is returned in Edx.
5178
5179 @param Index The 32-bit value to load into EAX prior to invoking the
5180 CPUID instruction.
5181 @param SubIndex The 32-bit value to load into ECX prior to invoking the
5182 CPUID instruction.
5183 @param Eax Pointer to the 32-bit EAX value returned by the CPUID
5184 instruction. This is an optional parameter that may be
5185 NULL.
5186 @param Ebx Pointer to the 32-bit EBX value returned by the CPUID
5187 instruction. This is an optional parameter that may be
5188 NULL.
5189 @param Ecx Pointer to the 32-bit ECX value returned by the CPUID
5190 instruction. This is an optional parameter that may be
5191 NULL.
5192 @param Edx Pointer to the 32-bit EDX value returned by the CPUID
5193 instruction. This is an optional parameter that may be
5194 NULL.
5195
5196 @return Index
5197
5198 **/
5199 UINT32
5200 EFIAPI
5201 AsmCpuidEx (
5202 IN UINT32 Index,
5203 IN UINT32 SubIndex,
5204 OUT UINT32 *Eax, OPTIONAL
5205 OUT UINT32 *Ebx, OPTIONAL
5206 OUT UINT32 *Ecx, OPTIONAL
5207 OUT UINT32 *Edx OPTIONAL
5208 );
5209
5210
5211 /**
5212 Returns the lower 32-bits of a Machine Specific Register(MSR).
5213
5214 Reads and returns the lower 32-bits of the MSR specified by Index.
5215 No parameter checking is performed on Index, and some Index values may cause
5216 CPU exceptions. The caller must either guarantee that Index is valid, or the
5217 caller must set up exception handlers to catch the exceptions. This function
5218 is only available on IA-32 and X64.
5219
5220 @param Index The 32-bit MSR index to read.
5221
5222 @return The lower 32 bits of the MSR identified by Index.
5223
5224 **/
5225 UINT32
5226 EFIAPI
5227 AsmReadMsr32 (
5228 IN UINT32 Index
5229 );
5230
5231
5232 /**
5233 Writes a 32-bit value to a Machine Specific Register(MSR), and returns the value.
5234 The upper 32-bits of the MSR are set to zero.
5235
5236 Writes the 32-bit value specified by Value to the MSR specified by Index. The
5237 upper 32-bits of the MSR write are set to zero. The 32-bit value written to
5238 the MSR is returned. No parameter checking is performed on Index or Value,
5239 and some of these may cause CPU exceptions. The caller must either guarantee
5240 that Index and Value are valid, or the caller must establish proper exception
5241 handlers. This function is only available on IA-32 and X64.
5242
5243 @param Index The 32-bit MSR index to write.
5244 @param Value The 32-bit value to write to the MSR.
5245
5246 @return Value
5247
5248 **/
5249 UINT32
5250 EFIAPI
5251 AsmWriteMsr32 (
5252 IN UINT32 Index,
5253 IN UINT32 Value
5254 );
5255
5256
5257 /**
5258 Reads a 64-bit MSR, performs a bitwise inclusive OR on the lower 32-bits, and
5259 writes the result back to the 64-bit MSR.
5260
5261 Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR
5262 between the lower 32-bits of the read result and the value specified by
5263 OrData, and writes the result to the 64-bit MSR specified by Index. The lower
5264 32-bits of the value written to the MSR is returned. No parameter checking is
5265 performed on Index or OrData, and some of these may cause CPU exceptions. The
5266 caller must either guarantee that Index and OrData are valid, or the caller
5267 must establish proper exception handlers. This function is only available on
5268 IA-32 and X64.
5269
5270 @param Index The 32-bit MSR index to write.
5271 @param OrData The value to OR with the read value from the MSR.
5272
5273 @return The lower 32-bit value written to the MSR.
5274
5275 **/
5276 UINT32
5277 EFIAPI
5278 AsmMsrOr32 (
5279 IN UINT32 Index,
5280 IN UINT32 OrData
5281 );
5282
5283
5284 /**
5285 Reads a 64-bit MSR, performs a bitwise AND on the lower 32-bits, and writes
5286 the result back to the 64-bit MSR.
5287
5288 Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
5289 lower 32-bits of the read result and the value specified by AndData, and
5290 writes the result to the 64-bit MSR specified by Index. The lower 32-bits of
5291 the value written to the MSR is returned. No parameter checking is performed
5292 on Index or AndData, and some of these may cause CPU exceptions. The caller
5293 must either guarantee that Index and AndData are valid, or the caller must
5294 establish proper exception handlers. This function is only available on IA-32
5295 and X64.
5296
5297 @param Index The 32-bit MSR index to write.
5298 @param AndData The value to AND with the read value from the MSR.
5299
5300 @return The lower 32-bit value written to the MSR.
5301
5302 **/
5303 UINT32
5304 EFIAPI
5305 AsmMsrAnd32 (
5306 IN UINT32 Index,
5307 IN UINT32 AndData
5308 );
5309
5310
5311 /**
5312 Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise inclusive OR
5313 on the lower 32-bits, and writes the result back to the 64-bit MSR.
5314
5315 Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
5316 lower 32-bits of the read result and the value specified by AndData
5317 preserving the upper 32-bits, performs a bitwise inclusive OR between the
5318 result of the AND operation and the value specified by OrData, and writes the
5319 result to the 64-bit MSR specified by Address. The lower 32-bits of the value
5320 written to the MSR is returned. No parameter checking is performed on Index,
5321 AndData, or OrData, and some of these may cause CPU exceptions. The caller
5322 must either guarantee that Index, AndData, and OrData are valid, or the
5323 caller must establish proper exception handlers. This function is only
5324 available on IA-32 and X64.
5325
5326 @param Index The 32-bit MSR index to write.
5327 @param AndData The value to AND with the read value from the MSR.
5328 @param OrData The value to OR with the result of the AND operation.
5329
5330 @return The lower 32-bit value written to the MSR.
5331
5332 **/
5333 UINT32
5334 EFIAPI
5335 AsmMsrAndThenOr32 (
5336 IN UINT32 Index,
5337 IN UINT32 AndData,
5338 IN UINT32 OrData
5339 );
5340
5341
5342 /**
5343 Reads a bit field of an MSR.
5344
5345 Reads the bit field in the lower 32-bits of a 64-bit MSR. The bit field is
5346 specified by the StartBit and the EndBit. The value of the bit field is
5347 returned. The caller must either guarantee that Index is valid, or the caller
5348 must set up exception handlers to catch the exceptions. This function is only
5349 available on IA-32 and X64.
5350
5351 If StartBit is greater than 31, then ASSERT().
5352 If EndBit is greater than 31, then ASSERT().
5353 If EndBit is less than StartBit, then ASSERT().
5354
5355 @param Index The 32-bit MSR index to read.
5356 @param StartBit The ordinal of the least significant bit in the bit field.
5357 Range 0..31.
5358 @param EndBit The ordinal of the most significant bit in the bit field.
5359 Range 0..31.
5360
5361 @return The bit field read from the MSR.
5362
5363 **/
5364 UINT32
5365 EFIAPI
5366 AsmMsrBitFieldRead32 (
5367 IN UINT32 Index,
5368 IN UINTN StartBit,
5369 IN UINTN EndBit
5370 );
5371
5372
5373 /**
5374 Writes a bit field to an MSR.
5375
5376 Writes Value to a bit field in the lower 32-bits of a 64-bit MSR. The bit
5377 field is specified by the StartBit and the EndBit. All other bits in the
5378 destination MSR are preserved. The lower 32-bits of the MSR written is
5379 returned. Extra left bits in Value are stripped. The caller must either
5380 guarantee that Index and the data written is valid, or the caller must set up
5381 exception handlers to catch the exceptions. This function is only available
5382 on IA-32 and X64.
5383
5384 If StartBit is greater than 31, then ASSERT().
5385 If EndBit is greater than 31, then ASSERT().
5386 If EndBit is less than StartBit, then ASSERT().
5387
5388 @param Index The 32-bit MSR index to write.
5389 @param StartBit The ordinal of the least significant bit in the bit field.
5390 Range 0..31.
5391 @param EndBit The ordinal of the most significant bit in the bit field.
5392 Range 0..31.
5393 @param Value New value of the bit field.
5394
5395 @return The lower 32-bit of the value written to the MSR.
5396
5397 **/
5398 UINT32
5399 EFIAPI
5400 AsmMsrBitFieldWrite32 (
5401 IN UINT32 Index,
5402 IN UINTN StartBit,
5403 IN UINTN EndBit,
5404 IN UINT32 Value
5405 );
5406
5407
5408 /**
5409 Reads a bit field in a 64-bit MSR, performs a bitwise OR, and writes the
5410 result back to the bit field in the 64-bit MSR.
5411
5412 Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR
5413 between the read result and the value specified by OrData, and writes the
5414 result to the 64-bit MSR specified by Index. The lower 32-bits of the value
5415 written to the MSR are returned. Extra left bits in OrData are stripped. The
5416 caller must either guarantee that Index and the data written is valid, or
5417 the caller must set up exception handlers to catch the exceptions. This
5418 function is only available on IA-32 and X64.
5419
5420 If StartBit is greater than 31, then ASSERT().
5421 If EndBit is greater than 31, then ASSERT().
5422 If EndBit is less than StartBit, then ASSERT().
5423
5424 @param Index The 32-bit MSR index to write.
5425 @param StartBit The ordinal of the least significant bit in the bit field.
5426 Range 0..31.
5427 @param EndBit The ordinal of the most significant bit in the bit field.
5428 Range 0..31.
5429 @param OrData The value to OR with the read value from the MSR.
5430
5431 @return The lower 32-bit of the value written to the MSR.
5432
5433 **/
5434 UINT32
5435 EFIAPI
5436 AsmMsrBitFieldOr32 (
5437 IN UINT32 Index,
5438 IN UINTN StartBit,
5439 IN UINTN EndBit,
5440 IN UINT32 OrData
5441 );
5442
5443
5444 /**
5445 Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the
5446 result back to the bit field in the 64-bit MSR.
5447
5448 Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
5449 read result and the value specified by AndData, and writes the result to the
5450 64-bit MSR specified by Index. The lower 32-bits of the value written to the
5451 MSR are returned. Extra left bits in AndData are stripped. The caller must
5452 either guarantee that Index and the data written is valid, or the caller must
5453 set up exception handlers to catch the exceptions. This function is only
5454 available on IA-32 and X64.
5455
5456 If StartBit is greater than 31, then ASSERT().
5457 If EndBit is greater than 31, then ASSERT().
5458 If EndBit is less than StartBit, then ASSERT().
5459
5460 @param Index The 32-bit MSR index to write.
5461 @param StartBit The ordinal of the least significant bit in the bit field.
5462 Range 0..31.
5463 @param EndBit The ordinal of the most significant bit in the bit field.
5464 Range 0..31.
5465 @param AndData The value to AND with the read value from the MSR.
5466
5467 @return The lower 32-bit of the value written to the MSR.
5468
5469 **/
5470 UINT32
5471 EFIAPI
5472 AsmMsrBitFieldAnd32 (
5473 IN UINT32 Index,
5474 IN UINTN StartBit,
5475 IN UINTN EndBit,
5476 IN UINT32 AndData
5477 );
5478
5479
5480 /**
5481 Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a
5482 bitwise inclusive OR, and writes the result back to the bit field in the
5483 64-bit MSR.
5484
5485 Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by a
5486 bitwise inclusive OR between the read result and the value specified by
5487 AndData, and writes the result to the 64-bit MSR specified by Index. The
5488 lower 32-bits of the value written to the MSR are returned. Extra left bits
5489 in both AndData and OrData are stripped. The caller must either guarantee
5490 that Index and the data written is valid, or the caller must set up exception
5491 handlers to catch the exceptions. This function is only available on IA-32
5492 and X64.
5493
5494 If StartBit is greater than 31, then ASSERT().
5495 If EndBit is greater than 31, then ASSERT().
5496 If EndBit is less than StartBit, then ASSERT().
5497
5498 @param Index The 32-bit MSR index to write.
5499 @param StartBit The ordinal of the least significant bit in the bit field.
5500 Range 0..31.
5501 @param EndBit The ordinal of the most significant bit in the bit field.
5502 Range 0..31.
5503 @param AndData The value to AND with the read value from the MSR.
5504 @param OrData The value to OR with the result of the AND operation.
5505
5506 @return The lower 32-bit of the value written to the MSR.
5507
5508 **/
5509 UINT32
5510 EFIAPI
5511 AsmMsrBitFieldAndThenOr32 (
5512 IN UINT32 Index,
5513 IN UINTN StartBit,
5514 IN UINTN EndBit,
5515 IN UINT32 AndData,
5516 IN UINT32 OrData
5517 );
5518
5519
5520 /**
5521 Returns a 64-bit Machine Specific Register(MSR).
5522
5523 Reads and returns the 64-bit MSR specified by Index. No parameter checking is
5524 performed on Index, and some Index values may cause CPU exceptions. The
5525 caller must either guarantee that Index is valid, or the caller must set up
5526 exception handlers to catch the exceptions. This function is only available
5527 on IA-32 and X64.
5528
5529 @param Index The 32-bit MSR index to read.
5530
5531 @return The value of the MSR identified by Index.
5532
5533 **/
5534 UINT64
5535 EFIAPI
5536 AsmReadMsr64 (
5537 IN UINT32 Index
5538 );
5539
5540
5541 /**
5542 Writes a 64-bit value to a Machine Specific Register(MSR), and returns the
5543 value.
5544
5545 Writes the 64-bit value specified by Value to the MSR specified by Index. The
5546 64-bit value written to the MSR is returned. No parameter checking is
5547 performed on Index or Value, and some of these may cause CPU exceptions. The
5548 caller must either guarantee that Index and Value are valid, or the caller
5549 must establish proper exception handlers. This function is only available on
5550 IA-32 and X64.
5551
5552 @param Index The 32-bit MSR index to write.
5553 @param Value The 64-bit value to write to the MSR.
5554
5555 @return Value
5556
5557 **/
5558 UINT64
5559 EFIAPI
5560 AsmWriteMsr64 (
5561 IN UINT32 Index,
5562 IN UINT64 Value
5563 );
5564
5565
5566 /**
5567 Reads a 64-bit MSR, performs a bitwise inclusive OR, and writes the result
5568 back to the 64-bit MSR.
5569
5570 Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR
5571 between the read result and the value specified by OrData, and writes the
5572 result to the 64-bit MSR specified by Index. The value written to the MSR is
5573 returned. No parameter checking is performed on Index or OrData, and some of
5574 these may cause CPU exceptions. The caller must either guarantee that Index
5575 and OrData are valid, or the caller must establish proper exception handlers.
5576 This function is only available on IA-32 and X64.
5577
5578 @param Index The 32-bit MSR index to write.
5579 @param OrData The value to OR with the read value from the MSR.
5580
5581 @return The value written back to the MSR.
5582
5583 **/
5584 UINT64
5585 EFIAPI
5586 AsmMsrOr64 (
5587 IN UINT32 Index,
5588 IN UINT64 OrData
5589 );
5590
5591
5592 /**
5593 Reads a 64-bit MSR, performs a bitwise AND, and writes the result back to the
5594 64-bit MSR.
5595
5596 Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
5597 read result and the value specified by OrData, and writes the result to the
5598 64-bit MSR specified by Index. The value written to the MSR is returned. No
5599 parameter checking is performed on Index or OrData, and some of these may
5600 cause CPU exceptions. The caller must either guarantee that Index and OrData
5601 are valid, or the caller must establish proper exception handlers. This
5602 function is only available on IA-32 and X64.
5603
5604 @param Index The 32-bit MSR index to write.
5605 @param AndData The value to AND with the read value from the MSR.
5606
5607 @return The value written back to the MSR.
5608
5609 **/
5610 UINT64
5611 EFIAPI
5612 AsmMsrAnd64 (
5613 IN UINT32 Index,
5614 IN UINT64 AndData
5615 );
5616
5617
5618 /**
5619 Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise inclusive
5620 OR, and writes the result back to the 64-bit MSR.
5621
5622 Reads the 64-bit MSR specified by Index, performs a bitwise AND between read
5623 result and the value specified by AndData, performs a bitwise inclusive OR
5624 between the result of the AND operation and the value specified by OrData,
5625 and writes the result to the 64-bit MSR specified by Index. The value written
5626 to the MSR is returned. No parameter checking is performed on Index, AndData,
5627 or OrData, and some of these may cause CPU exceptions. The caller must either
5628 guarantee that Index, AndData, and OrData are valid, or the caller must
5629 establish proper exception handlers. This function is only available on IA-32
5630 and X64.
5631
5632 @param Index The 32-bit MSR index to write.
5633 @param AndData The value to AND with the read value from the MSR.
5634 @param OrData The value to OR with the result of the AND operation.
5635
5636 @return The value written back to the MSR.
5637
5638 **/
5639 UINT64
5640 EFIAPI
5641 AsmMsrAndThenOr64 (
5642 IN UINT32 Index,
5643 IN UINT64 AndData,
5644 IN UINT64 OrData
5645 );
5646
5647
5648 /**
5649 Reads a bit field of an MSR.
5650
5651 Reads the bit field in the 64-bit MSR. The bit field is specified by the
5652 StartBit and the EndBit. The value of the bit field is returned. The caller
5653 must either guarantee that Index is valid, or the caller must set up
5654 exception handlers to catch the exceptions. This function is only available
5655 on IA-32 and X64.
5656
5657 If StartBit is greater than 63, then ASSERT().
5658 If EndBit is greater than 63, then ASSERT().
5659 If EndBit is less than StartBit, then ASSERT().
5660
5661 @param Index The 32-bit MSR index to read.
5662 @param StartBit The ordinal of the least significant bit in the bit field.
5663 Range 0..63.
5664 @param EndBit The ordinal of the most significant bit in the bit field.
5665 Range 0..63.
5666
5667 @return The value read from the MSR.
5668
5669 **/
5670 UINT64
5671 EFIAPI
5672 AsmMsrBitFieldRead64 (
5673 IN UINT32 Index,
5674 IN UINTN StartBit,
5675 IN UINTN EndBit
5676 );
5677
5678
5679 /**
5680 Writes a bit field to an MSR.
5681
5682 Writes Value to a bit field in a 64-bit MSR. The bit field is specified by
5683 the StartBit and the EndBit. All other bits in the destination MSR are
5684 preserved. The MSR written is returned. Extra left bits in Value are
5685 stripped. The caller must either guarantee that Index and the data written is
5686 valid, or the caller must set up exception handlers to catch the exceptions.
5687 This function is only available on IA-32 and X64.
5688
5689 If StartBit is greater than 63, then ASSERT().
5690 If EndBit is greater than 63, then ASSERT().
5691 If EndBit is less than StartBit, then ASSERT().
5692
5693 @param Index The 32-bit MSR index to write.
5694 @param StartBit The ordinal of the least significant bit in the bit field.
5695 Range 0..63.
5696 @param EndBit The ordinal of the most significant bit in the bit field.
5697 Range 0..63.
5698 @param Value New value of the bit field.
5699
5700 @return The value written back to the MSR.
5701
5702 **/
5703 UINT64
5704 EFIAPI
5705 AsmMsrBitFieldWrite64 (
5706 IN UINT32 Index,
5707 IN UINTN StartBit,
5708 IN UINTN EndBit,
5709 IN UINT64 Value
5710 );
5711
5712
5713 /**
5714 Reads a bit field in a 64-bit MSR, performs a bitwise inclusive OR, and
5715 writes the result back to the bit field in the 64-bit MSR.
5716
5717 Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR
5718 between the read result and the value specified by OrData, and writes the
5719 result to the 64-bit MSR specified by Index. The value written to the MSR is
5720 returned. Extra left bits in OrData are stripped. The caller must either
5721 guarantee that Index and the data written is valid, or the caller must set up
5722 exception handlers to catch the exceptions. This function is only available
5723 on IA-32 and X64.
5724
5725 If StartBit is greater than 63, then ASSERT().
5726 If EndBit is greater than 63, then ASSERT().
5727 If EndBit is less than StartBit, then ASSERT().
5728
5729 @param Index The 32-bit MSR index to write.
5730 @param StartBit The ordinal of the least significant bit in the bit field.
5731 Range 0..63.
5732 @param EndBit The ordinal of the most significant bit in the bit field.
5733 Range 0..63.
5734 @param OrData The value to OR with the read value from the bit field.
5735
5736 @return The value written back to the MSR.
5737
5738 **/
5739 UINT64
5740 EFIAPI
5741 AsmMsrBitFieldOr64 (
5742 IN UINT32 Index,
5743 IN UINTN StartBit,
5744 IN UINTN EndBit,
5745 IN UINT64 OrData
5746 );
5747
5748
5749 /**
5750 Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the
5751 result back to the bit field in the 64-bit MSR.
5752
5753 Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
5754 read result and the value specified by AndData, and writes the result to the
5755 64-bit MSR specified by Index. The value written to the MSR is returned.
5756 Extra left bits in AndData are stripped. The caller must either guarantee
5757 that Index and the data written is valid, or the caller must set up exception
5758 handlers to catch the exceptions. This function is only available on IA-32
5759 and X64.
5760
5761 If StartBit is greater than 63, then ASSERT().
5762 If EndBit is greater than 63, then ASSERT().
5763 If EndBit is less than StartBit, then ASSERT().
5764
5765 @param Index The 32-bit MSR index to write.
5766 @param StartBit The ordinal of the least significant bit in the bit field.
5767 Range 0..63.
5768 @param EndBit The ordinal of the most significant bit in the bit field.
5769 Range 0..63.
5770 @param AndData The value to AND with the read value from the bit field.
5771
5772 @return The value written back to the MSR.
5773
5774 **/
5775 UINT64
5776 EFIAPI
5777 AsmMsrBitFieldAnd64 (
5778 IN UINT32 Index,
5779 IN UINTN StartBit,
5780 IN UINTN EndBit,
5781 IN UINT64 AndData
5782 );
5783
5784
5785 /**
5786 Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a
5787 bitwise inclusive OR, and writes the result back to the bit field in the
5788 64-bit MSR.
5789
5790 Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by
5791 a bitwise inclusive OR between the read result and the value specified by
5792 AndData, and writes the result to the 64-bit MSR specified by Index. The
5793 value written to the MSR is returned. Extra left bits in both AndData and
5794 OrData are stripped. The caller must either guarantee that Index and the data
5795 written is valid, or the caller must set up exception handlers to catch the
5796 exceptions. This function is only available on IA-32 and X64.
5797
5798 If StartBit is greater than 63, then ASSERT().
5799 If EndBit is greater than 63, then ASSERT().
5800 If EndBit is less than StartBit, then ASSERT().
5801
5802 @param Index The 32-bit MSR index to write.
5803 @param StartBit The ordinal of the least significant bit in the bit field.
5804 Range 0..63.
5805 @param EndBit The ordinal of the most significant bit in the bit field.
5806 Range 0..63.
5807 @param AndData The value to AND with the read value from the bit field.
5808 @param OrData The value to OR with the result of the AND operation.
5809
5810 @return The value written back to the MSR.
5811
5812 **/
5813 UINT64
5814 EFIAPI
5815 AsmMsrBitFieldAndThenOr64 (
5816 IN UINT32 Index,
5817 IN UINTN StartBit,
5818 IN UINTN EndBit,
5819 IN UINT64 AndData,
5820 IN UINT64 OrData
5821 );
5822
5823
5824 /**
5825 Reads the current value of the EFLAGS register.
5826
5827 Reads and returns the current value of the EFLAGS register. This function is
5828 only available on IA-32 and X64. This returns a 32-bit value on IA-32 and a
5829 64-bit value on X64.
5830
5831 @return EFLAGS on IA-32 or RFLAGS on X64.
5832
5833 **/
5834 UINTN
5835 EFIAPI
5836 AsmReadEflags (
5837 VOID
5838 );
5839
5840
5841 /**
5842 Reads the current value of the Control Register 0 (CR0).
5843
5844 Reads and returns the current value of CR0. This function is only available
5845 on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on
5846 X64.
5847
5848 @return The value of the Control Register 0 (CR0).
5849
5850 **/
5851 UINTN
5852 EFIAPI
5853 AsmReadCr0 (
5854 VOID
5855 );
5856
5857
5858 /**
5859 Reads the current value of the Control Register 2 (CR2).
5860
5861 Reads and returns the current value of CR2. This function is only available
5862 on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on
5863 X64.
5864
5865 @return The value of the Control Register 2 (CR2).
5866
5867 **/
5868 UINTN
5869 EFIAPI
5870 AsmReadCr2 (
5871 VOID
5872 );
5873
5874
5875 /**
5876 Reads the current value of the Control Register 3 (CR3).
5877
5878 Reads and returns the current value of CR3. This function is only available
5879 on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on
5880 X64.
5881
5882 @return The value of the Control Register 3 (CR3).
5883
5884 **/
5885 UINTN
5886 EFIAPI
5887 AsmReadCr3 (
5888 VOID
5889 );
5890
5891
5892 /**
5893 Reads the current value of the Control Register 4 (CR4).
5894
5895 Reads and returns the current value of CR4. This function is only available
5896 on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on
5897 X64.
5898
5899 @return The value of the Control Register 4 (CR4).
5900
5901 **/
5902 UINTN
5903 EFIAPI
5904 AsmReadCr4 (
5905 VOID
5906 );
5907
5908
5909 /**
5910 Writes a value to Control Register 0 (CR0).
5911
5912 Writes and returns a new value to CR0. This function is only available on
5913 IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.
5914
5915 @param Cr0 The value to write to CR0.
5916
5917 @return The value written to CR0.
5918
5919 **/
5920 UINTN
5921 EFIAPI
5922 AsmWriteCr0 (
5923 UINTN Cr0
5924 );
5925
5926
5927 /**
5928 Writes a value to Control Register 2 (CR2).
5929
5930 Writes and returns a new value to CR2. This function is only available on
5931 IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.
5932
5933 @param Cr2 The value to write to CR2.
5934
5935 @return The value written to CR2.
5936
5937 **/
5938 UINTN
5939 EFIAPI
5940 AsmWriteCr2 (
5941 UINTN Cr2
5942 );
5943
5944
5945 /**
5946 Writes a value to Control Register 3 (CR3).
5947
5948 Writes and returns a new value to CR3. This function is only available on
5949 IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.
5950
5951 @param Cr3 The value to write to CR3.
5952
5953 @return The value written to CR3.
5954
5955 **/
5956 UINTN
5957 EFIAPI
5958 AsmWriteCr3 (
5959 UINTN Cr3
5960 );
5961
5962
5963 /**
5964 Writes a value to Control Register 4 (CR4).
5965
5966 Writes and returns a new value to CR4. This function is only available on
5967 IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.
5968
5969 @param Cr4 The value to write to CR4.
5970
5971 @return The value written to CR4.
5972
5973 **/
5974 UINTN
5975 EFIAPI
5976 AsmWriteCr4 (
5977 UINTN Cr4
5978 );
5979
5980
5981 /**
5982 Reads the current value of Debug Register 0 (DR0).
5983
5984 Reads and returns the current value of DR0. This function is only available
5985 on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on
5986 X64.
5987
5988 @return The value of Debug Register 0 (DR0).
5989
5990 **/
5991 UINTN
5992 EFIAPI
5993 AsmReadDr0 (
5994 VOID
5995 );
5996
5997
5998 /**
5999 Reads the current value of Debug Register 1 (DR1).
6000
6001 Reads and returns the current value of DR1. This function is only available
6002 on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on
6003 X64.
6004
6005 @return The value of Debug Register 1 (DR1).
6006
6007 **/
6008 UINTN
6009 EFIAPI
6010 AsmReadDr1 (
6011 VOID
6012 );
6013
6014
6015 /**
6016 Reads the current value of Debug Register 2 (DR2).
6017
6018 Reads and returns the current value of DR2. This function is only available
6019 on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on
6020 X64.
6021
6022 @return The value of Debug Register 2 (DR2).
6023
6024 **/
6025 UINTN
6026 EFIAPI
6027 AsmReadDr2 (
6028 VOID
6029 );
6030
6031
6032 /**
6033 Reads the current value of Debug Register 3 (DR3).
6034
6035 Reads and returns the current value of DR3. This function is only available
6036 on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on
6037 X64.
6038
6039 @return The value of Debug Register 3 (DR3).
6040
6041 **/
6042 UINTN
6043 EFIAPI
6044 AsmReadDr3 (
6045 VOID
6046 );
6047
6048
6049 /**
6050 Reads the current value of Debug Register 4 (DR4).
6051
6052 Reads and returns the current value of DR4. This function is only available
6053 on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on
6054 X64.
6055
6056 @return The value of Debug Register 4 (DR4).
6057
6058 **/
6059 UINTN
6060 EFIAPI
6061 AsmReadDr4 (
6062 VOID
6063 );
6064
6065
6066 /**
6067 Reads the current value of Debug Register 5 (DR5).
6068
6069 Reads and returns the current value of DR5. This function is only available
6070 on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on
6071 X64.
6072
6073 @return The value of Debug Register 5 (DR5).
6074
6075 **/
6076 UINTN
6077 EFIAPI
6078 AsmReadDr5 (
6079 VOID
6080 );
6081
6082
6083 /**
6084 Reads the current value of Debug Register 6 (DR6).
6085
6086 Reads and returns the current value of DR6. This function is only available
6087 on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on
6088 X64.
6089
6090 @return The value of Debug Register 6 (DR6).
6091
6092 **/
6093 UINTN
6094 EFIAPI
6095 AsmReadDr6 (
6096 VOID
6097 );
6098
6099
6100 /**
6101 Reads the current value of Debug Register 7 (DR7).
6102
6103 Reads and returns the current value of DR7. This function is only available
6104 on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on
6105 X64.
6106
6107 @return The value of Debug Register 7 (DR7).
6108
6109 **/
6110 UINTN
6111 EFIAPI
6112 AsmReadDr7 (
6113 VOID
6114 );
6115
6116
6117 /**
6118 Writes a value to Debug Register 0 (DR0).
6119
6120 Writes and returns a new value to DR0. This function is only available on
6121 IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.
6122
6123 @param Dr0 The value to write to Dr0.
6124
6125 @return The value written to Debug Register 0 (DR0).
6126
6127 **/
6128 UINTN
6129 EFIAPI
6130 AsmWriteDr0 (
6131 UINTN Dr0
6132 );
6133
6134
6135 /**
6136 Writes a value to Debug Register 1 (DR1).
6137
6138 Writes and returns a new value to DR1. This function is only available on
6139 IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.
6140
6141 @param Dr1 The value to write to Dr1.
6142
6143 @return The value written to Debug Register 1 (DR1).
6144
6145 **/
6146 UINTN
6147 EFIAPI
6148 AsmWriteDr1 (
6149 UINTN Dr1
6150 );
6151
6152
6153 /**
6154 Writes a value to Debug Register 2 (DR2).
6155
6156 Writes and returns a new value to DR2. This function is only available on
6157 IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.
6158
6159 @param Dr2 The value to write to Dr2.
6160
6161 @return The value written to Debug Register 2 (DR2).
6162
6163 **/
6164 UINTN
6165 EFIAPI
6166 AsmWriteDr2 (
6167 UINTN Dr2
6168 );
6169
6170
6171 /**
6172 Writes a value to Debug Register 3 (DR3).
6173
6174 Writes and returns a new value to DR3. This function is only available on
6175 IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.
6176
6177 @param Dr3 The value to write to Dr3.
6178
6179 @return The value written to Debug Register 3 (DR3).
6180
6181 **/
6182 UINTN
6183 EFIAPI
6184 AsmWriteDr3 (
6185 UINTN Dr3
6186 );
6187
6188
6189 /**
6190 Writes a value to Debug Register 4 (DR4).
6191
6192 Writes and returns a new value to DR4. This function is only available on
6193 IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.
6194
6195 @param Dr4 The value to write to Dr4.
6196
6197 @return The value written to Debug Register 4 (DR4).
6198
6199 **/
6200 UINTN
6201 EFIAPI
6202 AsmWriteDr4 (
6203 UINTN Dr4
6204 );
6205
6206
6207 /**
6208 Writes a value to Debug Register 5 (DR5).
6209
6210 Writes and returns a new value to DR5. This function is only available on
6211 IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.
6212
6213 @param Dr5 The value to write to Dr5.
6214
6215 @return The value written to Debug Register 5 (DR5).
6216
6217 **/
6218 UINTN
6219 EFIAPI
6220 AsmWriteDr5 (
6221 UINTN Dr5
6222 );
6223
6224
6225 /**
6226 Writes a value to Debug Register 6 (DR6).
6227
6228 Writes and returns a new value to DR6. This function is only available on
6229 IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.
6230
6231 @param Dr6 The value to write to Dr6.
6232
6233 @return The value written to Debug Register 6 (DR6).
6234
6235 **/
6236 UINTN
6237 EFIAPI
6238 AsmWriteDr6 (
6239 UINTN Dr6
6240 );
6241
6242
6243 /**
6244 Writes a value to Debug Register 7 (DR7).
6245
6246 Writes and returns a new value to DR7. This function is only available on
6247 IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.
6248
6249 @param Dr7 The value to write to Dr7.
6250
6251 @return The value written to Debug Register 7 (DR7).
6252
6253 **/
6254 UINTN
6255 EFIAPI
6256 AsmWriteDr7 (
6257 UINTN Dr7
6258 );
6259
6260
6261 /**
6262 Reads the current value of Code Segment Register (CS).
6263
6264 Reads and returns the current value of CS. This function is only available on
6265 IA-32 and X64.
6266
6267 @return The current value of CS.
6268
6269 **/
6270 UINT16
6271 EFIAPI
6272 AsmReadCs (
6273 VOID
6274 );
6275
6276
6277 /**
6278 Reads the current value of Data Segment Register (DS).
6279
6280 Reads and returns the current value of DS. This function is only available on
6281 IA-32 and X64.
6282
6283 @return The current value of DS.
6284
6285 **/
6286 UINT16
6287 EFIAPI
6288 AsmReadDs (
6289 VOID
6290 );
6291
6292
6293 /**
6294 Reads the current value of Extra Segment Register (ES).
6295
6296 Reads and returns the current value of ES. This function is only available on
6297 IA-32 and X64.
6298
6299 @return The current value of ES.
6300
6301 **/
6302 UINT16
6303 EFIAPI
6304 AsmReadEs (
6305 VOID
6306 );
6307
6308
6309 /**
6310 Reads the current value of FS Data Segment Register (FS).
6311
6312 Reads and returns the current value of FS. This function is only available on
6313 IA-32 and X64.
6314
6315 @return The current value of FS.
6316
6317 **/
6318 UINT16
6319 EFIAPI
6320 AsmReadFs (
6321 VOID
6322 );
6323
6324
6325 /**
6326 Reads the current value of GS Data Segment Register (GS).
6327
6328 Reads and returns the current value of GS. This function is only available on
6329 IA-32 and X64.
6330
6331 @return The current value of GS.
6332
6333 **/
6334 UINT16
6335 EFIAPI
6336 AsmReadGs (
6337 VOID
6338 );
6339
6340
6341 /**
6342 Reads the current value of Stack Segment Register (SS).
6343
6344 Reads and returns the current value of SS. This function is only available on
6345 IA-32 and X64.
6346
6347 @return The current value of SS.
6348
6349 **/
6350 UINT16
6351 EFIAPI
6352 AsmReadSs (
6353 VOID
6354 );
6355
6356
6357 /**
6358 Reads the current value of Task Register (TR).
6359
6360 Reads and returns the current value of TR. This function is only available on
6361 IA-32 and X64.
6362
6363 @return The current value of TR.
6364
6365 **/
6366 UINT16
6367 EFIAPI
6368 AsmReadTr (
6369 VOID
6370 );
6371
6372
6373 /**
6374 Reads the current Global Descriptor Table Register(GDTR) descriptor.
6375
6376 Reads and returns the current GDTR descriptor and returns it in Gdtr. This
6377 function is only available on IA-32 and X64.
6378
6379 If Gdtr is NULL, then ASSERT().
6380
6381 @param Gdtr Pointer to a GDTR descriptor.
6382
6383 **/
6384 VOID
6385 EFIAPI
6386 AsmReadGdtr (
6387 OUT IA32_DESCRIPTOR *Gdtr
6388 );
6389
6390
6391 /**
6392 Writes the current Global Descriptor Table Register (GDTR) descriptor.
6393
6394 Writes and the current GDTR descriptor specified by Gdtr. This function is
6395 only available on IA-32 and X64.
6396
6397 If Gdtr is NULL, then ASSERT().
6398
6399 @param Gdtr Pointer to a GDTR descriptor.
6400
6401 **/
6402 VOID
6403 EFIAPI
6404 AsmWriteGdtr (
6405 IN CONST IA32_DESCRIPTOR *Gdtr
6406 );
6407
6408
6409 /**
6410 Reads the current Interrupt Descriptor Table Register(IDTR) descriptor.
6411
6412 Reads and returns the current IDTR descriptor and returns it in Idtr. This
6413 function is only available on IA-32 and X64.
6414
6415 If Idtr is NULL, then ASSERT().
6416
6417 @param Idtr Pointer to a IDTR descriptor.
6418
6419 **/
6420 VOID
6421 EFIAPI
6422 AsmReadIdtr (
6423 OUT IA32_DESCRIPTOR *Idtr
6424 );
6425
6426
6427 /**
6428 Writes the current Interrupt Descriptor Table Register(IDTR) descriptor.
6429
6430 Writes the current IDTR descriptor and returns it in Idtr. This function is
6431 only available on IA-32 and X64.
6432
6433 If Idtr is NULL, then ASSERT().
6434
6435 @param Idtr Pointer to a IDTR descriptor.
6436
6437 **/
6438 VOID
6439 EFIAPI
6440 AsmWriteIdtr (
6441 IN CONST IA32_DESCRIPTOR *Idtr
6442 );
6443
6444
6445 /**
6446 Reads the current Local Descriptor Table Register(LDTR) selector.
6447
6448 Reads and returns the current 16-bit LDTR descriptor value. This function is
6449 only available on IA-32 and X64.
6450
6451 @return The current selector of LDT.
6452
6453 **/
6454 UINT16
6455 EFIAPI
6456 AsmReadLdtr (
6457 VOID
6458 );
6459
6460
6461 /**
6462 Writes the current Local Descriptor Table Register (LDTR) selector.
6463
6464 Writes and the current LDTR descriptor specified by Ldtr. This function is
6465 only available on IA-32 and X64.
6466
6467 @param Ldtr 16-bit LDTR selector value.
6468
6469 **/
6470 VOID
6471 EFIAPI
6472 AsmWriteLdtr (
6473 IN UINT16 Ldtr
6474 );
6475
6476
6477 /**
6478 Save the current floating point/SSE/SSE2 context to a buffer.
6479
6480 Saves the current floating point/SSE/SSE2 state to the buffer specified by
6481 Buffer. Buffer must be aligned on a 16-byte boundary. This function is only
6482 available on IA-32 and X64.
6483
6484 If Buffer is NULL, then ASSERT().
6485 If Buffer is not aligned on a 16-byte boundary, then ASSERT().
6486
6487 @param Buffer Pointer to a buffer to save the floating point/SSE/SSE2 context.
6488
6489 **/
6490 VOID
6491 EFIAPI
6492 AsmFxSave (
6493 OUT IA32_FX_BUFFER *Buffer
6494 );
6495
6496
6497 /**
6498 Restores the current floating point/SSE/SSE2 context from a buffer.
6499
6500 Restores the current floating point/SSE/SSE2 state from the buffer specified
6501 by Buffer. Buffer must be aligned on a 16-byte boundary. This function is
6502 only available on IA-32 and X64.
6503
6504 If Buffer is NULL, then ASSERT().
6505 If Buffer is not aligned on a 16-byte boundary, then ASSERT().
6506 If Buffer was not saved with AsmFxSave(), then ASSERT().
6507
6508 @param Buffer Pointer to a buffer to save the floating point/SSE/SSE2 context.
6509
6510 **/
6511 VOID
6512 EFIAPI
6513 AsmFxRestore (
6514 IN CONST IA32_FX_BUFFER *Buffer
6515 );
6516
6517
6518 /**
6519 Reads the current value of 64-bit MMX Register #0 (MM0).
6520
6521 Reads and returns the current value of MM0. This function is only available
6522 on IA-32 and X64.
6523
6524 @return The current value of MM0.
6525
6526 **/
6527 UINT64
6528 EFIAPI
6529 AsmReadMm0 (
6530 VOID
6531 );
6532
6533
6534 /**
6535 Reads the current value of 64-bit MMX Register #1 (MM1).
6536
6537 Reads and returns the current value of MM1. This function is only available
6538 on IA-32 and X64.
6539
6540 @return The current value of MM1.
6541
6542 **/
6543 UINT64
6544 EFIAPI
6545 AsmReadMm1 (
6546 VOID
6547 );
6548
6549
6550 /**
6551 Reads the current value of 64-bit MMX Register #2 (MM2).
6552
6553 Reads and returns the current value of MM2. This function is only available
6554 on IA-32 and X64.
6555
6556 @return The current value of MM2.
6557
6558 **/
6559 UINT64
6560 EFIAPI
6561 AsmReadMm2 (
6562 VOID
6563 );
6564
6565
6566 /**
6567 Reads the current value of 64-bit MMX Register #3 (MM3).
6568
6569 Reads and returns the current value of MM3. This function is only available
6570 on IA-32 and X64.
6571
6572 @return The current value of MM3.
6573
6574 **/
6575 UINT64
6576 EFIAPI
6577 AsmReadMm3 (
6578 VOID
6579 );
6580
6581
6582 /**
6583 Reads the current value of 64-bit MMX Register #4 (MM4).
6584
6585 Reads and returns the current value of MM4. This function is only available
6586 on IA-32 and X64.
6587
6588 @return The current value of MM4.
6589
6590 **/
6591 UINT64
6592 EFIAPI
6593 AsmReadMm4 (
6594 VOID
6595 );
6596
6597
6598 /**
6599 Reads the current value of 64-bit MMX Register #5 (MM5).
6600
6601 Reads and returns the current value of MM5. This function is only available
6602 on IA-32 and X64.
6603
6604 @return The current value of MM5.
6605
6606 **/
6607 UINT64
6608 EFIAPI
6609 AsmReadMm5 (
6610 VOID
6611 );
6612
6613
6614 /**
6615 Reads the current value of 64-bit MMX Register #6 (MM6).
6616
6617 Reads and returns the current value of MM6. This function is only available
6618 on IA-32 and X64.
6619
6620 @return The current value of MM6.
6621
6622 **/
6623 UINT64
6624 EFIAPI
6625 AsmReadMm6 (
6626 VOID
6627 );
6628
6629
6630 /**
6631 Reads the current value of 64-bit MMX Register #7 (MM7).
6632
6633 Reads and returns the current value of MM7. This function is only available
6634 on IA-32 and X64.
6635
6636 @return The current value of MM7.
6637
6638 **/
6639 UINT64
6640 EFIAPI
6641 AsmReadMm7 (
6642 VOID
6643 );
6644
6645
6646 /**
6647 Writes the current value of 64-bit MMX Register #0 (MM0).
6648
6649 Writes the current value of MM0. This function is only available on IA32 and
6650 X64.
6651
6652 @param Value The 64-bit value to write to MM0.
6653
6654 **/
6655 VOID
6656 EFIAPI
6657 AsmWriteMm0 (
6658 IN UINT64 Value
6659 );
6660
6661
6662 /**
6663 Writes the current value of 64-bit MMX Register #1 (MM1).
6664
6665 Writes the current value of MM1. This function is only available on IA32 and
6666 X64.
6667
6668 @param Value The 64-bit value to write to MM1.
6669
6670 **/
6671 VOID
6672 EFIAPI
6673 AsmWriteMm1 (
6674 IN UINT64 Value
6675 );
6676
6677
6678 /**
6679 Writes the current value of 64-bit MMX Register #2 (MM2).
6680
6681 Writes the current value of MM2. This function is only available on IA32 and
6682 X64.
6683
6684 @param Value The 64-bit value to write to MM2.
6685
6686 **/
6687 VOID
6688 EFIAPI
6689 AsmWriteMm2 (
6690 IN UINT64 Value
6691 );
6692
6693
6694 /**
6695 Writes the current value of 64-bit MMX Register #3 (MM3).
6696
6697 Writes the current value of MM3. This function is only available on IA32 and
6698 X64.
6699
6700 @param Value The 64-bit value to write to MM3.
6701
6702 **/
6703 VOID
6704 EFIAPI
6705 AsmWriteMm3 (
6706 IN UINT64 Value
6707 );
6708
6709
6710 /**
6711 Writes the current value of 64-bit MMX Register #4 (MM4).
6712
6713 Writes the current value of MM4. This function is only available on IA32 and
6714 X64.
6715
6716 @param Value The 64-bit value to write to MM4.
6717
6718 **/
6719 VOID
6720 EFIAPI
6721 AsmWriteMm4 (
6722 IN UINT64 Value
6723 );
6724
6725
6726 /**
6727 Writes the current value of 64-bit MMX Register #5 (MM5).
6728
6729 Writes the current value of MM5. This function is only available on IA32 and
6730 X64.
6731
6732 @param Value The 64-bit value to write to MM5.
6733
6734 **/
6735 VOID
6736 EFIAPI
6737 AsmWriteMm5 (
6738 IN UINT64 Value
6739 );
6740
6741
6742 /**
6743 Writes the current value of 64-bit MMX Register #6 (MM6).
6744
6745 Writes the current value of MM6. This function is only available on IA32 and
6746 X64.
6747
6748 @param Value The 64-bit value to write to MM6.
6749
6750 **/
6751 VOID
6752 EFIAPI
6753 AsmWriteMm6 (
6754 IN UINT64 Value
6755 );
6756
6757
6758 /**
6759 Writes the current value of 64-bit MMX Register #7 (MM7).
6760
6761 Writes the current value of MM7. This function is only available on IA32 and
6762 X64.
6763
6764 @param Value The 64-bit value to write to MM7.
6765
6766 **/
6767 VOID
6768 EFIAPI
6769 AsmWriteMm7 (
6770 IN UINT64 Value
6771 );
6772
6773
6774 /**
6775 Reads the current value of Time Stamp Counter (TSC).
6776
6777 Reads and returns the current value of TSC. This function is only available
6778 on IA-32 and X64.
6779
6780 @return The current value of TSC
6781
6782 **/
6783 UINT64
6784 EFIAPI
6785 AsmReadTsc (
6786 VOID
6787 );
6788
6789
6790 /**
6791 Reads the current value of a Performance Counter (PMC).
6792
6793 Reads and returns the current value of performance counter specified by
6794 Index. This function is only available on IA-32 and X64.
6795
6796 @param Index The 32-bit Performance Counter index to read.
6797
6798 @return The value of the PMC specified by Index.
6799
6800 **/
6801 UINT64
6802 EFIAPI
6803 AsmReadPmc (
6804 IN UINT32 Index
6805 );
6806
6807
6808 /**
6809 Sets up a monitor buffer that is used by AsmMwait().
6810
6811 Executes a MONITOR instruction with the register state specified by Eax, Ecx
6812 and Edx. Returns Eax. This function is only available on IA-32 and X64.
6813
6814 @param Eax The value to load into EAX or RAX before executing the MONITOR
6815 instruction.
6816 @param Ecx The value to load into ECX or RCX before executing the MONITOR
6817 instruction.
6818 @param Edx The value to load into EDX or RDX before executing the MONITOR
6819 instruction.
6820
6821 @return Eax
6822
6823 **/
6824 UINTN
6825 EFIAPI
6826 AsmMonitor (
6827 IN UINTN Eax,
6828 IN UINTN Ecx,
6829 IN UINTN Edx
6830 );
6831
6832
6833 /**
6834 Executes an MWAIT instruction.
6835
6836 Executes an MWAIT instruction with the register state specified by Eax and
6837 Ecx. Returns Eax. This function is only available on IA-32 and X64.
6838
6839 @param Eax The value to load into EAX or RAX before executing the MONITOR
6840 instruction.
6841 @param Ecx The value to load into ECX or RCX before executing the MONITOR
6842 instruction.
6843
6844 @return Eax
6845
6846 **/
6847 UINTN
6848 EFIAPI
6849 AsmMwait (
6850 IN UINTN Eax,
6851 IN UINTN Ecx
6852 );
6853
6854
6855 /**
6856 Executes a WBINVD instruction.
6857
6858 Executes a WBINVD instruction. This function is only available on IA-32 and
6859 X64.
6860
6861 **/
6862 VOID
6863 EFIAPI
6864 AsmWbinvd (
6865 VOID
6866 );
6867
6868
6869 /**
6870 Executes a INVD instruction.
6871
6872 Executes a INVD instruction. This function is only available on IA-32 and
6873 X64.
6874
6875 **/
6876 VOID
6877 EFIAPI
6878 AsmInvd (
6879 VOID
6880 );
6881
6882
6883 /**
6884 Flushes a cache line from all the instruction and data caches within the
6885 coherency domain of the CPU.
6886
6887 Flushed the cache line specified by LinearAddress, and returns LinearAddress.
6888 This function is only available on IA-32 and X64.
6889
6890 @param LinearAddress The address of the cache line to flush. If the CPU is
6891 in a physical addressing mode, then LinearAddress is a
6892 physical address. If the CPU is in a virtual
6893 addressing mode, then LinearAddress is a virtual
6894 address.
6895
6896 @return LinearAddress
6897 **/
6898 VOID *
6899 EFIAPI
6900 AsmFlushCacheLine (
6901 IN VOID *LinearAddress
6902 );
6903
6904
6905 /**
6906 Enables the 32-bit paging mode on the CPU.
6907
6908 Enables the 32-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables
6909 must be properly initialized prior to calling this service. This function
6910 assumes the current execution mode is 32-bit protected mode. This function is
6911 only available on IA-32. After the 32-bit paging mode is enabled, control is
6912 transferred to the function specified by EntryPoint using the new stack
6913 specified by NewStack and passing in the parameters specified by Context1 and
6914 Context2. Context1 and Context2 are optional and may be NULL. The function
6915 EntryPoint must never return.
6916
6917 If the current execution mode is not 32-bit protected mode, then ASSERT().
6918 If EntryPoint is NULL, then ASSERT().
6919 If NewStack is NULL, then ASSERT().
6920
6921 There are a number of constraints that must be followed before calling this
6922 function:
6923 1) Interrupts must be disabled.
6924 2) The caller must be in 32-bit protected mode with flat descriptors. This
6925 means all descriptors must have a base of 0 and a limit of 4GB.
6926 3) CR0 and CR4 must be compatible with 32-bit protected mode with flat
6927 descriptors.
6928 4) CR3 must point to valid page tables that will be used once the transition
6929 is complete, and those page tables must guarantee that the pages for this
6930 function and the stack are identity mapped.
6931
6932 @param EntryPoint A pointer to function to call with the new stack after
6933 paging is enabled.
6934 @param Context1 A pointer to the context to pass into the EntryPoint
6935 function as the first parameter after paging is enabled.
6936 @param Context2 A pointer to the context to pass into the EntryPoint
6937 function as the second parameter after paging is enabled.
6938 @param NewStack A pointer to the new stack to use for the EntryPoint
6939 function after paging is enabled.
6940
6941 **/
6942 VOID
6943 EFIAPI
6944 AsmEnablePaging32 (
6945 IN SWITCH_STACK_ENTRY_POINT EntryPoint,
6946 IN VOID *Context1, OPTIONAL
6947 IN VOID *Context2, OPTIONAL
6948 IN VOID *NewStack
6949 );
6950
6951
6952 /**
6953 Disables the 32-bit paging mode on the CPU.
6954
6955 Disables the 32-bit paging mode on the CPU and returns to 32-bit protected
6956 mode. This function assumes the current execution mode is 32-paged protected
6957 mode. This function is only available on IA-32. After the 32-bit paging mode
6958 is disabled, control is transferred to the function specified by EntryPoint
6959 using the new stack specified by NewStack and passing in the parameters
6960 specified by Context1 and Context2. Context1 and Context2 are optional and
6961 may be NULL. The function EntryPoint must never return.
6962
6963 If the current execution mode is not 32-bit paged mode, then ASSERT().
6964 If EntryPoint is NULL, then ASSERT().
6965 If NewStack is NULL, then ASSERT().
6966
6967 There are a number of constraints that must be followed before calling this
6968 function:
6969 1) Interrupts must be disabled.
6970 2) The caller must be in 32-bit paged mode.
6971 3) CR0, CR3, and CR4 must be compatible with 32-bit paged mode.
6972 4) CR3 must point to valid page tables that guarantee that the pages for
6973 this function and the stack are identity mapped.
6974
6975 @param EntryPoint A pointer to function to call with the new stack after
6976 paging is disabled.
6977 @param Context1 A pointer to the context to pass into the EntryPoint
6978 function as the first parameter after paging is disabled.
6979 @param Context2 A pointer to the context to pass into the EntryPoint
6980 function as the second parameter after paging is
6981 disabled.
6982 @param NewStack A pointer to the new stack to use for the EntryPoint
6983 function after paging is disabled.
6984
6985 **/
6986 VOID
6987 EFIAPI
6988 AsmDisablePaging32 (
6989 IN SWITCH_STACK_ENTRY_POINT EntryPoint,
6990 IN VOID *Context1, OPTIONAL
6991 IN VOID *Context2, OPTIONAL
6992 IN VOID *NewStack
6993 );
6994
6995
6996 /**
6997 Enables the 64-bit paging mode on the CPU.
6998
6999 Enables the 64-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables
7000 must be properly initialized prior to calling this service. This function
7001 assumes the current execution mode is 32-bit protected mode with flat
7002 descriptors. This function is only available on IA-32. After the 64-bit
7003 paging mode is enabled, control is transferred to the function specified by
7004 EntryPoint using the new stack specified by NewStack and passing in the
7005 parameters specified by Context1 and Context2. Context1 and Context2 are
7006 optional and may be 0. The function EntryPoint must never return.
7007
7008 If the current execution mode is not 32-bit protected mode with flat
7009 descriptors, then ASSERT().
7010 If EntryPoint is 0, then ASSERT().
7011 If NewStack is 0, then ASSERT().
7012
7013 @param Cs The 16-bit selector to load in the CS before EntryPoint
7014 is called. The descriptor in the GDT that this selector
7015 references must be setup for long mode.
7016 @param EntryPoint The 64-bit virtual address of the function to call with
7017 the new stack after paging is enabled.
7018 @param Context1 The 64-bit virtual address of the context to pass into
7019 the EntryPoint function as the first parameter after
7020 paging is enabled.
7021 @param Context2 The 64-bit virtual address of the context to pass into
7022 the EntryPoint function as the second parameter after
7023 paging is enabled.
7024 @param NewStack The 64-bit virtual address of the new stack to use for
7025 the EntryPoint function after paging is enabled.
7026
7027 **/
7028 VOID
7029 EFIAPI
7030 AsmEnablePaging64 (
7031 IN UINT16 Cs,
7032 IN UINT64 EntryPoint,
7033 IN UINT64 Context1, OPTIONAL
7034 IN UINT64 Context2, OPTIONAL
7035 IN UINT64 NewStack
7036 );
7037
7038
7039 /**
7040 Disables the 64-bit paging mode on the CPU.
7041
7042 Disables the 64-bit paging mode on the CPU and returns to 32-bit protected
7043 mode. This function assumes the current execution mode is 64-paging mode.
7044 This function is only available on X64. After the 64-bit paging mode is
7045 disabled, control is transferred to the function specified by EntryPoint
7046 using the new stack specified by NewStack and passing in the parameters
7047 specified by Context1 and Context2. Context1 and Context2 are optional and
7048 may be 0. The function EntryPoint must never return.
7049
7050 If the current execution mode is not 64-bit paged mode, then ASSERT().
7051 If EntryPoint is 0, then ASSERT().
7052 If NewStack is 0, then ASSERT().
7053
7054 @param Cs The 16-bit selector to load in the CS before EntryPoint
7055 is called. The descriptor in the GDT that this selector
7056 references must be setup for 32-bit protected mode.
7057 @param EntryPoint The 64-bit virtual address of the function to call with
7058 the new stack after paging is disabled.
7059 @param Context1 The 64-bit virtual address of the context to pass into
7060 the EntryPoint function as the first parameter after
7061 paging is disabled.
7062 @param Context2 The 64-bit virtual address of the context to pass into
7063 the EntryPoint function as the second parameter after
7064 paging is disabled.
7065 @param NewStack The 64-bit virtual address of the new stack to use for
7066 the EntryPoint function after paging is disabled.
7067
7068 **/
7069 VOID
7070 EFIAPI
7071 AsmDisablePaging64 (
7072 IN UINT16 Cs,
7073 IN UINT32 EntryPoint,
7074 IN UINT32 Context1, OPTIONAL
7075 IN UINT32 Context2, OPTIONAL
7076 IN UINT32 NewStack
7077 );
7078
7079
7080 //
7081 // 16-bit thunking services
7082 //
7083
7084 /**
7085 Retrieves the properties for 16-bit thunk functions.
7086
7087 Computes the size of the buffer and stack below 1MB required to use the
7088 AsmPrepareThunk16(), AsmThunk16() and AsmPrepareAndThunk16() functions. This
7089 buffer size is returned in RealModeBufferSize, and the stack size is returned
7090 in ExtraStackSize. If parameters are passed to the 16-bit real mode code,
7091 then the actual minimum stack size is ExtraStackSize plus the maximum number
7092 of bytes that need to be passed to the 16-bit real mode code.
7093
7094 If RealModeBufferSize is NULL, then ASSERT().
7095 If ExtraStackSize is NULL, then ASSERT().
7096
7097 @param RealModeBufferSize A pointer to the size of the buffer below 1MB
7098 required to use the 16-bit thunk functions.
7099 @param ExtraStackSize A pointer to the extra size of stack below 1MB
7100 that the 16-bit thunk functions require for
7101 temporary storage in the transition to and from
7102 16-bit real mode.
7103
7104 **/
7105 VOID
7106 EFIAPI
7107 AsmGetThunk16Properties (
7108 OUT UINT32 *RealModeBufferSize,
7109 OUT UINT32 *ExtraStackSize
7110 );
7111
7112
7113 /**
7114 Prepares all structures a code required to use AsmThunk16().
7115
7116 Prepares all structures and code required to use AsmThunk16().
7117
7118 If ThunkContext is NULL, then ASSERT().
7119
7120 @param ThunkContext A pointer to the context structure that describes the
7121 16-bit real mode code to call.
7122
7123 **/
7124 VOID
7125 EFIAPI
7126 AsmPrepareThunk16 (
7127 OUT THUNK_CONTEXT *ThunkContext
7128 );
7129
7130
7131 /**
7132 Transfers control to a 16-bit real mode entry point and returns the results.
7133
7134 Transfers control to a 16-bit real mode entry point and returns the results.
7135 AsmPrepareThunk16() must be called with ThunkContext before this function is used.
7136 This function must be called with interrupts disabled.
7137
7138 The register state from the RealModeState field of ThunkContext is restored just prior
7139 to calling the 16-bit real mode entry point. This includes the EFLAGS field of RealModeState,
7140 which is used to set the interrupt state when a 16-bit real mode entry point is called.
7141 Control is transferred to the 16-bit real mode entry point specified by the CS and Eip fields of RealModeState.
7142 The stack is initialized to the SS and ESP fields of RealModeState. Any parameters passed to
7143 the 16-bit real mode code must be populated by the caller at SS:ESP prior to calling this function.
7144 The 16-bit real mode entry point is invoked with a 16-bit CALL FAR instruction,
7145 so when accessing stack contents, the 16-bit real mode code must account for the 16-bit segment
7146 and 16-bit offset of the return address that were pushed onto the stack. The 16-bit real mode entry
7147 point must exit with a RETF instruction. The register state is captured into RealModeState immediately
7148 after the RETF instruction is executed.
7149
7150 If EFLAGS specifies interrupts enabled, or any of the 16-bit real mode code enables interrupts,
7151 or any of the 16-bit real mode code makes a SW interrupt, then the caller is responsible for making sure
7152 the IDT at address 0 is initialized to handle any HW or SW interrupts that may occur while in 16-bit real mode.
7153
7154 If EFLAGS specifies interrupts enabled, or any of the 16-bit real mode code enables interrupts,
7155 then the caller is responsible for making sure the 8259 PIC is in a state compatible with 16-bit real mode.
7156 This includes the base vectors, the interrupt masks, and the edge/level trigger mode.
7157
7158 If THUNK_ATTRIBUTE_BIG_REAL_MODE is set in the ThunkAttributes field of ThunkContext, then the user code
7159 is invoked in big real mode. Otherwise, the user code is invoked in 16-bit real mode with 64KB segment limits.
7160
7161 If neither THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 nor THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL are set in
7162 ThunkAttributes, then it is assumed that the user code did not enable the A20 mask, and no attempt is made to
7163 disable the A20 mask.
7164
7165 If THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 is set and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL is clear in
7166 ThunkAttributes, then attempt to use the INT 15 service to disable the A20 mask. If this INT 15 call fails,
7167 then attempt to disable the A20 mask by directly accessing the 8042 keyboard controller I/O ports.
7168
7169 If THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 is clear and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL is set in
7170 ThunkAttributes, then attempt to disable the A20 mask by directly accessing the 8042 keyboard controller I/O ports.
7171
7172 If ThunkContext is NULL, then ASSERT().
7173 If AsmPrepareThunk16() was not previously called with ThunkContext, then ASSERT().
7174 If both THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL are set in
7175 ThunkAttributes, then ASSERT().
7176
7177 @param ThunkContext A pointer to the context structure that describes the
7178 16-bit real mode code to call.
7179
7180 **/
7181 VOID
7182 EFIAPI
7183 AsmThunk16 (
7184 IN OUT THUNK_CONTEXT *ThunkContext
7185 );
7186
7187
7188 /**
7189 Prepares all structures and code for a 16-bit real mode thunk, transfers
7190 control to a 16-bit real mode entry point, and returns the results.
7191
7192 Prepares all structures and code for a 16-bit real mode thunk, transfers
7193 control to a 16-bit real mode entry point, and returns the results. If the
7194 caller only need to perform a single 16-bit real mode thunk, then this
7195 service should be used. If the caller intends to make more than one 16-bit
7196 real mode thunk, then it is more efficient if AsmPrepareThunk16() is called
7197 once and AsmThunk16() can be called for each 16-bit real mode thunk.
7198
7199 See AsmPrepareThunk16() and AsmThunk16() for the detailed description and ASSERT() conditions.
7200
7201 @param ThunkContext A pointer to the context structure that describes the
7202 16-bit real mode code to call.
7203
7204 **/
7205 VOID
7206 EFIAPI
7207 AsmPrepareAndThunk16 (
7208 IN OUT THUNK_CONTEXT *ThunkContext
7209 );
7210
7211 #endif
7212 #endif
7213
7214