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git.proxmox.com Git - mirror_edk2.git/blob - MdePkg/Include/Library/S3PciSegmentLib.h
2 The multiple segments PCI configuration Library Services that carry out
3 PCI configuration and enable the PCI operations to be replayed during an
4 S3 resume. This library class maps directly on top of the PciSegmentLib class.
6 Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
7 SPDX-License-Identifier: BSD-2-Clause-Patent
11 #ifndef __S3_PCI_SEGMENT_LIB__
12 #define __S3_PCI_SEGMENT_LIB__
16 Macro that converts PCI Segment, PCI Bus, PCI Device, PCI Function,
17 and PCI Register to an address that can be passed to the S3 PCI Segment Library functions.
19 Computes an address that is compatible with the PCI Segment Library functions.
20 The unused upper bits of Segment, Bus, Device, Function,
21 and Register are stripped prior to the generation of the address.
23 @param Segment PCI Segment number. Range 0..65535.
24 @param Bus PCI Bus number. Range 0..255.
25 @param Device PCI Device number. Range 0..31.
26 @param Function PCI Function number. Range 0..7.
27 @param Register PCI Register number. Range 0..255 for PCI. Range 0..4095 for PCI Express.
29 @return The address that is compatible with the PCI Segment Library functions.
32 #define S3_PCI_SEGMENT_LIB_ADDRESS(Segment,Bus,Device,Function,Register) \
34 ( ((Register) & 0xfff) | \
35 (((Function) & 0x07) << 12) | \
36 (((Device) & 0x1f) << 15) | \
37 (((Bus) & 0xff) << 20) | \
38 (LShiftU64 ((Segment) & 0xffff, 32)) \
40 ( ((Register) & 0xfff) | \
41 (((Function) & 0x07) << 12) | \
42 (((Device) & 0x1f) << 15) | \
43 (((Bus) & 0xff) << 20) \
48 Reads an 8-bit PCI configuration register, and saves the value in the S3 script to
49 be replayed on S3 resume.
51 Reads and returns the 8-bit PCI configuration register specified by Address.
52 This function must guarantee that all PCI read and write operations are serialized.
54 If any reserved bits in Address are set, then ASSERT().
56 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
58 @return The 8-bit PCI configuration register specified by Address.
68 Writes an 8-bit PCI configuration register, and saves the value in the S3 script to
69 be replayed on S3 resume.
71 Writes the 8-bit PCI configuration register specified by Address with the value specified by Value.
72 Value is returned. This function must guarantee that all PCI read and write operations are serialized.
74 If any reserved bits in Address are set, then ASSERT().
76 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
77 @param Value The value to write.
79 @return The value written to the PCI configuration register.
90 Performs a bitwise OR of an 8-bit PCI configuration register with an 8-bit value, and saves
91 the value in the S3 script to be replayed on S3 resume.
93 Reads the 8-bit PCI configuration register specified by Address,
94 performs a bitwise OR between the read result and the value specified by OrData,
95 and writes the result to the 8-bit PCI configuration register specified by Address.
96 The value written to the PCI configuration register is returned.
97 This function must guarantee that all PCI read and write operations are serialized.
99 If any reserved bits in Address are set, then ASSERT().
101 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
102 @param OrData The value to OR with the PCI configuration register.
104 @return The value written to the PCI configuration register.
115 Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit value, and
116 saves the value in the S3 script to be replayed on S3 resume.
118 Reads the 8-bit PCI configuration register specified by Address,
119 performs a bitwise AND between the read result and the value specified by AndData,
120 and writes the result to the 8-bit PCI configuration register specified by Address.
121 The value written to the PCI configuration register is returned.
122 This function must guarantee that all PCI read and write operations are serialized.
123 If any reserved bits in Address are set, then ASSERT().
125 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
126 @param AndData The value to AND with the PCI configuration register.
128 @return The value written to the PCI configuration register.
139 Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit value,
140 followed a bitwise OR with another 8-bit value, and saves the value in the S3 script to
141 be replayed on S3 resume.
143 Reads the 8-bit PCI configuration register specified by Address,
144 performs a bitwise AND between the read result and the value specified by AndData,
145 performs a bitwise OR between the result of the AND operation and the value specified by OrData,
146 and writes the result to the 8-bit PCI configuration register specified by Address.
147 The value written to the PCI configuration register is returned.
148 This function must guarantee that all PCI read and write operations are serialized.
150 If any reserved bits in Address are set, then ASSERT().
152 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
153 @param AndData The value to AND with the PCI configuration register.
154 @param OrData The value to OR with the PCI configuration register.
156 @return The value written to the PCI configuration register.
161 S3PciSegmentAndThenOr8 (
168 Reads a bit field of a PCI configuration register, and saves the value in the
169 S3 script to be replayed on S3 resume.
171 Reads the bit field in an 8-bit PCI configuration register. The bit field is
172 specified by the StartBit and the EndBit. The value of the bit field is
175 If any reserved bits in Address are set, then ASSERT().
176 If StartBit is greater than 7, then ASSERT().
177 If EndBit is greater than 7, then ASSERT().
178 If EndBit is less than StartBit, then ASSERT().
180 @param Address PCI configuration register to read.
181 @param StartBit The ordinal of the least significant bit in the bit field.
183 @param EndBit The ordinal of the most significant bit in the bit field.
186 @return The value of the bit field read from the PCI configuration register.
191 S3PciSegmentBitFieldRead8 (
198 Writes a bit field to a PCI configuration register, and saves the value in
199 the S3 script to be replayed on S3 resume.
201 Writes Value to the bit field of the PCI configuration register. The bit
202 field is specified by the StartBit and the EndBit. All other bits in the
203 destination PCI configuration register are preserved. The new value of the
204 8-bit register is returned.
206 If any reserved bits in Address are set, then ASSERT().
207 If StartBit is greater than 7, then ASSERT().
208 If EndBit is greater than 7, then ASSERT().
209 If EndBit is less than StartBit, then ASSERT().
210 If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
212 @param Address PCI configuration register to write.
213 @param StartBit The ordinal of the least significant bit in the bit field.
215 @param EndBit The ordinal of the most significant bit in the bit field.
217 @param Value New value of the bit field.
219 @return The value written back to the PCI configuration register.
224 S3PciSegmentBitFieldWrite8 (
232 Reads a bit field in an 8-bit PCI configuration, performs a bitwise OR, writes
233 the result back to the bit field in the 8-bit port, and saves the value in the
234 S3 script to be replayed on S3 resume.
236 Reads the 8-bit PCI configuration register specified by Address, performs a
237 bitwise OR between the read result and the value specified by
238 OrData, and writes the result to the 8-bit PCI configuration register
239 specified by Address. The value written to the PCI configuration register is
240 returned. This function must guarantee that all PCI read and write operations
241 are serialized. Extra left bits in OrData are stripped.
243 If any reserved bits in Address are set, then ASSERT().
244 If StartBit is greater than 7, then ASSERT().
245 If EndBit is greater than 7, then ASSERT().
246 If EndBit is less than StartBit, then ASSERT().
247 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
249 @param Address PCI configuration register to write.
250 @param StartBit The ordinal of the least significant bit in the bit field.
252 @param EndBit The ordinal of the most significant bit in the bit field.
254 @param OrData The value to OR with the PCI configuration register.
256 @return The value written back to the PCI configuration register.
261 S3PciSegmentBitFieldOr8 (
269 Reads a bit field in an 8-bit PCI configuration register, performs a bitwise
270 AND, writes the result back to the bit field in the 8-bit register, and
271 saves the value in the S3 script to be replayed on S3 resume.
273 Reads the 8-bit PCI configuration register specified by Address, performs a
274 bitwise AND between the read result and the value specified by AndData, and
275 writes the result to the 8-bit PCI configuration register specified by
276 Address. The value written to the PCI configuration register is returned.
277 This function must guarantee that all PCI read and write operations are
278 serialized. Extra left bits in AndData are stripped.
280 If any reserved bits in Address are set, then ASSERT().
281 If StartBit is greater than 7, then ASSERT().
282 If EndBit is greater than 7, then ASSERT().
283 If EndBit is less than StartBit, then ASSERT().
284 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
286 @param Address PCI configuration register to write.
287 @param StartBit The ordinal of the least significant bit in the bit field.
289 @param EndBit The ordinal of the most significant bit in the bit field.
291 @param AndData The value to AND with the PCI configuration register.
293 @return The value written back to the PCI configuration register.
298 S3PciSegmentBitFieldAnd8 (
306 Reads a bit field in an 8-bit port, performs a bitwise AND followed by a
307 bitwise OR, writes the result back to the bit field in the 8-bit port,
308 and saves the value in the S3 script to be replayed on S3 resume.
310 Reads the 8-bit PCI configuration register specified by Address, performs a
311 bitwise AND followed by a bitwise OR between the read result and
312 the value specified by AndData, and writes the result to the 8-bit PCI
313 configuration register specified by Address. The value written to the PCI
314 configuration register is returned. This function must guarantee that all PCI
315 read and write operations are serialized. Extra left bits in both AndData and
318 If any reserved bits in Address are set, then ASSERT().
319 If StartBit is greater than 7, then ASSERT().
320 If EndBit is greater than 7, then ASSERT().
321 If EndBit is less than StartBit, then ASSERT().
322 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
323 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
325 @param Address PCI configuration register to write.
326 @param StartBit The ordinal of the least significant bit in the bit field.
328 @param EndBit The ordinal of the most significant bit in the bit field.
330 @param AndData The value to AND with the PCI configuration register.
331 @param OrData The value to OR with the result of the AND operation.
333 @return The value written back to the PCI configuration register.
338 S3PciSegmentBitFieldAndThenOr8 (
347 Reads a 16-bit PCI configuration register, and saves the value in the S3 script
348 to be replayed on S3 resume.
350 Reads and returns the 16-bit PCI configuration register specified by Address.
351 This function must guarantee that all PCI read and write operations are serialized.
353 If any reserved bits in Address are set, then ASSERT().
354 If Address is not aligned on a 16-bit boundary, then ASSERT().
356 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
358 @return The 16-bit PCI configuration register specified by Address.
368 Writes a 16-bit PCI configuration register, and saves the value in the S3 script to
369 be replayed on S3 resume.
371 Writes the 16-bit PCI configuration register specified by Address with the value specified by Value.
372 Value is returned. This function must guarantee that all PCI read and write operations are serialized.
374 If any reserved bits in Address are set, then ASSERT().
375 If Address is not aligned on a 16-bit boundary, then ASSERT().
377 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
378 @param Value The value to write.
380 @return The parameter of Value.
385 S3PciSegmentWrite16 (
391 Performs a bitwise OR of a 16-bit PCI configuration register with a 16-bit
392 value, and saves the value in the S3 script to be replayed on S3 resume.
394 Reads the 16-bit PCI configuration register specified by Address, performs a
395 bitwise OR between the read result and the value specified by OrData, and
396 writes the result to the 16-bit PCI configuration register specified by Address.
397 The value written to the PCI configuration register is returned. This function
398 must guarantee that all PCI read and write operations are serialized.
400 If any reserved bits in Address are set, then ASSERT().
401 If Address is not aligned on a 16-bit boundary, then ASSERT().
403 @param Address Address that encodes the PCI Segment, Bus, Device, Function and
405 @param OrData The value to OR with the PCI configuration register.
407 @return The value written back to the PCI configuration register.
418 Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit value, and
419 saves the value in the S3 script to be replayed on S3 resume.
421 Reads the 16-bit PCI configuration register specified by Address,
422 performs a bitwise AND between the read result and the value specified by AndData,
423 and writes the result to the 16-bit PCI configuration register specified by Address.
424 The value written to the PCI configuration register is returned.
425 This function must guarantee that all PCI read and write operations are serialized.
427 If any reserved bits in Address are set, then ASSERT().
428 If Address is not aligned on a 16-bit boundary, then ASSERT().
430 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
431 @param AndData The value to AND with the PCI configuration register.
433 @return The value written to the PCI configuration register.
444 Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit value,
445 followed a bitwise OR with another 16-bit value, and saves the value in the S3 script to
446 be replayed on S3 resume.
448 Reads the 16-bit PCI configuration register specified by Address,
449 performs a bitwise AND between the read result and the value specified by AndData,
450 performs a bitwise OR between the result of the AND operation and the value specified by OrData,
451 and writes the result to the 16-bit PCI configuration register specified by Address.
452 The value written to the PCI configuration register is returned.
453 This function must guarantee that all PCI read and write operations are serialized.
455 If any reserved bits in Address are set, then ASSERT().
456 If Address is not aligned on a 16-bit boundary, then ASSERT().
458 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
459 @param AndData The value to AND with the PCI configuration register.
460 @param OrData The value to OR with the PCI configuration register.
462 @return The value written to the PCI configuration register.
467 S3PciSegmentAndThenOr16 (
474 Reads a bit field of a PCI configuration register, and saves the value in the
475 S3 script to be replayed on S3 resume.
477 Reads the bit field in a 16-bit PCI configuration register. The bit field is
478 specified by the StartBit and the EndBit. The value of the bit field is
481 If any reserved bits in Address are set, then ASSERT().
482 If Address is not aligned on a 16-bit boundary, then ASSERT().
483 If StartBit is greater than 15, then ASSERT().
484 If EndBit is greater than 15, then ASSERT().
485 If EndBit is less than StartBit, then ASSERT().
487 @param Address PCI configuration register to read.
488 @param StartBit The ordinal of the least significant bit in the bit field.
490 @param EndBit The ordinal of the most significant bit in the bit field.
493 @return The value of the bit field read from the PCI configuration register.
498 S3PciSegmentBitFieldRead16 (
505 Writes a bit field to a PCI configuration register, and saves the value in
506 the S3 script to be replayed on S3 resume.
508 Writes Value to the bit field of the PCI configuration register. The bit
509 field is specified by the StartBit and the EndBit. All other bits in the
510 destination PCI configuration register are preserved. The new value of the
511 16-bit register is returned.
513 If any reserved bits in Address are set, then ASSERT().
514 If Address is not aligned on a 16-bit boundary, then ASSERT().
515 If StartBit is greater than 15, then ASSERT().
516 If EndBit is greater than 15, then ASSERT().
517 If EndBit is less than StartBit, then ASSERT().
518 If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
520 @param Address PCI configuration register to write.
521 @param StartBit The ordinal of the least significant bit in the bit field.
523 @param EndBit The ordinal of the most significant bit in the bit field.
525 @param Value New value of the bit field.
527 @return The value written back to the PCI configuration register.
532 S3PciSegmentBitFieldWrite16 (
540 Reads a bit field in a 16-bit PCI configuration, performs a bitwise OR, writes
541 the result back to the bit field in the 16-bit port, and saves the value in the
542 S3 script to be replayed on S3 resume.
544 Reads the 16-bit PCI configuration register specified by Address, performs a
545 bitwise OR between the read result and the value specified by
546 OrData, and writes the result to the 16-bit PCI configuration register
547 specified by Address. The value written to the PCI configuration register is
548 returned. This function must guarantee that all PCI read and write operations
549 are serialized. Extra left bits in OrData are stripped.
551 If any reserved bits in Address are set, then ASSERT().
552 If Address is not aligned on a 16-bit boundary, then ASSERT().
553 If StartBit is greater than 15, then ASSERT().
554 If EndBit is greater than 15, then ASSERT().
555 If EndBit is less than StartBit, then ASSERT().
556 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
558 @param Address PCI configuration register to write.
559 @param StartBit The ordinal of the least significant bit in the bit field.
561 @param EndBit The ordinal of the most significant bit in the bit field.
563 @param OrData The value to OR with the PCI configuration register.
565 @return The value written back to the PCI configuration register.
570 S3PciSegmentBitFieldOr16 (
578 Reads a bit field in a 16-bit PCI configuration register, performs a bitwise
579 AND, writes the result back to the bit field in the 16-bit register, and
580 saves the value in the S3 script to be replayed on S3 resume.
582 Reads the 16-bit PCI configuration register specified by Address, performs a
583 bitwise AND between the read result and the value specified by AndData, and
584 writes the result to the 16-bit PCI configuration register specified by
585 Address. The value written to the PCI configuration register is returned.
586 This function must guarantee that all PCI read and write operations are
587 serialized. Extra left bits in AndData are stripped.
589 If any reserved bits in Address are set, then ASSERT().
590 If Address is not aligned on a 16-bit boundary, then ASSERT().
591 If StartBit is greater than 15, then ASSERT().
592 If EndBit is greater than 15, then ASSERT().
593 If EndBit is less than StartBit, then ASSERT().
594 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
596 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
597 @param StartBit The ordinal of the least significant bit in the bit field.
599 @param EndBit The ordinal of the most significant bit in the bit field.
601 @param AndData The value to AND with the PCI configuration register.
603 @return The value written back to the PCI configuration register.
608 S3PciSegmentBitFieldAnd16 (
616 Reads a bit field in a 16-bit port, performs a bitwise AND followed by a
617 bitwise OR, writes the result back to the bit field in the 16-bit port,
618 and saves the value in the S3 script to be replayed on S3 resume.
620 Reads the 16-bit PCI configuration register specified by Address, performs a
621 bitwise AND followed by a bitwise OR between the read result and
622 the value specified by AndData, and writes the result to the 16-bit PCI
623 configuration register specified by Address. The value written to the PCI
624 configuration register is returned. This function must guarantee that all PCI
625 read and write operations are serialized. Extra left bits in both AndData and
628 If any reserved bits in Address are set, then ASSERT().
629 If StartBit is greater than 15, then ASSERT().
630 If EndBit is greater than 15, then ASSERT().
631 If EndBit is less than StartBit, then ASSERT().
632 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
633 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
635 @param Address PCI configuration register to write.
636 @param StartBit The ordinal of the least significant bit in the bit field.
638 @param EndBit The ordinal of the most significant bit in the bit field.
640 @param AndData The value to AND with the PCI configuration register.
641 @param OrData The value to OR with the result of the AND operation.
643 @return The value written back to the PCI configuration register.
648 S3PciSegmentBitFieldAndThenOr16 (
657 Reads a 32-bit PCI configuration register, and saves the value in the S3 script
658 to be replayed on S3 resume.
660 Reads and returns the 32-bit PCI configuration register specified by Address.
661 This function must guarantee that all PCI read and write operations are serialized.
663 If any reserved bits in Address are set, then ASSERT().
664 If Address is not aligned on a 32-bit boundary, then ASSERT().
666 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
668 @return The 32-bit PCI configuration register specified by Address.
678 Writes a 32-bit PCI configuration register, and saves the value in the S3 script to
679 be replayed on S3 resume.
681 Writes the 32-bit PCI configuration register specified by Address with the value specified by Value.
682 Value is returned. This function must guarantee that all PCI read and write operations are serialized.
684 If any reserved bits in Address are set, then ASSERT().
685 If Address is not aligned on a 32-bit boundary, then ASSERT().
687 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
688 @param Value The value to write.
690 @return The parameter of Value.
695 S3PciSegmentWrite32 (
701 Performs a bitwise OR of a 32-bit PCI configuration register with a 32-bit
702 value, and saves the value in the S3 script to be replayed on S3 resume.
704 Reads the 32-bit PCI configuration register specified by Address, performs a
705 bitwise OR between the read result and the value specified by OrData, and
706 writes the result to the 32-bit PCI configuration register specified by Address.
707 The value written to the PCI configuration register is returned. This function
708 must guarantee that all PCI read and write operations are serialized.
710 If any reserved bits in Address are set, then ASSERT().
711 If Address is not aligned on a 32-bit boundary, then ASSERT().
713 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and
715 @param OrData The value to OR with the PCI configuration register.
717 @return The value written back to the PCI configuration register.
728 Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit value, and
729 saves the value in the S3 script to be replayed on S3 resume.
731 Reads the 32-bit PCI configuration register specified by Address,
732 performs a bitwise AND between the read result and the value specified by AndData,
733 and writes the result to the 32-bit PCI configuration register specified by Address.
734 The value written to the PCI configuration register is returned.
735 This function must guarantee that all PCI read and write operations are serialized.
737 If any reserved bits in Address are set, then ASSERT().
738 If Address is not aligned on a 32-bit boundary, then ASSERT().
740 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
741 @param AndData The value to AND with the PCI configuration register.
743 @return The value written to the PCI configuration register.
754 Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit value,
755 followed a bitwise OR with another 32-bit value, and saves the value in the S3 script to
756 be replayed on S3 resume.
758 Reads the 32-bit PCI configuration register specified by Address,
759 performs a bitwise AND between the read result and the value specified by AndData,
760 performs a bitwise OR between the result of the AND operation and the value specified by OrData,
761 and writes the result to the 32-bit PCI configuration register specified by Address.
762 The value written to the PCI configuration register is returned.
763 This function must guarantee that all PCI read and write operations are serialized.
765 If any reserved bits in Address are set, then ASSERT().
766 If Address is not aligned on a 32-bit boundary, then ASSERT().
768 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
769 @param AndData The value to AND with the PCI configuration register.
770 @param OrData The value to OR with the PCI configuration register.
772 @return The value written to the PCI configuration register.
777 S3PciSegmentAndThenOr32 (
784 Reads a bit field of a PCI configuration register, and saves the value in the
785 S3 script to be replayed on S3 resume.
787 Reads the bit field in a 32-bit PCI configuration register. The bit field is
788 specified by the StartBit and the EndBit. The value of the bit field is
791 If any reserved bits in Address are set, then ASSERT().
792 If Address is not aligned on a 32-bit boundary, then ASSERT().
793 If StartBit is greater than 31, then ASSERT().
794 If EndBit is greater than 31, then ASSERT().
795 If EndBit is less than StartBit, then ASSERT().
797 @param Address PCI configuration register to read.
798 @param StartBit The ordinal of the least significant bit in the bit field.
800 @param EndBit The ordinal of the most significant bit in the bit field.
803 @return The value of the bit field read from the PCI configuration register.
808 S3PciSegmentBitFieldRead32 (
815 Writes a bit field to a PCI configuration register, and saves the value in
816 the S3 script to be replayed on S3 resume.
818 Writes Value to the bit field of the PCI configuration register. The bit
819 field is specified by the StartBit and the EndBit. All other bits in the
820 destination PCI configuration register are preserved. The new value of the
821 32-bit register is returned.
823 If any reserved bits in Address are set, then ASSERT().
824 If Address is not aligned on a 32-bit boundary, then ASSERT().
825 If StartBit is greater than 31, then ASSERT().
826 If EndBit is greater than 31, then ASSERT().
827 If EndBit is less than StartBit, then ASSERT().
828 If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
830 @param Address PCI configuration register to write.
831 @param StartBit The ordinal of the least significant bit in the bit field.
833 @param EndBit The ordinal of the most significant bit in the bit field.
835 @param Value New value of the bit field.
837 @return The value written back to the PCI configuration register.
842 S3PciSegmentBitFieldWrite32 (
850 Reads a bit field in a 32-bit PCI configuration, performs a bitwise OR, writes
851 the result back to the bit field in the 32-bit port, and saves the value in the
852 S3 script to be replayed on S3 resume.
854 Reads the 32-bit PCI configuration register specified by Address, performs a
855 bitwise OR between the read result and the value specified by
856 OrData, and writes the result to the 32-bit PCI configuration register
857 specified by Address. The value written to the PCI configuration register is
858 returned. This function must guarantee that all PCI read and write operations
859 are serialized. Extra left bits in OrData are stripped.
861 If any reserved bits in Address are set, then ASSERT().
862 If Address is not aligned on a 32-bit boundary, then ASSERT().
863 If StartBit is greater than 31, then ASSERT().
864 If EndBit is greater than 31, then ASSERT().
865 If EndBit is less than StartBit, then ASSERT().
866 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
868 @param Address PCI configuration register to write.
869 @param StartBit The ordinal of the least significant bit in the bit field.
871 @param EndBit The ordinal of the most significant bit in the bit field.
873 @param OrData The value to OR with the PCI configuration register.
875 @return The value written back to the PCI configuration register.
880 S3PciSegmentBitFieldOr32 (
888 Reads a bit field in a 32-bit PCI configuration register, performs a bitwise
889 AND, and writes the result back to the bit field in the 32-bit register, and
890 saves the value in the S3 script to be replayed on S3 resume.
892 Reads the 32-bit PCI configuration register specified by Address, performs a
893 bitwise AND between the read result and the value specified by AndData, and
894 writes the result to the 32-bit PCI configuration register specified by
895 Address. The value written to the PCI configuration register is returned.
896 This function must guarantee that all PCI read and write operations are
897 serialized. Extra left bits in AndData are stripped.
899 If any reserved bits in Address are set, then ASSERT().
900 If Address is not aligned on a 32-bit boundary, then ASSERT().
901 If StartBit is greater than 31, then ASSERT().
902 If EndBit is greater than 31, then ASSERT().
903 If EndBit is less than StartBit, then ASSERT().
904 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
906 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
907 @param StartBit The ordinal of the least significant bit in the bit field.
909 @param EndBit The ordinal of the most significant bit in the bit field.
911 @param AndData The value to AND with the PCI configuration register.
913 @return The value written back to the PCI configuration register.
918 S3PciSegmentBitFieldAnd32 (
926 Reads a bit field in a 32-bit port, performs a bitwise AND followed by a
927 bitwise OR, writes the result back to the bit field in the 32-bit port,
928 and saves the value in the S3 script to be replayed on S3 resume.
930 Reads the 32-bit PCI configuration register specified by Address, performs a
931 bitwise AND followed by a bitwise OR between the read result and
932 the value specified by AndData, and writes the result to the 32-bit PCI
933 configuration register specified by Address. The value written to the PCI
934 configuration register is returned. This function must guarantee that all PCI
935 read and write operations are serialized. Extra left bits in both AndData and
938 If any reserved bits in Address are set, then ASSERT().
939 If StartBit is greater than 31, then ASSERT().
940 If EndBit is greater than 31, then ASSERT().
941 If EndBit is less than StartBit, then ASSERT().
942 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
943 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
945 @param Address PCI configuration register to write.
946 @param StartBit The ordinal of the least significant bit in the bit field.
948 @param EndBit The ordinal of the most significant bit in the bit field.
950 @param AndData The value to AND with the PCI configuration register.
951 @param OrData The value to OR with the result of the AND operation.
953 @return The value written back to the PCI configuration register.
958 S3PciSegmentBitFieldAndThenOr32 (
967 Reads a range of PCI configuration registers into a caller supplied buffer,
968 and saves the value in the S3 script to be replayed on S3 resume.
970 Reads the range of PCI configuration registers specified by StartAddress and
971 Size into the buffer specified by Buffer. This function only allows the PCI
972 configuration registers from a single PCI function to be read. Size is
973 returned. When possible 32-bit PCI configuration read cycles are used to read
974 from StartAdress to StartAddress + Size. Due to alignment restrictions, 8-bit
975 and 16-bit PCI configuration read cycles may be used at the beginning and the
978 If any reserved bits in StartAddress are set, then ASSERT().
979 If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
980 If Size > 0 and Buffer is NULL, then ASSERT().
982 @param StartAddress Starting address that encodes the PCI Segment, Bus, Device,
983 Function and Register.
984 @param Size Size in bytes of the transfer.
985 @param Buffer Pointer to a buffer receiving the data read.
992 S3PciSegmentReadBuffer (
993 IN UINT64 StartAddress
,
999 Copies the data in a caller supplied buffer to a specified range of PCI
1000 configuration space, and saves the value in the S3 script to be replayed on S3
1003 Writes the range of PCI configuration registers specified by StartAddress and
1004 Size from the buffer specified by Buffer. This function only allows the PCI
1005 configuration registers from a single PCI function to be written. Size is
1006 returned. When possible 32-bit PCI configuration write cycles are used to
1007 write from StartAdress to StartAddress + Size. Due to alignment restrictions,
1008 8-bit and 16-bit PCI configuration write cycles may be used at the beginning
1009 and the end of the range.
1011 If any reserved bits in StartAddress are set, then ASSERT().
1012 If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
1013 If Size > 0 and Buffer is NULL, then ASSERT().
1015 @param StartAddress Starting address that encodes the PCI Segment, Bus, Device,
1016 Function and Register.
1017 @param Size Size in bytes of the transfer.
1018 @param Buffer Pointer to a buffer containing the data to write.
1020 @return The parameter of Size.
1025 S3PciSegmentWriteBuffer (
1026 IN UINT64 StartAddress
,