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2 The multiple segments PCI configuration Library Services that carry out
3 PCI configuration and enable the PCI operations to be replayed during an
4 S3 resume. This library class maps directly on top of the PciSegmentLib class.
6 Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
7 This program and the accompanying materials
8 are licensed and made available under the terms and conditions of the BSD License
9 which accompanies this distribution. The full text of the license may be found at
10 http://opensource.org/licenses/bsd-license.php
12 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
13 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
17 #ifndef __S3_PCI_SEGMENT_LIB__
18 #define __S3_PCI_SEGMENT_LIB__
22 Macro that converts PCI Segment, PCI Bus, PCI Device, PCI Function,
23 and PCI Register to an address that can be passed to the S3 PCI Segment Library functions.
25 Computes an address that is compatible with the PCI Segment Library functions.
26 The unused upper bits of Segment, Bus, Device, Function,
27 and Register are stripped prior to the generation of the address.
29 @param Segment PCI Segment number. Range 0..65535.
30 @param Bus PCI Bus number. Range 0..255.
31 @param Device PCI Device number. Range 0..31.
32 @param Function PCI Function number. Range 0..7.
33 @param Register PCI Register number. Range 0..255 for PCI. Range 0..4095 for PCI Express.
35 @return The address that is compatible with the PCI Segment Library functions.
38 #define S3_PCI_SEGMENT_LIB_ADDRESS(Segment,Bus,Device,Function,Register) \
40 ( ((Register) & 0xfff) | \
41 (((Function) & 0x07) << 12) | \
42 (((Device) & 0x1f) << 15) | \
43 (((Bus) & 0xff) << 20) | \
44 (LShiftU64 ((Segment) & 0xffff, 32)) \
46 ( ((Register) & 0xfff) | \
47 (((Function) & 0x07) << 12) | \
48 (((Device) & 0x1f) << 15) | \
49 (((Bus) & 0xff) << 20) \
54 Reads an 8-bit PCI configuration register, and saves the value in the S3 script to
55 be replayed on S3 resume.
57 Reads and returns the 8-bit PCI configuration register specified by Address.
58 This function must guarantee that all PCI read and write operations are serialized.
60 If any reserved bits in Address are set, then ASSERT().
62 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
64 @return The 8-bit PCI configuration register specified by Address.
74 Writes an 8-bit PCI configuration register, and saves the value in the S3 script to
75 be replayed on S3 resume.
77 Writes the 8-bit PCI configuration register specified by Address with the value specified by Value.
78 Value is returned. This function must guarantee that all PCI read and write operations are serialized.
80 If any reserved bits in Address are set, then ASSERT().
82 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
83 @param Value The value to write.
85 @return The value written to the PCI configuration register.
96 Performs a bitwise OR of an 8-bit PCI configuration register with an 8-bit value, and saves
97 the value in the S3 script to be replayed on S3 resume.
99 Reads the 8-bit PCI configuration register specified by Address,
100 performs a bitwise OR between the read result and the value specified by OrData,
101 and writes the result to the 8-bit PCI configuration register specified by Address.
102 The value written to the PCI configuration register is returned.
103 This function must guarantee that all PCI read and write operations are serialized.
105 If any reserved bits in Address are set, then ASSERT().
107 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
108 @param OrData The value to OR with the PCI configuration register.
110 @return The value written to the PCI configuration register.
121 Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit value, and
122 saves the value in the S3 script to be replayed on S3 resume.
124 Reads the 8-bit PCI configuration register specified by Address,
125 performs a bitwise AND between the read result and the value specified by AndData,
126 and writes the result to the 8-bit PCI configuration register specified by Address.
127 The value written to the PCI configuration register is returned.
128 This function must guarantee that all PCI read and write operations are serialized.
129 If any reserved bits in Address are set, then ASSERT().
131 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
132 @param AndData The value to AND with the PCI configuration register.
134 @return The value written to the PCI configuration register.
145 Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit value,
146 followed a bitwise OR with another 8-bit value, and saves the value in the S3 script to
147 be replayed on S3 resume.
149 Reads the 8-bit PCI configuration register specified by Address,
150 performs a bitwise AND between the read result and the value specified by AndData,
151 performs a bitwise OR between the result of the AND operation and the value specified by OrData,
152 and writes the result to the 8-bit PCI configuration register specified by Address.
153 The value written to the PCI configuration register is returned.
154 This function must guarantee that all PCI read and write operations are serialized.
156 If any reserved bits in Address are set, then ASSERT().
158 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
159 @param AndData The value to AND with the PCI configuration register.
160 @param OrData The value to OR with the PCI configuration register.
162 @return The value written to the PCI configuration register.
167 S3PciSegmentAndThenOr8 (
174 Reads a bit field of a PCI configuration register, and saves the value in the
175 S3 script to be replayed on S3 resume.
177 Reads the bit field in an 8-bit PCI configuration register. The bit field is
178 specified by the StartBit and the EndBit. The value of the bit field is
181 If any reserved bits in Address are set, then ASSERT().
182 If StartBit is greater than 7, then ASSERT().
183 If EndBit is greater than 7, then ASSERT().
184 If EndBit is less than StartBit, then ASSERT().
186 @param Address PCI configuration register to read.
187 @param StartBit The ordinal of the least significant bit in the bit field.
189 @param EndBit The ordinal of the most significant bit in the bit field.
192 @return The value of the bit field read from the PCI configuration register.
197 S3PciSegmentBitFieldRead8 (
204 Writes a bit field to a PCI configuration register, and saves the value in
205 the S3 script to be replayed on S3 resume.
207 Writes Value to the bit field of the PCI configuration register. The bit
208 field is specified by the StartBit and the EndBit. All other bits in the
209 destination PCI configuration register are preserved. The new value of the
210 8-bit register is returned.
212 If any reserved bits in Address are set, then ASSERT().
213 If StartBit is greater than 7, then ASSERT().
214 If EndBit is greater than 7, then ASSERT().
215 If EndBit is less than StartBit, then ASSERT().
216 If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
218 @param Address PCI configuration register to write.
219 @param StartBit The ordinal of the least significant bit in the bit field.
221 @param EndBit The ordinal of the most significant bit in the bit field.
223 @param Value New value of the bit field.
225 @return The value written back to the PCI configuration register.
230 S3PciSegmentBitFieldWrite8 (
238 Reads a bit field in an 8-bit PCI configuration, performs a bitwise OR, writes
239 the result back to the bit field in the 8-bit port, and saves the value in the
240 S3 script to be replayed on S3 resume.
242 Reads the 8-bit PCI configuration register specified by Address, performs a
243 bitwise OR between the read result and the value specified by
244 OrData, and writes the result to the 8-bit PCI configuration register
245 specified by Address. The value written to the PCI configuration register is
246 returned. This function must guarantee that all PCI read and write operations
247 are serialized. Extra left bits in OrData are stripped.
249 If any reserved bits in Address are set, then ASSERT().
250 If StartBit is greater than 7, then ASSERT().
251 If EndBit is greater than 7, then ASSERT().
252 If EndBit is less than StartBit, then ASSERT().
253 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
255 @param Address PCI configuration register to write.
256 @param StartBit The ordinal of the least significant bit in the bit field.
258 @param EndBit The ordinal of the most significant bit in the bit field.
260 @param OrData The value to OR with the PCI configuration register.
262 @return The value written back to the PCI configuration register.
267 S3PciSegmentBitFieldOr8 (
275 Reads a bit field in an 8-bit PCI configuration register, performs a bitwise
276 AND, writes the result back to the bit field in the 8-bit register, and
277 saves the value in the S3 script to be replayed on S3 resume.
279 Reads the 8-bit PCI configuration register specified by Address, performs a
280 bitwise AND between the read result and the value specified by AndData, and
281 writes the result to the 8-bit PCI configuration register specified by
282 Address. The value written to the PCI configuration register is returned.
283 This function must guarantee that all PCI read and write operations are
284 serialized. Extra left bits in AndData are stripped.
286 If any reserved bits in Address are set, then ASSERT().
287 If StartBit is greater than 7, then ASSERT().
288 If EndBit is greater than 7, then ASSERT().
289 If EndBit is less than StartBit, then ASSERT().
290 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
292 @param Address PCI configuration register to write.
293 @param StartBit The ordinal of the least significant bit in the bit field.
295 @param EndBit The ordinal of the most significant bit in the bit field.
297 @param AndData The value to AND with the PCI configuration register.
299 @return The value written back to the PCI configuration register.
304 S3PciSegmentBitFieldAnd8 (
312 Reads a bit field in an 8-bit port, performs a bitwise AND followed by a
313 bitwise OR, writes the result back to the bit field in the 8-bit port,
314 and saves the value in the S3 script to be replayed on S3 resume.
316 Reads the 8-bit PCI configuration register specified by Address, performs a
317 bitwise AND followed by a bitwise OR between the read result and
318 the value specified by AndData, and writes the result to the 8-bit PCI
319 configuration register specified by Address. The value written to the PCI
320 configuration register is returned. This function must guarantee that all PCI
321 read and write operations are serialized. Extra left bits in both AndData and
324 If any reserved bits in Address are set, then ASSERT().
325 If StartBit is greater than 7, then ASSERT().
326 If EndBit is greater than 7, then ASSERT().
327 If EndBit is less than StartBit, then ASSERT().
328 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
329 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
331 @param Address PCI configuration register to write.
332 @param StartBit The ordinal of the least significant bit in the bit field.
334 @param EndBit The ordinal of the most significant bit in the bit field.
336 @param AndData The value to AND with the PCI configuration register.
337 @param OrData The value to OR with the result of the AND operation.
339 @return The value written back to the PCI configuration register.
344 S3PciSegmentBitFieldAndThenOr8 (
353 Reads a 16-bit PCI configuration register, and saves the value in the S3 script
354 to be replayed on S3 resume.
356 Reads and returns the 16-bit PCI configuration register specified by Address.
357 This function must guarantee that all PCI read and write operations are serialized.
359 If any reserved bits in Address are set, then ASSERT().
360 If Address is not aligned on a 16-bit boundary, then ASSERT().
362 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
364 @return The 16-bit PCI configuration register specified by Address.
374 Writes a 16-bit PCI configuration register, and saves the value in the S3 script to
375 be replayed on S3 resume.
377 Writes the 16-bit PCI configuration register specified by Address with the value specified by Value.
378 Value is returned. This function must guarantee that all PCI read and write operations are serialized.
380 If any reserved bits in Address are set, then ASSERT().
381 If Address is not aligned on a 16-bit boundary, then ASSERT().
383 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
384 @param Value The value to write.
386 @return The parameter of Value.
391 S3PciSegmentWrite16 (
397 Performs a bitwise OR of a 16-bit PCI configuration register with a 16-bit
398 value, and saves the value in the S3 script to be replayed on S3 resume.
400 Reads the 16-bit PCI configuration register specified by Address, performs a
401 bitwise OR between the read result and the value specified by OrData, and
402 writes the result to the 16-bit PCI configuration register specified by Address.
403 The value written to the PCI configuration register is returned. This function
404 must guarantee that all PCI read and write operations are serialized.
406 If any reserved bits in Address are set, then ASSERT().
407 If Address is not aligned on a 16-bit boundary, then ASSERT().
409 @param Address Address that encodes the PCI Segment, Bus, Device, Function and
411 @param OrData The value to OR with the PCI configuration register.
413 @return The value written back to the PCI configuration register.
424 Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit value, and
425 saves the value in the S3 script to be replayed on S3 resume.
427 Reads the 16-bit PCI configuration register specified by Address,
428 performs a bitwise AND between the read result and the value specified by AndData,
429 and writes the result to the 16-bit PCI configuration register specified by Address.
430 The value written to the PCI configuration register is returned.
431 This function must guarantee that all PCI read and write operations are serialized.
433 If any reserved bits in Address are set, then ASSERT().
434 If Address is not aligned on a 16-bit boundary, then ASSERT().
436 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
437 @param AndData The value to AND with the PCI configuration register.
439 @return The value written to the PCI configuration register.
450 Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit value,
451 followed a bitwise OR with another 16-bit value, and saves the value in the S3 script to
452 be replayed on S3 resume.
454 Reads the 16-bit PCI configuration register specified by Address,
455 performs a bitwise AND between the read result and the value specified by AndData,
456 performs a bitwise OR between the result of the AND operation and the value specified by OrData,
457 and writes the result to the 16-bit PCI configuration register specified by Address.
458 The value written to the PCI configuration register is returned.
459 This function must guarantee that all PCI read and write operations are serialized.
461 If any reserved bits in Address are set, then ASSERT().
462 If Address is not aligned on a 16-bit boundary, then ASSERT().
464 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
465 @param AndData The value to AND with the PCI configuration register.
466 @param OrData The value to OR with the PCI configuration register.
468 @return The value written to the PCI configuration register.
473 S3PciSegmentAndThenOr16 (
480 Reads a bit field of a PCI configuration register, and saves the value in the
481 S3 script to be replayed on S3 resume.
483 Reads the bit field in a 16-bit PCI configuration register. The bit field is
484 specified by the StartBit and the EndBit. The value of the bit field is
487 If any reserved bits in Address are set, then ASSERT().
488 If Address is not aligned on a 16-bit boundary, then ASSERT().
489 If StartBit is greater than 15, then ASSERT().
490 If EndBit is greater than 15, then ASSERT().
491 If EndBit is less than StartBit, then ASSERT().
493 @param Address PCI configuration register to read.
494 @param StartBit The ordinal of the least significant bit in the bit field.
496 @param EndBit The ordinal of the most significant bit in the bit field.
499 @return The value of the bit field read from the PCI configuration register.
504 S3PciSegmentBitFieldRead16 (
511 Writes a bit field to a PCI configuration register, and saves the value in
512 the S3 script to be replayed on S3 resume.
514 Writes Value to the bit field of the PCI configuration register. The bit
515 field is specified by the StartBit and the EndBit. All other bits in the
516 destination PCI configuration register are preserved. The new value of the
517 16-bit register is returned.
519 If any reserved bits in Address are set, then ASSERT().
520 If Address is not aligned on a 16-bit boundary, then ASSERT().
521 If StartBit is greater than 15, then ASSERT().
522 If EndBit is greater than 15, then ASSERT().
523 If EndBit is less than StartBit, then ASSERT().
524 If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
526 @param Address PCI configuration register to write.
527 @param StartBit The ordinal of the least significant bit in the bit field.
529 @param EndBit The ordinal of the most significant bit in the bit field.
531 @param Value New value of the bit field.
533 @return The value written back to the PCI configuration register.
538 S3PciSegmentBitFieldWrite16 (
546 Reads a bit field in a 16-bit PCI configuration, performs a bitwise OR, writes
547 the result back to the bit field in the 16-bit port, and saves the value in the
548 S3 script to be replayed on S3 resume.
550 Reads the 16-bit PCI configuration register specified by Address, performs a
551 bitwise OR between the read result and the value specified by
552 OrData, and writes the result to the 16-bit PCI configuration register
553 specified by Address. The value written to the PCI configuration register is
554 returned. This function must guarantee that all PCI read and write operations
555 are serialized. Extra left bits in OrData are stripped.
557 If any reserved bits in Address are set, then ASSERT().
558 If Address is not aligned on a 16-bit boundary, then ASSERT().
559 If StartBit is greater than 15, then ASSERT().
560 If EndBit is greater than 15, then ASSERT().
561 If EndBit is less than StartBit, then ASSERT().
562 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
564 @param Address PCI configuration register to write.
565 @param StartBit The ordinal of the least significant bit in the bit field.
567 @param EndBit The ordinal of the most significant bit in the bit field.
569 @param OrData The value to OR with the PCI configuration register.
571 @return The value written back to the PCI configuration register.
576 S3PciSegmentBitFieldOr16 (
584 Reads a bit field in a 16-bit PCI configuration register, performs a bitwise
585 AND, writes the result back to the bit field in the 16-bit register, and
586 saves the value in the S3 script to be replayed on S3 resume.
588 Reads the 16-bit PCI configuration register specified by Address, performs a
589 bitwise AND between the read result and the value specified by AndData, and
590 writes the result to the 16-bit PCI configuration register specified by
591 Address. The value written to the PCI configuration register is returned.
592 This function must guarantee that all PCI read and write operations are
593 serialized. Extra left bits in AndData are stripped.
595 If any reserved bits in Address are set, then ASSERT().
596 If Address is not aligned on a 16-bit boundary, then ASSERT().
597 If StartBit is greater than 15, then ASSERT().
598 If EndBit is greater than 15, then ASSERT().
599 If EndBit is less than StartBit, then ASSERT().
600 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
602 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
603 @param StartBit The ordinal of the least significant bit in the bit field.
605 @param EndBit The ordinal of the most significant bit in the bit field.
607 @param AndData The value to AND with the PCI configuration register.
609 @return The value written back to the PCI configuration register.
614 S3PciSegmentBitFieldAnd16 (
622 Reads a bit field in a 16-bit port, performs a bitwise AND followed by a
623 bitwise OR, writes the result back to the bit field in the 16-bit port,
624 and saves the value in the S3 script to be replayed on S3 resume.
626 Reads the 16-bit PCI configuration register specified by Address, performs a
627 bitwise AND followed by a bitwise OR between the read result and
628 the value specified by AndData, and writes the result to the 16-bit PCI
629 configuration register specified by Address. The value written to the PCI
630 configuration register is returned. This function must guarantee that all PCI
631 read and write operations are serialized. Extra left bits in both AndData and
634 If any reserved bits in Address are set, then ASSERT().
635 If StartBit is greater than 15, then ASSERT().
636 If EndBit is greater than 15, then ASSERT().
637 If EndBit is less than StartBit, then ASSERT().
638 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
639 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
641 @param Address PCI configuration register to write.
642 @param StartBit The ordinal of the least significant bit in the bit field.
644 @param EndBit The ordinal of the most significant bit in the bit field.
646 @param AndData The value to AND with the PCI configuration register.
647 @param OrData The value to OR with the result of the AND operation.
649 @return The value written back to the PCI configuration register.
654 S3PciSegmentBitFieldAndThenOr16 (
663 Reads a 32-bit PCI configuration register, and saves the value in the S3 script
664 to be replayed on S3 resume.
666 Reads and returns the 32-bit PCI configuration register specified by Address.
667 This function must guarantee that all PCI read and write operations are serialized.
669 If any reserved bits in Address are set, then ASSERT().
670 If Address is not aligned on a 32-bit boundary, then ASSERT().
672 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
674 @return The 32-bit PCI configuration register specified by Address.
684 Writes a 32-bit PCI configuration register, and saves the value in the S3 script to
685 be replayed on S3 resume.
687 Writes the 32-bit PCI configuration register specified by Address with the value specified by Value.
688 Value is returned. This function must guarantee that all PCI read and write operations are serialized.
690 If any reserved bits in Address are set, then ASSERT().
691 If Address is not aligned on a 32-bit boundary, then ASSERT().
693 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
694 @param Value The value to write.
696 @return The parameter of Value.
701 S3PciSegmentWrite32 (
707 Performs a bitwise OR of a 32-bit PCI configuration register with a 32-bit
708 value, and saves the value in the S3 script to be replayed on S3 resume.
710 Reads the 32-bit PCI configuration register specified by Address, performs a
711 bitwise OR between the read result and the value specified by OrData, and
712 writes the result to the 32-bit PCI configuration register specified by Address.
713 The value written to the PCI configuration register is returned. This function
714 must guarantee that all PCI read and write operations are serialized.
716 If any reserved bits in Address are set, then ASSERT().
717 If Address is not aligned on a 32-bit boundary, then ASSERT().
719 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and
721 @param OrData The value to OR with the PCI configuration register.
723 @return The value written back to the PCI configuration register.
734 Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit value, and
735 saves the value in the S3 script to be replayed on S3 resume.
737 Reads the 32-bit PCI configuration register specified by Address,
738 performs a bitwise AND between the read result and the value specified by AndData,
739 and writes the result to the 32-bit PCI configuration register specified by Address.
740 The value written to the PCI configuration register is returned.
741 This function must guarantee that all PCI read and write operations are serialized.
743 If any reserved bits in Address are set, then ASSERT().
744 If Address is not aligned on a 32-bit boundary, then ASSERT().
746 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
747 @param AndData The value to AND with the PCI configuration register.
749 @return The value written to the PCI configuration register.
760 Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit value,
761 followed a bitwise OR with another 32-bit value, and saves the value in the S3 script to
762 be replayed on S3 resume.
764 Reads the 32-bit PCI configuration register specified by Address,
765 performs a bitwise AND between the read result and the value specified by AndData,
766 performs a bitwise OR between the result of the AND operation and the value specified by OrData,
767 and writes the result to the 32-bit PCI configuration register specified by Address.
768 The value written to the PCI configuration register is returned.
769 This function must guarantee that all PCI read and write operations are serialized.
771 If any reserved bits in Address are set, then ASSERT().
772 If Address is not aligned on a 32-bit boundary, then ASSERT().
774 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
775 @param AndData The value to AND with the PCI configuration register.
776 @param OrData The value to OR with the PCI configuration register.
778 @return The value written to the PCI configuration register.
783 S3PciSegmentAndThenOr32 (
790 Reads a bit field of a PCI configuration register, and saves the value in the
791 S3 script to be replayed on S3 resume.
793 Reads the bit field in a 32-bit PCI configuration register. The bit field is
794 specified by the StartBit and the EndBit. The value of the bit field is
797 If any reserved bits in Address are set, then ASSERT().
798 If Address is not aligned on a 32-bit boundary, then ASSERT().
799 If StartBit is greater than 31, then ASSERT().
800 If EndBit is greater than 31, then ASSERT().
801 If EndBit is less than StartBit, then ASSERT().
803 @param Address PCI configuration register to read.
804 @param StartBit The ordinal of the least significant bit in the bit field.
806 @param EndBit The ordinal of the most significant bit in the bit field.
809 @return The value of the bit field read from the PCI configuration register.
814 S3PciSegmentBitFieldRead32 (
821 Writes a bit field to a PCI configuration register, and saves the value in
822 the S3 script to be replayed on S3 resume.
824 Writes Value to the bit field of the PCI configuration register. The bit
825 field is specified by the StartBit and the EndBit. All other bits in the
826 destination PCI configuration register are preserved. The new value of the
827 32-bit register is returned.
829 If any reserved bits in Address are set, then ASSERT().
830 If Address is not aligned on a 32-bit boundary, then ASSERT().
831 If StartBit is greater than 31, then ASSERT().
832 If EndBit is greater than 31, then ASSERT().
833 If EndBit is less than StartBit, then ASSERT().
834 If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
836 @param Address PCI configuration register to write.
837 @param StartBit The ordinal of the least significant bit in the bit field.
839 @param EndBit The ordinal of the most significant bit in the bit field.
841 @param Value New value of the bit field.
843 @return The value written back to the PCI configuration register.
848 S3PciSegmentBitFieldWrite32 (
856 Reads a bit field in a 32-bit PCI configuration, performs a bitwise OR, writes
857 the result back to the bit field in the 32-bit port, and saves the value in the
858 S3 script to be replayed on S3 resume.
860 Reads the 32-bit PCI configuration register specified by Address, performs a
861 bitwise OR between the read result and the value specified by
862 OrData, and writes the result to the 32-bit PCI configuration register
863 specified by Address. The value written to the PCI configuration register is
864 returned. This function must guarantee that all PCI read and write operations
865 are serialized. Extra left bits in OrData are stripped.
867 If any reserved bits in Address are set, then ASSERT().
868 If Address is not aligned on a 32-bit boundary, then ASSERT().
869 If StartBit is greater than 31, then ASSERT().
870 If EndBit is greater than 31, then ASSERT().
871 If EndBit is less than StartBit, then ASSERT().
872 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
874 @param Address PCI configuration register to write.
875 @param StartBit The ordinal of the least significant bit in the bit field.
877 @param EndBit The ordinal of the most significant bit in the bit field.
879 @param OrData The value to OR with the PCI configuration register.
881 @return The value written back to the PCI configuration register.
886 S3PciSegmentBitFieldOr32 (
894 Reads a bit field in a 32-bit PCI configuration register, performs a bitwise
895 AND, and writes the result back to the bit field in the 32-bit register, and
896 saves the value in the S3 script to be replayed on S3 resume.
898 Reads the 32-bit PCI configuration register specified by Address, performs a
899 bitwise AND between the read result and the value specified by AndData, and
900 writes the result to the 32-bit PCI configuration register specified by
901 Address. The value written to the PCI configuration register is returned.
902 This function must guarantee that all PCI read and write operations are
903 serialized. Extra left bits in AndData are stripped.
905 If any reserved bits in Address are set, then ASSERT().
906 If Address is not aligned on a 32-bit boundary, then ASSERT().
907 If StartBit is greater than 31, then ASSERT().
908 If EndBit is greater than 31, then ASSERT().
909 If EndBit is less than StartBit, then ASSERT().
910 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
912 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
913 @param StartBit The ordinal of the least significant bit in the bit field.
915 @param EndBit The ordinal of the most significant bit in the bit field.
917 @param AndData The value to AND with the PCI configuration register.
919 @return The value written back to the PCI configuration register.
924 S3PciSegmentBitFieldAnd32 (
932 Reads a bit field in a 32-bit port, performs a bitwise AND followed by a
933 bitwise OR, writes the result back to the bit field in the 32-bit port,
934 and saves the value in the S3 script to be replayed on S3 resume.
936 Reads the 32-bit PCI configuration register specified by Address, performs a
937 bitwise AND followed by a bitwise OR between the read result and
938 the value specified by AndData, and writes the result to the 32-bit PCI
939 configuration register specified by Address. The value written to the PCI
940 configuration register is returned. This function must guarantee that all PCI
941 read and write operations are serialized. Extra left bits in both AndData and
944 If any reserved bits in Address are set, then ASSERT().
945 If StartBit is greater than 31, then ASSERT().
946 If EndBit is greater than 31, then ASSERT().
947 If EndBit is less than StartBit, then ASSERT().
948 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
949 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
951 @param Address PCI configuration register to write.
952 @param StartBit The ordinal of the least significant bit in the bit field.
954 @param EndBit The ordinal of the most significant bit in the bit field.
956 @param AndData The value to AND with the PCI configuration register.
957 @param OrData The value to OR with the result of the AND operation.
959 @return The value written back to the PCI configuration register.
964 S3PciSegmentBitFieldAndThenOr32 (
973 Reads a range of PCI configuration registers into a caller supplied buffer,
974 and saves the value in the S3 script to be replayed on S3 resume.
976 Reads the range of PCI configuration registers specified by StartAddress and
977 Size into the buffer specified by Buffer. This function only allows the PCI
978 configuration registers from a single PCI function to be read. Size is
979 returned. When possible 32-bit PCI configuration read cycles are used to read
980 from StartAdress to StartAddress + Size. Due to alignment restrictions, 8-bit
981 and 16-bit PCI configuration read cycles may be used at the beginning and the
984 If any reserved bits in StartAddress are set, then ASSERT().
985 If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
986 If Size > 0 and Buffer is NULL, then ASSERT().
988 @param StartAddress Starting address that encodes the PCI Segment, Bus, Device,
989 Function and Register.
990 @param Size Size in bytes of the transfer.
991 @param Buffer Pointer to a buffer receiving the data read.
998 S3PciSegmentReadBuffer (
999 IN UINT64 StartAddress
,
1005 Copies the data in a caller supplied buffer to a specified range of PCI
1006 configuration space, and saves the value in the S3 script to be replayed on S3
1009 Writes the range of PCI configuration registers specified by StartAddress and
1010 Size from the buffer specified by Buffer. This function only allows the PCI
1011 configuration registers from a single PCI function to be written. Size is
1012 returned. When possible 32-bit PCI configuration write cycles are used to
1013 write from StartAdress to StartAddress + Size. Due to alignment restrictions,
1014 8-bit and 16-bit PCI configuration write cycles may be used at the beginning
1015 and the end of the range.
1017 If any reserved bits in StartAddress are set, then ASSERT().
1018 If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
1019 If Size > 0 and Buffer is NULL, then ASSERT().
1021 @param StartAddress Starting address that encodes the PCI Segment, Bus, Device,
1022 Function and Register.
1023 @param Size Size in bytes of the transfer.
1024 @param Buffer Pointer to a buffer containing the data to write.
1026 @return The parameter of Size.
1031 S3PciSegmentWriteBuffer (
1032 IN UINT64 StartAddress
,