2 This PPI manipulates the I2C host controller to perform transactions as a master
3 on the I2C bus using the current state of any switches or multiplexers in the I2C bus.
5 Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved.<BR>
6 SPDX-License-Identifier: BSD-2-Clause-Patent
8 @par Revision Reference:
9 This PPI is introduced in PI Version 1.3.
13 #ifndef __I2C_MASTER_PPI_H__
14 #define __I2C_MASTER_PPI_H__
18 #define EFI_PEI_I2C_MASTER_PPI_GUID \
19 { 0xb3bfab9b, 0x9f9c, 0x4e8b, { 0xad, 0x37, 0x7f, 0x8c, 0x51, 0xfc, 0x62, 0x80 }}
21 typedef struct _EFI_PEI_I2C_MASTER_PPI EFI_PEI_I2C_MASTER_PPI
;
24 Set the frequency for the I2C clock line.
26 @param This Pointer to an EFI_PEI_I2C_MASTER_PPI structure.
27 @param BusClockHertz Pointer to the requested I2C bus clock frequency in Hertz.
28 Upon return this value contains the actual frequency
29 in use by the I2C controller.
31 @retval EFI_SUCCESS The bus frequency was set successfully.
32 @retval EFI_INVALID_PARAMETER BusClockHertz is NULL
33 @retval EFI_UNSUPPORTED The controller does not support this frequency.
38 (EFIAPI
*EFI_PEI_I2C_MASTER_PPI_SET_BUS_FREQUENCY
) (
39 IN EFI_PEI_I2C_MASTER_PPI
*This
,
40 IN UINTN
*BusClockHertz
44 Reset the I2C controller and configure it for use.
46 @param This Pointer to an EFI_PEI_I2C_MASTER_PPI structure.
48 @retval EFI_SUCCESS The reset completed successfully.
49 @retval EFI_DEVICE_ERROR The reset operation failed.
54 (EFIAPI
*EFI_PEI_I2C_MASTER_PPI_RESET
) (
55 IN CONST EFI_PEI_I2C_MASTER_PPI
*This
59 Start an I2C transaction on the host controller.
61 @param This Pointer to an EFI_PEI_I2C_MASTER_PPI structure.
62 @param SlaveAddress Address of the device on the I2C bus.
63 Set the I2C_ADDRESSING_10_BIT when using 10-bit addresses,
64 clear this bit for 7-bit addressing.
65 Bits 0-6 are used for 7-bit I2C slave addresses and
66 bits 0-9 are used for 10-bit I2C slave addresses.
67 @param RequestPacket Pointer to an EFI_I2C_REQUEST_PACKET structure describing the I2C transaction.
69 @retval EFI_SUCCESS The transaction completed successfully.
70 @retval EFI_BAD_BUFFER_SIZE The RequestPacket->LengthInBytes value is too large.
71 @retval EFI_DEVICE_ERROR There was an I2C error (NACK) during the transaction.
72 @retval EFI_INVALID_PARAMETER RequestPacket is NULL
73 @retval EFI_NO_RESPONSE The I2C device is not responding to the slave address.
74 EFI_DEVICE_ERROR will be returned if the controller cannot distinguish when the NACK occurred.
75 @retval EFI_NOT_FOUND Reserved bit set in the SlaveAddress parameter
76 @retval EFI_OUT_OF_RESOURCES Insufficient memory for I2C transaction
77 @retval EFI_UNSUPPORTED The controller does not support the requested transaction.
82 (EFIAPI
*EFI_PEI_I2C_MASTER_PPI_START_REQUEST
) (
83 IN CONST EFI_PEI_I2C_MASTER_PPI
*This
,
84 IN UINTN SlaveAddress
,
85 IN EFI_I2C_REQUEST_PACKET
*RequestPacket
89 /// This PPI manipulates the I2C host controller to perform transactions as a master on the I2C bus
90 /// using the current state of any switches or multiplexers in the I2C bus.
92 struct _EFI_PEI_I2C_MASTER_PPI
{
93 EFI_PEI_I2C_MASTER_PPI_SET_BUS_FREQUENCY SetBusFrequency
;
94 EFI_PEI_I2C_MASTER_PPI_RESET Reset
;
95 EFI_PEI_I2C_MASTER_PPI_START_REQUEST StartRequest
;
96 CONST EFI_I2C_CONTROLLER_CAPABILITIES
*I2cControllerCapabilities
;
100 extern EFI_GUID gEfiPeiI2cMasterPpiGuid
;