4 Provides defines for Machine Specific Registers(MSR) indexes. Data structures
5 are provided for MSRs that contain one or more bit fields. If the MSR value
6 returned is a single 32-bit or 64-bit value, then a data structure is not
9 Copyright (c) 2017, Advanced Micro Devices. All rights reserved.<BR>
10 SPDX-License-Identifier: BSD-2-Clause-Patent
12 @par Specification Reference:
13 AMD64 Architecture Programming Manual volume 2, March 2017, Sections 15.34
17 #ifndef __FAM17_MSR_H__
18 #define __FAM17_MSR_H__
21 Secure Encrypted Virtualization - Encrypted State (SEV-ES) GHCB register
24 #define MSR_SEV_ES_GHCB 0xc0010130
27 MSR information returned for #MSR_SEV_ES_GHCB
32 UINT32 Reserved1
: 20;
33 UINT32 Reserved2
: 32;
38 UINT8 SevEncryptionBitPos
;
39 UINT16 SevEsProtocolMin
;
40 UINT16 SevEsProtocolMax
;
45 UINT32 ReasonCodeSet
: 4;
46 UINT32 ReasonCode
: 8;
48 UINT32 Reserved2
: 32;
54 } GhcbHypervisorFeatures
;
58 UINT64 GuestFrameNumber
: 52;
63 UINT64 GuestFrameNumber
: 40;
66 } SnpPageStateChangeRequest
;
72 } SnpPageStateChangeResponse
;
76 UINT64 GhcbPhysicalAddress
;
77 } MSR_SEV_ES_GHCB_REGISTER
;
79 #define GHCB_INFO_SEV_INFO 1
80 #define GHCB_INFO_SEV_INFO_GET 2
81 #define GHCB_INFO_CPUID_REQUEST 4
82 #define GHCB_INFO_CPUID_RESPONSE 5
83 #define GHCB_INFO_GHCB_GPA_REGISTER_REQUEST 18
84 #define GHCB_INFO_GHCB_GPA_REGISTER_RESPONSE 19
85 #define GHCB_INFO_SNP_PAGE_STATE_CHANGE_REQUEST 20
86 #define GHCB_INFO_SNP_PAGE_STATE_CHANGE_RESPONSE 21
87 #define GHCB_HYPERVISOR_FEATURES_REQUEST 128
88 #define GHCB_HYPERVISOR_FEATURES_RESPONSE 129
89 #define GHCB_INFO_TERMINATE_REQUEST 256
91 #define GHCB_TERMINATE_GHCB 0
92 #define GHCB_TERMINATE_GHCB_GENERAL 0
93 #define GHCB_TERMINATE_GHCB_PROTOCOL 1
96 Secure Encrypted Virtualization (SEV) status register
99 #define MSR_SEV_STATUS 0xc0010131
102 MSR information returned for #MSR_SEV_STATUS
106 /// Individual bit fields
110 /// [Bit 0] Secure Encrypted Virtualization (Sev) is enabled
115 /// [Bit 1] Secure Encrypted Virtualization Encrypted State (SevEs) is enabled
120 /// [Bit 2] Secure Nested Paging (SevSnp) is enabled
122 UINT32 SevSnpBit
: 1;
124 UINT32 Reserved2
: 29;
127 /// All bit fields as a 32-bit value
131 /// All bit fields as a 64-bit value
134 } MSR_SEV_STATUS_REGISTER
;