2 This header file contains all of the PXE type definitions,
3 structure prototypes, global variables and constants that
4 are needed for porting PXE to EFI.
6 Copyright (c) 2006, Intel Corporation
7 All rights reserved. This program and the accompanying materials
8 are licensed and made available under the terms and conditions of the BSD License
9 which accompanies this distribution. The full text of the license may be found at
10 http://opensource.org/licenses/bsd-license.php
12 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
13 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
15 @par Revision Reference:
16 32/64-bit PXE specification:
28 #define PXE_BUSTYPE(a, b, c, d) \
30 (((PXE_UINT32) (d) & 0xFF) << 24) | (((PXE_UINT32) (c) & 0xFF) << 16) | (((PXE_UINT32) (b) & 0xFF) << 8) | \
31 ((PXE_UINT32) (a) & 0xFF) \
35 // UNDI ROM ID and devive ID signature
37 #define PXE_BUSTYPE_PXE PXE_BUSTYPE ('!', 'P', 'X', 'E')
40 // BUS ROM ID signatures
42 #define PXE_BUSTYPE_PCI PXE_BUSTYPE ('P', 'C', 'I', 'R')
43 #define PXE_BUSTYPE_PC_CARD PXE_BUSTYPE ('P', 'C', 'C', 'R')
44 #define PXE_BUSTYPE_USB PXE_BUSTYPE ('U', 'S', 'B', 'R')
45 #define PXE_BUSTYPE_1394 PXE_BUSTYPE ('1', '3', '9', '4')
47 #define PXE_SWAP_UINT16(n) ((((PXE_UINT16) (n) & 0x00FF) << 8) | (((PXE_UINT16) (n) & 0xFF00) >> 8))
49 #define PXE_SWAP_UINT32(n) \
50 ((((PXE_UINT32)(n) & 0x000000FF) << 24) | \
51 (((PXE_UINT32)(n) & 0x0000FF00) << 8) | \
52 (((PXE_UINT32)(n) & 0x00FF0000) >> 8) | \
53 (((PXE_UINT32)(n) & 0xFF000000) >> 24))
55 #define PXE_SWAP_UINT64(n) \
56 ((((PXE_UINT64)(n) & 0x00000000000000FFULL) << 56) | \
57 (((PXE_UINT64)(n) & 0x000000000000FF00ULL) << 40) | \
58 (((PXE_UINT64)(n) & 0x0000000000FF0000ULL) << 24) | \
59 (((PXE_UINT64)(n) & 0x00000000FF000000ULL) << 8) | \
60 (((PXE_UINT64)(n) & 0x000000FF00000000ULL) >> 8) | \
61 (((PXE_UINT64)(n) & 0x0000FF0000000000ULL) >> 24) | \
62 (((PXE_UINT64)(n) & 0x00FF000000000000ULL) >> 40) | \
63 (((PXE_UINT64)(n) & 0xFF00000000000000ULL) >> 56))
66 #define PXE_CPBSIZE_NOT_USED 0 // zero
67 #define PXE_DBSIZE_NOT_USED 0 // zero
68 #define PXE_CPBADDR_NOT_USED (PXE_UINT64) 0 // zero
69 #define PXE_DBADDR_NOT_USED (PXE_UINT64) 0 // zero
70 #define PXE_CONST const
72 #define PXE_VOLATILE volatile
74 typedef VOID PXE_VOID
;
75 typedef UINT8 PXE_UINT8
;
76 typedef UINT16 PXE_UINT16
;
77 typedef UINT32 PXE_UINT32
;
78 typedef UINTN PXE_UINTN
;
81 // typedef unsigned long PXE_UINT64;
83 typedef UINT64 PXE_UINT64
;
85 typedef PXE_UINT8 PXE_BOOL
;
86 #define PXE_FALSE 0 // zero
87 #define PXE_TRUE (!PXE_FALSE)
89 typedef PXE_UINT16 PXE_OPCODE
;
92 // Return UNDI operational state.
94 #define PXE_OPCODE_GET_STATE 0x0000
97 // Change UNDI operational state from Stopped to Started.
99 #define PXE_OPCODE_START 0x0001
102 // Change UNDI operational state from Started to Stopped.
104 #define PXE_OPCODE_STOP 0x0002
107 // Get UNDI initialization information.
109 #define PXE_OPCODE_GET_INIT_INFO 0x0003
112 // Get NIC configuration information.
114 #define PXE_OPCODE_GET_CONFIG_INFO 0x0004
117 // Changed UNDI operational state from Started to Initialized.
119 #define PXE_OPCODE_INITIALIZE 0x0005
122 // Re-initialize the NIC H/W.
124 #define PXE_OPCODE_RESET 0x0006
127 // Change the UNDI operational state from Initialized to Started.
129 #define PXE_OPCODE_SHUTDOWN 0x0007
132 // Read & change state of external interrupt enables.
134 #define PXE_OPCODE_INTERRUPT_ENABLES 0x0008
137 // Read & change state of packet receive filters.
139 #define PXE_OPCODE_RECEIVE_FILTERS 0x0009
142 // Read & change station MAC address.
144 #define PXE_OPCODE_STATION_ADDRESS 0x000A
147 // Read traffic statistics.
149 #define PXE_OPCODE_STATISTICS 0x000B
152 // Convert multicast IP address to multicast MAC address.
154 #define PXE_OPCODE_MCAST_IP_TO_MAC 0x000C
157 // Read or change non-volatile storage on the NIC.
159 #define PXE_OPCODE_NVDATA 0x000D
162 // Get & clear interrupt status.
164 #define PXE_OPCODE_GET_STATUS 0x000E
167 // Fill media header in packet for transmit.
169 #define PXE_OPCODE_FILL_HEADER 0x000F
172 // Transmit packet(s).
174 #define PXE_OPCODE_TRANSMIT 0x0010
179 #define PXE_OPCODE_RECEIVE 0x0011
182 // Last valid PXE UNDI OpCode number.
184 #define PXE_OPCODE_LAST_VALID 0x0011
186 typedef PXE_UINT16 PXE_OPFLAGS
;
188 #define PXE_OPFLAGS_NOT_USED 0x0000
191 // //////////////////////////////////////
196 ////////////////////////////////////////
201 ////////////////////////////////////////
206 ////////////////////////////////////////
207 // UNDI Get Init Info
211 ////////////////////////////////////////
212 // UNDI Get Config Info
216 ////////////////////////////////////////
219 #define PXE_OPFLAGS_INITIALIZE_CABLE_DETECT_MASK 0x0001
220 #define PXE_OPFLAGS_INITIALIZE_DETECT_CABLE 0x0000
221 #define PXE_OPFLAGS_INITIALIZE_DO_NOT_DETECT_CABLE 0x0001
224 // //////////////////////////////////////
227 #define PXE_OPFLAGS_RESET_DISABLE_INTERRUPTS 0x0001
228 #define PXE_OPFLAGS_RESET_DISABLE_FILTERS 0x0002
231 // //////////////////////////////////////
236 ////////////////////////////////////////
237 // UNDI Interrupt Enables
240 // Select whether to enable or disable external interrupt signals.
241 // Setting both enable and disable will return PXE_STATCODE_INVALID_OPFLAGS.
243 #define PXE_OPFLAGS_INTERRUPT_OPMASK 0xC000
244 #define PXE_OPFLAGS_INTERRUPT_ENABLE 0x8000
245 #define PXE_OPFLAGS_INTERRUPT_DISABLE 0x4000
246 #define PXE_OPFLAGS_INTERRUPT_READ 0x0000
249 // Enable receive interrupts. An external interrupt will be generated
250 // after a complete non-error packet has been received.
252 #define PXE_OPFLAGS_INTERRUPT_RECEIVE 0x0001
255 // Enable transmit interrupts. An external interrupt will be generated
256 // after a complete non-error packet has been transmitted.
258 #define PXE_OPFLAGS_INTERRUPT_TRANSMIT 0x0002
261 // Enable command interrupts. An external interrupt will be generated
262 // when command execution stops.
264 #define PXE_OPFLAGS_INTERRUPT_COMMAND 0x0004
267 // Generate software interrupt. Setting this bit generates an external
268 // interrupt, if it is supported by the hardware.
270 #define PXE_OPFLAGS_INTERRUPT_SOFTWARE 0x0008
273 // //////////////////////////////////////
274 // UNDI Receive Filters
277 // Select whether to enable or disable receive filters.
278 // Setting both enable and disable will return PXE_STATCODE_INVALID_OPCODE.
280 #define PXE_OPFLAGS_RECEIVE_FILTER_OPMASK 0xC000
281 #define PXE_OPFLAGS_RECEIVE_FILTER_ENABLE 0x8000
282 #define PXE_OPFLAGS_RECEIVE_FILTER_DISABLE 0x4000
283 #define PXE_OPFLAGS_RECEIVE_FILTER_READ 0x0000
286 // To reset the contents of the multicast MAC address filter list,
289 #define PXE_OPFLAGS_RECEIVE_FILTER_RESET_MCAST_LIST 0x2000
292 // Enable unicast packet receiving. Packets sent to the current station
293 // MAC address will be received.
295 #define PXE_OPFLAGS_RECEIVE_FILTER_UNICAST 0x0001
298 // Enable broadcast packet receiving. Packets sent to the broadcast
299 // MAC address will be received.
301 #define PXE_OPFLAGS_RECEIVE_FILTER_BROADCAST 0x0002
304 // Enable filtered multicast packet receiving. Packets sent to any
305 // of the multicast MAC addresses in the multicast MAC address filter
306 // list will be received. If the filter list is empty, no multicast
308 #define PXE_OPFLAGS_RECEIVE_FILTER_FILTERED_MULTICAST 0x0004
311 // Enable promiscuous packet receiving. All packets will be received.
313 #define PXE_OPFLAGS_RECEIVE_FILTER_PROMISCUOUS 0x0008
316 // Enable promiscuous multicast packet receiving. All multicast
317 // packets will be received.
319 #define PXE_OPFLAGS_RECEIVE_FILTER_ALL_MULTICAST 0x0010
322 // //////////////////////////////////////
323 // UNDI Station Address
325 #define PXE_OPFLAGS_STATION_ADDRESS_READ 0x0000
326 #define PXE_OPFLAGS_STATION_ADDRESS_WRITE 0x0000
327 #define PXE_OPFLAGS_STATION_ADDRESS_RESET 0x0001
330 // //////////////////////////////////////
333 #define PXE_OPFLAGS_STATISTICS_READ 0x0000
334 #define PXE_OPFLAGS_STATISTICS_RESET 0x0001
337 // //////////////////////////////////////
338 // UNDI MCast IP to MAC
341 // Identify the type of IP address in the CPB.
343 #define PXE_OPFLAGS_MCAST_IP_TO_MAC_OPMASK 0x0003
344 #define PXE_OPFLAGS_MCAST_IPV4_TO_MAC 0x0000
345 #define PXE_OPFLAGS_MCAST_IPV6_TO_MAC 0x0001
348 // //////////////////////////////////////
352 // Select the type of non-volatile data operation.
354 #define PXE_OPFLAGS_NVDATA_OPMASK 0x0001
355 #define PXE_OPFLAGS_NVDATA_READ 0x0000
356 #define PXE_OPFLAGS_NVDATA_WRITE 0x0001
359 // //////////////////////////////////////
363 // Return current interrupt status. This will also clear any interrupts
364 // that are currently set. This can be used in a polling routine. The
365 // interrupt flags are still set and cleared even when the interrupts
368 #define PXE_OPFLAGS_GET_INTERRUPT_STATUS 0x0001
371 // Return list of transmitted buffers for recycling. Transmit buffers
372 // must not be changed or unallocated until they have recycled. After
373 // issuing a transmit command, wait for a transmit complete interrupt.
374 // When a transmit complete interrupt is received, read the transmitted
375 // buffers. Do not plan on getting one buffer per interrupt. Some
376 // NICs and UNDIs may transmit multiple buffers per interrupt.
378 #define PXE_OPFLAGS_GET_TRANSMITTED_BUFFERS 0x0002
381 // //////////////////////////////////////
384 #define PXE_OPFLAGS_FILL_HEADER_OPMASK 0x0001
385 #define PXE_OPFLAGS_FILL_HEADER_FRAGMENTED 0x0001
386 #define PXE_OPFLAGS_FILL_HEADER_WHOLE 0x0000
389 // //////////////////////////////////////
393 // S/W UNDI only. Return after the packet has been transmitted. A
394 // transmit complete interrupt will still be generated and the transmit
395 // buffer will have to be recycled.
397 #define PXE_OPFLAGS_SWUNDI_TRANSMIT_OPMASK 0x0001
398 #define PXE_OPFLAGS_TRANSMIT_BLOCK 0x0001
399 #define PXE_OPFLAGS_TRANSMIT_DONT_BLOCK 0x0000
404 #define PXE_OPFLAGS_TRANSMIT_OPMASK 0x0002
405 #define PXE_OPFLAGS_TRANSMIT_FRAGMENTED 0x0002
406 #define PXE_OPFLAGS_TRANSMIT_WHOLE 0x0000
409 // //////////////////////////////////////
414 typedef PXE_UINT16 PXE_STATFLAGS
;
416 #define PXE_STATFLAGS_INITIALIZE 0x0000
419 // //////////////////////////////////////
420 // Common StatFlags that can be returned by all commands.
423 // The COMMAND_COMPLETE and COMMAND_FAILED status flags must be
424 // implemented by all UNDIs. COMMAND_QUEUED is only needed by UNDIs
425 // that support command queuing.
427 #define PXE_STATFLAGS_STATUS_MASK 0xC000
428 #define PXE_STATFLAGS_COMMAND_COMPLETE 0xC000
429 #define PXE_STATFLAGS_COMMAND_FAILED 0x8000
430 #define PXE_STATFLAGS_COMMAND_QUEUED 0x4000
433 // //////////////////////////////////////
436 #define PXE_STATFLAGS_GET_STATE_MASK 0x0003
437 #define PXE_STATFLAGS_GET_STATE_INITIALIZED 0x0002
438 #define PXE_STATFLAGS_GET_STATE_STARTED 0x0001
439 #define PXE_STATFLAGS_GET_STATE_STOPPED 0x0000
442 // //////////////////////////////////////
445 // No additional StatFlags
447 ////////////////////////////////////////
448 // UNDI Get Init Info
450 #define PXE_STATFLAGS_CABLE_DETECT_MASK 0x0001
451 #define PXE_STATFLAGS_CABLE_DETECT_NOT_SUPPORTED 0x0000
452 #define PXE_STATFLAGS_CABLE_DETECT_SUPPORTED 0x0001
455 // //////////////////////////////////////
458 #define PXE_STATFLAGS_INITIALIZED_NO_MEDIA 0x0001
461 // //////////////////////////////////////
464 #define PXE_STATFLAGS_RESET_NO_MEDIA 0x0001
467 // //////////////////////////////////////
470 // No additional StatFlags
472 ////////////////////////////////////////
473 // UNDI Interrupt Enables
476 // If set, receive interrupts are enabled.
478 #define PXE_STATFLAGS_INTERRUPT_RECEIVE 0x0001
481 // If set, transmit interrupts are enabled.
483 #define PXE_STATFLAGS_INTERRUPT_TRANSMIT 0x0002
486 // If set, command interrupts are enabled.
488 #define PXE_STATFLAGS_INTERRUPT_COMMAND 0x0004
491 // //////////////////////////////////////
492 // UNDI Receive Filters
495 // If set, unicast packets will be received.
497 #define PXE_STATFLAGS_RECEIVE_FILTER_UNICAST 0x0001
500 // If set, broadcast packets will be received.
502 #define PXE_STATFLAGS_RECEIVE_FILTER_BROADCAST 0x0002
505 // If set, multicast packets that match up with the multicast address
506 // filter list will be received.
508 #define PXE_STATFLAGS_RECEIVE_FILTER_FILTERED_MULTICAST 0x0004
511 // If set, all packets will be received.
513 #define PXE_STATFLAGS_RECEIVE_FILTER_PROMISCUOUS 0x0008
516 // If set, all multicast packets will be received.
518 #define PXE_STATFLAGS_RECEIVE_FILTER_ALL_MULTICAST 0x0010
521 // //////////////////////////////////////
522 // UNDI Station Address
524 // No additional StatFlags
526 ////////////////////////////////////////
529 // No additional StatFlags
531 ////////////////////////////////////////
532 // UNDI MCast IP to MAC
534 // No additional StatFlags
536 ////////////////////////////////////////
539 // No additional StatFlags
542 ////////////////////////////////////////
546 // Use to determine if an interrupt has occurred.
548 #define PXE_STATFLAGS_GET_STATUS_INTERRUPT_MASK 0x000F
549 #define PXE_STATFLAGS_GET_STATUS_NO_INTERRUPTS 0x0000
552 // If set, at least one receive interrupt occurred.
554 #define PXE_STATFLAGS_GET_STATUS_RECEIVE 0x0001
557 // If set, at least one transmit interrupt occurred.
559 #define PXE_STATFLAGS_GET_STATUS_TRANSMIT 0x0002
562 // If set, at least one command interrupt occurred.
564 #define PXE_STATFLAGS_GET_STATUS_COMMAND 0x0004
567 // If set, at least one software interrupt occurred.
569 #define PXE_STATFLAGS_GET_STATUS_SOFTWARE 0x0008
572 // This flag is set if the transmitted buffer queue is empty. This flag
573 // will be set if all transmitted buffer addresses get written into the DB.
575 #define PXE_STATFLAGS_GET_STATUS_TXBUF_QUEUE_EMPTY 0x0010
578 // This flag is set if no transmitted buffer addresses were written
579 // into the DB. (This could be because DBsize was too small.)
581 #define PXE_STATFLAGS_GET_STATUS_NO_TXBUFS_WRITTEN 0x0020
584 // //////////////////////////////////////
587 // No additional StatFlags
589 ////////////////////////////////////////
592 // No additional StatFlags.
594 ////////////////////////////////////////
597 // No additional StatFlags.
599 typedef PXE_UINT16 PXE_STATCODE
;
601 #define PXE_STATCODE_INITIALIZE 0x0000
604 // //////////////////////////////////////
605 // Common StatCodes returned by all UNDI commands, UNDI protocol functions
606 // and BC protocol functions.
608 #define PXE_STATCODE_SUCCESS 0x0000
610 #define PXE_STATCODE_INVALID_CDB 0x0001
611 #define PXE_STATCODE_INVALID_CPB 0x0002
612 #define PXE_STATCODE_BUSY 0x0003
613 #define PXE_STATCODE_QUEUE_FULL 0x0004
614 #define PXE_STATCODE_ALREADY_STARTED 0x0005
615 #define PXE_STATCODE_NOT_STARTED 0x0006
616 #define PXE_STATCODE_NOT_SHUTDOWN 0x0007
617 #define PXE_STATCODE_ALREADY_INITIALIZED 0x0008
618 #define PXE_STATCODE_NOT_INITIALIZED 0x0009
619 #define PXE_STATCODE_DEVICE_FAILURE 0x000A
620 #define PXE_STATCODE_NVDATA_FAILURE 0x000B
621 #define PXE_STATCODE_UNSUPPORTED 0x000C
622 #define PXE_STATCODE_BUFFER_FULL 0x000D
623 #define PXE_STATCODE_INVALID_PARAMETER 0x000E
624 #define PXE_STATCODE_INVALID_UNDI 0x000F
625 #define PXE_STATCODE_IPV4_NOT_SUPPORTED 0x0010
626 #define PXE_STATCODE_IPV6_NOT_SUPPORTED 0x0011
627 #define PXE_STATCODE_NOT_ENOUGH_MEMORY 0x0012
628 #define PXE_STATCODE_NO_DATA 0x0013
630 typedef PXE_UINT16 PXE_IFNUM
;
633 // This interface number must be passed to the S/W UNDI Start command.
635 #define PXE_IFNUM_START 0x0000
638 // This interface number is returned by the S/W UNDI Get State and
639 // Start commands if information in the CDB, CPB or DB is invalid.
641 #define PXE_IFNUM_INVALID 0x0000
643 typedef PXE_UINT16 PXE_CONTROL
;
646 // Setting this flag directs the UNDI to queue this command for later
647 // execution if the UNDI is busy and it supports command queuing.
648 // If queuing is not supported, a PXE_STATCODE_INVALID_CONTROL error
649 // is returned. If the queue is full, a PXE_STATCODE_CDB_QUEUE_FULL
650 // error is returned.
652 #define PXE_CONTROL_QUEUE_IF_BUSY 0x0002
655 // These two bit values are used to determine if there are more UNDI
656 // CDB structures following this one. If the link bit is set, there
657 // must be a CDB structure following this one. Execution will start
658 // on the next CDB structure as soon as this one completes successfully.
659 // If an error is generated by this command, execution will stop.
661 #define PXE_CONTROL_LINK 0x0001
662 #define PXE_CONTROL_LAST_CDB_IN_LIST 0x0000
664 typedef PXE_UINT8 PXE_FRAME_TYPE
;
666 #define PXE_FRAME_TYPE_NONE 0x00
667 #define PXE_FRAME_TYPE_UNICAST 0x01
668 #define PXE_FRAME_TYPE_BROADCAST 0x02
669 #define PXE_FRAME_TYPE_FILTERED_MULTICAST 0x03
670 #define PXE_FRAME_TYPE_PROMISCUOUS 0x04
671 #define PXE_FRAME_TYPE_PROMISCUOUS_MULTICAST 0x05
673 #define PXE_FRAME_TYPE_MULTICAST PXE_FRAME_TYPE_FILTERED_MULTICAST
675 typedef PXE_UINT32 PXE_IPV4
;
677 typedef PXE_UINT32 PXE_IPV6
[4];
678 #define PXE_MAC_LENGTH 32
680 typedef PXE_UINT8 PXE_MAC_ADDR
[PXE_MAC_LENGTH
];
682 typedef PXE_UINT8 PXE_IFTYPE
;
683 typedef UINT16 PXE_MEDIA_PROTOCOL
;
686 // This information is from the ARP section of RFC 1700.
688 // 1 Ethernet (10Mb) [JBP]
689 // 2 Experimental Ethernet (3Mb) [JBP]
690 // 3 Amateur Radio AX.25 [PXK]
691 // 4 Proteon ProNET Token Ring [JBP]
693 // 6 IEEE 802 Networks [JBP]
695 // 8 Hyperchannel [JBP]
697 // 10 Autonet Short Address [MXB1]
698 // 11 LocalTalk [JKR1]
699 // 12 LocalNet (IBM* PCNet or SYTEK* LocalNET) [JXM]
700 // 13 Ultra link [RXD2]
702 // 15 Frame Relay [AGM]
703 // 16 Asynchronous Transmission Mode (ATM) [JXB2]
705 // 18 Fibre Channel [Yakov Rekhter]
706 // 19 Asynchronous Transmission Mode (ATM) [Mark Laubach]
707 // 20 Serial Line [JBP]
708 // 21 Asynchronous Transmission Mode (ATM) [MXB1]
710 // * Other names and brands may be claimed as the property of others.
712 #define PXE_IFTYPE_ETHERNET 0x01
713 #define PXE_IFTYPE_TOKENRING 0x04
714 #define PXE_IFTYPE_FIBRE_CHANNEL 0x12
716 typedef struct s_pxe_hw_undi
{
717 PXE_UINT32 Signature
; // PXE_ROMID_SIGNATURE
718 PXE_UINT8 Len
; // sizeof(PXE_HW_UNDI)
719 PXE_UINT8 Fudge
; // makes 8-bit cksum equal zero
720 PXE_UINT8 Rev
; // PXE_ROMID_REV
721 PXE_UINT8 IFcnt
; // physical connector count
722 PXE_UINT8 MajorVer
; // PXE_ROMID_MAJORVER
723 PXE_UINT8 MinorVer
; // PXE_ROMID_MINORVER
724 PXE_UINT16 reserved
; // zero, not used
725 PXE_UINT32 Implementation
; // implementation flags
726 // reserved // vendor use
727 // UINT32 Status; // status port
728 // UINT32 Command; // command port
729 // UINT64 CDBaddr; // CDB address port
734 // Status port bit definitions
737 // UNDI operation state
739 #define PXE_HWSTAT_STATE_MASK 0xC0000000
740 #define PXE_HWSTAT_BUSY 0xC0000000
741 #define PXE_HWSTAT_INITIALIZED 0x80000000
742 #define PXE_HWSTAT_STARTED 0x40000000
743 #define PXE_HWSTAT_STOPPED 0x00000000
746 // If set, last command failed
748 #define PXE_HWSTAT_COMMAND_FAILED 0x20000000
751 // If set, identifies enabled receive filters
753 #define PXE_HWSTAT_PROMISCUOUS_MULTICAST_RX_ENABLED 0x00001000
754 #define PXE_HWSTAT_PROMISCUOUS_RX_ENABLED 0x00000800
755 #define PXE_HWSTAT_BROADCAST_RX_ENABLED 0x00000400
756 #define PXE_HWSTAT_MULTICAST_RX_ENABLED 0x00000200
757 #define PXE_HWSTAT_UNICAST_RX_ENABLED 0x00000100
760 // If set, identifies enabled external interrupts
762 #define PXE_HWSTAT_SOFTWARE_INT_ENABLED 0x00000080
763 #define PXE_HWSTAT_TX_COMPLETE_INT_ENABLED 0x00000040
764 #define PXE_HWSTAT_PACKET_RX_INT_ENABLED 0x00000020
765 #define PXE_HWSTAT_CMD_COMPLETE_INT_ENABLED 0x00000010
768 // If set, identifies pending interrupts
770 #define PXE_HWSTAT_SOFTWARE_INT_PENDING 0x00000008
771 #define PXE_HWSTAT_TX_COMPLETE_INT_PENDING 0x00000004
772 #define PXE_HWSTAT_PACKET_RX_INT_PENDING 0x00000002
773 #define PXE_HWSTAT_CMD_COMPLETE_INT_PENDING 0x00000001
776 // Command port definitions
779 // If set, CDB identified in CDBaddr port is given to UNDI.
780 // If not set, other bits in this word will be processed.
782 #define PXE_HWCMD_ISSUE_COMMAND 0x80000000
783 #define PXE_HWCMD_INTS_AND_FILTS 0x00000000
786 // Use these to enable/disable receive filters.
788 #define PXE_HWCMD_PROMISCUOUS_MULTICAST_RX_ENABLE 0x00001000
789 #define PXE_HWCMD_PROMISCUOUS_RX_ENABLE 0x00000800
790 #define PXE_HWCMD_BROADCAST_RX_ENABLE 0x00000400
791 #define PXE_HWCMD_MULTICAST_RX_ENABLE 0x00000200
792 #define PXE_HWCMD_UNICAST_RX_ENABLE 0x00000100
795 // Use these to enable/disable external interrupts
797 #define PXE_HWCMD_SOFTWARE_INT_ENABLE 0x00000080
798 #define PXE_HWCMD_TX_COMPLETE_INT_ENABLE 0x00000040
799 #define PXE_HWCMD_PACKET_RX_INT_ENABLE 0x00000020
800 #define PXE_HWCMD_CMD_COMPLETE_INT_ENABLE 0x00000010
803 // Use these to clear pending external interrupts
805 #define PXE_HWCMD_CLEAR_SOFTWARE_INT 0x00000008
806 #define PXE_HWCMD_CLEAR_TX_COMPLETE_INT 0x00000004
807 #define PXE_HWCMD_CLEAR_PACKET_RX_INT 0x00000002
808 #define PXE_HWCMD_CLEAR_CMD_COMPLETE_INT 0x00000001
810 typedef struct s_pxe_sw_undi
{
811 PXE_UINT32 Signature
; // PXE_ROMID_SIGNATURE
812 PXE_UINT8 Len
; // sizeof(PXE_SW_UNDI)
813 PXE_UINT8 Fudge
; // makes 8-bit cksum zero
814 PXE_UINT8 Rev
; // PXE_ROMID_REV
815 PXE_UINT8 IFcnt
; // physical connector count
816 PXE_UINT8 MajorVer
; // PXE_ROMID_MAJORVER
817 PXE_UINT8 MinorVer
; // PXE_ROMID_MINORVER
818 PXE_UINT16 reserved1
; // zero, not used
819 PXE_UINT32 Implementation
; // Implementation flags
820 PXE_UINT64 EntryPoint
; // API entry point
821 PXE_UINT8 reserved2
[3]; // zero, not used
822 PXE_UINT8 BusCnt
; // number of bustypes supported
823 PXE_UINT32 BusType
[1]; // list of supported bustypes
826 typedef union u_pxe_undi
{
832 // Signature of !PXE structure
834 #define PXE_ROMID_SIGNATURE PXE_BUSTYPE ('!', 'P', 'X', 'E')
837 // !PXE structure format revision
839 #define PXE_ROMID_REV 0x02
842 // UNDI command interface revision. These are the values that get sent
843 // in option 94 (Client Network Interface Identifier) in the DHCP Discover
844 // and PXE Boot Server Request packets.
846 #define PXE_ROMID_MAJORVER 0x03
847 #define PXE_ROMID_MINORVER 0x01
850 // Implementation flags
852 #define PXE_ROMID_IMP_HW_UNDI 0x80000000
853 #define PXE_ROMID_IMP_SW_VIRT_ADDR 0x40000000
854 #define PXE_ROMID_IMP_64BIT_DEVICE 0x00010000
855 #define PXE_ROMID_IMP_FRAG_SUPPORTED 0x00008000
856 #define PXE_ROMID_IMP_CMD_LINK_SUPPORTED 0x00004000
857 #define PXE_ROMID_IMP_CMD_QUEUE_SUPPORTED 0x00002000
858 #define PXE_ROMID_IMP_MULTI_FRAME_SUPPORTED 0x00001000
859 #define PXE_ROMID_IMP_NVDATA_SUPPORT_MASK 0x00000C00
860 #define PXE_ROMID_IMP_NVDATA_BULK_WRITABLE 0x00000C00
861 #define PXE_ROMID_IMP_NVDATA_SPARSE_WRITABLE 0x00000800
862 #define PXE_ROMID_IMP_NVDATA_READ_ONLY 0x00000400
863 #define PXE_ROMID_IMP_NVDATA_NOT_AVAILABLE 0x00000000
864 #define PXE_ROMID_IMP_STATISTICS_SUPPORTED 0x00000200
865 #define PXE_ROMID_IMP_STATION_ADDR_SETTABLE 0x00000100
866 #define PXE_ROMID_IMP_PROMISCUOUS_MULTICAST_RX_SUPPORTED 0x00000080
867 #define PXE_ROMID_IMP_PROMISCUOUS_RX_SUPPORTED 0x00000040
868 #define PXE_ROMID_IMP_BROADCAST_RX_SUPPORTED 0x00000020
869 #define PXE_ROMID_IMP_FILTERED_MULTICAST_RX_SUPPORTED 0x00000010
870 #define PXE_ROMID_IMP_SOFTWARE_INT_SUPPORTED 0x00000008
871 #define PXE_ROMID_IMP_TX_COMPLETE_INT_SUPPORTED 0x00000004
872 #define PXE_ROMID_IMP_PACKET_RX_INT_SUPPORTED 0x00000002
873 #define PXE_ROMID_IMP_CMD_COMPLETE_INT_SUPPORTED 0x00000001
875 typedef struct s_pxe_cdb
{
882 PXE_STATCODE StatCode
;
883 PXE_STATFLAGS StatFlags
;
888 typedef union u_pxe_ip_addr
{
893 typedef union pxe_device
{
895 // PCI and PC Card NICs are both identified using bus, device
896 // and function numbers. For PC Card, this may require PC
897 // Card services to be loaded in the BIOS or preboot
902 // See S/W UNDI ROMID structure definition for PCI and
903 // PCC BusType definitions.
908 // Bus, device & function numbers that locate this device.
917 // %%TBD - More information is needed about enumerating
918 // USB and 1394 devices.
928 // cpb and db definitions
930 #define MAX_PCI_CONFIG_LEN 64 // # of dwords
931 #define MAX_EEPROM_LEN 128 // #of dwords
932 #define MAX_XMIT_BUFFERS 32 // recycling Q length for xmit_done
933 #define MAX_MCAST_ADDRESS_CNT 8
935 typedef struct s_pxe_cpb_start_30
{
937 // PXE_VOID Delay(UINTN microseconds);
939 // UNDI will never request a delay smaller than 10 microseconds
940 // and will always request delays in increments of 10 microseconds.
941 // The Delay() CallBack routine must delay between n and n + 10
942 // microseconds before returning control to the UNDI.
944 // This field cannot be set to zero.
949 // PXE_VOID Block(UINT32 enable);
951 // UNDI may need to block multi-threaded/multi-processor access to
952 // critical code sections when programming or accessing the network
953 // device. To this end, a blocking service is needed by the UNDI.
954 // When UNDI needs a block, it will call Block() passing a non-zero
955 // value. When UNDI no longer needs a block, it will call Block()
956 // with a zero value. When called, if the Block() is already enabled,
957 // do not return control to the UNDI until the previous Block() is
960 // This field cannot be set to zero.
965 // PXE_VOID Virt2Phys(UINT64 virtual, UINT64 physical_ptr);
967 // UNDI will pass the virtual address of a buffer and the virtual
968 // address of a 64-bit physical buffer. Convert the virtual address
969 // to a physical address and write the result to the physical address
970 // buffer. If virtual and physical addresses are the same, just
971 // copy the virtual address to the physical address buffer.
973 // This field can be set to zero if virtual and physical addresses
978 // PXE_VOID Mem_IO(UINT8 read_write, UINT8 len, UINT64 port,
981 // UNDI will read or write the device io space using this call back
982 // function. It passes the number of bytes as the len parameter and it
983 // will be either 1,2,4 or 8.
985 // This field can not be set to zero.
990 typedef struct s_pxe_cpb_start_31
{
992 // PXE_VOID Delay(UINT64 UnqId, UINTN microseconds);
994 // UNDI will never request a delay smaller than 10 microseconds
995 // and will always request delays in increments of 10 microseconds.
996 // The Delay() CallBack routine must delay between n and n + 10
997 // microseconds before returning control to the UNDI.
999 // This field cannot be set to zero.
1004 // PXE_VOID Block(UINT64 unq_id, UINT32 enable);
1006 // UNDI may need to block multi-threaded/multi-processor access to
1007 // critical code sections when programming or accessing the network
1008 // device. To this end, a blocking service is needed by the UNDI.
1009 // When UNDI needs a block, it will call Block() passing a non-zero
1010 // value. When UNDI no longer needs a block, it will call Block()
1011 // with a zero value. When called, if the Block() is already enabled,
1012 // do not return control to the UNDI until the previous Block() is
1015 // This field cannot be set to zero.
1020 // PXE_VOID Virt2Phys(UINT64 UnqId, UINT64 virtual, UINT64 physical_ptr);
1022 // UNDI will pass the virtual address of a buffer and the virtual
1023 // address of a 64-bit physical buffer. Convert the virtual address
1024 // to a physical address and write the result to the physical address
1025 // buffer. If virtual and physical addresses are the same, just
1026 // copy the virtual address to the physical address buffer.
1028 // This field can be set to zero if virtual and physical addresses
1033 // PXE_VOID Mem_IO(UINT64 UnqId, UINT8 read_write, UINT8 len, UINT64 port,
1034 // UINT64 buf_addr);
1036 // UNDI will read or write the device io space using this call back
1037 // function. It passes the number of bytes as the len parameter and it
1038 // will be either 1,2,4 or 8.
1040 // This field can not be set to zero.
1044 // PXE_VOID Map_Mem(UINT64 unq_id, UINT64 virtual_addr, UINT32 size,
1045 // UINT32 Direction, UINT64 mapped_addr);
1047 // UNDI will pass the virtual address of a buffer, direction of the data
1048 // flow from/to the mapped buffer (the constants are defined below)
1049 // and a place holder (pointer) for the mapped address.
1050 // This call will Map the given address to a physical DMA address and write
1051 // the result to the mapped_addr pointer. If there is no need to
1052 // map the given address to a lower address (i.e. the given address is
1053 // associated with a physical address that is already compatible to be
1054 // used with the DMA, it converts the given virtual address to it's
1055 // physical address and write that in the mapped address pointer.
1057 // This field can be set to zero if there is no mapping service available
1062 // PXE_VOID UnMap_Mem(UINT64 unq_id, UINT64 virtual_addr, UINT32 size,
1063 // UINT32 Direction, UINT64 mapped_addr);
1065 // UNDI will pass the virtual and mapped addresses of a buffer
1066 // This call will un map the given address
1068 // This field can be set to zero if there is no unmapping service available
1073 // PXE_VOID Sync_Mem(UINT64 unq_id, UINT64 virtual,
1074 // UINT32 size, UINT32 Direction, UINT64 mapped_addr);
1076 // UNDI will pass the virtual and mapped addresses of a buffer
1077 // This call will synchronize the contents of both the virtual and mapped
1078 // buffers for the given Direction.
1080 // This field can be set to zero if there is no service available
1085 // protocol driver can provide anything for this Unique_ID, UNDI remembers
1086 // that as just a 64bit value assocaited to the interface specified by
1087 // the ifnum and gives it back as a parameter to all the call-back routines
1088 // when calling for that interface!
1094 #define TO_AND_FROM_DEVICE 0
1095 #define FROM_DEVICE 1
1098 #define PXE_DELAY_MILLISECOND 1000
1099 #define PXE_DELAY_SECOND 1000000
1100 #define PXE_IO_READ 0
1101 #define PXE_IO_WRITE 1
1102 #define PXE_MEM_READ 2
1103 #define PXE_MEM_WRITE 4
1105 typedef struct s_pxe_db_get_init_info
{
1107 // Minimum length of locked memory buffer that must be given to
1108 // the Initialize command. Giving UNDI more memory will generally
1109 // give better performance.
1111 // If MemoryRequired is zero, the UNDI does not need and will not
1112 // use system memory to receive and transmit packets.
1114 PXE_UINT32 MemoryRequired
;
1117 // Maximum frame data length for Tx/Rx excluding the media header.
1119 PXE_UINT32 FrameDataLen
;
1122 // Supported link speeds are in units of mega bits. Common ethernet
1123 // values are 10, 100 and 1000. Unused LinkSpeeds[] entries are zero
1126 PXE_UINT32 LinkSpeeds
[4];
1129 // Number of non-volatile storage items.
1134 // Width of non-volatile storage item in bytes. 0, 1, 2 or 4
1139 // Media header length. This is the typical media header length for
1140 // this UNDI. This information is needed when allocating receive
1141 // and transmit buffers.
1143 PXE_UINT16 MediaHeaderLen
;
1146 // Number of bytes in the NIC hardware (MAC) address.
1148 PXE_UINT16 HWaddrLen
;
1151 // Maximum number of multicast MAC addresses in the multicast
1152 // MAC address filter list.
1154 PXE_UINT16 MCastFilterCnt
;
1157 // Default number and size of transmit and receive buffers that will
1158 // be allocated by the UNDI. If MemoryRequired is non-zero, this
1159 // allocation will come out of the memory buffer given to the Initialize
1160 // command. If MemoryRequired is zero, this allocation will come out of
1161 // memory on the NIC.
1163 PXE_UINT16 TxBufCnt
;
1164 PXE_UINT16 TxBufSize
;
1165 PXE_UINT16 RxBufCnt
;
1166 PXE_UINT16 RxBufSize
;
1169 // Hardware interface types defined in the Assigned Numbers RFC
1170 // and used in DHCP and ARP packets.
1171 // See the PXE_IFTYPE typedef and PXE_IFTYPE_xxx macros.
1176 // Supported duplex. See PXE_DUPLEX_xxxxx #defines below.
1178 PXE_UINT8 SupportedDuplexModes
;
1181 // Supported loopback options. See PXE_LOOPBACK_xxxxx #defines below.
1183 PXE_UINT8 SupportedLoopBackModes
;
1184 } PXE_DB_GET_INIT_INFO
;
1186 #define PXE_MAX_TXRX_UNIT_ETHER 1500
1188 #define PXE_HWADDR_LEN_ETHER 0x0006
1189 #define PXE_MAC_HEADER_LEN_ETHER 0x000E
1191 #define PXE_DUPLEX_ENABLE_FULL_SUPPORTED 1
1192 #define PXE_DUPLEX_FORCE_FULL_SUPPORTED 2
1194 #define PXE_LOOPBACK_INTERNAL_SUPPORTED 1
1195 #define PXE_LOOPBACK_EXTERNAL_SUPPORTED 2
1197 typedef struct s_pxe_pci_config_info
{
1199 // This is the flag field for the PXE_DB_GET_CONFIG_INFO union.
1200 // For PCI bus devices, this field is set to PXE_BUSTYPE_PCI.
1205 // This identifies the PCI network device that this UNDI interface
1213 // This is a copy of the PCI configuration space for this
1221 } PXE_PCI_CONFIG_INFO
;
1223 typedef struct s_pxe_pcc_config_info
{
1225 // This is the flag field for the PXE_DB_GET_CONFIG_INFO union.
1226 // For PCC bus devices, this field is set to PXE_BUSTYPE_PCC.
1231 // This identifies the PCC network device that this UNDI interface
1239 // This is a copy of the PCC configuration space for this
1243 PXE_UINT8 Byte
[256];
1244 PXE_UINT16 Word
[128];
1245 PXE_UINT32 Dword
[64];
1247 } PXE_PCC_CONFIG_INFO
;
1249 typedef union u_pxe_db_get_config_info
{
1250 PXE_PCI_CONFIG_INFO pci
;
1251 PXE_PCC_CONFIG_INFO pcc
;
1252 } PXE_DB_GET_CONFIG_INFO
;
1254 typedef struct s_pxe_cpb_initialize
{
1256 // Address of first (lowest) byte of the memory buffer. This buffer must
1257 // be in contiguous physical memory and cannot be swapped out. The UNDI
1258 // will be using this for transmit and receive buffering.
1260 PXE_UINT64 MemoryAddr
;
1263 // MemoryLength must be greater than or equal to MemoryRequired
1264 // returned by the Get Init Info command.
1266 PXE_UINT32 MemoryLength
;
1269 // Desired link speed in Mbit/sec. Common ethernet values are 10, 100
1270 // and 1000. Setting a value of zero will auto-detect and/or use the
1271 // default link speed (operation depends on UNDI/NIC functionality).
1273 PXE_UINT32 LinkSpeed
;
1276 // Suggested number and size of receive and transmit buffers to
1277 // allocate. If MemoryAddr and MemoryLength are non-zero, this
1278 // allocation comes out of the supplied memory buffer. If MemoryAddr
1279 // and MemoryLength are zero, this allocation comes out of memory
1282 // If these fields are set to zero, the UNDI will allocate buffer
1283 // counts and sizes as it sees fit.
1285 PXE_UINT16 TxBufCnt
;
1286 PXE_UINT16 TxBufSize
;
1287 PXE_UINT16 RxBufCnt
;
1288 PXE_UINT16 RxBufSize
;
1291 // The following configuration parameters are optional and must be zero
1292 // to use the default values.
1294 PXE_UINT8 DuplexMode
;
1296 PXE_UINT8 LoopBackMode
;
1297 } PXE_CPB_INITIALIZE
;
1299 #define PXE_DUPLEX_DEFAULT 0x00
1300 #define PXE_FORCE_FULL_DUPLEX 0x01
1301 #define PXE_ENABLE_FULL_DUPLEX 0x02
1302 #define PXE_FORCE_HALF_DUPLEX 0x04
1303 #define PXE_DISABLE_FULL_DUPLEX 0x08
1305 #define LOOPBACK_NORMAL 0
1306 #define LOOPBACK_INTERNAL 1
1307 #define LOOPBACK_EXTERNAL 2
1309 typedef struct s_pxe_db_initialize
{
1311 // Actual amount of memory used from the supplied memory buffer. This
1312 // may be less that the amount of memory suppllied and may be zero if
1313 // the UNDI and network device do not use external memory buffers.
1315 // Memory used by the UNDI and network device is allocated from the
1316 // lowest memory buffer address.
1318 PXE_UINT32 MemoryUsed
;
1321 // Actual number and size of receive and transmit buffers that were
1324 PXE_UINT16 TxBufCnt
;
1325 PXE_UINT16 TxBufSize
;
1326 PXE_UINT16 RxBufCnt
;
1327 PXE_UINT16 RxBufSize
;
1328 } PXE_DB_INITIALIZE
;
1330 typedef struct s_pxe_cpb_receive_filters
{
1332 // List of multicast MAC addresses. This list, if present, will
1333 // replace the existing multicast MAC address filter list.
1335 PXE_MAC_ADDR MCastList
[MAX_MCAST_ADDRESS_CNT
];
1336 } PXE_CPB_RECEIVE_FILTERS
;
1338 typedef struct s_pxe_db_receive_filters
{
1340 // Filtered multicast MAC address list.
1342 PXE_MAC_ADDR MCastList
[MAX_MCAST_ADDRESS_CNT
];
1343 } PXE_DB_RECEIVE_FILTERS
;
1345 typedef struct s_pxe_cpb_station_address
{
1347 // If supplied and supported, the current station MAC address
1350 PXE_MAC_ADDR StationAddr
;
1351 } PXE_CPB_STATION_ADDRESS
;
1353 typedef struct s_pxe_dpb_station_address
{
1355 // Current station MAC address.
1357 PXE_MAC_ADDR StationAddr
;
1360 // Station broadcast MAC address.
1362 PXE_MAC_ADDR BroadcastAddr
;
1365 // Permanent station MAC address.
1367 PXE_MAC_ADDR PermanentAddr
;
1368 } PXE_DB_STATION_ADDRESS
;
1370 typedef struct s_pxe_db_statistics
{
1372 // Bit field identifying what statistic data is collected by the
1374 // If bit 0x00 is set, Data[0x00] is collected.
1375 // If bit 0x01 is set, Data[0x01] is collected.
1376 // If bit 0x20 is set, Data[0x20] is collected.
1377 // If bit 0x21 is set, Data[0x21] is collected.
1380 PXE_UINT64 Supported
;
1385 PXE_UINT64 Data
[64];
1386 } PXE_DB_STATISTICS
;
1389 // Total number of frames received. Includes frames with errors and
1392 #define PXE_STATISTICS_RX_TOTAL_FRAMES 0x00
1395 // Number of valid frames received and copied into receive buffers.
1397 #define PXE_STATISTICS_RX_GOOD_FRAMES 0x01
1400 // Number of frames below the minimum length for the media.
1401 // This would be <64 for ethernet.
1403 #define PXE_STATISTICS_RX_UNDERSIZE_FRAMES 0x02
1406 // Number of frames longer than the maxminum length for the
1407 // media. This would be >1500 for ethernet.
1409 #define PXE_STATISTICS_RX_OVERSIZE_FRAMES 0x03
1412 // Valid frames that were dropped because receive buffers were full.
1414 #define PXE_STATISTICS_RX_DROPPED_FRAMES 0x04
1417 // Number of valid unicast frames received and not dropped.
1419 #define PXE_STATISTICS_RX_UNICAST_FRAMES 0x05
1422 // Number of valid broadcast frames received and not dropped.
1424 #define PXE_STATISTICS_RX_BROADCAST_FRAMES 0x06
1427 // Number of valid mutlicast frames received and not dropped.
1429 #define PXE_STATISTICS_RX_MULTICAST_FRAMES 0x07
1432 // Number of frames w/ CRC or alignment errors.
1434 #define PXE_STATISTICS_RX_CRC_ERROR_FRAMES 0x08
1437 // Total number of bytes received. Includes frames with errors
1438 // and dropped frames.
1440 #define PXE_STATISTICS_RX_TOTAL_BYTES 0x09
1443 // Transmit statistics.
1445 #define PXE_STATISTICS_TX_TOTAL_FRAMES 0x0A
1446 #define PXE_STATISTICS_TX_GOOD_FRAMES 0x0B
1447 #define PXE_STATISTICS_TX_UNDERSIZE_FRAMES 0x0C
1448 #define PXE_STATISTICS_TX_OVERSIZE_FRAMES 0x0D
1449 #define PXE_STATISTICS_TX_DROPPED_FRAMES 0x0E
1450 #define PXE_STATISTICS_TX_UNICAST_FRAMES 0x0F
1451 #define PXE_STATISTICS_TX_BROADCAST_FRAMES 0x10
1452 #define PXE_STATISTICS_TX_MULTICAST_FRAMES 0x11
1453 #define PXE_STATISTICS_TX_CRC_ERROR_FRAMES 0x12
1454 #define PXE_STATISTICS_TX_TOTAL_BYTES 0x13
1457 // Number of collisions detection on this subnet.
1459 #define PXE_STATISTICS_COLLISIONS 0x14
1462 // Number of frames destined for unsupported protocol.
1464 #define PXE_STATISTICS_UNSUPPORTED_PROTOCOL 0x15
1466 typedef struct s_pxe_cpb_mcast_ip_to_mac
{
1468 // Multicast IP address to be converted to multicast MAC address.
1471 } PXE_CPB_MCAST_IP_TO_MAC
;
1473 typedef struct s_pxe_db_mcast_ip_to_mac
{
1475 // Multicast MAC address.
1478 } PXE_DB_MCAST_IP_TO_MAC
;
1480 typedef struct s_pxe_cpb_nvdata_sparse
{
1482 // NvData item list. Only items in this list will be updated.
1486 // Non-volatile storage address to be changed.
1491 // Data item to write into above storage address.
1498 } Item
[MAX_EEPROM_LEN
];
1500 PXE_CPB_NVDATA_SPARSE
;
1503 // When using bulk update, the size of the CPB structure must be
1504 // the same size as the non-volatile NIC storage.
1506 typedef union u_pxe_cpb_nvdata_bulk
{
1508 // Array of byte-wide data items.
1510 PXE_UINT8 Byte
[MAX_EEPROM_LEN
<< 2];
1513 // Array of word-wide data items.
1515 PXE_UINT16 Word
[MAX_EEPROM_LEN
<< 1];
1518 // Array of dword-wide data items.
1520 PXE_UINT32 Dword
[MAX_EEPROM_LEN
];
1521 } PXE_CPB_NVDATA_BULK
;
1523 typedef struct s_pxe_db_nvdata
{
1525 // Arrays of data items from non-volatile storage.
1529 // Array of byte-wide data items.
1531 PXE_UINT8 Byte
[MAX_EEPROM_LEN
<< 2];
1534 // Array of word-wide data items.
1536 PXE_UINT16 Word
[MAX_EEPROM_LEN
<< 1];
1539 // Array of dword-wide data items.
1541 PXE_UINT32 Dword
[MAX_EEPROM_LEN
];
1545 typedef struct s_pxe_db_get_status
{
1547 // Length of next receive frame (header + data). If this is zero,
1548 // there is no next receive frame available.
1550 PXE_UINT32 RxFrameLen
;
1553 // Reserved, set to zero.
1555 PXE_UINT32 reserved
;
1558 // Addresses of transmitted buffers that need to be recycled.
1560 PXE_UINT64 TxBuffer
[MAX_XMIT_BUFFERS
];
1561 } PXE_DB_GET_STATUS
;
1563 typedef struct s_pxe_cpb_fill_header
{
1565 // Source and destination MAC addresses. These will be copied into
1566 // the media header without doing byte swapping.
1568 PXE_MAC_ADDR SrcAddr
;
1569 PXE_MAC_ADDR DestAddr
;
1572 // Address of first byte of media header. The first byte of packet data
1573 // follows the last byte of the media header.
1575 PXE_UINT64 MediaHeader
;
1578 // Length of packet data in bytes (not including the media header).
1580 PXE_UINT32 PacketLen
;
1583 // Protocol type. This will be copied into the media header without
1584 // doing byte swapping. Protocol type numbers can be obtained from
1585 // the Assigned Numbers RFC 1700.
1587 PXE_UINT16 Protocol
;
1590 // Length of the media header in bytes.
1592 PXE_UINT16 MediaHeaderLen
;
1593 } PXE_CPB_FILL_HEADER
;
1595 #define PXE_PROTOCOL_ETHERNET_IP 0x0800
1596 #define PXE_PROTOCOL_ETHERNET_ARP 0x0806
1597 #define MAX_XMIT_FRAGMENTS 16
1599 typedef struct s_pxe_cpb_fill_header_fragmented
{
1601 // Source and destination MAC addresses. These will be copied into
1602 // the media header without doing byte swapping.
1604 PXE_MAC_ADDR SrcAddr
;
1605 PXE_MAC_ADDR DestAddr
;
1608 // Length of packet data in bytes (not including the media header).
1610 PXE_UINT32 PacketLen
;
1613 // Protocol type. This will be copied into the media header without
1614 // doing byte swapping. Protocol type numbers can be obtained from
1615 // the Assigned Numbers RFC 1700.
1617 PXE_MEDIA_PROTOCOL Protocol
;
1620 // Length of the media header in bytes.
1622 PXE_UINT16 MediaHeaderLen
;
1625 // Number of packet fragment descriptors.
1630 // Reserved, must be set to zero.
1632 PXE_UINT16 reserved
;
1635 // Array of packet fragment descriptors. The first byte of the media
1636 // header is the first byte of the first fragment.
1640 // Address of this packet fragment.
1642 PXE_UINT64 FragAddr
;
1645 // Length of this packet fragment.
1650 // Reserved, must be set to zero.
1652 PXE_UINT32 reserved
;
1653 } FragDesc
[MAX_XMIT_FRAGMENTS
];
1655 PXE_CPB_FILL_HEADER_FRAGMENTED
;
1657 typedef struct s_pxe_cpb_transmit
{
1659 // Address of first byte of frame buffer. This is also the first byte
1660 // of the media header.
1662 PXE_UINT64 FrameAddr
;
1665 // Length of the data portion of the frame buffer in bytes. Do not
1666 // include the length of the media header.
1671 // Length of the media header in bytes.
1673 PXE_UINT16 MediaheaderLen
;
1676 // Reserved, must be zero.
1678 PXE_UINT16 reserved
;
1681 typedef struct s_pxe_cpb_transmit_fragments
{
1683 // Length of packet data in bytes (not including the media header).
1685 PXE_UINT32 FrameLen
;
1688 // Length of the media header in bytes.
1690 PXE_UINT16 MediaheaderLen
;
1693 // Number of packet fragment descriptors.
1698 // Array of frame fragment descriptors. The first byte of the first
1699 // fragment is also the first byte of the media header.
1703 // Address of this frame fragment.
1705 PXE_UINT64 FragAddr
;
1708 // Length of this frame fragment.
1713 // Reserved, must be set to zero.
1715 PXE_UINT32 reserved
;
1716 } FragDesc
[MAX_XMIT_FRAGMENTS
];
1718 PXE_CPB_TRANSMIT_FRAGMENTS
;
1720 typedef struct s_pxe_cpb_receive
{
1722 // Address of first byte of receive buffer. This is also the first byte
1723 // of the frame header.
1725 PXE_UINT64 BufferAddr
;
1728 // Length of receive buffer. This must be large enough to hold the
1729 // received frame (media header + data). If the length of smaller than
1730 // the received frame, data will be lost.
1732 PXE_UINT32 BufferLen
;
1735 // Reserved, must be set to zero.
1737 PXE_UINT32 reserved
;
1740 typedef struct s_pxe_db_receive
{
1742 // Source and destination MAC addresses from media header.
1744 PXE_MAC_ADDR SrcAddr
;
1745 PXE_MAC_ADDR DestAddr
;
1748 // Length of received frame. May be larger than receive buffer size.
1749 // The receive buffer will not be overwritten. This is how to tell
1750 // if data was lost because the receive buffer was too small.
1752 PXE_UINT32 FrameLen
;
1755 // Protocol type from media header.
1757 PXE_MEDIA_PROTOCOL Protocol
;
1760 // Length of media header in received frame.
1762 PXE_UINT16 MediaHeaderLen
;
1765 // Type of receive frame.
1767 PXE_FRAME_TYPE Type
;
1770 // Reserved, must be zero.
1772 PXE_UINT8 reserved
[7];
1777 // Packet definitions
1782 UINT8 BootpHwAddrLen
;
1783 UINT8 BootpGateHops
;
1785 UINT16 BootpSeconds
;
1787 UINT8 BootpCiAddr
[4];
1788 UINT8 BootpYiAddr
[4];
1789 UINT8 BootpSiAddr
[4];
1790 UINT8 BootpGiAddr
[4];
1791 UINT8 BootpHwAddr
[16];
1792 UINT8 BootpSrvName
[64];
1793 UINT8 BootpBootFile
[128];
1795 UINT8 DhcpOptions
[56];
1796 } EFI_PXE_BASE_CODE_DHCPV4_PACKET
;
1800 EFI_PXE_BASE_CODE_DHCPV4_PACKET Dhcpv4
;
1803 // EFI_PXE_BASE_CODE_DHCPV6_PACKET Dhcpv6;
1805 } EFI_PXE_BASE_CODE_PACKET
;