1 #------------------------------------------------------------------------------
3 # Copyright (c) 2006 - 2009, Intel Corporation
4 # All rights reserved. This program and the accompanying materials
5 # are licensed and made available under the terms and conditions of the BSD License
6 # which accompanies this distribution. The full text of the license may be found at
7 # http://opensource.org/licenses/bsd-license.php
9 # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
10 # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
20 #------------------------------------------------------------------------------
22 #include <Library/BaseLib.h>
24 ASM_GLOBAL ASM_PFX(m16Start)
25 ASM_GLOBAL ASM_PFX(m16Size)
26 ASM_GLOBAL ASM_PFX(mThunk16Attr)
27 ASM_GLOBAL ASM_PFX(m16Gdt)
28 ASM_GLOBAL ASM_PFX(m16GdtrBase)
29 ASM_GLOBAL ASM_PFX(mTransition)
30 ASM_GLOBAL ASM_PFX(InternalAsmThunk16)
32 # define the structure of IA32_REGS
45 .equ _EFLAGS, 40 #size 8
49 .equ IA32_REGS_SIZE, 56
53 ASM_PFX(m16Size): .word ASM_PFX(InternalAsmThunk16) - ASM_PFX(m16Start)
54 ASM_PFX(mThunk16Attr): .word _ThunkAttr - ASM_PFX(m16Start)
55 ASM_PFX(m16Gdt): .word ASM_PFX(NullSeg) - ASM_PFX(m16Start)
56 ASM_PFX(m16GdtrBase): .word _16GdtrBase - ASM_PFX(m16Start)
57 ASM_PFX(mTransition): .word _EntryPoint - ASM_PFX(m16Start)
65 #------------------------------------------------------------------------------
66 # _BackFromUserCode() takes control in real mode after 'retf' has been executed
67 # by user code. It will be shadowed to somewhere in memory below 1MB.
68 #------------------------------------------------------------------------------
69 ASM_GLOBAL ASM_PFX(BackFromUserCode)
70 ASM_PFX(BackFromUserCode):
72 # The order of saved registers on the stack matches the order they appears
73 # in IA32_REGS structure. This facilitates wrapper function to extract them
74 # into that structure.
76 # Some instructions for manipulation of segment registers have to be written
77 # in opcode since 64-bit MASM prevents accesses to those registers.
82 call L_Base # push eip
85 pushq $0 # reserved high order 32 bits of EFlags
86 .byte 0x66, 0x9c # pushfd actually
87 cli # disable interrupts
92 .byte 0x66,0x60 # pushad
93 .byte 0x66,0xba # mov edx, imm32
95 testb $THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15, %dl
97 movl $0x15cd2401,%eax # mov ax, 2401h & int 15h
98 cli # disable interrupts
101 testb $THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL, %dl
105 outb %al, $0x92 # deactivate A20M#
108 lea IA32_REGS_SIZE(%esp), %bp
110 # rsi in the following 2 instructions is indeed bp in 16-bit code
112 movw %bp, (_ESP - IA32_REGS_SIZE)(%rsi)
114 movl (_EIP - IA32_REGS_SIZE)(%rsi), %ebx
115 shlw $4,%ax # shl eax, 4
116 addw %ax,%bp # add ebp, eax
119 lea (L_64BitCode - L_Base)(%ebx, %eax), %ax
120 .byte 0x66,0x2e,0x89,0x87 # mov cs:[bx + (L_64Eip - L_Base)], eax
121 .word L_64Eip - L_Base
122 .byte 0x66,0xb8 # mov eax, imm32
126 # rdi in the instruction below is indeed bx in 16-bit code
128 .byte 0x66,0x2e # 2eh is "cs:" segment override
129 lgdt (SavedGdt - L_Base)(%rdi)
131 movl $0xc0000080,%ecx
135 .byte 0x66,0xb8 # mov eax, imm32
138 .byte 0x66,0xea # jmp far cs:L_64Bit
143 .byte 0x67,0xbc # mov esp, imm32
144 SavedSp: .space 4 # restore stack
148 _EntryPoint: .long ASM_PFX(ToUserCode) - ASM_PFX(m16Start)
150 _16Gdtr: .word GDT_SIZE - 1
151 _16GdtrBase: .quad ASM_PFX(NullSeg)
155 #------------------------------------------------------------------------------
156 # _ToUserCode() takes control in real mode before passing control to user code.
157 # It will be shadowed to somewhere in memory below 1MB.
158 #------------------------------------------------------------------------------
159 ASM_GLOBAL ASM_PFX(ToUserCode)
161 movl %edx,%ss # set new segment selectors
167 movl $0xc0000080,%ecx
170 andb $0b11111110, %ah
173 movl %esi,%ss # set up 16-bit stack segment
174 movw %bx,%sp # set up 16-bit stack pointer
175 .byte 0x66 # make the following call 32-bit
176 call L_Base1 # push eip
178 popw %bp # ebp <- address of L_Base1
179 pushq (IA32_REGS_SIZE + 2)(%esp)
182 lret # execution begins at next instruction
184 .byte 0x66,0x2e # CS and operand size override
185 lidt (_16Idtr - L_Base1)(%rsi)
186 .byte 0x66,0x61 # popad
189 .byte 0x0f, 0xa1 # pop fs
190 .byte 0x0f, 0xa9 # pop gs
191 .byte 0x66, 0x9d # popfd
192 leaw 4(%esp),%sp # skip high order 32 bits of EFlags
193 .byte 0x66 # make the following retf 32-bit
194 lret # transfer control to user code
196 .equ CODE16, ASM_PFX(_16Code) - .
197 .equ DATA16, ASM_PFX(_16Data) - .
198 .equ DATA32, ASM_PFX(_32Data) - .
200 ASM_PFX(NullSeg): .quad 0
206 .byte 0x8f # 16-bit segment, 4GB limit
213 .byte 0x8f # 16-bit segment, 4GB limit
220 .byte 0xcf # 16-bit segment, 4GB limit
223 .equ GDT_SIZE, . - ASM_PFX(NullSeg)
225 #------------------------------------------------------------------------------
226 # IA32_REGISTER_SET *
228 # InternalAsmThunk16 (
229 # IN IA32_REGISTER_SET *RegisterSet,
230 # IN OUT VOID *Transition
232 #------------------------------------------------------------------------------
234 ASM_GLOBAL ASM_PFX(InternalAsmThunk16)
235 ASM_PFX(InternalAsmThunk16):
242 pushq %rbx # Save ds segment register on the stack
244 pushq %rbx # Save es segment register on the stack
246 pushq %rbx # Save ss segment register on the stack
248 .byte 0x0f, 0xa0 #push fs
249 .byte 0x0f, 0xa8 #push gs
251 movzwl _SS(%rsi), %r8d
252 movl _ESP(%rsi), %edi
253 lea -(IA32_REGS_SIZE + 4)(%edi), %rdi
255 movl %edi,%ebx # ebx <- stack for 16-bit code
256 pushq $(IA32_REGS_SIZE / 4)
257 addl %eax,%edi # edi <- linear address of 16-bit stack
261 lea (SavedCr4 - ASM_PFX(m16Start))(%rdx), %ecx
262 movl %edx,%eax # eax <- transition code address
264 shll $12,%eax # segment address in high order 16 bits
265 lea (_BackFromUserCode - ASM_PFX(m16Start))(%rdx), %ax
266 stosl # [edi] <- return address of user code
267 sgdt 0x60(%rsp) # save GDT stack in argument space
268 movzwq 0x60(%rsp), %r10 # r10 <- GDT limit
269 lea ((ASM_PFX(InternalAsmThunk16) - SavedCr4) + 0xf)(%rcx), %r11
270 andq $0xfffffff0, %r11 # r11 <- 16-byte aligned shadowed GDT table in real mode buffer
272 movw %r10w, (SavedGdt - SavedCr4)(%rcx) # save the limit of shadowed GDT table
273 movq %r11, (SavedGdt - SavedCr4 + 0x2)(%rcx) # save the base address of shadowed GDT table
275 movq 0x62(%rsp) ,%rsi # rsi <- the original GDT base address
276 xchg %r10, %rcx # save rcx to r10 and initialize rcx to be the limit of GDT table
277 incq %rcx # rcx <- the size of memory to copy
278 xchg %r11, %rdi # save rdi to r11 and initialize rdi to the base address of shadowed GDT table
280 movsb # perform memory copy to shadow GDT table
281 movq %r10, %rcx # restore the orignal rcx before memory copy
282 movq %r11, %rdi # restore the original rdi before memory copy
286 movl %eax, (SavedCr0 - SavedCr4)(%rcx)
287 andl $0x7ffffffe,%eax # clear PE, PG bits
289 movl %ebp, (%rcx) # save CR4 in SavedCr4
290 andl $0x300,%ebp # clear all but PCE and OSFXSR bits
291 movl %r8d, %esi # esi <- 16-bit stack segment
294 lgdt (_16Gdtr - SavedCr4)(%rcx)
298 lea L_RetFromRealMode, %r8
301 movw %r8w, (SavedCs - SavedCr4)(%rcx)
302 movl %esp, (SavedSp - SavedCr4)(%rcx)
303 .byte 0xff, 0x69 # jmp (_EntryPoint - SavedCr4)(%rcx)
304 .byte _EntryPoint - SavedCr4
307 lgdt 0x60(%rsp) # restore protected mode GDTR
308 lidt 0x50(%rsp) # restore protected mode IDTR
309 lea -IA32_REGS_SIZE(%rbp), %eax
310 .byte 0x0f, 0xa9 # pop gs
311 .byte 0x0f, 0xa1 # pop fs