2 # Instance of Base Memory Library optimized for use in DXE phase.
4 # Base Memory Library that is optimized for use in DXE phase.
5 # Uses REP, MMX, XMM registers as required for best performance.
7 # Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>
9 # SPDX-License-Identifier: BSD-2-Clause-Patent
15 INF_VERSION = 0x00010005
16 BASE_NAME = BaseMemoryLibOptDxe
17 MODULE_UNI_FILE = BaseMemoryLibOptDxe.uni
18 FILE_GUID = 02BD55C2-AB1D-4b75-B0FD-9A63AE09B31D
21 LIBRARY_CLASS = BaseMemoryLib
25 # VALID_ARCHITECTURES = IA32 X64 ARM AARCH64
54 Ia32/IsZeroBuffer.nasm
72 [Defines.ARM, Defines.AARCH64]
74 # The ARM implementations of this library may perform unaligned accesses, and
75 # may use DC ZVA instructions that are only allowed when the MMU and D-cache
76 # are on. Since SEC, PEI_CORE and PEIM modules may execute with the MMU off,
77 # omit them from the supported module types list for this library.
79 LIBRARY_CLASS = BaseMemoryLib|DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER UEFI_DRIVER UEFI_APPLICATION
86 Arm/CompareGuid.S |GCC
91 Arm/CompareMem.asm |RVCT
92 Arm/CompareGuid.asm |RVCT
101 [Sources.ARM, Sources.AARCH64]
117 IsZeroBufferWrapper.c