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2 PCI Library functions that use I/O ports 0xCF8 and 0xCFC to perform
3 PCI Configuration cycles. Layers on top of one PCI CF8 Library instance.
5 Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
6 This program and the accompanying materials
7 are licensed and made available under the terms and conditions of the BSD License
8 which accompanies this distribution. The full text of the license may be found at
9 http://opensource.org/licenses/bsd-license.php
11 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
19 #include <Library/PciLib.h>
20 #include <Library/PciCf8Lib.h>
23 Registers a PCI device so PCI configuration registers may be accessed after
24 SetVirtualAddressMap().
26 Registers the PCI device specified by Address so all the PCI configuration registers
27 associated with that PCI device may be accessed after SetVirtualAddressMap() is called.
29 If Address > 0x0FFFFFFF, then ASSERT().
31 @param Address Address that encodes the PCI Bus, Device, Function and
34 @retval RETURN_SUCCESS The PCI device was registered for runtime access.
35 @retval RETURN_UNSUPPORTED An attempt was made to call this function
36 after ExitBootServices().
37 @retval RETURN_UNSUPPORTED The resources required to access the PCI device
38 at runtime could not be mapped.
39 @retval RETURN_OUT_OF_RESOURCES There are not enough resources available to
40 complete the registration.
45 PciRegisterForRuntimeAccess (
49 return PciCf8RegisterForRuntimeAccess (Address
);
53 Reads an 8-bit PCI configuration register.
55 Reads and returns the 8-bit PCI configuration register specified by Address.
56 This function must guarantee that all PCI read and write operations are
59 If Address > 0x0FFFFFFF, then ASSERT().
61 @param Address Address that encodes the PCI Bus, Device, Function and
64 @return The read value from the PCI configuration register.
73 return PciCf8Read8 (Address
);
77 Writes an 8-bit PCI configuration register.
79 Writes the 8-bit PCI configuration register specified by Address with the
80 value specified by Value. Value is returned. This function must guarantee
81 that all PCI read and write operations are serialized.
83 If Address > 0x0FFFFFFF, then ASSERT().
85 @param Address Address that encodes the PCI Bus, Device, Function and
87 @param Value The value to write.
89 @return The value written to the PCI configuration register.
99 return PciCf8Write8 (Address
, Value
);
103 Performs a bitwise OR of an 8-bit PCI configuration register with
106 Reads the 8-bit PCI configuration register specified by Address, performs a
107 bitwise OR between the read result and the value specified by
108 OrData, and writes the result to the 8-bit PCI configuration register
109 specified by Address. The value written to the PCI configuration register is
110 returned. This function must guarantee that all PCI read and write operations
113 If Address > 0x0FFFFFFF, then ASSERT().
115 @param Address Address that encodes the PCI Bus, Device, Function and
117 @param OrData The value to OR with the PCI configuration register.
119 @return The value written back to the PCI configuration register.
129 return PciCf8Or8 (Address
, OrData
);
133 Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit
136 Reads the 8-bit PCI configuration register specified by Address, performs a
137 bitwise AND between the read result and the value specified by AndData, and
138 writes the result to the 8-bit PCI configuration register specified by
139 Address. The value written to the PCI configuration register is returned.
140 This function must guarantee that all PCI read and write operations are
143 If Address > 0x0FFFFFFF, then ASSERT().
145 @param Address Address that encodes the PCI Bus, Device, Function and
147 @param AndData The value to AND with the PCI configuration register.
149 @return The value written back to the PCI configuration register.
159 return PciCf8And8 (Address
, AndData
);
163 Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit
164 value, followed a bitwise OR with another 8-bit value.
166 Reads the 8-bit PCI configuration register specified by Address, performs a
167 bitwise AND between the read result and the value specified by AndData,
168 performs a bitwise OR between the result of the AND operation and
169 the value specified by OrData, and writes the result to the 8-bit PCI
170 configuration register specified by Address. The value written to the PCI
171 configuration register is returned. This function must guarantee that all PCI
172 read and write operations are serialized.
174 If Address > 0x0FFFFFFF, then ASSERT().
176 @param Address Address that encodes the PCI Bus, Device, Function and
178 @param AndData The value to AND with the PCI configuration register.
179 @param OrData The value to OR with the result of the AND operation.
181 @return The value written back to the PCI configuration register.
192 return PciCf8AndThenOr8 (Address
, AndData
, OrData
);
196 Reads a bit field of a PCI configuration register.
198 Reads the bit field in an 8-bit PCI configuration register. The bit field is
199 specified by the StartBit and the EndBit. The value of the bit field is
202 If Address > 0x0FFFFFFF, then ASSERT().
203 If StartBit is greater than 7, then ASSERT().
204 If EndBit is greater than 7, then ASSERT().
205 If EndBit is less than StartBit, then ASSERT().
207 @param Address PCI configuration register to read.
208 @param StartBit The ordinal of the least significant bit in the bit field.
210 @param EndBit The ordinal of the most significant bit in the bit field.
213 @return The value of the bit field read from the PCI configuration register.
224 return PciCf8BitFieldRead8 (Address
, StartBit
, EndBit
);
228 Writes a bit field to a PCI configuration register.
230 Writes Value to the bit field of the PCI configuration register. The bit
231 field is specified by the StartBit and the EndBit. All other bits in the
232 destination PCI configuration register are preserved. The new value of the
233 8-bit register is returned.
235 If Address > 0x0FFFFFFF, then ASSERT().
236 If StartBit is greater than 7, then ASSERT().
237 If EndBit is greater than 7, then ASSERT().
238 If EndBit is less than StartBit, then ASSERT().
240 @param Address PCI configuration register to write.
241 @param StartBit The ordinal of the least significant bit in the bit field.
243 @param EndBit The ordinal of the most significant bit in the bit field.
245 @param Value New value of the bit field.
247 @return The value written back to the PCI configuration register.
259 return PciCf8BitFieldWrite8 (Address
, StartBit
, EndBit
, Value
);
263 Reads a bit field in an 8-bit PCI configuration, performs a bitwise OR, and
264 writes the result back to the bit field in the 8-bit port.
266 Reads the 8-bit PCI configuration register specified by Address, performs a
267 bitwise OR between the read result and the value specified by
268 OrData, and writes the result to the 8-bit PCI configuration register
269 specified by Address. The value written to the PCI configuration register is
270 returned. This function must guarantee that all PCI read and write operations
271 are serialized. Extra left bits in OrData are stripped.
273 If Address > 0x0FFFFFFF, then ASSERT().
274 If StartBit is greater than 7, then ASSERT().
275 If EndBit is greater than 7, then ASSERT().
276 If EndBit is less than StartBit, then ASSERT().
278 @param Address PCI configuration register to write.
279 @param StartBit The ordinal of the least significant bit in the bit field.
281 @param EndBit The ordinal of the most significant bit in the bit field.
283 @param OrData The value to OR with the PCI configuration register.
285 @return The value written back to the PCI configuration register.
297 return PciCf8BitFieldOr8 (Address
, StartBit
, EndBit
, OrData
);
301 Reads a bit field in an 8-bit PCI configuration register, performs a bitwise
302 AND, and writes the result back to the bit field in the 8-bit register.
304 Reads the 8-bit PCI configuration register specified by Address, performs a
305 bitwise AND between the read result and the value specified by AndData, and
306 writes the result to the 8-bit PCI configuration register specified by
307 Address. The value written to the PCI configuration register is returned.
308 This function must guarantee that all PCI read and write operations are
309 serialized. Extra left bits in AndData are stripped.
311 If Address > 0x0FFFFFFF, then ASSERT().
312 If StartBit is greater than 7, then ASSERT().
313 If EndBit is greater than 7, then ASSERT().
314 If EndBit is less than StartBit, then ASSERT().
316 @param Address PCI configuration register to write.
317 @param StartBit The ordinal of the least significant bit in the bit field.
319 @param EndBit The ordinal of the most significant bit in the bit field.
321 @param AndData The value to AND with the PCI configuration register.
323 @return The value written back to the PCI configuration register.
335 return PciCf8BitFieldAnd8 (Address
, StartBit
, EndBit
, AndData
);
339 Reads a bit field in an 8-bit port, performs a bitwise AND followed by a
340 bitwise OR, and writes the result back to the bit field in the
343 Reads the 8-bit PCI configuration register specified by Address, performs a
344 bitwise AND followed by a bitwise OR between the read result and
345 the value specified by AndData, and writes the result to the 8-bit PCI
346 configuration register specified by Address. The value written to the PCI
347 configuration register is returned. This function must guarantee that all PCI
348 read and write operations are serialized. Extra left bits in both AndData and
351 If Address > 0x0FFFFFFF, then ASSERT().
352 If StartBit is greater than 7, then ASSERT().
353 If EndBit is greater than 7, then ASSERT().
354 If EndBit is less than StartBit, then ASSERT().
356 @param Address PCI configuration register to write.
357 @param StartBit The ordinal of the least significant bit in the bit field.
359 @param EndBit The ordinal of the most significant bit in the bit field.
361 @param AndData The value to AND with the PCI configuration register.
362 @param OrData The value to OR with the result of the AND operation.
364 @return The value written back to the PCI configuration register.
369 PciBitFieldAndThenOr8 (
377 return PciCf8BitFieldAndThenOr8 (Address
, StartBit
, EndBit
, AndData
, OrData
);
381 Reads a 16-bit PCI configuration register.
383 Reads and returns the 16-bit PCI configuration register specified by Address.
384 This function must guarantee that all PCI read and write operations are
387 If Address > 0x0FFFFFFF, then ASSERT().
388 If Address is not aligned on a 16-bit boundary, then ASSERT().
390 @param Address Address that encodes the PCI Bus, Device, Function and
393 @return The read value from the PCI configuration register.
402 return PciCf8Read16 (Address
);
406 Writes a 16-bit PCI configuration register.
408 Writes the 16-bit PCI configuration register specified by Address with the
409 value specified by Value. Value is returned. This function must guarantee
410 that all PCI read and write operations are serialized.
412 If Address > 0x0FFFFFFF, then ASSERT().
413 If Address is not aligned on a 16-bit boundary, then ASSERT().
415 @param Address Address that encodes the PCI Bus, Device, Function and
417 @param Value The value to write.
419 @return The value written to the PCI configuration register.
429 return PciCf8Write16 (Address
, Value
);
433 Performs a bitwise OR of a 16-bit PCI configuration register with
436 Reads the 16-bit PCI configuration register specified by Address, performs a
437 bitwise OR between the read result and the value specified by
438 OrData, and writes the result to the 16-bit PCI configuration register
439 specified by Address. The value written to the PCI configuration register is
440 returned. This function must guarantee that all PCI read and write operations
443 If Address > 0x0FFFFFFF, then ASSERT().
444 If Address is not aligned on a 16-bit boundary, then ASSERT().
446 @param Address Address that encodes the PCI Bus, Device, Function and
448 @param OrData The value to OR with the PCI configuration register.
450 @return The value written back to the PCI configuration register.
460 return PciCf8Or16 (Address
, OrData
);
464 Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit
467 Reads the 16-bit PCI configuration register specified by Address, performs a
468 bitwise AND between the read result and the value specified by AndData, and
469 writes the result to the 16-bit PCI configuration register specified by
470 Address. The value written to the PCI configuration register is returned.
471 This function must guarantee that all PCI read and write operations are
474 If Address > 0x0FFFFFFF, then ASSERT().
475 If Address is not aligned on a 16-bit boundary, then ASSERT().
477 @param Address Address that encodes the PCI Bus, Device, Function and
479 @param AndData The value to AND with the PCI configuration register.
481 @return The value written back to the PCI configuration register.
491 return PciCf8And16 (Address
, AndData
);
495 Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit
496 value, followed a bitwise OR with another 16-bit value.
498 Reads the 16-bit PCI configuration register specified by Address, performs a
499 bitwise AND between the read result and the value specified by AndData,
500 performs a bitwise OR between the result of the AND operation and
501 the value specified by OrData, and writes the result to the 16-bit PCI
502 configuration register specified by Address. The value written to the PCI
503 configuration register is returned. This function must guarantee that all PCI
504 read and write operations are serialized.
506 If Address > 0x0FFFFFFF, then ASSERT().
507 If Address is not aligned on a 16-bit boundary, then ASSERT().
509 @param Address Address that encodes the PCI Bus, Device, Function and
511 @param AndData The value to AND with the PCI configuration register.
512 @param OrData The value to OR with the result of the AND operation.
514 @return The value written back to the PCI configuration register.
525 return PciCf8AndThenOr16 (Address
, AndData
, OrData
);
529 Reads a bit field of a PCI configuration register.
531 Reads the bit field in a 16-bit PCI configuration register. The bit field is
532 specified by the StartBit and the EndBit. The value of the bit field is
535 If Address > 0x0FFFFFFF, then ASSERT().
536 If Address is not aligned on a 16-bit boundary, then ASSERT().
537 If StartBit is greater than 15, then ASSERT().
538 If EndBit is greater than 15, then ASSERT().
539 If EndBit is less than StartBit, then ASSERT().
541 @param Address PCI configuration register to read.
542 @param StartBit The ordinal of the least significant bit in the bit field.
544 @param EndBit The ordinal of the most significant bit in the bit field.
547 @return The value of the bit field read from the PCI configuration register.
558 return PciCf8BitFieldRead16 (Address
, StartBit
, EndBit
);
562 Writes a bit field to a PCI configuration register.
564 Writes Value to the bit field of the PCI configuration register. The bit
565 field is specified by the StartBit and the EndBit. All other bits in the
566 destination PCI configuration register are preserved. The new value of the
567 16-bit register is returned.
569 If Address > 0x0FFFFFFF, then ASSERT().
570 If Address is not aligned on a 16-bit boundary, then ASSERT().
571 If StartBit is greater than 15, then ASSERT().
572 If EndBit is greater than 15, then ASSERT().
573 If EndBit is less than StartBit, then ASSERT().
575 @param Address PCI configuration register to write.
576 @param StartBit The ordinal of the least significant bit in the bit field.
578 @param EndBit The ordinal of the most significant bit in the bit field.
580 @param Value New value of the bit field.
582 @return The value written back to the PCI configuration register.
594 return PciCf8BitFieldWrite16 (Address
, StartBit
, EndBit
, Value
);
598 Reads a bit field in a 16-bit PCI configuration, performs a bitwise OR, and
599 writes the result back to the bit field in the 16-bit port.
601 Reads the 16-bit PCI configuration register specified by Address, performs a
602 bitwise OR between the read result and the value specified by
603 OrData, and writes the result to the 16-bit PCI configuration register
604 specified by Address. The value written to the PCI configuration register is
605 returned. This function must guarantee that all PCI read and write operations
606 are serialized. Extra left bits in OrData are stripped.
608 If Address > 0x0FFFFFFF, then ASSERT().
609 If Address is not aligned on a 16-bit boundary, then ASSERT().
610 If StartBit is greater than 15, then ASSERT().
611 If EndBit is greater than 15, then ASSERT().
612 If EndBit is less than StartBit, then ASSERT().
614 @param Address PCI configuration register to write.
615 @param StartBit The ordinal of the least significant bit in the bit field.
617 @param EndBit The ordinal of the most significant bit in the bit field.
619 @param OrData The value to OR with the PCI configuration register.
621 @return The value written back to the PCI configuration register.
633 return PciCf8BitFieldOr16 (Address
, StartBit
, EndBit
, OrData
);
637 Reads a bit field in a 16-bit PCI configuration register, performs a bitwise
638 AND, and writes the result back to the bit field in the 16-bit register.
640 Reads the 16-bit PCI configuration register specified by Address, performs a
641 bitwise AND between the read result and the value specified by AndData, and
642 writes the result to the 16-bit PCI configuration register specified by
643 Address. The value written to the PCI configuration register is returned.
644 This function must guarantee that all PCI read and write operations are
645 serialized. Extra left bits in AndData are stripped.
647 If Address > 0x0FFFFFFF, then ASSERT().
648 If Address is not aligned on a 16-bit boundary, then ASSERT().
649 If StartBit is greater than 15, then ASSERT().
650 If EndBit is greater than 15, then ASSERT().
651 If EndBit is less than StartBit, then ASSERT().
653 @param Address PCI configuration register to write.
654 @param StartBit The ordinal of the least significant bit in the bit field.
656 @param EndBit The ordinal of the most significant bit in the bit field.
658 @param AndData The value to AND with the PCI configuration register.
660 @return The value written back to the PCI configuration register.
672 return PciCf8BitFieldAnd16 (Address
, StartBit
, EndBit
, AndData
);
676 Reads a bit field in a 16-bit port, performs a bitwise AND followed by a
677 bitwise OR, and writes the result back to the bit field in the
680 Reads the 16-bit PCI configuration register specified by Address, performs a
681 bitwise AND followed by a bitwise OR between the read result and
682 the value specified by AndData, and writes the result to the 16-bit PCI
683 configuration register specified by Address. The value written to the PCI
684 configuration register is returned. This function must guarantee that all PCI
685 read and write operations are serialized. Extra left bits in both AndData and
688 If Address > 0x0FFFFFFF, then ASSERT().
689 If Address is not aligned on a 16-bit boundary, then ASSERT().
690 If StartBit is greater than 15, then ASSERT().
691 If EndBit is greater than 15, then ASSERT().
692 If EndBit is less than StartBit, then ASSERT().
694 @param Address PCI configuration register to write.
695 @param StartBit The ordinal of the least significant bit in the bit field.
697 @param EndBit The ordinal of the most significant bit in the bit field.
699 @param AndData The value to AND with the PCI configuration register.
700 @param OrData The value to OR with the result of the AND operation.
702 @return The value written back to the PCI configuration register.
707 PciBitFieldAndThenOr16 (
715 return PciCf8BitFieldAndThenOr16 (Address
, StartBit
, EndBit
, AndData
, OrData
);
719 Reads a 32-bit PCI configuration register.
721 Reads and returns the 32-bit PCI configuration register specified by Address.
722 This function must guarantee that all PCI read and write operations are
725 If Address > 0x0FFFFFFF, then ASSERT().
726 If Address is not aligned on a 32-bit boundary, then ASSERT().
728 @param Address Address that encodes the PCI Bus, Device, Function and
731 @return The read value from the PCI configuration register.
740 return PciCf8Read32 (Address
);
744 Writes a 32-bit PCI configuration register.
746 Writes the 32-bit PCI configuration register specified by Address with the
747 value specified by Value. Value is returned. This function must guarantee
748 that all PCI read and write operations are serialized.
750 If Address > 0x0FFFFFFF, then ASSERT().
751 If Address is not aligned on a 32-bit boundary, then ASSERT().
753 @param Address Address that encodes the PCI Bus, Device, Function and
755 @param Value The value to write.
757 @return The value written to the PCI configuration register.
767 return PciCf8Write32 (Address
, Value
);
771 Performs a bitwise OR of a 32-bit PCI configuration register with
774 Reads the 32-bit PCI configuration register specified by Address, performs a
775 bitwise OR between the read result and the value specified by
776 OrData, and writes the result to the 32-bit PCI configuration register
777 specified by Address. The value written to the PCI configuration register is
778 returned. This function must guarantee that all PCI read and write operations
781 If Address > 0x0FFFFFFF, then ASSERT().
782 If Address is not aligned on a 32-bit boundary, then ASSERT().
784 @param Address Address that encodes the PCI Bus, Device, Function and
786 @param OrData The value to OR with the PCI configuration register.
788 @return The value written back to the PCI configuration register.
798 return PciCf8Or32 (Address
, OrData
);
802 Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit
805 Reads the 32-bit PCI configuration register specified by Address, performs a
806 bitwise AND between the read result and the value specified by AndData, and
807 writes the result to the 32-bit PCI configuration register specified by
808 Address. The value written to the PCI configuration register is returned.
809 This function must guarantee that all PCI read and write operations are
812 If Address > 0x0FFFFFFF, then ASSERT().
813 If Address is not aligned on a 32-bit boundary, then ASSERT().
815 @param Address Address that encodes the PCI Bus, Device, Function and
817 @param AndData The value to AND with the PCI configuration register.
819 @return The value written back to the PCI configuration register.
829 return PciCf8And32 (Address
, AndData
);
833 Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit
834 value, followed a bitwise OR with another 32-bit value.
836 Reads the 32-bit PCI configuration register specified by Address, performs a
837 bitwise AND between the read result and the value specified by AndData,
838 performs a bitwise OR between the result of the AND operation and
839 the value specified by OrData, and writes the result to the 32-bit PCI
840 configuration register specified by Address. The value written to the PCI
841 configuration register is returned. This function must guarantee that all PCI
842 read and write operations are serialized.
844 If Address > 0x0FFFFFFF, then ASSERT().
845 If Address is not aligned on a 32-bit boundary, then ASSERT().
847 @param Address Address that encodes the PCI Bus, Device, Function and
849 @param AndData The value to AND with the PCI configuration register.
850 @param OrData The value to OR with the result of the AND operation.
852 @return The value written back to the PCI configuration register.
863 return PciCf8AndThenOr32 (Address
, AndData
, OrData
);
867 Reads a bit field of a PCI configuration register.
869 Reads the bit field in a 32-bit PCI configuration register. The bit field is
870 specified by the StartBit and the EndBit. The value of the bit field is
873 If Address > 0x0FFFFFFF, then ASSERT().
874 If Address is not aligned on a 32-bit boundary, then ASSERT().
875 If StartBit is greater than 31, then ASSERT().
876 If EndBit is greater than 31, then ASSERT().
877 If EndBit is less than StartBit, then ASSERT().
879 @param Address PCI configuration register to read.
880 @param StartBit The ordinal of the least significant bit in the bit field.
882 @param EndBit The ordinal of the most significant bit in the bit field.
885 @return The value of the bit field read from the PCI configuration register.
896 return PciCf8BitFieldRead32 (Address
, StartBit
, EndBit
);
900 Writes a bit field to a PCI configuration register.
902 Writes Value to the bit field of the PCI configuration register. The bit
903 field is specified by the StartBit and the EndBit. All other bits in the
904 destination PCI configuration register are preserved. The new value of the
905 32-bit register is returned.
907 If Address > 0x0FFFFFFF, then ASSERT().
908 If Address is not aligned on a 32-bit boundary, then ASSERT().
909 If StartBit is greater than 31, then ASSERT().
910 If EndBit is greater than 31, then ASSERT().
911 If EndBit is less than StartBit, then ASSERT().
913 @param Address PCI configuration register to write.
914 @param StartBit The ordinal of the least significant bit in the bit field.
916 @param EndBit The ordinal of the most significant bit in the bit field.
918 @param Value New value of the bit field.
920 @return The value written back to the PCI configuration register.
932 return PciCf8BitFieldWrite32 (Address
, StartBit
, EndBit
, Value
);
936 Reads a bit field in a 32-bit PCI configuration, performs a bitwise OR, and
937 writes the result back to the bit field in the 32-bit port.
939 Reads the 32-bit PCI configuration register specified by Address, performs a
940 bitwise OR between the read result and the value specified by
941 OrData, and writes the result to the 32-bit PCI configuration register
942 specified by Address. The value written to the PCI configuration register is
943 returned. This function must guarantee that all PCI read and write operations
944 are serialized. Extra left bits in OrData are stripped.
946 If Address > 0x0FFFFFFF, then ASSERT().
947 If Address is not aligned on a 32-bit boundary, then ASSERT().
948 If StartBit is greater than 31, then ASSERT().
949 If EndBit is greater than 31, then ASSERT().
950 If EndBit is less than StartBit, then ASSERT().
952 @param Address PCI configuration register to write.
953 @param StartBit The ordinal of the least significant bit in the bit field.
955 @param EndBit The ordinal of the most significant bit in the bit field.
957 @param OrData The value to OR with the PCI configuration register.
959 @return The value written back to the PCI configuration register.
971 return PciCf8BitFieldOr32 (Address
, StartBit
, EndBit
, OrData
);
975 Reads a bit field in a 32-bit PCI configuration register, performs a bitwise
976 AND, and writes the result back to the bit field in the 32-bit register.
978 Reads the 32-bit PCI configuration register specified by Address, performs a
979 bitwise AND between the read result and the value specified by AndData, and
980 writes the result to the 32-bit PCI configuration register specified by
981 Address. The value written to the PCI configuration register is returned.
982 This function must guarantee that all PCI read and write operations are
983 serialized. Extra left bits in AndData are stripped.
985 If Address > 0x0FFFFFFF, then ASSERT().
986 If Address is not aligned on a 32-bit boundary, then ASSERT().
987 If StartBit is greater than 31, then ASSERT().
988 If EndBit is greater than 31, then ASSERT().
989 If EndBit is less than StartBit, then ASSERT().
991 @param Address PCI configuration register to write.
992 @param StartBit The ordinal of the least significant bit in the bit field.
994 @param EndBit The ordinal of the most significant bit in the bit field.
996 @param AndData The value to AND with the PCI configuration register.
998 @return The value written back to the PCI configuration register.
1010 return PciCf8BitFieldAnd32 (Address
, StartBit
, EndBit
, AndData
);
1014 Reads a bit field in a 32-bit port, performs a bitwise AND followed by a
1015 bitwise OR, and writes the result back to the bit field in the
1018 Reads the 32-bit PCI configuration register specified by Address, performs a
1019 bitwise AND followed by a bitwise OR between the read result and
1020 the value specified by AndData, and writes the result to the 32-bit PCI
1021 configuration register specified by Address. The value written to the PCI
1022 configuration register is returned. This function must guarantee that all PCI
1023 read and write operations are serialized. Extra left bits in both AndData and
1024 OrData are stripped.
1026 If Address > 0x0FFFFFFF, then ASSERT().
1027 If Address is not aligned on a 32-bit boundary, then ASSERT().
1028 If StartBit is greater than 31, then ASSERT().
1029 If EndBit is greater than 31, then ASSERT().
1030 If EndBit is less than StartBit, then ASSERT().
1032 @param Address PCI configuration register to write.
1033 @param StartBit The ordinal of the least significant bit in the bit field.
1035 @param EndBit The ordinal of the most significant bit in the bit field.
1037 @param AndData The value to AND with the PCI configuration register.
1038 @param OrData The value to OR with the result of the AND operation.
1040 @return The value written back to the PCI configuration register.
1045 PciBitFieldAndThenOr32 (
1053 return PciCf8BitFieldAndThenOr32 (Address
, StartBit
, EndBit
, AndData
, OrData
);
1057 Reads a range of PCI configuration registers into a caller supplied buffer.
1059 Reads the range of PCI configuration registers specified by StartAddress and
1060 Size into the buffer specified by Buffer. This function only allows the PCI
1061 configuration registers from a single PCI function to be read. Size is
1062 returned. When possible 32-bit PCI configuration read cycles are used to read
1063 from StartAdress to StartAddress + Size. Due to alignment restrictions, 8-bit
1064 and 16-bit PCI configuration read cycles may be used at the beginning and the
1067 If StartAddress > 0x0FFFFFFF, then ASSERT().
1068 If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
1069 If Size > 0 and Buffer is NULL, then ASSERT().
1071 @param StartAddress Starting address that encodes the PCI Bus, Device,
1072 Function and Register.
1073 @param Size Size in bytes of the transfer.
1074 @param Buffer Pointer to a buffer receiving the data read.
1082 IN UINTN StartAddress
,
1087 return PciCf8ReadBuffer (StartAddress
, Size
, Buffer
);
1091 Copies the data in a caller supplied buffer to a specified range of PCI
1092 configuration space.
1094 Writes the range of PCI configuration registers specified by StartAddress and
1095 Size from the buffer specified by Buffer. This function only allows the PCI
1096 configuration registers from a single PCI function to be written. Size is
1097 returned. When possible 32-bit PCI configuration write cycles are used to
1098 write from StartAdress to StartAddress + Size. Due to alignment restrictions,
1099 8-bit and 16-bit PCI configuration write cycles may be used at the beginning
1100 and the end of the range.
1102 If StartAddress > 0x0FFFFFFF, then ASSERT().
1103 If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
1104 If Size > 0 and Buffer is NULL, then ASSERT().
1106 @param StartAddress Starting address that encodes the PCI Bus, Device,
1107 Function and Register.
1108 @param Size Size in bytes of the transfer.
1109 @param Buffer Pointer to a buffer containing the data to write.
1111 @return Size written to StartAddress.
1117 IN UINTN StartAddress
,
1122 return PciCf8WriteBuffer (StartAddress
, Size
, Buffer
);