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git.proxmox.com Git - mirror_edk2.git/blob - MdePkg/Library/BasePciLibCf8/PciLib.c
2 PCI Library functions that use I/O ports 0xCF8 and 0xCFC to perform
3 PCI Configuration cycles. Layers on top of one PCI CF8 Library instance.
5 Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
6 SPDX-License-Identifier: BSD-2-Clause-Patent
13 #include <Library/PciLib.h>
14 #include <Library/PciCf8Lib.h>
17 Registers a PCI device so PCI configuration registers may be accessed after
18 SetVirtualAddressMap().
20 Registers the PCI device specified by Address so all the PCI configuration registers
21 associated with that PCI device may be accessed after SetVirtualAddressMap() is called.
23 If Address > 0x0FFFFFFF, then ASSERT().
25 @param Address The address that encodes the PCI Bus, Device, Function and
28 @retval RETURN_SUCCESS The PCI device was registered for runtime access.
29 @retval RETURN_UNSUPPORTED An attempt was made to call this function
30 after ExitBootServices().
31 @retval RETURN_UNSUPPORTED The resources required to access the PCI device
32 at runtime could not be mapped.
33 @retval RETURN_OUT_OF_RESOURCES There are not enough resources available to
34 complete the registration.
39 PciRegisterForRuntimeAccess (
43 return PciCf8RegisterForRuntimeAccess (Address
);
47 Reads an 8-bit PCI configuration register.
49 Reads and returns the 8-bit PCI configuration register specified by Address.
50 This function must guarantee that all PCI read and write operations are
53 If Address > 0x0FFFFFFF, then ASSERT().
55 @param Address The address that encodes the PCI Bus, Device, Function and
58 @return The read value from the PCI configuration register.
67 return PciCf8Read8 (Address
);
71 Writes an 8-bit PCI configuration register.
73 Writes the 8-bit PCI configuration register specified by Address with the
74 value specified by Value. Value is returned. This function must guarantee
75 that all PCI read and write operations are serialized.
77 If Address > 0x0FFFFFFF, then ASSERT().
79 @param Address The address that encodes the PCI Bus, Device, Function and
81 @param Value The value to write.
83 @return The value written to the PCI configuration register.
93 return PciCf8Write8 (Address
, Value
);
97 Performs a bitwise OR of an 8-bit PCI configuration register with
100 Reads the 8-bit PCI configuration register specified by Address, performs a
101 bitwise OR between the read result and the value specified by
102 OrData, and writes the result to the 8-bit PCI configuration register
103 specified by Address. The value written to the PCI configuration register is
104 returned. This function must guarantee that all PCI read and write operations
107 If Address > 0x0FFFFFFF, then ASSERT().
109 @param Address The address that encodes the PCI Bus, Device, Function and
111 @param OrData The value to OR with the PCI configuration register.
113 @return The value written back to the PCI configuration register.
123 return PciCf8Or8 (Address
, OrData
);
127 Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit
130 Reads the 8-bit PCI configuration register specified by Address, performs a
131 bitwise AND between the read result and the value specified by AndData, and
132 writes the result to the 8-bit PCI configuration register specified by
133 Address. The value written to the PCI configuration register is returned.
134 This function must guarantee that all PCI read and write operations are
137 If Address > 0x0FFFFFFF, then ASSERT().
139 @param Address The address that encodes the PCI Bus, Device, Function and
141 @param AndData The value to AND with the PCI configuration register.
143 @return The value written back to the PCI configuration register.
153 return PciCf8And8 (Address
, AndData
);
157 Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit
158 value, followed a bitwise OR with another 8-bit value.
160 Reads the 8-bit PCI configuration register specified by Address, performs a
161 bitwise AND between the read result and the value specified by AndData,
162 performs a bitwise OR between the result of the AND operation and
163 the value specified by OrData, and writes the result to the 8-bit PCI
164 configuration register specified by Address. The value written to the PCI
165 configuration register is returned. This function must guarantee that all PCI
166 read and write operations are serialized.
168 If Address > 0x0FFFFFFF, then ASSERT().
170 @param Address The address that encodes the PCI Bus, Device, Function and
172 @param AndData The value to AND with the PCI configuration register.
173 @param OrData The value to OR with the result of the AND operation.
175 @return The value written back to the PCI configuration register.
186 return PciCf8AndThenOr8 (Address
, AndData
, OrData
);
190 Reads a bit field of a PCI configuration register.
192 Reads the bit field in an 8-bit PCI configuration register. The bit field is
193 specified by the StartBit and the EndBit. The value of the bit field is
196 If Address > 0x0FFFFFFF, then ASSERT().
197 If StartBit is greater than 7, then ASSERT().
198 If EndBit is greater than 7, then ASSERT().
199 If EndBit is less than StartBit, then ASSERT().
201 @param Address The PCI configuration register to read.
202 @param StartBit The ordinal of the least significant bit in the bit field.
204 @param EndBit The ordinal of the most significant bit in the bit field.
207 @return The value of the bit field read from the PCI configuration register.
218 return PciCf8BitFieldRead8 (Address
, StartBit
, EndBit
);
222 Writes a bit field to a PCI configuration register.
224 Writes Value to the bit field of the PCI configuration register. The bit
225 field is specified by the StartBit and the EndBit. All other bits in the
226 destination PCI configuration register are preserved. The new value of the
227 8-bit register is returned.
229 If Address > 0x0FFFFFFF, then ASSERT().
230 If StartBit is greater than 7, then ASSERT().
231 If EndBit is greater than 7, then ASSERT().
232 If EndBit is less than StartBit, then ASSERT().
233 If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
235 @param Address The PCI configuration register to write.
236 @param StartBit The ordinal of the least significant bit in the bit field.
238 @param EndBit The ordinal of the most significant bit in the bit field.
240 @param Value The new value of the bit field.
242 @return The value written back to the PCI configuration register.
254 return PciCf8BitFieldWrite8 (Address
, StartBit
, EndBit
, Value
);
258 Reads a bit field in an 8-bit PCI configuration, performs a bitwise OR, and
259 writes the result back to the bit field in the 8-bit port.
261 Reads the 8-bit PCI configuration register specified by Address, performs a
262 bitwise OR between the read result and the value specified by
263 OrData, and writes the result to the 8-bit PCI configuration register
264 specified by Address. The value written to the PCI configuration register is
265 returned. This function must guarantee that all PCI read and write operations
266 are serialized. Extra left bits in OrData are stripped.
268 If Address > 0x0FFFFFFF, then ASSERT().
269 If StartBit is greater than 7, then ASSERT().
270 If EndBit is greater than 7, then ASSERT().
271 If EndBit is less than StartBit, then ASSERT().
272 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
274 @param Address The PCI configuration register to write.
275 @param StartBit The ordinal of the least significant bit in the bit field.
277 @param EndBit The ordinal of the most significant bit in the bit field.
279 @param OrData The value to OR with the PCI configuration register.
281 @return The value written back to the PCI configuration register.
293 return PciCf8BitFieldOr8 (Address
, StartBit
, EndBit
, OrData
);
297 Reads a bit field in an 8-bit PCI configuration register, performs a bitwise
298 AND, and writes the result back to the bit field in the 8-bit register.
300 Reads the 8-bit PCI configuration register specified by Address, performs a
301 bitwise AND between the read result and the value specified by AndData, and
302 writes the result to the 8-bit PCI configuration register specified by
303 Address. The value written to the PCI configuration register is returned.
304 This function must guarantee that all PCI read and write operations are
305 serialized. Extra left bits in AndData are stripped.
307 If Address > 0x0FFFFFFF, then ASSERT().
308 If StartBit is greater than 7, then ASSERT().
309 If EndBit is greater than 7, then ASSERT().
310 If EndBit is less than StartBit, then ASSERT().
311 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
313 @param Address The PCI configuration register to write.
314 @param StartBit The ordinal of the least significant bit in the bit field.
316 @param EndBit The ordinal of the most significant bit in the bit field.
318 @param AndData The value to AND with the PCI configuration register.
320 @return The value written back to the PCI configuration register.
332 return PciCf8BitFieldAnd8 (Address
, StartBit
, EndBit
, AndData
);
336 Reads a bit field in an 8-bit port, performs a bitwise AND followed by a
337 bitwise OR, and writes the result back to the bit field in the
340 Reads the 8-bit PCI configuration register specified by Address, performs a
341 bitwise AND followed by a bitwise OR between the read result and
342 the value specified by AndData, and writes the result to the 8-bit PCI
343 configuration register specified by Address. The value written to the PCI
344 configuration register is returned. This function must guarantee that all PCI
345 read and write operations are serialized. Extra left bits in both AndData and
348 If Address > 0x0FFFFFFF, then ASSERT().
349 If StartBit is greater than 7, then ASSERT().
350 If EndBit is greater than 7, then ASSERT().
351 If EndBit is less than StartBit, then ASSERT().
352 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
353 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
355 @param Address The PCI configuration register to write.
356 @param StartBit The ordinal of the least significant bit in the bit field.
358 @param EndBit The ordinal of the most significant bit in the bit field.
360 @param AndData The value to AND with the PCI configuration register.
361 @param OrData The value to OR with the result of the AND operation.
363 @return The value written back to the PCI configuration register.
368 PciBitFieldAndThenOr8 (
376 return PciCf8BitFieldAndThenOr8 (Address
, StartBit
, EndBit
, AndData
, OrData
);
380 Reads a 16-bit PCI configuration register.
382 Reads and returns the 16-bit PCI configuration register specified by Address.
383 This function must guarantee that all PCI read and write operations are
386 If Address > 0x0FFFFFFF, then ASSERT().
387 If Address is not aligned on a 16-bit boundary, then ASSERT().
389 @param Address The address that encodes the PCI Bus, Device, Function and
392 @return The read value from the PCI configuration register.
401 return PciCf8Read16 (Address
);
405 Writes a 16-bit PCI configuration register.
407 Writes the 16-bit PCI configuration register specified by Address with the
408 value specified by Value. Value is returned. This function must guarantee
409 that all PCI read and write operations are serialized.
411 If Address > 0x0FFFFFFF, then ASSERT().
412 If Address is not aligned on a 16-bit boundary, then ASSERT().
414 @param Address The address that encodes the PCI Bus, Device, Function and
416 @param Value The value to write.
418 @return The value written to the PCI configuration register.
428 return PciCf8Write16 (Address
, Value
);
432 Performs a bitwise OR of a 16-bit PCI configuration register with
435 Reads the 16-bit PCI configuration register specified by Address, performs a
436 bitwise OR between the read result and the value specified by
437 OrData, and writes the result to the 16-bit PCI configuration register
438 specified by Address. The value written to the PCI configuration register is
439 returned. This function must guarantee that all PCI read and write operations
442 If Address > 0x0FFFFFFF, then ASSERT().
443 If Address is not aligned on a 16-bit boundary, then ASSERT().
445 @param Address The address that encodes the PCI Bus, Device, Function and
447 @param OrData The value to OR with the PCI configuration register.
449 @return The value written back to the PCI configuration register.
459 return PciCf8Or16 (Address
, OrData
);
463 Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit
466 Reads the 16-bit PCI configuration register specified by Address, performs a
467 bitwise AND between the read result and the value specified by AndData, and
468 writes the result to the 16-bit PCI configuration register specified by
469 Address. The value written to the PCI configuration register is returned.
470 This function must guarantee that all PCI read and write operations are
473 If Address > 0x0FFFFFFF, then ASSERT().
474 If Address is not aligned on a 16-bit boundary, then ASSERT().
476 @param Address The address that encodes the PCI Bus, Device, Function and
478 @param AndData The value to AND with the PCI configuration register.
480 @return The value written back to the PCI configuration register.
490 return PciCf8And16 (Address
, AndData
);
494 Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit
495 value, followed a bitwise OR with another 16-bit value.
497 Reads the 16-bit PCI configuration register specified by Address, performs a
498 bitwise AND between the read result and the value specified by AndData,
499 performs a bitwise OR between the result of the AND operation and
500 the value specified by OrData, and writes the result to the 16-bit PCI
501 configuration register specified by Address. The value written to the PCI
502 configuration register is returned. This function must guarantee that all PCI
503 read and write operations are serialized.
505 If Address > 0x0FFFFFFF, then ASSERT().
506 If Address is not aligned on a 16-bit boundary, then ASSERT().
508 @param Address The address that encodes the PCI Bus, Device, Function and
510 @param AndData The value to AND with the PCI configuration register.
511 @param OrData The value to OR with the result of the AND operation.
513 @return The value written back to the PCI configuration register.
524 return PciCf8AndThenOr16 (Address
, AndData
, OrData
);
528 Reads a bit field of a PCI configuration register.
530 Reads the bit field in a 16-bit PCI configuration register. The bit field is
531 specified by the StartBit and the EndBit. The value of the bit field is
534 If Address > 0x0FFFFFFF, then ASSERT().
535 If Address is not aligned on a 16-bit boundary, then ASSERT().
536 If StartBit is greater than 15, then ASSERT().
537 If EndBit is greater than 15, then ASSERT().
538 If EndBit is less than StartBit, then ASSERT().
540 @param Address The PCI configuration register to read.
541 @param StartBit The ordinal of the least significant bit in the bit field.
543 @param EndBit The ordinal of the most significant bit in the bit field.
546 @return The value of the bit field read from the PCI configuration register.
557 return PciCf8BitFieldRead16 (Address
, StartBit
, EndBit
);
561 Writes a bit field to a PCI configuration register.
563 Writes Value to the bit field of the PCI configuration register. The bit
564 field is specified by the StartBit and the EndBit. All other bits in the
565 destination PCI configuration register are preserved. The new value of the
566 16-bit register is returned.
568 If Address > 0x0FFFFFFF, then ASSERT().
569 If Address is not aligned on a 16-bit boundary, then ASSERT().
570 If StartBit is greater than 15, then ASSERT().
571 If EndBit is greater than 15, then ASSERT().
572 If EndBit is less than StartBit, then ASSERT().
573 If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
575 @param Address The PCI configuration register to write.
576 @param StartBit The ordinal of the least significant bit in the bit field.
578 @param EndBit The ordinal of the most significant bit in the bit field.
580 @param Value The new value of the bit field.
582 @return The value written back to the PCI configuration register.
594 return PciCf8BitFieldWrite16 (Address
, StartBit
, EndBit
, Value
);
598 Reads a bit field in a 16-bit PCI configuration, performs a bitwise OR, and
599 writes the result back to the bit field in the 16-bit port.
601 Reads the 16-bit PCI configuration register specified by Address, performs a
602 bitwise OR between the read result and the value specified by
603 OrData, and writes the result to the 16-bit PCI configuration register
604 specified by Address. The value written to the PCI configuration register is
605 returned. This function must guarantee that all PCI read and write operations
606 are serialized. Extra left bits in OrData are stripped.
608 If Address > 0x0FFFFFFF, then ASSERT().
609 If Address is not aligned on a 16-bit boundary, then ASSERT().
610 If StartBit is greater than 15, then ASSERT().
611 If EndBit is greater than 15, then ASSERT().
612 If EndBit is less than StartBit, then ASSERT().
613 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
615 @param Address The PCI configuration register to write.
616 @param StartBit The ordinal of the least significant bit in the bit field.
618 @param EndBit The ordinal of the most significant bit in the bit field.
620 @param OrData The value to OR with the PCI configuration register.
622 @return The value written back to the PCI configuration register.
634 return PciCf8BitFieldOr16 (Address
, StartBit
, EndBit
, OrData
);
638 Reads a bit field in a 16-bit PCI configuration register, performs a bitwise
639 AND, and writes the result back to the bit field in the 16-bit register.
641 Reads the 16-bit PCI configuration register specified by Address, performs a
642 bitwise AND between the read result and the value specified by AndData, and
643 writes the result to the 16-bit PCI configuration register specified by
644 Address. The value written to the PCI configuration register is returned.
645 This function must guarantee that all PCI read and write operations are
646 serialized. Extra left bits in AndData are stripped.
648 If Address > 0x0FFFFFFF, then ASSERT().
649 If Address is not aligned on a 16-bit boundary, then ASSERT().
650 If StartBit is greater than 15, then ASSERT().
651 If EndBit is greater than 15, then ASSERT().
652 If EndBit is less than StartBit, then ASSERT().
653 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
655 @param Address The PCI configuration register to write.
656 @param StartBit The ordinal of the least significant bit in the bit field.
658 @param EndBit The ordinal of the most significant bit in the bit field.
660 @param AndData The value to AND with the PCI configuration register.
662 @return The value written back to the PCI configuration register.
674 return PciCf8BitFieldAnd16 (Address
, StartBit
, EndBit
, AndData
);
678 Reads a bit field in a 16-bit port, performs a bitwise AND followed by a
679 bitwise OR, and writes the result back to the bit field in the
682 Reads the 16-bit PCI configuration register specified by Address, performs a
683 bitwise AND followed by a bitwise OR between the read result and
684 the value specified by AndData, and writes the result to the 16-bit PCI
685 configuration register specified by Address. The value written to the PCI
686 configuration register is returned. This function must guarantee that all PCI
687 read and write operations are serialized. Extra left bits in both AndData and
690 If Address > 0x0FFFFFFF, then ASSERT().
691 If Address is not aligned on a 16-bit boundary, then ASSERT().
692 If StartBit is greater than 15, then ASSERT().
693 If EndBit is greater than 15, then ASSERT().
694 If EndBit is less than StartBit, then ASSERT().
695 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
696 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
698 @param Address The PCI configuration register to write.
699 @param StartBit The ordinal of the least significant bit in the bit field.
701 @param EndBit The ordinal of the most significant bit in the bit field.
703 @param AndData The value to AND with the PCI configuration register.
704 @param OrData The value to OR with the result of the AND operation.
706 @return The value written back to the PCI configuration register.
711 PciBitFieldAndThenOr16 (
719 return PciCf8BitFieldAndThenOr16 (Address
, StartBit
, EndBit
, AndData
, OrData
);
723 Reads a 32-bit PCI configuration register.
725 Reads and returns the 32-bit PCI configuration register specified by Address.
726 This function must guarantee that all PCI read and write operations are
729 If Address > 0x0FFFFFFF, then ASSERT().
730 If Address is not aligned on a 32-bit boundary, then ASSERT().
732 @param Address The address that encodes the PCI Bus, Device, Function and
735 @return The read value from the PCI configuration register.
744 return PciCf8Read32 (Address
);
748 Writes a 32-bit PCI configuration register.
750 Writes the 32-bit PCI configuration register specified by Address with the
751 value specified by Value. Value is returned. This function must guarantee
752 that all PCI read and write operations are serialized.
754 If Address > 0x0FFFFFFF, then ASSERT().
755 If Address is not aligned on a 32-bit boundary, then ASSERT().
757 @param Address The address that encodes the PCI Bus, Device, Function and
759 @param Value The value to write.
761 @return The value written to the PCI configuration register.
771 return PciCf8Write32 (Address
, Value
);
775 Performs a bitwise OR of a 32-bit PCI configuration register with
778 Reads the 32-bit PCI configuration register specified by Address, performs a
779 bitwise OR between the read result and the value specified by
780 OrData, and writes the result to the 32-bit PCI configuration register
781 specified by Address. The value written to the PCI configuration register is
782 returned. This function must guarantee that all PCI read and write operations
785 If Address > 0x0FFFFFFF, then ASSERT().
786 If Address is not aligned on a 32-bit boundary, then ASSERT().
788 @param Address The address that encodes the PCI Bus, Device, Function and
790 @param OrData The value to OR with the PCI configuration register.
792 @return The value written back to the PCI configuration register.
802 return PciCf8Or32 (Address
, OrData
);
806 Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit
809 Reads the 32-bit PCI configuration register specified by Address, performs a
810 bitwise AND between the read result and the value specified by AndData, and
811 writes the result to the 32-bit PCI configuration register specified by
812 Address. The value written to the PCI configuration register is returned.
813 This function must guarantee that all PCI read and write operations are
816 If Address > 0x0FFFFFFF, then ASSERT().
817 If Address is not aligned on a 32-bit boundary, then ASSERT().
819 @param Address The address that encodes the PCI Bus, Device, Function and
821 @param AndData The value to AND with the PCI configuration register.
823 @return The value written back to the PCI configuration register.
833 return PciCf8And32 (Address
, AndData
);
837 Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit
838 value, followed a bitwise OR with another 32-bit value.
840 Reads the 32-bit PCI configuration register specified by Address, performs a
841 bitwise AND between the read result and the value specified by AndData,
842 performs a bitwise OR between the result of the AND operation and
843 the value specified by OrData, and writes the result to the 32-bit PCI
844 configuration register specified by Address. The value written to the PCI
845 configuration register is returned. This function must guarantee that all PCI
846 read and write operations are serialized.
848 If Address > 0x0FFFFFFF, then ASSERT().
849 If Address is not aligned on a 32-bit boundary, then ASSERT().
851 @param Address The address that encodes the PCI Bus, Device, Function and
853 @param AndData The value to AND with the PCI configuration register.
854 @param OrData The value to OR with the result of the AND operation.
856 @return The value written back to the PCI configuration register.
867 return PciCf8AndThenOr32 (Address
, AndData
, OrData
);
871 Reads a bit field of a PCI configuration register.
873 Reads the bit field in a 32-bit PCI configuration register. The bit field is
874 specified by the StartBit and the EndBit. The value of the bit field is
877 If Address > 0x0FFFFFFF, then ASSERT().
878 If Address is not aligned on a 32-bit boundary, then ASSERT().
879 If StartBit is greater than 31, then ASSERT().
880 If EndBit is greater than 31, then ASSERT().
881 If EndBit is less than StartBit, then ASSERT().
883 @param Address The PCI configuration register to read.
884 @param StartBit The ordinal of the least significant bit in the bit field.
886 @param EndBit The ordinal of the most significant bit in the bit field.
889 @return The value of the bit field read from the PCI configuration register.
900 return PciCf8BitFieldRead32 (Address
, StartBit
, EndBit
);
904 Writes a bit field to a PCI configuration register.
906 Writes Value to the bit field of the PCI configuration register. The bit
907 field is specified by the StartBit and the EndBit. All other bits in the
908 destination PCI configuration register are preserved. The new value of the
909 32-bit register is returned.
911 If Address > 0x0FFFFFFF, then ASSERT().
912 If Address is not aligned on a 32-bit boundary, then ASSERT().
913 If StartBit is greater than 31, then ASSERT().
914 If EndBit is greater than 31, then ASSERT().
915 If EndBit is less than StartBit, then ASSERT().
916 If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
918 @param Address The PCI configuration register to write.
919 @param StartBit The ordinal of the least significant bit in the bit field.
921 @param EndBit The ordinal of the most significant bit in the bit field.
923 @param Value The new value of the bit field.
925 @return The value written back to the PCI configuration register.
937 return PciCf8BitFieldWrite32 (Address
, StartBit
, EndBit
, Value
);
941 Reads a bit field in a 32-bit PCI configuration, performs a bitwise OR, and
942 writes the result back to the bit field in the 32-bit port.
944 Reads the 32-bit PCI configuration register specified by Address, performs a
945 bitwise OR between the read result and the value specified by
946 OrData, and writes the result to the 32-bit PCI configuration register
947 specified by Address. The value written to the PCI configuration register is
948 returned. This function must guarantee that all PCI read and write operations
949 are serialized. Extra left bits in OrData are stripped.
951 If Address > 0x0FFFFFFF, then ASSERT().
952 If Address is not aligned on a 32-bit boundary, then ASSERT().
953 If StartBit is greater than 31, then ASSERT().
954 If EndBit is greater than 31, then ASSERT().
955 If EndBit is less than StartBit, then ASSERT().
956 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
958 @param Address The PCI configuration register to write.
959 @param StartBit The ordinal of the least significant bit in the bit field.
961 @param EndBit The ordinal of the most significant bit in the bit field.
963 @param OrData The value to OR with the PCI configuration register.
965 @return The value written back to the PCI configuration register.
977 return PciCf8BitFieldOr32 (Address
, StartBit
, EndBit
, OrData
);
981 Reads a bit field in a 32-bit PCI configuration register, performs a bitwise
982 AND, and writes the result back to the bit field in the 32-bit register.
984 Reads the 32-bit PCI configuration register specified by Address, performs a
985 bitwise AND between the read result and the value specified by AndData, and
986 writes the result to the 32-bit PCI configuration register specified by
987 Address. The value written to the PCI configuration register is returned.
988 This function must guarantee that all PCI read and write operations are
989 serialized. Extra left bits in AndData are stripped.
991 If Address > 0x0FFFFFFF, then ASSERT().
992 If Address is not aligned on a 32-bit boundary, then ASSERT().
993 If StartBit is greater than 31, then ASSERT().
994 If EndBit is greater than 31, then ASSERT().
995 If EndBit is less than StartBit, then ASSERT().
996 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
998 @param Address The PCI configuration register to write.
999 @param StartBit The ordinal of the least significant bit in the bit field.
1001 @param EndBit The ordinal of the most significant bit in the bit field.
1003 @param AndData The value to AND with the PCI configuration register.
1005 @return The value written back to the PCI configuration register.
1017 return PciCf8BitFieldAnd32 (Address
, StartBit
, EndBit
, AndData
);
1021 Reads a bit field in a 32-bit port, performs a bitwise AND followed by a
1022 bitwise OR, and writes the result back to the bit field in the
1025 Reads the 32-bit PCI configuration register specified by Address, performs a
1026 bitwise AND followed by a bitwise OR between the read result and
1027 the value specified by AndData, and writes the result to the 32-bit PCI
1028 configuration register specified by Address. The value written to the PCI
1029 configuration register is returned. This function must guarantee that all PCI
1030 read and write operations are serialized. Extra left bits in both AndData and
1031 OrData are stripped.
1033 If Address > 0x0FFFFFFF, then ASSERT().
1034 If Address is not aligned on a 32-bit boundary, then ASSERT().
1035 If StartBit is greater than 31, then ASSERT().
1036 If EndBit is greater than 31, then ASSERT().
1037 If EndBit is less than StartBit, then ASSERT().
1038 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
1039 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
1041 @param Address The PCI configuration register to write.
1042 @param StartBit The ordinal of the least significant bit in the bit field.
1044 @param EndBit The ordinal of the most significant bit in the bit field.
1046 @param AndData The value to AND with the PCI configuration register.
1047 @param OrData The value to OR with the result of the AND operation.
1049 @return The value written back to the PCI configuration register.
1054 PciBitFieldAndThenOr32 (
1062 return PciCf8BitFieldAndThenOr32 (Address
, StartBit
, EndBit
, AndData
, OrData
);
1066 Reads a range of PCI configuration registers into a caller supplied buffer.
1068 Reads the range of PCI configuration registers specified by StartAddress and
1069 Size into the buffer specified by Buffer. This function only allows the PCI
1070 configuration registers from a single PCI function to be read. Size is
1071 returned. When possible 32-bit PCI configuration read cycles are used to read
1072 from StartAdress to StartAddress + Size. Due to alignment restrictions, 8-bit
1073 and 16-bit PCI configuration read cycles may be used at the beginning and the
1076 If StartAddress > 0x0FFFFFFF, then ASSERT().
1077 If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
1078 If Size > 0 and Buffer is NULL, then ASSERT().
1080 @param StartAddress The starting address that encodes the PCI Bus, Device,
1081 Function and Register.
1082 @param Size The size in bytes of the transfer.
1083 @param Buffer The pointer to a buffer receiving the data read.
1091 IN UINTN StartAddress
,
1096 return PciCf8ReadBuffer (StartAddress
, Size
, Buffer
);
1100 Copies the data in a caller supplied buffer to a specified range of PCI
1101 configuration space.
1103 Writes the range of PCI configuration registers specified by StartAddress and
1104 Size from the buffer specified by Buffer. This function only allows the PCI
1105 configuration registers from a single PCI function to be written. Size is
1106 returned. When possible 32-bit PCI configuration write cycles are used to
1107 write from StartAdress to StartAddress + Size. Due to alignment restrictions,
1108 8-bit and 16-bit PCI configuration write cycles may be used at the beginning
1109 and the end of the range.
1111 If StartAddress > 0x0FFFFFFF, then ASSERT().
1112 If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
1113 If Size > 0 and Buffer is NULL, then ASSERT().
1115 @param StartAddress The starting address that encodes the PCI Bus, Device,
1116 Function and Register.
1117 @param Size The size in bytes of the transfer.
1118 @param Buffer The pointer to a buffer containing the data to write.
1120 @return Size written to StartAddress.
1126 IN UINTN StartAddress
,
1131 return PciCf8WriteBuffer (StartAddress
, Size
, Buffer
);