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git.proxmox.com Git - mirror_edk2.git/blob - MdePkg/Library/BasePciLibPciExpress/PciLib.c
2 PCI Library functions that use the 256 MB PCI Express MMIO window to perform PCI
3 Configuration cycles. Layers on PCI Express Library.
5 Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
6 SPDX-License-Identifier: BSD-2-Clause-Patent
12 #include <Library/PciLib.h>
13 #include <Library/PciExpressLib.h>
16 Registers a PCI device so PCI configuration registers may be accessed after
17 SetVirtualAddressMap().
19 Registers the PCI device specified by Address so all the PCI configuration registers
20 associated with that PCI device may be accessed after SetVirtualAddressMap() is called.
22 If Address > 0x0FFFFFFF, then ASSERT().
24 @param Address The address that encodes the PCI Bus, Device, Function and
27 @retval RETURN_SUCCESS The PCI device was registered for runtime access.
28 @retval RETURN_UNSUPPORTED An attempt was made to call this function
29 after ExitBootServices().
30 @retval RETURN_UNSUPPORTED The resources required to access the PCI device
31 at runtime could not be mapped.
32 @retval RETURN_OUT_OF_RESOURCES There are not enough resources available to
33 complete the registration.
38 PciRegisterForRuntimeAccess (
42 return PciExpressRegisterForRuntimeAccess (Address
);
46 Reads an 8-bit PCI configuration register.
48 Reads and returns the 8-bit PCI configuration register specified by Address.
49 This function must guarantee that all PCI read and write operations are
52 If Address > 0x0FFFFFFF, then ASSERT().
54 @param Address The address that encodes the PCI Bus, Device, Function and
57 @return The read value from the PCI configuration register.
66 return PciExpressRead8 (Address
);
70 Writes an 8-bit PCI configuration register.
72 Writes the 8-bit PCI configuration register specified by Address with the
73 value specified by Value. Value is returned. This function must guarantee
74 that all PCI read and write operations are serialized.
76 If Address > 0x0FFFFFFF, then ASSERT().
78 @param Address The address that encodes the PCI Bus, Device, Function and
80 @param Value The value to write.
82 @return The value written to the PCI configuration register.
92 return PciExpressWrite8 (Address
, Value
);
96 Performs a bitwise OR of an 8-bit PCI configuration register with
99 Reads the 8-bit PCI configuration register specified by Address, performs a
100 bitwise OR between the read result and the value specified by
101 OrData, and writes the result to the 8-bit PCI configuration register
102 specified by Address. The value written to the PCI configuration register is
103 returned. This function must guarantee that all PCI read and write operations
106 If Address > 0x0FFFFFFF, then ASSERT().
108 @param Address The address that encodes the PCI Bus, Device, Function and
110 @param OrData The value to OR with the PCI configuration register.
112 @return The value written back to the PCI configuration register.
122 return PciExpressOr8 (Address
, OrData
);
126 Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit
129 Reads the 8-bit PCI configuration register specified by Address, performs a
130 bitwise AND between the read result and the value specified by AndData, and
131 writes the result to the 8-bit PCI configuration register specified by
132 Address. The value written to the PCI configuration register is returned.
133 This function must guarantee that all PCI read and write operations are
136 If Address > 0x0FFFFFFF, then ASSERT().
138 @param Address The address that encodes the PCI Bus, Device, Function and
140 @param AndData The value to AND with the PCI configuration register.
142 @return The value written back to the PCI configuration register.
152 return PciExpressAnd8 (Address
, AndData
);
156 Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit
157 value, followed a bitwise OR with another 8-bit value.
159 Reads the 8-bit PCI configuration register specified by Address, performs a
160 bitwise AND between the read result and the value specified by AndData,
161 performs a bitwise OR between the result of the AND operation and
162 the value specified by OrData, and writes the result to the 8-bit PCI
163 configuration register specified by Address. The value written to the PCI
164 configuration register is returned. This function must guarantee that all PCI
165 read and write operations are serialized.
167 If Address > 0x0FFFFFFF, then ASSERT().
169 @param Address The address that encodes the PCI Bus, Device, Function and
171 @param AndData The value to AND with the PCI configuration register.
172 @param OrData The value to OR with the result of the AND operation.
174 @return The value written back to the PCI configuration register.
185 return PciExpressAndThenOr8 (Address
, AndData
, OrData
);
189 Reads a bit field of a PCI configuration register.
191 Reads the bit field in an 8-bit PCI configuration register. The bit field is
192 specified by the StartBit and the EndBit. The value of the bit field is
195 If Address > 0x0FFFFFFF, then ASSERT().
196 If StartBit is greater than 7, then ASSERT().
197 If EndBit is greater than 7, then ASSERT().
198 If EndBit is less than StartBit, then ASSERT().
200 @param Address The PCI configuration register to read.
201 @param StartBit The ordinal of the least significant bit in the bit field.
203 @param EndBit The ordinal of the most significant bit in the bit field.
206 @return The value of the bit field read from the PCI configuration register.
217 return PciExpressBitFieldRead8 (Address
, StartBit
, EndBit
);
221 Writes a bit field to a PCI configuration register.
223 Writes Value to the bit field of the PCI configuration register. The bit
224 field is specified by the StartBit and the EndBit. All other bits in the
225 destination PCI configuration register are preserved. The new value of the
226 8-bit register is returned.
228 If Address > 0x0FFFFFFF, then ASSERT().
229 If StartBit is greater than 7, then ASSERT().
230 If EndBit is greater than 7, then ASSERT().
231 If EndBit is less than StartBit, then ASSERT().
232 If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
234 @param Address The PCI configuration register to write.
235 @param StartBit The ordinal of the least significant bit in the bit field.
237 @param EndBit The ordinal of the most significant bit in the bit field.
239 @param Value The new value of the bit field.
241 @return The value written back to the PCI configuration register.
253 return PciExpressBitFieldWrite8 (Address
, StartBit
, EndBit
, Value
);
257 Reads a bit field in an 8-bit PCI configuration, performs a bitwise OR, and
258 writes the result back to the bit field in the 8-bit port.
260 Reads the 8-bit PCI configuration register specified by Address, performs a
261 bitwise OR between the read result and the value specified by
262 OrData, and writes the result to the 8-bit PCI configuration register
263 specified by Address. The value written to the PCI configuration register is
264 returned. This function must guarantee that all PCI read and write operations
265 are serialized. Extra left bits in OrData are stripped.
267 If Address > 0x0FFFFFFF, then ASSERT().
268 If StartBit is greater than 7, then ASSERT().
269 If EndBit is greater than 7, then ASSERT().
270 If EndBit is less than StartBit, then ASSERT().
271 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
273 @param Address The PCI configuration register to write.
274 @param StartBit The ordinal of the least significant bit in the bit field.
276 @param EndBit The ordinal of the most significant bit in the bit field.
278 @param OrData The value to OR with the PCI configuration register.
280 @return The value written back to the PCI configuration register.
292 return PciExpressBitFieldOr8 (Address
, StartBit
, EndBit
, OrData
);
296 Reads a bit field in an 8-bit PCI configuration register, performs a bitwise
297 AND, and writes the result back to the bit field in the 8-bit register.
299 Reads the 8-bit PCI configuration register specified by Address, performs a
300 bitwise AND between the read result and the value specified by AndData, and
301 writes the result to the 8-bit PCI configuration register specified by
302 Address. The value written to the PCI configuration register is returned.
303 This function must guarantee that all PCI read and write operations are
304 serialized. Extra left bits in AndData are stripped.
306 If Address > 0x0FFFFFFF, then ASSERT().
307 If StartBit is greater than 7, then ASSERT().
308 If EndBit is greater than 7, then ASSERT().
309 If EndBit is less than StartBit, then ASSERT().
310 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
312 @param Address The PCI configuration register to write.
313 @param StartBit The ordinal of the least significant bit in the bit field.
315 @param EndBit The ordinal of the most significant bit in the bit field.
317 @param AndData The value to AND with the PCI configuration register.
319 @return The value written back to the PCI configuration register.
331 return PciExpressBitFieldAnd8 (Address
, StartBit
, EndBit
, AndData
);
335 Reads a bit field in an 8-bit port, performs a bitwise AND followed by a
336 bitwise OR, and writes the result back to the bit field in the
339 Reads the 8-bit PCI configuration register specified by Address, performs a
340 bitwise AND followed by a bitwise OR between the read result and
341 the value specified by AndData, and writes the result to the 8-bit PCI
342 configuration register specified by Address. The value written to the PCI
343 configuration register is returned. This function must guarantee that all PCI
344 read and write operations are serialized. Extra left bits in both AndData and
347 If Address > 0x0FFFFFFF, then ASSERT().
348 If StartBit is greater than 7, then ASSERT().
349 If EndBit is greater than 7, then ASSERT().
350 If EndBit is less than StartBit, then ASSERT().
351 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
352 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
354 @param Address The PCI configuration register to write.
355 @param StartBit The ordinal of the least significant bit in the bit field.
357 @param EndBit The ordinal of the most significant bit in the bit field.
359 @param AndData The value to AND with the PCI configuration register.
360 @param OrData The value to OR with the result of the AND operation.
362 @return The value written back to the PCI configuration register.
367 PciBitFieldAndThenOr8 (
375 return PciExpressBitFieldAndThenOr8 (Address
, StartBit
, EndBit
, AndData
, OrData
);
379 Reads a 16-bit PCI configuration register.
381 Reads and returns the 16-bit PCI configuration register specified by Address.
382 This function must guarantee that all PCI read and write operations are
385 If Address > 0x0FFFFFFF, then ASSERT().
386 If Address is not aligned on a 16-bit boundary, then ASSERT().
388 @param Address The address that encodes the PCI Bus, Device, Function and
391 @return The read value from the PCI configuration register.
400 return PciExpressRead16 (Address
);
404 Writes a 16-bit PCI configuration register.
406 Writes the 16-bit PCI configuration register specified by Address with the
407 value specified by Value. Value is returned. This function must guarantee
408 that all PCI read and write operations are serialized.
410 If Address > 0x0FFFFFFF, then ASSERT().
411 If Address is not aligned on a 16-bit boundary, then ASSERT().
413 @param Address The address that encodes the PCI Bus, Device, Function and
415 @param Value The value to write.
417 @return The value written to the PCI configuration register.
427 return PciExpressWrite16 (Address
, Value
);
431 Performs a bitwise OR of a 16-bit PCI configuration register with
434 Reads the 16-bit PCI configuration register specified by Address, performs a
435 bitwise OR between the read result and the value specified by
436 OrData, and writes the result to the 16-bit PCI configuration register
437 specified by Address. The value written to the PCI configuration register is
438 returned. This function must guarantee that all PCI read and write operations
441 If Address > 0x0FFFFFFF, then ASSERT().
442 If Address is not aligned on a 16-bit boundary, then ASSERT().
444 @param Address The address that encodes the PCI Bus, Device, Function and
446 @param OrData The value to OR with the PCI configuration register.
448 @return The value written back to the PCI configuration register.
458 return PciExpressOr16 (Address
, OrData
);
462 Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit
465 Reads the 16-bit PCI configuration register specified by Address, performs a
466 bitwise AND between the read result and the value specified by AndData, and
467 writes the result to the 16-bit PCI configuration register specified by
468 Address. The value written to the PCI configuration register is returned.
469 This function must guarantee that all PCI read and write operations are
472 If Address > 0x0FFFFFFF, then ASSERT().
473 If Address is not aligned on a 16-bit boundary, then ASSERT().
475 @param Address The address that encodes the PCI Bus, Device, Function and
477 @param AndData The value to AND with the PCI configuration register.
479 @return The value written back to the PCI configuration register.
489 return PciExpressAnd16 (Address
, AndData
);
493 Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit
494 value, followed a bitwise OR with another 16-bit value.
496 Reads the 16-bit PCI configuration register specified by Address, performs a
497 bitwise AND between the read result and the value specified by AndData,
498 performs a bitwise OR between the result of the AND operation and
499 the value specified by OrData, and writes the result to the 16-bit PCI
500 configuration register specified by Address. The value written to the PCI
501 configuration register is returned. This function must guarantee that all PCI
502 read and write operations are serialized.
504 If Address > 0x0FFFFFFF, then ASSERT().
505 If Address is not aligned on a 16-bit boundary, then ASSERT().
507 @param Address The address that encodes the PCI Bus, Device, Function and
509 @param AndData The value to AND with the PCI configuration register.
510 @param OrData The value to OR with the result of the AND operation.
512 @return The value written back to the PCI configuration register.
523 return PciExpressAndThenOr16 (Address
, AndData
, OrData
);
527 Reads a bit field of a PCI configuration register.
529 Reads the bit field in a 16-bit PCI configuration register. The bit field is
530 specified by the StartBit and the EndBit. The value of the bit field is
533 If Address > 0x0FFFFFFF, then ASSERT().
534 If Address is not aligned on a 16-bit boundary, then ASSERT().
535 If StartBit is greater than 15, then ASSERT().
536 If EndBit is greater than 15, then ASSERT().
537 If EndBit is less than StartBit, then ASSERT().
539 @param Address The PCI configuration register to read.
540 @param StartBit The ordinal of the least significant bit in the bit field.
542 @param EndBit The ordinal of the most significant bit in the bit field.
545 @return The value of the bit field read from the PCI configuration register.
556 return PciExpressBitFieldRead16 (Address
, StartBit
, EndBit
);
560 Writes a bit field to a PCI configuration register.
562 Writes Value to the bit field of the PCI configuration register. The bit
563 field is specified by the StartBit and the EndBit. All other bits in the
564 destination PCI configuration register are preserved. The new value of the
565 16-bit register is returned.
567 If Address > 0x0FFFFFFF, then ASSERT().
568 If Address is not aligned on a 16-bit boundary, then ASSERT().
569 If StartBit is greater than 15, then ASSERT().
570 If EndBit is greater than 15, then ASSERT().
571 If EndBit is less than StartBit, then ASSERT().
572 If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
574 @param Address The PCI configuration register to write.
575 @param StartBit The ordinal of the least significant bit in the bit field.
577 @param EndBit The ordinal of the most significant bit in the bit field.
579 @param Value The new value of the bit field.
581 @return The value written back to the PCI configuration register.
593 return PciExpressBitFieldWrite16 (Address
, StartBit
, EndBit
, Value
);
597 Reads a bit field in a 16-bit PCI configuration, performs a bitwise OR, and
598 writes the result back to the bit field in the 16-bit port.
600 Reads the 16-bit PCI configuration register specified by Address, performs a
601 bitwise OR between the read result and the value specified by
602 OrData, and writes the result to the 16-bit PCI configuration register
603 specified by Address. The value written to the PCI configuration register is
604 returned. This function must guarantee that all PCI read and write operations
605 are serialized. Extra left bits in OrData are stripped.
607 If Address > 0x0FFFFFFF, then ASSERT().
608 If Address is not aligned on a 16-bit boundary, then ASSERT().
609 If StartBit is greater than 15, then ASSERT().
610 If EndBit is greater than 15, then ASSERT().
611 If EndBit is less than StartBit, then ASSERT().
612 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
614 @param Address The PCI configuration register to write.
615 @param StartBit The ordinal of the least significant bit in the bit field.
617 @param EndBit The ordinal of the most significant bit in the bit field.
619 @param OrData The value to OR with the PCI configuration register.
621 @return The value written back to the PCI configuration register.
633 return PciExpressBitFieldOr16 (Address
, StartBit
, EndBit
, OrData
);
637 Reads a bit field in a 16-bit PCI configuration register, performs a bitwise
638 AND, and writes the result back to the bit field in the 16-bit register.
640 Reads the 16-bit PCI configuration register specified by Address, performs a
641 bitwise AND between the read result and the value specified by AndData, and
642 writes the result to the 16-bit PCI configuration register specified by
643 Address. The value written to the PCI configuration register is returned.
644 This function must guarantee that all PCI read and write operations are
645 serialized. Extra left bits in AndData are stripped.
647 If Address > 0x0FFFFFFF, then ASSERT().
648 If Address is not aligned on a 16-bit boundary, then ASSERT().
649 If StartBit is greater than 15, then ASSERT().
650 If EndBit is greater than 15, then ASSERT().
651 If EndBit is less than StartBit, then ASSERT().
652 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
654 @param Address The PCI configuration register to write.
655 @param StartBit The ordinal of the least significant bit in the bit field.
657 @param EndBit The ordinal of the most significant bit in the bit field.
659 @param AndData The value to AND with the PCI configuration register.
661 @return The value written back to the PCI configuration register.
673 return PciExpressBitFieldAnd16 (Address
, StartBit
, EndBit
, AndData
);
677 Reads a bit field in a 16-bit port, performs a bitwise AND followed by a
678 bitwise OR, and writes the result back to the bit field in the
681 Reads the 16-bit PCI configuration register specified by Address, performs a
682 bitwise AND followed by a bitwise OR between the read result and
683 the value specified by AndData, and writes the result to the 16-bit PCI
684 configuration register specified by Address. The value written to the PCI
685 configuration register is returned. This function must guarantee that all PCI
686 read and write operations are serialized. Extra left bits in both AndData and
689 If Address > 0x0FFFFFFF, then ASSERT().
690 If Address is not aligned on a 16-bit boundary, then ASSERT().
691 If StartBit is greater than 15, then ASSERT().
692 If EndBit is greater than 15, then ASSERT().
693 If EndBit is less than StartBit, then ASSERT().
694 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
695 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
697 @param Address The PCI configuration register to write.
698 @param StartBit The ordinal of the least significant bit in the bit field.
700 @param EndBit The ordinal of the most significant bit in the bit field.
702 @param AndData The value to AND with the PCI configuration register.
703 @param OrData The value to OR with the result of the AND operation.
705 @return The value written back to the PCI configuration register.
710 PciBitFieldAndThenOr16 (
718 return PciExpressBitFieldAndThenOr16 (Address
, StartBit
, EndBit
, AndData
, OrData
);
722 Reads a 32-bit PCI configuration register.
724 Reads and returns the 32-bit PCI configuration register specified by Address.
725 This function must guarantee that all PCI read and write operations are
728 If Address > 0x0FFFFFFF, then ASSERT().
729 If Address is not aligned on a 32-bit boundary, then ASSERT().
731 @param Address The address that encodes the PCI Bus, Device, Function and
734 @return The read value from the PCI configuration register.
743 return PciExpressRead32 (Address
);
747 Writes a 32-bit PCI configuration register.
749 Writes the 32-bit PCI configuration register specified by Address with the
750 value specified by Value. Value is returned. This function must guarantee
751 that all PCI read and write operations are serialized.
753 If Address > 0x0FFFFFFF, then ASSERT().
754 If Address is not aligned on a 32-bit boundary, then ASSERT().
756 @param Address The address that encodes the PCI Bus, Device, Function and
758 @param Value The value to write.
760 @return The value written to the PCI configuration register.
770 return PciExpressWrite32 (Address
, Value
);
774 Performs a bitwise OR of a 32-bit PCI configuration register with
777 Reads the 32-bit PCI configuration register specified by Address, performs a
778 bitwise OR between the read result and the value specified by
779 OrData, and writes the result to the 32-bit PCI configuration register
780 specified by Address. The value written to the PCI configuration register is
781 returned. This function must guarantee that all PCI read and write operations
784 If Address > 0x0FFFFFFF, then ASSERT().
785 If Address is not aligned on a 32-bit boundary, then ASSERT().
787 @param Address The address that encodes the PCI Bus, Device, Function and
789 @param OrData The value to OR with the PCI configuration register.
791 @return The value written back to the PCI configuration register.
801 return PciExpressOr32 (Address
, OrData
);
805 Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit
808 Reads the 32-bit PCI configuration register specified by Address, performs a
809 bitwise AND between the read result and the value specified by AndData, and
810 writes the result to the 32-bit PCI configuration register specified by
811 Address. The value written to the PCI configuration register is returned.
812 This function must guarantee that all PCI read and write operations are
815 If Address > 0x0FFFFFFF, then ASSERT().
816 If Address is not aligned on a 32-bit boundary, then ASSERT().
818 @param Address The address that encodes the PCI Bus, Device, Function and
820 @param AndData The value to AND with the PCI configuration register.
822 @return The value written back to the PCI configuration register.
832 return PciExpressAnd32 (Address
, AndData
);
836 Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit
837 value, followed a bitwise OR with another 32-bit value.
839 Reads the 32-bit PCI configuration register specified by Address, performs a
840 bitwise AND between the read result and the value specified by AndData,
841 performs a bitwise OR between the result of the AND operation and
842 the value specified by OrData, and writes the result to the 32-bit PCI
843 configuration register specified by Address. The value written to the PCI
844 configuration register is returned. This function must guarantee that all PCI
845 read and write operations are serialized.
847 If Address > 0x0FFFFFFF, then ASSERT().
848 If Address is not aligned on a 32-bit boundary, then ASSERT().
850 @param Address The address that encodes the PCI Bus, Device, Function and
852 @param AndData The value to AND with the PCI configuration register.
853 @param OrData The value to OR with the result of the AND operation.
855 @return The value written back to the PCI configuration register.
866 return PciExpressAndThenOr32 (Address
, AndData
, OrData
);
870 Reads a bit field of a PCI configuration register.
872 Reads the bit field in a 32-bit PCI configuration register. The bit field is
873 specified by the StartBit and the EndBit. The value of the bit field is
876 If Address > 0x0FFFFFFF, then ASSERT().
877 If Address is not aligned on a 32-bit boundary, then ASSERT().
878 If StartBit is greater than 31, then ASSERT().
879 If EndBit is greater than 31, then ASSERT().
880 If EndBit is less than StartBit, then ASSERT().
882 @param Address The PCI configuration register to read.
883 @param StartBit The ordinal of the least significant bit in the bit field.
885 @param EndBit The ordinal of the most significant bit in the bit field.
888 @return The value of the bit field read from the PCI configuration register.
899 return PciExpressBitFieldRead32 (Address
, StartBit
, EndBit
);
903 Writes a bit field to a PCI configuration register.
905 Writes Value to the bit field of the PCI configuration register. The bit
906 field is specified by the StartBit and the EndBit. All other bits in the
907 destination PCI configuration register are preserved. The new value of the
908 32-bit register is returned.
910 If Address > 0x0FFFFFFF, then ASSERT().
911 If Address is not aligned on a 32-bit boundary, then ASSERT().
912 If StartBit is greater than 31, then ASSERT().
913 If EndBit is greater than 31, then ASSERT().
914 If EndBit is less than StartBit, then ASSERT().
915 If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
917 @param Address The PCI configuration register to write.
918 @param StartBit The ordinal of the least significant bit in the bit field.
920 @param EndBit The ordinal of the most significant bit in the bit field.
922 @param Value The new value of the bit field.
924 @return The value written back to the PCI configuration register.
936 return PciExpressBitFieldWrite32 (Address
, StartBit
, EndBit
, Value
);
940 Reads a bit field in a 32-bit PCI configuration, performs a bitwise OR, and
941 writes the result back to the bit field in the 32-bit port.
943 Reads the 32-bit PCI configuration register specified by Address, performs a
944 bitwise OR between the read result and the value specified by
945 OrData, and writes the result to the 32-bit PCI configuration register
946 specified by Address. The value written to the PCI configuration register is
947 returned. This function must guarantee that all PCI read and write operations
948 are serialized. Extra left bits in OrData are stripped.
950 If Address > 0x0FFFFFFF, then ASSERT().
951 If Address is not aligned on a 32-bit boundary, then ASSERT().
952 If StartBit is greater than 31, then ASSERT().
953 If EndBit is greater than 31, then ASSERT().
954 If EndBit is less than StartBit, then ASSERT().
955 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
957 @param Address The PCI configuration register to write.
958 @param StartBit The ordinal of the least significant bit in the bit field.
960 @param EndBit The ordinal of the most significant bit in the bit field.
962 @param OrData The value to OR with the PCI configuration register.
964 @return The value written back to the PCI configuration register.
976 return PciExpressBitFieldOr32 (Address
, StartBit
, EndBit
, OrData
);
980 Reads a bit field in a 32-bit PCI configuration register, performs a bitwise
981 AND, and writes the result back to the bit field in the 32-bit register.
983 Reads the 32-bit PCI configuration register specified by Address, performs a
984 bitwise AND between the read result and the value specified by AndData, and
985 writes the result to the 32-bit PCI configuration register specified by
986 Address. The value written to the PCI configuration register is returned.
987 This function must guarantee that all PCI read and write operations are
988 serialized. Extra left bits in AndData are stripped.
990 If Address > 0x0FFFFFFF, then ASSERT().
991 If Address is not aligned on a 32-bit boundary, then ASSERT().
992 If StartBit is greater than 31, then ASSERT().
993 If EndBit is greater than 31, then ASSERT().
994 If EndBit is less than StartBit, then ASSERT().
995 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
997 @param Address The PCI configuration register to write.
998 @param StartBit The ordinal of the least significant bit in the bit field.
1000 @param EndBit The ordinal of the most significant bit in the bit field.
1002 @param AndData The value to AND with the PCI configuration register.
1004 @return The value written back to the PCI configuration register.
1016 return PciExpressBitFieldAnd32 (Address
, StartBit
, EndBit
, AndData
);
1020 Reads a bit field in a 32-bit port, performs a bitwise AND followed by a
1021 bitwise OR, and writes the result back to the bit field in the
1024 Reads the 32-bit PCI configuration register specified by Address, performs a
1025 bitwise AND followed by a bitwise OR between the read result and
1026 the value specified by AndData, and writes the result to the 32-bit PCI
1027 configuration register specified by Address. The value written to the PCI
1028 configuration register is returned. This function must guarantee that all PCI
1029 read and write operations are serialized. Extra left bits in both AndData and
1030 OrData are stripped.
1032 If Address > 0x0FFFFFFF, then ASSERT().
1033 If Address is not aligned on a 32-bit boundary, then ASSERT().
1034 If StartBit is greater than 31, then ASSERT().
1035 If EndBit is greater than 31, then ASSERT().
1036 If EndBit is less than StartBit, then ASSERT().
1037 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
1038 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
1040 @param Address The PCI configuration register to write.
1041 @param StartBit The ordinal of the least significant bit in the bit field.
1043 @param EndBit The ordinal of the most significant bit in the bit field.
1045 @param AndData The value to AND with the PCI configuration register.
1046 @param OrData The value to OR with the result of the AND operation.
1048 @return The value written back to the PCI configuration register.
1053 PciBitFieldAndThenOr32 (
1061 return PciExpressBitFieldAndThenOr32 (Address
, StartBit
, EndBit
, AndData
, OrData
);
1065 Reads a range of PCI configuration registers into a caller supplied buffer.
1067 Reads the range of PCI configuration registers specified by StartAddress and
1068 Size into the buffer specified by Buffer. This function only allows the PCI
1069 configuration registers from a single PCI function to be read. Size is
1070 returned. When possible 32-bit PCI configuration read cycles are used to read
1071 from StartAdress to StartAddress + Size. Due to alignment restrictions, 8-bit
1072 and 16-bit PCI configuration read cycles may be used at the beginning and the
1075 If StartAddress > 0x0FFFFFFF, then ASSERT().
1076 If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
1077 If Size > 0 and Buffer is NULL, then ASSERT().
1079 @param StartAddress The starting address that encodes the PCI Bus, Device,
1080 Function and Register.
1081 @param Size The size in bytes of the transfer.
1082 @param Buffer The pointer to a buffer receiving the data read.
1090 IN UINTN StartAddress
,
1095 return PciExpressReadBuffer (StartAddress
, Size
, Buffer
);
1099 Copies the data in a caller supplied buffer to a specified range of PCI
1100 configuration space.
1102 Writes the range of PCI configuration registers specified by StartAddress and
1103 Size from the buffer specified by Buffer. This function only allows the PCI
1104 configuration registers from a single PCI function to be written. Size is
1105 returned. When possible 32-bit PCI configuration write cycles are used to
1106 write from StartAdress to StartAddress + Size. Due to alignment restrictions,
1107 8-bit and 16-bit PCI configuration write cycles may be used at the beginning
1108 and the end of the range.
1110 If StartAddress > 0x0FFFFFFF, then ASSERT().
1111 If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
1112 If Size > 0 and Buffer is NULL, then ASSERT().
1114 @param StartAddress The starting address that encodes the PCI Bus, Device,
1115 Function and Register.
1116 @param Size The size in bytes of the transfer.
1117 @param Buffer The pointer to a buffer containing the data to write.
1119 @return Size written to StartAddress.
1125 IN UINTN StartAddress
,
1130 return PciExpressWriteBuffer (StartAddress
, Size
, Buffer
);