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2 PCI Library using PC Express access.
4 Copyright (c) 2006, Intel Corporation<BR>
5 All rights reserved. This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
18 // The package level header files this module uses
22 // The protocols, PPI and GUID defintions for this module
25 // The Library classes this module consumes
27 #include <Library/PciLib.h>
28 #include <Library/PciExpressLib.h>
31 Reads an 8-bit PCI configuration register.
33 Reads and returns the 8-bit PCI configuration register specified by Address.
34 This function must guarantee that all PCI read and write operations are
37 If Address > 0x0FFFFFFF, then ASSERT().
39 @param Address Address that encodes the PCI Bus, Device, Function and
42 @return The read value from the PCI configuration register.
51 return PciExpressRead8 (Address
);
55 Writes an 8-bit PCI configuration register.
57 Writes the 8-bit PCI configuration register specified by Address with the
58 value specified by Value. Value is returned. This function must guarantee
59 that all PCI read and write operations are serialized.
61 If Address > 0x0FFFFFFF, then ASSERT().
63 @param Address Address that encodes the PCI Bus, Device, Function and
65 @param Value The value to write.
67 @return The value written to the PCI configuration register.
77 return PciExpressWrite8 (Address
, Data
);
81 Performs a bitwise inclusive OR of an 8-bit PCI configuration register with
84 Reads the 8-bit PCI configuration register specified by Address, performs a
85 bitwise inclusive OR between the read result and the value specified by
86 OrData, and writes the result to the 8-bit PCI configuration register
87 specified by Address. The value written to the PCI configuration register is
88 returned. This function must guarantee that all PCI read and write operations
91 If Address > 0x0FFFFFFF, then ASSERT().
93 @param Address Address that encodes the PCI Bus, Device, Function and
95 @param OrData The value to OR with the PCI configuration register.
97 @return The value written back to the PCI configuration register.
107 return PciExpressOr8 (Address
, OrData
);
111 Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit
114 Reads the 8-bit PCI configuration register specified by Address, performs a
115 bitwise AND between the read result and the value specified by AndData, and
116 writes the result to the 8-bit PCI configuration register specified by
117 Address. The value written to the PCI configuration register is returned.
118 This function must guarantee that all PCI read and write operations are
121 If Address > 0x0FFFFFFF, then ASSERT().
123 @param Address Address that encodes the PCI Bus, Device, Function and
125 @param AndData The value to AND with the PCI configuration register.
127 @return The value written back to the PCI configuration register.
137 return PciExpressAnd8 (Address
, AndData
);
141 Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit
142 value, followed a bitwise inclusive OR with another 8-bit value.
144 Reads the 8-bit PCI configuration register specified by Address, performs a
145 bitwise AND between the read result and the value specified by AndData,
146 performs a bitwise inclusive OR between the result of the AND operation and
147 the value specified by OrData, and writes the result to the 8-bit PCI
148 configuration register specified by Address. The value written to the PCI
149 configuration register is returned. This function must guarantee that all PCI
150 read and write operations are serialized.
152 If Address > 0x0FFFFFFF, then ASSERT().
154 @param Address Address that encodes the PCI Bus, Device, Function and
156 @param AndData The value to AND with the PCI configuration register.
157 @param OrData The value to OR with the result of the AND operation.
159 @return The value written back to the PCI configuration register.
170 return PciExpressAndThenOr8 (Address
, AndData
, OrData
);
174 Reads a bit field of a PCI configuration register.
176 Reads the bit field in an 8-bit PCI configuration register. The bit field is
177 specified by the StartBit and the EndBit. The value of the bit field is
180 If Address > 0x0FFFFFFF, then ASSERT().
181 If StartBit is greater than 7, then ASSERT().
182 If EndBit is greater than 7, then ASSERT().
183 If EndBit is less than StartBit, then ASSERT().
185 @param Address PCI configuration register to read.
186 @param StartBit The ordinal of the least significant bit in the bit field.
188 @param EndBit The ordinal of the most significant bit in the bit field.
191 @return The value of the bit field read from the PCI configuration register.
202 return PciExpressBitFieldRead8 (Address
, StartBit
, EndBit
);
206 Writes a bit field to a PCI configuration register.
208 Writes Value to the bit field of the PCI configuration register. The bit
209 field is specified by the StartBit and the EndBit. All other bits in the
210 destination PCI configuration register are preserved. The new value of the
211 8-bit register is returned.
213 If Address > 0x0FFFFFFF, then ASSERT().
214 If StartBit is greater than 7, then ASSERT().
215 If EndBit is greater than 7, then ASSERT().
216 If EndBit is less than StartBit, then ASSERT().
218 @param Address PCI configuration register to write.
219 @param StartBit The ordinal of the least significant bit in the bit field.
221 @param EndBit The ordinal of the most significant bit in the bit field.
223 @param Value New value of the bit field.
225 @return The value written back to the PCI configuration register.
237 return PciExpressBitFieldWrite8 (Address
, StartBit
, EndBit
, Value
);
241 Reads a bit field in an 8-bit PCI configuration, performs a bitwise OR, and
242 writes the result back to the bit field in the 8-bit port.
244 Reads the 8-bit PCI configuration register specified by Address, performs a
245 bitwise inclusive OR between the read result and the value specified by
246 OrData, and writes the result to the 8-bit PCI configuration register
247 specified by Address. The value written to the PCI configuration register is
248 returned. This function must guarantee that all PCI read and write operations
249 are serialized. Extra left bits in OrData are stripped.
251 If Address > 0x0FFFFFFF, then ASSERT().
252 If StartBit is greater than 7, then ASSERT().
253 If EndBit is greater than 7, then ASSERT().
254 If EndBit is less than StartBit, then ASSERT().
256 @param Address PCI configuration register to write.
257 @param StartBit The ordinal of the least significant bit in the bit field.
259 @param EndBit The ordinal of the most significant bit in the bit field.
261 @param OrData The value to OR with the PCI configuration register.
263 @return The value written back to the PCI configuration register.
275 return PciExpressBitFieldOr8 (Address
, StartBit
, EndBit
, OrData
);
279 Reads a bit field in an 8-bit PCI configuration register, performs a bitwise
280 AND, and writes the result back to the bit field in the 8-bit register.
282 Reads the 8-bit PCI configuration register specified by Address, performs a
283 bitwise AND between the read result and the value specified by AndData, and
284 writes the result to the 8-bit PCI configuration register specified by
285 Address. The value written to the PCI configuration register is returned.
286 This function must guarantee that all PCI read and write operations are
287 serialized. Extra left bits in AndData are stripped.
289 If Address > 0x0FFFFFFF, then ASSERT().
290 If StartBit is greater than 7, then ASSERT().
291 If EndBit is greater than 7, then ASSERT().
292 If EndBit is less than StartBit, then ASSERT().
294 @param Address PCI configuration register to write.
295 @param StartBit The ordinal of the least significant bit in the bit field.
297 @param EndBit The ordinal of the most significant bit in the bit field.
299 @param AndData The value to AND with the PCI configuration register.
301 @return The value written back to the PCI configuration register.
313 return PciExpressBitFieldAnd8 (Address
, StartBit
, EndBit
, AndData
);
317 Reads a bit field in an 8-bit port, performs a bitwise AND followed by a
318 bitwise inclusive OR, and writes the result back to the bit field in the
321 Reads the 8-bit PCI configuration register specified by Address, performs a
322 bitwise AND followed by a bitwise inclusive OR between the read result and
323 the value specified by AndData, and writes the result to the 8-bit PCI
324 configuration register specified by Address. The value written to the PCI
325 configuration register is returned. This function must guarantee that all PCI
326 read and write operations are serialized. Extra left bits in both AndData and
329 If Address > 0x0FFFFFFF, then ASSERT().
330 If StartBit is greater than 7, then ASSERT().
331 If EndBit is greater than 7, then ASSERT().
332 If EndBit is less than StartBit, then ASSERT().
334 @param Address PCI configuration register to write.
335 @param StartBit The ordinal of the least significant bit in the bit field.
337 @param EndBit The ordinal of the most significant bit in the bit field.
339 @param AndData The value to AND with the PCI configuration register.
340 @param OrData The value to OR with the result of the AND operation.
342 @return The value written back to the PCI configuration register.
347 PciBitFieldAndThenOr8 (
355 return PciExpressBitFieldAndThenOr8 (Address
, StartBit
, EndBit
, AndData
, OrData
);
359 Reads a 16-bit PCI configuration register.
361 Reads and returns the 16-bit PCI configuration register specified by Address.
362 This function must guarantee that all PCI read and write operations are
365 If Address > 0x0FFFFFFF, then ASSERT().
367 @param Address Address that encodes the PCI Bus, Device, Function and
370 @return The read value from the PCI configuration register.
379 return PciExpressRead16 (Address
);
383 Writes a 16-bit PCI configuration register.
385 Writes the 16-bit PCI configuration register specified by Address with the
386 value specified by Value. Value is returned. This function must guarantee
387 that all PCI read and write operations are serialized.
389 If Address > 0x0FFFFFFF, then ASSERT().
391 @param Address Address that encodes the PCI Bus, Device, Function and
393 @param Value The value to write.
395 @return The value written to the PCI configuration register.
405 return PciExpressWrite16 (Address
, Data
);
409 Performs a bitwise inclusive OR of a 16-bit PCI configuration register with
412 Reads the 16-bit PCI configuration register specified by Address, performs a
413 bitwise inclusive OR between the read result and the value specified by
414 OrData, and writes the result to the 16-bit PCI configuration register
415 specified by Address. The value written to the PCI configuration register is
416 returned. This function must guarantee that all PCI read and write operations
419 If Address > 0x0FFFFFFF, then ASSERT().
421 @param Address Address that encodes the PCI Bus, Device, Function and
423 @param OrData The value to OR with the PCI configuration register.
425 @return The value written back to the PCI configuration register.
435 return PciExpressOr16 (Address
, OrData
);
439 Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit
442 Reads the 16-bit PCI configuration register specified by Address, performs a
443 bitwise AND between the read result and the value specified by AndData, and
444 writes the result to the 16-bit PCI configuration register specified by
445 Address. The value written to the PCI configuration register is returned.
446 This function must guarantee that all PCI read and write operations are
449 If Address > 0x0FFFFFFF, then ASSERT().
451 @param Address Address that encodes the PCI Bus, Device, Function and
453 @param AndData The value to AND with the PCI configuration register.
455 @return The value written back to the PCI configuration register.
465 return PciExpressAnd16 (Address
, AndData
);
469 Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit
470 value, followed a bitwise inclusive OR with another 16-bit value.
472 Reads the 16-bit PCI configuration register specified by Address, performs a
473 bitwise AND between the read result and the value specified by AndData,
474 performs a bitwise inclusive OR between the result of the AND operation and
475 the value specified by OrData, and writes the result to the 16-bit PCI
476 configuration register specified by Address. The value written to the PCI
477 configuration register is returned. This function must guarantee that all PCI
478 read and write operations are serialized.
480 If Address > 0x0FFFFFFF, then ASSERT().
482 @param Address Address that encodes the PCI Bus, Device, Function and
484 @param AndData The value to AND with the PCI configuration register.
485 @param OrData The value to OR with the result of the AND operation.
487 @return The value written back to the PCI configuration register.
498 return PciExpressAndThenOr16 (Address
, AndData
, OrData
);
502 Reads a bit field of a PCI configuration register.
504 Reads the bit field in a 16-bit PCI configuration register. The bit field is
505 specified by the StartBit and the EndBit. The value of the bit field is
508 If Address > 0x0FFFFFFF, then ASSERT().
509 If StartBit is greater than 15, then ASSERT().
510 If EndBit is greater than 15, then ASSERT().
511 If EndBit is less than StartBit, then ASSERT().
513 @param Address PCI configuration register to read.
514 @param StartBit The ordinal of the least significant bit in the bit field.
516 @param EndBit The ordinal of the most significant bit in the bit field.
519 @return The value of the bit field read from the PCI configuration register.
530 return PciExpressBitFieldRead16 (Address
, StartBit
, EndBit
);
534 Writes a bit field to a PCI configuration register.
536 Writes Value to the bit field of the PCI configuration register. The bit
537 field is specified by the StartBit and the EndBit. All other bits in the
538 destination PCI configuration register are preserved. The new value of the
539 16-bit register is returned.
541 If Address > 0x0FFFFFFF, then ASSERT().
542 If StartBit is greater than 15, then ASSERT().
543 If EndBit is greater than 15, then ASSERT().
544 If EndBit is less than StartBit, then ASSERT().
546 @param Address PCI configuration register to write.
547 @param StartBit The ordinal of the least significant bit in the bit field.
549 @param EndBit The ordinal of the most significant bit in the bit field.
551 @param Value New value of the bit field.
553 @return The value written back to the PCI configuration register.
565 return PciExpressBitFieldWrite16 (Address
, StartBit
, EndBit
, Value
);
569 Reads a bit field in a 16-bit PCI configuration, performs a bitwise OR, and
570 writes the result back to the bit field in the 16-bit port.
572 Reads the 16-bit PCI configuration register specified by Address, performs a
573 bitwise inclusive OR between the read result and the value specified by
574 OrData, and writes the result to the 16-bit PCI configuration register
575 specified by Address. The value written to the PCI configuration register is
576 returned. This function must guarantee that all PCI read and write operations
577 are serialized. Extra left bits in OrData are stripped.
579 If Address > 0x0FFFFFFF, then ASSERT().
580 If StartBit is greater than 15, then ASSERT().
581 If EndBit is greater than 15, then ASSERT().
582 If EndBit is less than StartBit, then ASSERT().
584 @param Address PCI configuration register to write.
585 @param StartBit The ordinal of the least significant bit in the bit field.
587 @param EndBit The ordinal of the most significant bit in the bit field.
589 @param OrData The value to OR with the PCI configuration register.
591 @return The value written back to the PCI configuration register.
603 return PciExpressBitFieldOr16 (Address
, StartBit
, EndBit
, OrData
);
607 Reads a bit field in a 16-bit PCI configuration register, performs a bitwise
608 AND, and writes the result back to the bit field in the 16-bit register.
610 Reads the 16-bit PCI configuration register specified by Address, performs a
611 bitwise AND between the read result and the value specified by AndData, and
612 writes the result to the 16-bit PCI configuration register specified by
613 Address. The value written to the PCI configuration register is returned.
614 This function must guarantee that all PCI read and write operations are
615 serialized. Extra left bits in AndData are stripped.
617 If Address > 0x0FFFFFFF, then ASSERT().
618 If StartBit is greater than 15, then ASSERT().
619 If EndBit is greater than 15, then ASSERT().
620 If EndBit is less than StartBit, then ASSERT().
622 @param Address PCI configuration register to write.
623 @param StartBit The ordinal of the least significant bit in the bit field.
625 @param EndBit The ordinal of the most significant bit in the bit field.
627 @param AndData The value to AND with the PCI configuration register.
629 @return The value written back to the PCI configuration register.
641 return PciExpressBitFieldAnd16 (Address
, StartBit
, EndBit
, AndData
);
645 Reads a bit field in a 16-bit port, performs a bitwise AND followed by a
646 bitwise inclusive OR, and writes the result back to the bit field in the
649 Reads the 16-bit PCI configuration register specified by Address, performs a
650 bitwise AND followed by a bitwise inclusive OR between the read result and
651 the value specified by AndData, and writes the result to the 16-bit PCI
652 configuration register specified by Address. The value written to the PCI
653 configuration register is returned. This function must guarantee that all PCI
654 read and write operations are serialized. Extra left bits in both AndData and
657 If Address > 0x0FFFFFFF, then ASSERT().
658 If StartBit is greater than 15, then ASSERT().
659 If EndBit is greater than 15, then ASSERT().
660 If EndBit is less than StartBit, then ASSERT().
662 @param Address PCI configuration register to write.
663 @param StartBit The ordinal of the least significant bit in the bit field.
665 @param EndBit The ordinal of the most significant bit in the bit field.
667 @param AndData The value to AND with the PCI configuration register.
668 @param OrData The value to OR with the result of the AND operation.
670 @return The value written back to the PCI configuration register.
675 PciBitFieldAndThenOr16 (
683 return PciExpressBitFieldAndThenOr16 (Address
, StartBit
, EndBit
, AndData
, OrData
);
687 Reads a 32-bit PCI configuration register.
689 Reads and returns the 32-bit PCI configuration register specified by Address.
690 This function must guarantee that all PCI read and write operations are
693 If Address > 0x0FFFFFFF, then ASSERT().
695 @param Address Address that encodes the PCI Bus, Device, Function and
698 @return The read value from the PCI configuration register.
707 return PciExpressRead32 (Address
);
711 Writes a 32-bit PCI configuration register.
713 Writes the 32-bit PCI configuration register specified by Address with the
714 value specified by Value. Value is returned. This function must guarantee
715 that all PCI read and write operations are serialized.
717 If Address > 0x0FFFFFFF, then ASSERT().
719 @param Address Address that encodes the PCI Bus, Device, Function and
721 @param Value The value to write.
723 @return The value written to the PCI configuration register.
733 return PciExpressWrite32 (Address
, Data
);
737 Performs a bitwise inclusive OR of a 32-bit PCI configuration register with
740 Reads the 32-bit PCI configuration register specified by Address, performs a
741 bitwise inclusive OR between the read result and the value specified by
742 OrData, and writes the result to the 32-bit PCI configuration register
743 specified by Address. The value written to the PCI configuration register is
744 returned. This function must guarantee that all PCI read and write operations
747 If Address > 0x0FFFFFFF, then ASSERT().
749 @param Address Address that encodes the PCI Bus, Device, Function and
751 @param OrData The value to OR with the PCI configuration register.
753 @return The value written back to the PCI configuration register.
763 return PciExpressOr32 (Address
, OrData
);
767 Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit
770 Reads the 32-bit PCI configuration register specified by Address, performs a
771 bitwise AND between the read result and the value specified by AndData, and
772 writes the result to the 32-bit PCI configuration register specified by
773 Address. The value written to the PCI configuration register is returned.
774 This function must guarantee that all PCI read and write operations are
777 If Address > 0x0FFFFFFF, then ASSERT().
779 @param Address Address that encodes the PCI Bus, Device, Function and
781 @param AndData The value to AND with the PCI configuration register.
783 @return The value written back to the PCI configuration register.
793 return PciExpressAnd32 (Address
, AndData
);
797 Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit
798 value, followed a bitwise inclusive OR with another 32-bit value.
800 Reads the 32-bit PCI configuration register specified by Address, performs a
801 bitwise AND between the read result and the value specified by AndData,
802 performs a bitwise inclusive OR between the result of the AND operation and
803 the value specified by OrData, and writes the result to the 32-bit PCI
804 configuration register specified by Address. The value written to the PCI
805 configuration register is returned. This function must guarantee that all PCI
806 read and write operations are serialized.
808 If Address > 0x0FFFFFFF, then ASSERT().
810 @param Address Address that encodes the PCI Bus, Device, Function and
812 @param AndData The value to AND with the PCI configuration register.
813 @param OrData The value to OR with the result of the AND operation.
815 @return The value written back to the PCI configuration register.
826 return PciExpressAndThenOr32 (Address
, AndData
, OrData
);
830 Reads a bit field of a PCI configuration register.
832 Reads the bit field in a 32-bit PCI configuration register. The bit field is
833 specified by the StartBit and the EndBit. The value of the bit field is
836 If Address > 0x0FFFFFFF, then ASSERT().
837 If StartBit is greater than 31, then ASSERT().
838 If EndBit is greater than 31, then ASSERT().
839 If EndBit is less than StartBit, then ASSERT().
841 @param Address PCI configuration register to read.
842 @param StartBit The ordinal of the least significant bit in the bit field.
844 @param EndBit The ordinal of the most significant bit in the bit field.
847 @return The value of the bit field read from the PCI configuration register.
858 return PciExpressBitFieldRead32 (Address
, StartBit
, EndBit
);
862 Writes a bit field to a PCI configuration register.
864 Writes Value to the bit field of the PCI configuration register. The bit
865 field is specified by the StartBit and the EndBit. All other bits in the
866 destination PCI configuration register are preserved. The new value of the
867 32-bit register is returned.
869 If Address > 0x0FFFFFFF, then ASSERT().
870 If StartBit is greater than 31, then ASSERT().
871 If EndBit is greater than 31, then ASSERT().
872 If EndBit is less than StartBit, then ASSERT().
874 @param Address PCI configuration register to write.
875 @param StartBit The ordinal of the least significant bit in the bit field.
877 @param EndBit The ordinal of the most significant bit in the bit field.
879 @param Value New value of the bit field.
881 @return The value written back to the PCI configuration register.
893 return PciExpressBitFieldWrite32 (Address
, StartBit
, EndBit
, Value
);
897 Reads a bit field in a 32-bit PCI configuration, performs a bitwise OR, and
898 writes the result back to the bit field in the 32-bit port.
900 Reads the 32-bit PCI configuration register specified by Address, performs a
901 bitwise inclusive OR between the read result and the value specified by
902 OrData, and writes the result to the 32-bit PCI configuration register
903 specified by Address. The value written to the PCI configuration register is
904 returned. This function must guarantee that all PCI read and write operations
905 are serialized. Extra left bits in OrData are stripped.
907 If Address > 0x0FFFFFFF, then ASSERT().
908 If StartBit is greater than 31, then ASSERT().
909 If EndBit is greater than 31, then ASSERT().
910 If EndBit is less than StartBit, then ASSERT().
912 @param Address PCI configuration register to write.
913 @param StartBit The ordinal of the least significant bit in the bit field.
915 @param EndBit The ordinal of the most significant bit in the bit field.
917 @param OrData The value to OR with the PCI configuration register.
919 @return The value written back to the PCI configuration register.
931 return PciExpressBitFieldOr32 (Address
, StartBit
, EndBit
, OrData
);
935 Reads a bit field in a 32-bit PCI configuration register, performs a bitwise
936 AND, and writes the result back to the bit field in the 32-bit register.
938 Reads the 32-bit PCI configuration register specified by Address, performs a
939 bitwise AND between the read result and the value specified by AndData, and
940 writes the result to the 32-bit PCI configuration register specified by
941 Address. The value written to the PCI configuration register is returned.
942 This function must guarantee that all PCI read and write operations are
943 serialized. Extra left bits in AndData are stripped.
945 If Address > 0x0FFFFFFF, then ASSERT().
946 If StartBit is greater than 31, then ASSERT().
947 If EndBit is greater than 31, then ASSERT().
948 If EndBit is less than StartBit, then ASSERT().
950 @param Address PCI configuration register to write.
951 @param StartBit The ordinal of the least significant bit in the bit field.
953 @param EndBit The ordinal of the most significant bit in the bit field.
955 @param AndData The value to AND with the PCI configuration register.
957 @return The value written back to the PCI configuration register.
969 return PciExpressBitFieldAnd32 (Address
, StartBit
, EndBit
, AndData
);
973 Reads a bit field in a 32-bit port, performs a bitwise AND followed by a
974 bitwise inclusive OR, and writes the result back to the bit field in the
977 Reads the 32-bit PCI configuration register specified by Address, performs a
978 bitwise AND followed by a bitwise inclusive OR between the read result and
979 the value specified by AndData, and writes the result to the 32-bit PCI
980 configuration register specified by Address. The value written to the PCI
981 configuration register is returned. This function must guarantee that all PCI
982 read and write operations are serialized. Extra left bits in both AndData and
985 If Address > 0x0FFFFFFF, then ASSERT().
986 If StartBit is greater than 31, then ASSERT().
987 If EndBit is greater than 31, then ASSERT().
988 If EndBit is less than StartBit, then ASSERT().
990 @param Address PCI configuration register to write.
991 @param StartBit The ordinal of the least significant bit in the bit field.
993 @param EndBit The ordinal of the most significant bit in the bit field.
995 @param AndData The value to AND with the PCI configuration register.
996 @param OrData The value to OR with the result of the AND operation.
998 @return The value written back to the PCI configuration register.
1003 PciBitFieldAndThenOr32 (
1011 return PciExpressBitFieldAndThenOr32 (Address
, StartBit
, EndBit
, AndData
, OrData
);
1015 Reads a range of PCI configuration registers into a caller supplied buffer.
1017 Reads the range of PCI configuration registers specified by StartAddress and
1018 Size into the buffer specified by Buffer. This function only allows the PCI
1019 configuration registers from a single PCI function to be read. Size is
1020 returned. When possible 32-bit PCI configuration read cycles are used to read
1021 from StartAdress to StartAddress + Size. Due to alignment restrictions, 8-bit
1022 and 16-bit PCI configuration read cycles may be used at the beginning and the
1025 If StartAddress > 0x0FFFFFFF, then ASSERT().
1026 If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
1027 If Size > 0 and Buffer is NULL, then ASSERT().
1029 @param StartAddress Starting address that encodes the PCI Bus, Device,
1030 Function and Register.
1031 @param Size Size in bytes of the transfer.
1032 @param Buffer Pointer to a buffer receiving the data read.
1040 IN UINTN StartAddress
,
1045 return PciExpressReadBuffer (StartAddress
, Size
, Buffer
);
1049 Copies the data in a caller supplied buffer to a specified range of PCI
1050 configuration space.
1052 Writes the range of PCI configuration registers specified by StartAddress and
1053 Size from the buffer specified by Buffer. This function only allows the PCI
1054 configuration registers from a single PCI function to be written. Size is
1055 returned. When possible 32-bit PCI configuration write cycles are used to
1056 write from StartAdress to StartAddress + Size. Due to alignment restrictions,
1057 8-bit and 16-bit PCI configuration write cycles may be used at the beginning
1058 and the end of the range.
1060 If StartAddress > 0x0FFFFFFF, then ASSERT().
1061 If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
1062 If Size > 0 and Buffer is NULL, then ASSERT().
1064 @param StartAddress Starting address that encodes the PCI Bus, Device,
1065 Function and Register.
1066 @param Size Size in bytes of the transfer.
1067 @param Buffer Pointer to a buffer containing the data to write.
1075 IN UINTN StartAddress
,
1080 return PciExpressWriteBuffer (StartAddress
, Size
, Buffer
);