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git.proxmox.com Git - mirror_edk2.git/blob - MdePkg/Library/BasePciLibPciExpress/PciLib.c
2 PCI Library functions that use the 256 MB PCI Express MMIO window to perform PCI
3 Configuration cycles. Layers on PCI Express Library.
5 Copyright (c) 2006 - 2008, Intel Corporation<BR>
6 All rights reserved. This program and the accompanying materials
7 are licensed and made available under the terms and conditions of the BSD License
8 which accompanies this distribution. The full text of the license may be found at
9 http://opensource.org/licenses/bsd-license.php
11 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
19 #include <Library/PciLib.h>
20 #include <Library/PciExpressLib.h>
23 Reads an 8-bit PCI configuration register.
25 Reads and returns the 8-bit PCI configuration register specified by Address.
26 This function must guarantee that all PCI read and write operations are
29 If Address > 0x0FFFFFFF, then ASSERT().
31 @param Address Address that encodes the PCI Bus, Device, Function and
34 @return The read value from the PCI configuration register.
43 return PciExpressRead8 (Address
);
47 Writes an 8-bit PCI configuration register.
49 Writes the 8-bit PCI configuration register specified by Address with the
50 value specified by Value. Value is returned. This function must guarantee
51 that all PCI read and write operations are serialized.
53 If Address > 0x0FFFFFFF, then ASSERT().
55 @param Address Address that encodes the PCI Bus, Device, Function and
57 @param Data The value to write.
59 @return The value written to the PCI configuration register.
69 return PciExpressWrite8 (Address
, Value
);
73 Performs a bitwise inclusive OR of an 8-bit PCI configuration register with
76 Reads the 8-bit PCI configuration register specified by Address, performs a
77 bitwise inclusive OR between the read result and the value specified by
78 OrData, and writes the result to the 8-bit PCI configuration register
79 specified by Address. The value written to the PCI configuration register is
80 returned. This function must guarantee that all PCI read and write operations
83 If Address > 0x0FFFFFFF, then ASSERT().
85 @param Address Address that encodes the PCI Bus, Device, Function and
87 @param OrData The value to OR with the PCI configuration register.
89 @return The value written back to the PCI configuration register.
99 return PciExpressOr8 (Address
, OrData
);
103 Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit
106 Reads the 8-bit PCI configuration register specified by Address, performs a
107 bitwise AND between the read result and the value specified by AndData, and
108 writes the result to the 8-bit PCI configuration register specified by
109 Address. The value written to the PCI configuration register is returned.
110 This function must guarantee that all PCI read and write operations are
113 If Address > 0x0FFFFFFF, then ASSERT().
115 @param Address Address that encodes the PCI Bus, Device, Function and
117 @param AndData The value to AND with the PCI configuration register.
119 @return The value written back to the PCI configuration register.
129 return PciExpressAnd8 (Address
, AndData
);
133 Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit
134 value, followed a bitwise inclusive OR with another 8-bit value.
136 Reads the 8-bit PCI configuration register specified by Address, performs a
137 bitwise AND between the read result and the value specified by AndData,
138 performs a bitwise inclusive OR between the result of the AND operation and
139 the value specified by OrData, and writes the result to the 8-bit PCI
140 configuration register specified by Address. The value written to the PCI
141 configuration register is returned. This function must guarantee that all PCI
142 read and write operations are serialized.
144 If Address > 0x0FFFFFFF, then ASSERT().
146 @param Address Address that encodes the PCI Bus, Device, Function and
148 @param AndData The value to AND with the PCI configuration register.
149 @param OrData The value to OR with the result of the AND operation.
151 @return The value written back to the PCI configuration register.
162 return PciExpressAndThenOr8 (Address
, AndData
, OrData
);
166 Reads a bit field of a PCI configuration register.
168 Reads the bit field in an 8-bit PCI configuration register. The bit field is
169 specified by the StartBit and the EndBit. The value of the bit field is
172 If Address > 0x0FFFFFFF, then ASSERT().
173 If StartBit is greater than 7, then ASSERT().
174 If EndBit is greater than 7, then ASSERT().
175 If EndBit is less than StartBit, then ASSERT().
177 @param Address PCI configuration register to read.
178 @param StartBit The ordinal of the least significant bit in the bit field.
180 @param EndBit The ordinal of the most significant bit in the bit field.
183 @return The value of the bit field read from the PCI configuration register.
194 return PciExpressBitFieldRead8 (Address
, StartBit
, EndBit
);
198 Writes a bit field to a PCI configuration register.
200 Writes Value to the bit field of the PCI configuration register. The bit
201 field is specified by the StartBit and the EndBit. All other bits in the
202 destination PCI configuration register are preserved. The new value of the
203 8-bit register is returned.
205 If Address > 0x0FFFFFFF, then ASSERT().
206 If StartBit is greater than 7, then ASSERT().
207 If EndBit is greater than 7, then ASSERT().
208 If EndBit is less than StartBit, then ASSERT().
210 @param Address PCI configuration register to write.
211 @param StartBit The ordinal of the least significant bit in the bit field.
213 @param EndBit The ordinal of the most significant bit in the bit field.
215 @param Value New value of the bit field.
217 @return The value written back to the PCI configuration register.
229 return PciExpressBitFieldWrite8 (Address
, StartBit
, EndBit
, Value
);
233 Reads a bit field in an 8-bit PCI configuration, performs a bitwise OR, and
234 writes the result back to the bit field in the 8-bit port.
236 Reads the 8-bit PCI configuration register specified by Address, performs a
237 bitwise inclusive OR between the read result and the value specified by
238 OrData, and writes the result to the 8-bit PCI configuration register
239 specified by Address. The value written to the PCI configuration register is
240 returned. This function must guarantee that all PCI read and write operations
241 are serialized. Extra left bits in OrData are stripped.
243 If Address > 0x0FFFFFFF, then ASSERT().
244 If StartBit is greater than 7, then ASSERT().
245 If EndBit is greater than 7, then ASSERT().
246 If EndBit is less than StartBit, then ASSERT().
248 @param Address PCI configuration register to write.
249 @param StartBit The ordinal of the least significant bit in the bit field.
251 @param EndBit The ordinal of the most significant bit in the bit field.
253 @param OrData The value to OR with the PCI configuration register.
255 @return The value written back to the PCI configuration register.
267 return PciExpressBitFieldOr8 (Address
, StartBit
, EndBit
, OrData
);
271 Reads a bit field in an 8-bit PCI configuration register, performs a bitwise
272 AND, and writes the result back to the bit field in the 8-bit register.
274 Reads the 8-bit PCI configuration register specified by Address, performs a
275 bitwise AND between the read result and the value specified by AndData, and
276 writes the result to the 8-bit PCI configuration register specified by
277 Address. The value written to the PCI configuration register is returned.
278 This function must guarantee that all PCI read and write operations are
279 serialized. Extra left bits in AndData are stripped.
281 If Address > 0x0FFFFFFF, then ASSERT().
282 If StartBit is greater than 7, then ASSERT().
283 If EndBit is greater than 7, then ASSERT().
284 If EndBit is less than StartBit, then ASSERT().
286 @param Address PCI configuration register to write.
287 @param StartBit The ordinal of the least significant bit in the bit field.
289 @param EndBit The ordinal of the most significant bit in the bit field.
291 @param AndData The value to AND with the PCI configuration register.
293 @return The value written back to the PCI configuration register.
305 return PciExpressBitFieldAnd8 (Address
, StartBit
, EndBit
, AndData
);
309 Reads a bit field in an 8-bit port, performs a bitwise AND followed by a
310 bitwise inclusive OR, and writes the result back to the bit field in the
313 Reads the 8-bit PCI configuration register specified by Address, performs a
314 bitwise AND followed by a bitwise inclusive OR between the read result and
315 the value specified by AndData, and writes the result to the 8-bit PCI
316 configuration register specified by Address. The value written to the PCI
317 configuration register is returned. This function must guarantee that all PCI
318 read and write operations are serialized. Extra left bits in both AndData and
321 If Address > 0x0FFFFFFF, then ASSERT().
322 If StartBit is greater than 7, then ASSERT().
323 If EndBit is greater than 7, then ASSERT().
324 If EndBit is less than StartBit, then ASSERT().
326 @param Address PCI configuration register to write.
327 @param StartBit The ordinal of the least significant bit in the bit field.
329 @param EndBit The ordinal of the most significant bit in the bit field.
331 @param AndData The value to AND with the PCI configuration register.
332 @param OrData The value to OR with the result of the AND operation.
334 @return The value written back to the PCI configuration register.
339 PciBitFieldAndThenOr8 (
347 return PciExpressBitFieldAndThenOr8 (Address
, StartBit
, EndBit
, AndData
, OrData
);
351 Reads a 16-bit PCI configuration register.
353 Reads and returns the 16-bit PCI configuration register specified by Address.
354 This function must guarantee that all PCI read and write operations are
357 If Address > 0x0FFFFFFF, then ASSERT().
359 @param Address Address that encodes the PCI Bus, Device, Function and
362 @return The read value from the PCI configuration register.
371 return PciExpressRead16 (Address
);
375 Writes a 16-bit PCI configuration register.
377 Writes the 16-bit PCI configuration register specified by Address with the
378 value specified by Value. Value is returned. This function must guarantee
379 that all PCI read and write operations are serialized.
381 If Address > 0x0FFFFFFF, then ASSERT().
383 @param Address Address that encodes the PCI Bus, Device, Function and
385 @param Data The value to write.
387 @return The value written to the PCI configuration register.
397 return PciExpressWrite16 (Address
, Value
);
401 Performs a bitwise inclusive OR of a 16-bit PCI configuration register with
404 Reads the 16-bit PCI configuration register specified by Address, performs a
405 bitwise inclusive OR between the read result and the value specified by
406 OrData, and writes the result to the 16-bit PCI configuration register
407 specified by Address. The value written to the PCI configuration register is
408 returned. This function must guarantee that all PCI read and write operations
411 If Address > 0x0FFFFFFF, then ASSERT().
413 @param Address Address that encodes the PCI Bus, Device, Function and
415 @param OrData The value to OR with the PCI configuration register.
417 @return The value written back to the PCI configuration register.
427 return PciExpressOr16 (Address
, OrData
);
431 Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit
434 Reads the 16-bit PCI configuration register specified by Address, performs a
435 bitwise AND between the read result and the value specified by AndData, and
436 writes the result to the 16-bit PCI configuration register specified by
437 Address. The value written to the PCI configuration register is returned.
438 This function must guarantee that all PCI read and write operations are
441 If Address > 0x0FFFFFFF, then ASSERT().
443 @param Address Address that encodes the PCI Bus, Device, Function and
445 @param AndData The value to AND with the PCI configuration register.
447 @return The value written back to the PCI configuration register.
457 return PciExpressAnd16 (Address
, AndData
);
461 Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit
462 value, followed a bitwise inclusive OR with another 16-bit value.
464 Reads the 16-bit PCI configuration register specified by Address, performs a
465 bitwise AND between the read result and the value specified by AndData,
466 performs a bitwise inclusive OR between the result of the AND operation and
467 the value specified by OrData, and writes the result to the 16-bit PCI
468 configuration register specified by Address. The value written to the PCI
469 configuration register is returned. This function must guarantee that all PCI
470 read and write operations are serialized.
472 If Address > 0x0FFFFFFF, then ASSERT().
474 @param Address Address that encodes the PCI Bus, Device, Function and
476 @param AndData The value to AND with the PCI configuration register.
477 @param OrData The value to OR with the result of the AND operation.
479 @return The value written back to the PCI configuration register.
490 return PciExpressAndThenOr16 (Address
, AndData
, OrData
);
494 Reads a bit field of a PCI configuration register.
496 Reads the bit field in a 16-bit PCI configuration register. The bit field is
497 specified by the StartBit and the EndBit. The value of the bit field is
500 If Address > 0x0FFFFFFF, then ASSERT().
501 If StartBit is greater than 15, then ASSERT().
502 If EndBit is greater than 15, then ASSERT().
503 If EndBit is less than StartBit, then ASSERT().
505 @param Address PCI configuration register to read.
506 @param StartBit The ordinal of the least significant bit in the bit field.
508 @param EndBit The ordinal of the most significant bit in the bit field.
511 @return The value of the bit field read from the PCI configuration register.
522 return PciExpressBitFieldRead16 (Address
, StartBit
, EndBit
);
526 Writes a bit field to a PCI configuration register.
528 Writes Value to the bit field of the PCI configuration register. The bit
529 field is specified by the StartBit and the EndBit. All other bits in the
530 destination PCI configuration register are preserved. The new value of the
531 16-bit register is returned.
533 If Address > 0x0FFFFFFF, then ASSERT().
534 If StartBit is greater than 15, then ASSERT().
535 If EndBit is greater than 15, then ASSERT().
536 If EndBit is less than StartBit, then ASSERT().
538 @param Address PCI configuration register to write.
539 @param StartBit The ordinal of the least significant bit in the bit field.
541 @param EndBit The ordinal of the most significant bit in the bit field.
543 @param Value New value of the bit field.
545 @return The value written back to the PCI configuration register.
557 return PciExpressBitFieldWrite16 (Address
, StartBit
, EndBit
, Value
);
561 Reads a bit field in a 16-bit PCI configuration, performs a bitwise OR, and
562 writes the result back to the bit field in the 16-bit port.
564 Reads the 16-bit PCI configuration register specified by Address, performs a
565 bitwise inclusive OR between the read result and the value specified by
566 OrData, and writes the result to the 16-bit PCI configuration register
567 specified by Address. The value written to the PCI configuration register is
568 returned. This function must guarantee that all PCI read and write operations
569 are serialized. Extra left bits in OrData are stripped.
571 If Address > 0x0FFFFFFF, then ASSERT().
572 If StartBit is greater than 15, then ASSERT().
573 If EndBit is greater than 15, then ASSERT().
574 If EndBit is less than StartBit, then ASSERT().
576 @param Address PCI configuration register to write.
577 @param StartBit The ordinal of the least significant bit in the bit field.
579 @param EndBit The ordinal of the most significant bit in the bit field.
581 @param OrData The value to OR with the PCI configuration register.
583 @return The value written back to the PCI configuration register.
595 return PciExpressBitFieldOr16 (Address
, StartBit
, EndBit
, OrData
);
599 Reads a bit field in a 16-bit PCI configuration register, performs a bitwise
600 AND, and writes the result back to the bit field in the 16-bit register.
602 Reads the 16-bit PCI configuration register specified by Address, performs a
603 bitwise AND between the read result and the value specified by AndData, and
604 writes the result to the 16-bit PCI configuration register specified by
605 Address. The value written to the PCI configuration register is returned.
606 This function must guarantee that all PCI read and write operations are
607 serialized. Extra left bits in AndData are stripped.
609 If Address > 0x0FFFFFFF, then ASSERT().
610 If StartBit is greater than 15, then ASSERT().
611 If EndBit is greater than 15, then ASSERT().
612 If EndBit is less than StartBit, then ASSERT().
614 @param Address PCI configuration register to write.
615 @param StartBit The ordinal of the least significant bit in the bit field.
617 @param EndBit The ordinal of the most significant bit in the bit field.
619 @param AndData The value to AND with the PCI configuration register.
621 @return The value written back to the PCI configuration register.
633 return PciExpressBitFieldAnd16 (Address
, StartBit
, EndBit
, AndData
);
637 Reads a bit field in a 16-bit port, performs a bitwise AND followed by a
638 bitwise inclusive OR, and writes the result back to the bit field in the
641 Reads the 16-bit PCI configuration register specified by Address, performs a
642 bitwise AND followed by a bitwise inclusive OR between the read result and
643 the value specified by AndData, and writes the result to the 16-bit PCI
644 configuration register specified by Address. The value written to the PCI
645 configuration register is returned. This function must guarantee that all PCI
646 read and write operations are serialized. Extra left bits in both AndData and
649 If Address > 0x0FFFFFFF, then ASSERT().
650 If StartBit is greater than 15, then ASSERT().
651 If EndBit is greater than 15, then ASSERT().
652 If EndBit is less than StartBit, then ASSERT().
654 @param Address PCI configuration register to write.
655 @param StartBit The ordinal of the least significant bit in the bit field.
657 @param EndBit The ordinal of the most significant bit in the bit field.
659 @param AndData The value to AND with the PCI configuration register.
660 @param OrData The value to OR with the result of the AND operation.
662 @return The value written back to the PCI configuration register.
667 PciBitFieldAndThenOr16 (
675 return PciExpressBitFieldAndThenOr16 (Address
, StartBit
, EndBit
, AndData
, OrData
);
679 Reads a 32-bit PCI configuration register.
681 Reads and returns the 32-bit PCI configuration register specified by Address.
682 This function must guarantee that all PCI read and write operations are
685 If Address > 0x0FFFFFFF, then ASSERT().
687 @param Address Address that encodes the PCI Bus, Device, Function and
690 @return The read value from the PCI configuration register.
699 return PciExpressRead32 (Address
);
703 Writes a 32-bit PCI configuration register.
705 Writes the 32-bit PCI configuration register specified by Address with the
706 value specified by Value. Value is returned. This function must guarantee
707 that all PCI read and write operations are serialized.
709 If Address > 0x0FFFFFFF, then ASSERT().
711 @param Address Address that encodes the PCI Bus, Device, Function and
713 @param Data The value to write.
715 @return The value written to the PCI configuration register.
725 return PciExpressWrite32 (Address
, Value
);
729 Performs a bitwise inclusive OR of a 32-bit PCI configuration register with
732 Reads the 32-bit PCI configuration register specified by Address, performs a
733 bitwise inclusive OR between the read result and the value specified by
734 OrData, and writes the result to the 32-bit PCI configuration register
735 specified by Address. The value written to the PCI configuration register is
736 returned. This function must guarantee that all PCI read and write operations
739 If Address > 0x0FFFFFFF, then ASSERT().
741 @param Address Address that encodes the PCI Bus, Device, Function and
743 @param OrData The value to OR with the PCI configuration register.
745 @return The value written back to the PCI configuration register.
755 return PciExpressOr32 (Address
, OrData
);
759 Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit
762 Reads the 32-bit PCI configuration register specified by Address, performs a
763 bitwise AND between the read result and the value specified by AndData, and
764 writes the result to the 32-bit PCI configuration register specified by
765 Address. The value written to the PCI configuration register is returned.
766 This function must guarantee that all PCI read and write operations are
769 If Address > 0x0FFFFFFF, then ASSERT().
771 @param Address Address that encodes the PCI Bus, Device, Function and
773 @param AndData The value to AND with the PCI configuration register.
775 @return The value written back to the PCI configuration register.
785 return PciExpressAnd32 (Address
, AndData
);
789 Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit
790 value, followed a bitwise inclusive OR with another 32-bit value.
792 Reads the 32-bit PCI configuration register specified by Address, performs a
793 bitwise AND between the read result and the value specified by AndData,
794 performs a bitwise inclusive OR between the result of the AND operation and
795 the value specified by OrData, and writes the result to the 32-bit PCI
796 configuration register specified by Address. The value written to the PCI
797 configuration register is returned. This function must guarantee that all PCI
798 read and write operations are serialized.
800 If Address > 0x0FFFFFFF, then ASSERT().
802 @param Address Address that encodes the PCI Bus, Device, Function and
804 @param AndData The value to AND with the PCI configuration register.
805 @param OrData The value to OR with the result of the AND operation.
807 @return The value written back to the PCI configuration register.
818 return PciExpressAndThenOr32 (Address
, AndData
, OrData
);
822 Reads a bit field of a PCI configuration register.
824 Reads the bit field in a 32-bit PCI configuration register. The bit field is
825 specified by the StartBit and the EndBit. The value of the bit field is
828 If Address > 0x0FFFFFFF, then ASSERT().
829 If StartBit is greater than 31, then ASSERT().
830 If EndBit is greater than 31, then ASSERT().
831 If EndBit is less than StartBit, then ASSERT().
833 @param Address PCI configuration register to read.
834 @param StartBit The ordinal of the least significant bit in the bit field.
836 @param EndBit The ordinal of the most significant bit in the bit field.
839 @return The value of the bit field read from the PCI configuration register.
850 return PciExpressBitFieldRead32 (Address
, StartBit
, EndBit
);
854 Writes a bit field to a PCI configuration register.
856 Writes Value to the bit field of the PCI configuration register. The bit
857 field is specified by the StartBit and the EndBit. All other bits in the
858 destination PCI configuration register are preserved. The new value of the
859 32-bit register is returned.
861 If Address > 0x0FFFFFFF, then ASSERT().
862 If StartBit is greater than 31, then ASSERT().
863 If EndBit is greater than 31, then ASSERT().
864 If EndBit is less than StartBit, then ASSERT().
866 @param Address PCI configuration register to write.
867 @param StartBit The ordinal of the least significant bit in the bit field.
869 @param EndBit The ordinal of the most significant bit in the bit field.
871 @param Value New value of the bit field.
873 @return The value written back to the PCI configuration register.
885 return PciExpressBitFieldWrite32 (Address
, StartBit
, EndBit
, Value
);
889 Reads a bit field in a 32-bit PCI configuration, performs a bitwise OR, and
890 writes the result back to the bit field in the 32-bit port.
892 Reads the 32-bit PCI configuration register specified by Address, performs a
893 bitwise inclusive OR between the read result and the value specified by
894 OrData, and writes the result to the 32-bit PCI configuration register
895 specified by Address. The value written to the PCI configuration register is
896 returned. This function must guarantee that all PCI read and write operations
897 are serialized. Extra left bits in OrData are stripped.
899 If Address > 0x0FFFFFFF, then ASSERT().
900 If StartBit is greater than 31, then ASSERT().
901 If EndBit is greater than 31, then ASSERT().
902 If EndBit is less than StartBit, then ASSERT().
904 @param Address PCI configuration register to write.
905 @param StartBit The ordinal of the least significant bit in the bit field.
907 @param EndBit The ordinal of the most significant bit in the bit field.
909 @param OrData The value to OR with the PCI configuration register.
911 @return The value written back to the PCI configuration register.
923 return PciExpressBitFieldOr32 (Address
, StartBit
, EndBit
, OrData
);
927 Reads a bit field in a 32-bit PCI configuration register, performs a bitwise
928 AND, and writes the result back to the bit field in the 32-bit register.
930 Reads the 32-bit PCI configuration register specified by Address, performs a
931 bitwise AND between the read result and the value specified by AndData, and
932 writes the result to the 32-bit PCI configuration register specified by
933 Address. The value written to the PCI configuration register is returned.
934 This function must guarantee that all PCI read and write operations are
935 serialized. Extra left bits in AndData are stripped.
937 If Address > 0x0FFFFFFF, then ASSERT().
938 If StartBit is greater than 31, then ASSERT().
939 If EndBit is greater than 31, then ASSERT().
940 If EndBit is less than StartBit, then ASSERT().
942 @param Address PCI configuration register to write.
943 @param StartBit The ordinal of the least significant bit in the bit field.
945 @param EndBit The ordinal of the most significant bit in the bit field.
947 @param AndData The value to AND with the PCI configuration register.
949 @return The value written back to the PCI configuration register.
961 return PciExpressBitFieldAnd32 (Address
, StartBit
, EndBit
, AndData
);
965 Reads a bit field in a 32-bit port, performs a bitwise AND followed by a
966 bitwise inclusive OR, and writes the result back to the bit field in the
969 Reads the 32-bit PCI configuration register specified by Address, performs a
970 bitwise AND followed by a bitwise inclusive OR between the read result and
971 the value specified by AndData, and writes the result to the 32-bit PCI
972 configuration register specified by Address. The value written to the PCI
973 configuration register is returned. This function must guarantee that all PCI
974 read and write operations are serialized. Extra left bits in both AndData and
977 If Address > 0x0FFFFFFF, then ASSERT().
978 If StartBit is greater than 31, then ASSERT().
979 If EndBit is greater than 31, then ASSERT().
980 If EndBit is less than StartBit, then ASSERT().
982 @param Address PCI configuration register to write.
983 @param StartBit The ordinal of the least significant bit in the bit field.
985 @param EndBit The ordinal of the most significant bit in the bit field.
987 @param AndData The value to AND with the PCI configuration register.
988 @param OrData The value to OR with the result of the AND operation.
990 @return The value written back to the PCI configuration register.
995 PciBitFieldAndThenOr32 (
1003 return PciExpressBitFieldAndThenOr32 (Address
, StartBit
, EndBit
, AndData
, OrData
);
1007 Reads a range of PCI configuration registers into a caller supplied buffer.
1009 Reads the range of PCI configuration registers specified by StartAddress and
1010 Size into the buffer specified by Buffer. This function only allows the PCI
1011 configuration registers from a single PCI function to be read. Size is
1012 returned. When possible 32-bit PCI configuration read cycles are used to read
1013 from StartAdress to StartAddress + Size. Due to alignment restrictions, 8-bit
1014 and 16-bit PCI configuration read cycles may be used at the beginning and the
1017 If StartAddress > 0x0FFFFFFF, then ASSERT().
1018 If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
1019 If Size > 0 and Buffer is NULL, then ASSERT().
1021 @param StartAddress Starting address that encodes the PCI Bus, Device,
1022 Function and Register.
1023 @param Size Size in bytes of the transfer.
1024 @param Buffer Pointer to a buffer receiving the data read.
1032 IN UINTN StartAddress
,
1037 return PciExpressReadBuffer (StartAddress
, Size
, Buffer
);
1041 Copies the data in a caller supplied buffer to a specified range of PCI
1042 configuration space.
1044 Writes the range of PCI configuration registers specified by StartAddress and
1045 Size from the buffer specified by Buffer. This function only allows the PCI
1046 configuration registers from a single PCI function to be written. Size is
1047 returned. When possible 32-bit PCI configuration write cycles are used to
1048 write from StartAdress to StartAddress + Size. Due to alignment restrictions,
1049 8-bit and 16-bit PCI configuration write cycles may be used at the beginning
1050 and the end of the range.
1052 If StartAddress > 0x0FFFFFFF, then ASSERT().
1053 If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
1054 If Size > 0 and Buffer is NULL, then ASSERT().
1056 @param StartAddress Starting address that encodes the PCI Bus, Device,
1057 Function and Register.
1058 @param Size Size in bytes of the transfer.
1059 @param Buffer Pointer to a buffer containing the data to write.
1067 IN UINTN StartAddress
,
1072 return PciExpressWriteBuffer (StartAddress
, Size
, Buffer
);