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git.proxmox.com Git - mirror_edk2.git/blob - MdePkg/Library/BasePciLibPciExpress/PciLib.c
2 PCI Library functions that use the 256 MB PCI Express MMIO window to perform PCI
3 Configuration cycles. Layers on PCI Express Library.
5 Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
6 This program and the accompanying materials
7 are licensed and made available under the terms and conditions of the BSD License
8 which accompanies this distribution. The full text of the license may be found at
9 http://opensource.org/licenses/bsd-license.php.
11 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
19 #include <Library/PciLib.h>
20 #include <Library/PciExpressLib.h>
23 Registers a PCI device so PCI configuration registers may be accessed after
24 SetVirtualAddressMap().
26 Registers the PCI device specified by Address so all the PCI configuration registers
27 associated with that PCI device may be accessed after SetVirtualAddressMap() is called.
29 If Address > 0x0FFFFFFF, then ASSERT().
31 @param Address The address that encodes the PCI Bus, Device, Function and
34 @retval RETURN_SUCCESS The PCI device was registered for runtime access.
35 @retval RETURN_UNSUPPORTED An attempt was made to call this function
36 after ExitBootServices().
37 @retval RETURN_UNSUPPORTED The resources required to access the PCI device
38 at runtime could not be mapped.
39 @retval RETURN_OUT_OF_RESOURCES There are not enough resources available to
40 complete the registration.
45 PciRegisterForRuntimeAccess (
49 return PciExpressRegisterForRuntimeAccess (Address
);
53 Reads an 8-bit PCI configuration register.
55 Reads and returns the 8-bit PCI configuration register specified by Address.
56 This function must guarantee that all PCI read and write operations are
59 If Address > 0x0FFFFFFF, then ASSERT().
61 @param Address The address that encodes the PCI Bus, Device, Function and
64 @return The read value from the PCI configuration register.
73 return PciExpressRead8 (Address
);
77 Writes an 8-bit PCI configuration register.
79 Writes the 8-bit PCI configuration register specified by Address with the
80 value specified by Value. Value is returned. This function must guarantee
81 that all PCI read and write operations are serialized.
83 If Address > 0x0FFFFFFF, then ASSERT().
85 @param Address The address that encodes the PCI Bus, Device, Function and
87 @param Value The value to write.
89 @return The value written to the PCI configuration register.
99 return PciExpressWrite8 (Address
, Value
);
103 Performs a bitwise OR of an 8-bit PCI configuration register with
106 Reads the 8-bit PCI configuration register specified by Address, performs a
107 bitwise OR between the read result and the value specified by
108 OrData, and writes the result to the 8-bit PCI configuration register
109 specified by Address. The value written to the PCI configuration register is
110 returned. This function must guarantee that all PCI read and write operations
113 If Address > 0x0FFFFFFF, then ASSERT().
115 @param Address The address that encodes the PCI Bus, Device, Function and
117 @param OrData The value to OR with the PCI configuration register.
119 @return The value written back to the PCI configuration register.
129 return PciExpressOr8 (Address
, OrData
);
133 Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit
136 Reads the 8-bit PCI configuration register specified by Address, performs a
137 bitwise AND between the read result and the value specified by AndData, and
138 writes the result to the 8-bit PCI configuration register specified by
139 Address. The value written to the PCI configuration register is returned.
140 This function must guarantee that all PCI read and write operations are
143 If Address > 0x0FFFFFFF, then ASSERT().
145 @param Address The address that encodes the PCI Bus, Device, Function and
147 @param AndData The value to AND with the PCI configuration register.
149 @return The value written back to the PCI configuration register.
159 return PciExpressAnd8 (Address
, AndData
);
163 Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit
164 value, followed a bitwise OR with another 8-bit value.
166 Reads the 8-bit PCI configuration register specified by Address, performs a
167 bitwise AND between the read result and the value specified by AndData,
168 performs a bitwise OR between the result of the AND operation and
169 the value specified by OrData, and writes the result to the 8-bit PCI
170 configuration register specified by Address. The value written to the PCI
171 configuration register is returned. This function must guarantee that all PCI
172 read and write operations are serialized.
174 If Address > 0x0FFFFFFF, then ASSERT().
176 @param Address The address that encodes the PCI Bus, Device, Function and
178 @param AndData The value to AND with the PCI configuration register.
179 @param OrData The value to OR with the result of the AND operation.
181 @return The value written back to the PCI configuration register.
192 return PciExpressAndThenOr8 (Address
, AndData
, OrData
);
196 Reads a bit field of a PCI configuration register.
198 Reads the bit field in an 8-bit PCI configuration register. The bit field is
199 specified by the StartBit and the EndBit. The value of the bit field is
202 If Address > 0x0FFFFFFF, then ASSERT().
203 If StartBit is greater than 7, then ASSERT().
204 If EndBit is greater than 7, then ASSERT().
205 If EndBit is less than StartBit, then ASSERT().
207 @param Address The PCI configuration register to read.
208 @param StartBit The ordinal of the least significant bit in the bit field.
210 @param EndBit The ordinal of the most significant bit in the bit field.
213 @return The value of the bit field read from the PCI configuration register.
224 return PciExpressBitFieldRead8 (Address
, StartBit
, EndBit
);
228 Writes a bit field to a PCI configuration register.
230 Writes Value to the bit field of the PCI configuration register. The bit
231 field is specified by the StartBit and the EndBit. All other bits in the
232 destination PCI configuration register are preserved. The new value of the
233 8-bit register is returned.
235 If Address > 0x0FFFFFFF, then ASSERT().
236 If StartBit is greater than 7, then ASSERT().
237 If EndBit is greater than 7, then ASSERT().
238 If EndBit is less than StartBit, then ASSERT().
239 If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
241 @param Address The PCI configuration register to write.
242 @param StartBit The ordinal of the least significant bit in the bit field.
244 @param EndBit The ordinal of the most significant bit in the bit field.
246 @param Value The new value of the bit field.
248 @return The value written back to the PCI configuration register.
260 return PciExpressBitFieldWrite8 (Address
, StartBit
, EndBit
, Value
);
264 Reads a bit field in an 8-bit PCI configuration, performs a bitwise OR, and
265 writes the result back to the bit field in the 8-bit port.
267 Reads the 8-bit PCI configuration register specified by Address, performs a
268 bitwise OR between the read result and the value specified by
269 OrData, and writes the result to the 8-bit PCI configuration register
270 specified by Address. The value written to the PCI configuration register is
271 returned. This function must guarantee that all PCI read and write operations
272 are serialized. Extra left bits in OrData are stripped.
274 If Address > 0x0FFFFFFF, then ASSERT().
275 If StartBit is greater than 7, then ASSERT().
276 If EndBit is greater than 7, then ASSERT().
277 If EndBit is less than StartBit, then ASSERT().
278 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
280 @param Address The PCI configuration register to write.
281 @param StartBit The ordinal of the least significant bit in the bit field.
283 @param EndBit The ordinal of the most significant bit in the bit field.
285 @param OrData The value to OR with the PCI configuration register.
287 @return The value written back to the PCI configuration register.
299 return PciExpressBitFieldOr8 (Address
, StartBit
, EndBit
, OrData
);
303 Reads a bit field in an 8-bit PCI configuration register, performs a bitwise
304 AND, and writes the result back to the bit field in the 8-bit register.
306 Reads the 8-bit PCI configuration register specified by Address, performs a
307 bitwise AND between the read result and the value specified by AndData, and
308 writes the result to the 8-bit PCI configuration register specified by
309 Address. The value written to the PCI configuration register is returned.
310 This function must guarantee that all PCI read and write operations are
311 serialized. Extra left bits in AndData are stripped.
313 If Address > 0x0FFFFFFF, then ASSERT().
314 If StartBit is greater than 7, then ASSERT().
315 If EndBit is greater than 7, then ASSERT().
316 If EndBit is less than StartBit, then ASSERT().
317 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
319 @param Address The PCI configuration register to write.
320 @param StartBit The ordinal of the least significant bit in the bit field.
322 @param EndBit The ordinal of the most significant bit in the bit field.
324 @param AndData The value to AND with the PCI configuration register.
326 @return The value written back to the PCI configuration register.
338 return PciExpressBitFieldAnd8 (Address
, StartBit
, EndBit
, AndData
);
342 Reads a bit field in an 8-bit port, performs a bitwise AND followed by a
343 bitwise OR, and writes the result back to the bit field in the
346 Reads the 8-bit PCI configuration register specified by Address, performs a
347 bitwise AND followed by a bitwise OR between the read result and
348 the value specified by AndData, and writes the result to the 8-bit PCI
349 configuration register specified by Address. The value written to the PCI
350 configuration register is returned. This function must guarantee that all PCI
351 read and write operations are serialized. Extra left bits in both AndData and
354 If Address > 0x0FFFFFFF, then ASSERT().
355 If StartBit is greater than 7, then ASSERT().
356 If EndBit is greater than 7, then ASSERT().
357 If EndBit is less than StartBit, then ASSERT().
358 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
359 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
361 @param Address The PCI configuration register to write.
362 @param StartBit The ordinal of the least significant bit in the bit field.
364 @param EndBit The ordinal of the most significant bit in the bit field.
366 @param AndData The value to AND with the PCI configuration register.
367 @param OrData The value to OR with the result of the AND operation.
369 @return The value written back to the PCI configuration register.
374 PciBitFieldAndThenOr8 (
382 return PciExpressBitFieldAndThenOr8 (Address
, StartBit
, EndBit
, AndData
, OrData
);
386 Reads a 16-bit PCI configuration register.
388 Reads and returns the 16-bit PCI configuration register specified by Address.
389 This function must guarantee that all PCI read and write operations are
392 If Address > 0x0FFFFFFF, then ASSERT().
393 If Address is not aligned on a 16-bit boundary, then ASSERT().
395 @param Address The address that encodes the PCI Bus, Device, Function and
398 @return The read value from the PCI configuration register.
407 return PciExpressRead16 (Address
);
411 Writes a 16-bit PCI configuration register.
413 Writes the 16-bit PCI configuration register specified by Address with the
414 value specified by Value. Value is returned. This function must guarantee
415 that all PCI read and write operations are serialized.
417 If Address > 0x0FFFFFFF, then ASSERT().
418 If Address is not aligned on a 16-bit boundary, then ASSERT().
420 @param Address The address that encodes the PCI Bus, Device, Function and
422 @param Value The value to write.
424 @return The value written to the PCI configuration register.
434 return PciExpressWrite16 (Address
, Value
);
438 Performs a bitwise OR of a 16-bit PCI configuration register with
441 Reads the 16-bit PCI configuration register specified by Address, performs a
442 bitwise OR between the read result and the value specified by
443 OrData, and writes the result to the 16-bit PCI configuration register
444 specified by Address. The value written to the PCI configuration register is
445 returned. This function must guarantee that all PCI read and write operations
448 If Address > 0x0FFFFFFF, then ASSERT().
449 If Address is not aligned on a 16-bit boundary, then ASSERT().
451 @param Address The address that encodes the PCI Bus, Device, Function and
453 @param OrData The value to OR with the PCI configuration register.
455 @return The value written back to the PCI configuration register.
465 return PciExpressOr16 (Address
, OrData
);
469 Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit
472 Reads the 16-bit PCI configuration register specified by Address, performs a
473 bitwise AND between the read result and the value specified by AndData, and
474 writes the result to the 16-bit PCI configuration register specified by
475 Address. The value written to the PCI configuration register is returned.
476 This function must guarantee that all PCI read and write operations are
479 If Address > 0x0FFFFFFF, then ASSERT().
480 If Address is not aligned on a 16-bit boundary, then ASSERT().
482 @param Address The address that encodes the PCI Bus, Device, Function and
484 @param AndData The value to AND with the PCI configuration register.
486 @return The value written back to the PCI configuration register.
496 return PciExpressAnd16 (Address
, AndData
);
500 Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit
501 value, followed a bitwise OR with another 16-bit value.
503 Reads the 16-bit PCI configuration register specified by Address, performs a
504 bitwise AND between the read result and the value specified by AndData,
505 performs a bitwise OR between the result of the AND operation and
506 the value specified by OrData, and writes the result to the 16-bit PCI
507 configuration register specified by Address. The value written to the PCI
508 configuration register is returned. This function must guarantee that all PCI
509 read and write operations are serialized.
511 If Address > 0x0FFFFFFF, then ASSERT().
512 If Address is not aligned on a 16-bit boundary, then ASSERT().
514 @param Address The address that encodes the PCI Bus, Device, Function and
516 @param AndData The value to AND with the PCI configuration register.
517 @param OrData The value to OR with the result of the AND operation.
519 @return The value written back to the PCI configuration register.
530 return PciExpressAndThenOr16 (Address
, AndData
, OrData
);
534 Reads a bit field of a PCI configuration register.
536 Reads the bit field in a 16-bit PCI configuration register. The bit field is
537 specified by the StartBit and the EndBit. The value of the bit field is
540 If Address > 0x0FFFFFFF, then ASSERT().
541 If Address is not aligned on a 16-bit boundary, then ASSERT().
542 If StartBit is greater than 15, then ASSERT().
543 If EndBit is greater than 15, then ASSERT().
544 If EndBit is less than StartBit, then ASSERT().
546 @param Address The PCI configuration register to read.
547 @param StartBit The ordinal of the least significant bit in the bit field.
549 @param EndBit The ordinal of the most significant bit in the bit field.
552 @return The value of the bit field read from the PCI configuration register.
563 return PciExpressBitFieldRead16 (Address
, StartBit
, EndBit
);
567 Writes a bit field to a PCI configuration register.
569 Writes Value to the bit field of the PCI configuration register. The bit
570 field is specified by the StartBit and the EndBit. All other bits in the
571 destination PCI configuration register are preserved. The new value of the
572 16-bit register is returned.
574 If Address > 0x0FFFFFFF, then ASSERT().
575 If Address is not aligned on a 16-bit boundary, then ASSERT().
576 If StartBit is greater than 15, then ASSERT().
577 If EndBit is greater than 15, then ASSERT().
578 If EndBit is less than StartBit, then ASSERT().
579 If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
581 @param Address The PCI configuration register to write.
582 @param StartBit The ordinal of the least significant bit in the bit field.
584 @param EndBit The ordinal of the most significant bit in the bit field.
586 @param Value The new value of the bit field.
588 @return The value written back to the PCI configuration register.
600 return PciExpressBitFieldWrite16 (Address
, StartBit
, EndBit
, Value
);
604 Reads a bit field in a 16-bit PCI configuration, performs a bitwise OR, and
605 writes the result back to the bit field in the 16-bit port.
607 Reads the 16-bit PCI configuration register specified by Address, performs a
608 bitwise OR between the read result and the value specified by
609 OrData, and writes the result to the 16-bit PCI configuration register
610 specified by Address. The value written to the PCI configuration register is
611 returned. This function must guarantee that all PCI read and write operations
612 are serialized. Extra left bits in OrData are stripped.
614 If Address > 0x0FFFFFFF, then ASSERT().
615 If Address is not aligned on a 16-bit boundary, then ASSERT().
616 If StartBit is greater than 15, then ASSERT().
617 If EndBit is greater than 15, then ASSERT().
618 If EndBit is less than StartBit, then ASSERT().
619 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
621 @param Address The PCI configuration register to write.
622 @param StartBit The ordinal of the least significant bit in the bit field.
624 @param EndBit The ordinal of the most significant bit in the bit field.
626 @param OrData The value to OR with the PCI configuration register.
628 @return The value written back to the PCI configuration register.
640 return PciExpressBitFieldOr16 (Address
, StartBit
, EndBit
, OrData
);
644 Reads a bit field in a 16-bit PCI configuration register, performs a bitwise
645 AND, and writes the result back to the bit field in the 16-bit register.
647 Reads the 16-bit PCI configuration register specified by Address, performs a
648 bitwise AND between the read result and the value specified by AndData, and
649 writes the result to the 16-bit PCI configuration register specified by
650 Address. The value written to the PCI configuration register is returned.
651 This function must guarantee that all PCI read and write operations are
652 serialized. Extra left bits in AndData are stripped.
654 If Address > 0x0FFFFFFF, then ASSERT().
655 If Address is not aligned on a 16-bit boundary, then ASSERT().
656 If StartBit is greater than 15, then ASSERT().
657 If EndBit is greater than 15, then ASSERT().
658 If EndBit is less than StartBit, then ASSERT().
659 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
661 @param Address The PCI configuration register to write.
662 @param StartBit The ordinal of the least significant bit in the bit field.
664 @param EndBit The ordinal of the most significant bit in the bit field.
666 @param AndData The value to AND with the PCI configuration register.
668 @return The value written back to the PCI configuration register.
680 return PciExpressBitFieldAnd16 (Address
, StartBit
, EndBit
, AndData
);
684 Reads a bit field in a 16-bit port, performs a bitwise AND followed by a
685 bitwise OR, and writes the result back to the bit field in the
688 Reads the 16-bit PCI configuration register specified by Address, performs a
689 bitwise AND followed by a bitwise OR between the read result and
690 the value specified by AndData, and writes the result to the 16-bit PCI
691 configuration register specified by Address. The value written to the PCI
692 configuration register is returned. This function must guarantee that all PCI
693 read and write operations are serialized. Extra left bits in both AndData and
696 If Address > 0x0FFFFFFF, then ASSERT().
697 If Address is not aligned on a 16-bit boundary, then ASSERT().
698 If StartBit is greater than 15, then ASSERT().
699 If EndBit is greater than 15, then ASSERT().
700 If EndBit is less than StartBit, then ASSERT().
701 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
702 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
704 @param Address The PCI configuration register to write.
705 @param StartBit The ordinal of the least significant bit in the bit field.
707 @param EndBit The ordinal of the most significant bit in the bit field.
709 @param AndData The value to AND with the PCI configuration register.
710 @param OrData The value to OR with the result of the AND operation.
712 @return The value written back to the PCI configuration register.
717 PciBitFieldAndThenOr16 (
725 return PciExpressBitFieldAndThenOr16 (Address
, StartBit
, EndBit
, AndData
, OrData
);
729 Reads a 32-bit PCI configuration register.
731 Reads and returns the 32-bit PCI configuration register specified by Address.
732 This function must guarantee that all PCI read and write operations are
735 If Address > 0x0FFFFFFF, then ASSERT().
736 If Address is not aligned on a 32-bit boundary, then ASSERT().
738 @param Address The address that encodes the PCI Bus, Device, Function and
741 @return The read value from the PCI configuration register.
750 return PciExpressRead32 (Address
);
754 Writes a 32-bit PCI configuration register.
756 Writes the 32-bit PCI configuration register specified by Address with the
757 value specified by Value. Value is returned. This function must guarantee
758 that all PCI read and write operations are serialized.
760 If Address > 0x0FFFFFFF, then ASSERT().
761 If Address is not aligned on a 32-bit boundary, then ASSERT().
763 @param Address The address that encodes the PCI Bus, Device, Function and
765 @param Value The value to write.
767 @return The value written to the PCI configuration register.
777 return PciExpressWrite32 (Address
, Value
);
781 Performs a bitwise OR of a 32-bit PCI configuration register with
784 Reads the 32-bit PCI configuration register specified by Address, performs a
785 bitwise OR between the read result and the value specified by
786 OrData, and writes the result to the 32-bit PCI configuration register
787 specified by Address. The value written to the PCI configuration register is
788 returned. This function must guarantee that all PCI read and write operations
791 If Address > 0x0FFFFFFF, then ASSERT().
792 If Address is not aligned on a 32-bit boundary, then ASSERT().
794 @param Address The address that encodes the PCI Bus, Device, Function and
796 @param OrData The value to OR with the PCI configuration register.
798 @return The value written back to the PCI configuration register.
808 return PciExpressOr32 (Address
, OrData
);
812 Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit
815 Reads the 32-bit PCI configuration register specified by Address, performs a
816 bitwise AND between the read result and the value specified by AndData, and
817 writes the result to the 32-bit PCI configuration register specified by
818 Address. The value written to the PCI configuration register is returned.
819 This function must guarantee that all PCI read and write operations are
822 If Address > 0x0FFFFFFF, then ASSERT().
823 If Address is not aligned on a 32-bit boundary, then ASSERT().
825 @param Address The address that encodes the PCI Bus, Device, Function and
827 @param AndData The value to AND with the PCI configuration register.
829 @return The value written back to the PCI configuration register.
839 return PciExpressAnd32 (Address
, AndData
);
843 Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit
844 value, followed a bitwise OR with another 32-bit value.
846 Reads the 32-bit PCI configuration register specified by Address, performs a
847 bitwise AND between the read result and the value specified by AndData,
848 performs a bitwise OR between the result of the AND operation and
849 the value specified by OrData, and writes the result to the 32-bit PCI
850 configuration register specified by Address. The value written to the PCI
851 configuration register is returned. This function must guarantee that all PCI
852 read and write operations are serialized.
854 If Address > 0x0FFFFFFF, then ASSERT().
855 If Address is not aligned on a 32-bit boundary, then ASSERT().
857 @param Address The address that encodes the PCI Bus, Device, Function and
859 @param AndData The value to AND with the PCI configuration register.
860 @param OrData The value to OR with the result of the AND operation.
862 @return The value written back to the PCI configuration register.
873 return PciExpressAndThenOr32 (Address
, AndData
, OrData
);
877 Reads a bit field of a PCI configuration register.
879 Reads the bit field in a 32-bit PCI configuration register. The bit field is
880 specified by the StartBit and the EndBit. The value of the bit field is
883 If Address > 0x0FFFFFFF, then ASSERT().
884 If Address is not aligned on a 32-bit boundary, then ASSERT().
885 If StartBit is greater than 31, then ASSERT().
886 If EndBit is greater than 31, then ASSERT().
887 If EndBit is less than StartBit, then ASSERT().
889 @param Address The PCI configuration register to read.
890 @param StartBit The ordinal of the least significant bit in the bit field.
892 @param EndBit The ordinal of the most significant bit in the bit field.
895 @return The value of the bit field read from the PCI configuration register.
906 return PciExpressBitFieldRead32 (Address
, StartBit
, EndBit
);
910 Writes a bit field to a PCI configuration register.
912 Writes Value to the bit field of the PCI configuration register. The bit
913 field is specified by the StartBit and the EndBit. All other bits in the
914 destination PCI configuration register are preserved. The new value of the
915 32-bit register is returned.
917 If Address > 0x0FFFFFFF, then ASSERT().
918 If Address is not aligned on a 32-bit boundary, then ASSERT().
919 If StartBit is greater than 31, then ASSERT().
920 If EndBit is greater than 31, then ASSERT().
921 If EndBit is less than StartBit, then ASSERT().
922 If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
924 @param Address The PCI configuration register to write.
925 @param StartBit The ordinal of the least significant bit in the bit field.
927 @param EndBit The ordinal of the most significant bit in the bit field.
929 @param Value The new value of the bit field.
931 @return The value written back to the PCI configuration register.
943 return PciExpressBitFieldWrite32 (Address
, StartBit
, EndBit
, Value
);
947 Reads a bit field in a 32-bit PCI configuration, performs a bitwise OR, and
948 writes the result back to the bit field in the 32-bit port.
950 Reads the 32-bit PCI configuration register specified by Address, performs a
951 bitwise OR between the read result and the value specified by
952 OrData, and writes the result to the 32-bit PCI configuration register
953 specified by Address. The value written to the PCI configuration register is
954 returned. This function must guarantee that all PCI read and write operations
955 are serialized. Extra left bits in OrData are stripped.
957 If Address > 0x0FFFFFFF, then ASSERT().
958 If Address is not aligned on a 32-bit boundary, then ASSERT().
959 If StartBit is greater than 31, then ASSERT().
960 If EndBit is greater than 31, then ASSERT().
961 If EndBit is less than StartBit, then ASSERT().
962 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
964 @param Address The PCI configuration register to write.
965 @param StartBit The ordinal of the least significant bit in the bit field.
967 @param EndBit The ordinal of the most significant bit in the bit field.
969 @param OrData The value to OR with the PCI configuration register.
971 @return The value written back to the PCI configuration register.
983 return PciExpressBitFieldOr32 (Address
, StartBit
, EndBit
, OrData
);
987 Reads a bit field in a 32-bit PCI configuration register, performs a bitwise
988 AND, and writes the result back to the bit field in the 32-bit register.
990 Reads the 32-bit PCI configuration register specified by Address, performs a
991 bitwise AND between the read result and the value specified by AndData, and
992 writes the result to the 32-bit PCI configuration register specified by
993 Address. The value written to the PCI configuration register is returned.
994 This function must guarantee that all PCI read and write operations are
995 serialized. Extra left bits in AndData are stripped.
997 If Address > 0x0FFFFFFF, then ASSERT().
998 If Address is not aligned on a 32-bit boundary, then ASSERT().
999 If StartBit is greater than 31, then ASSERT().
1000 If EndBit is greater than 31, then ASSERT().
1001 If EndBit is less than StartBit, then ASSERT().
1002 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
1004 @param Address The PCI configuration register to write.
1005 @param StartBit The ordinal of the least significant bit in the bit field.
1007 @param EndBit The ordinal of the most significant bit in the bit field.
1009 @param AndData The value to AND with the PCI configuration register.
1011 @return The value written back to the PCI configuration register.
1023 return PciExpressBitFieldAnd32 (Address
, StartBit
, EndBit
, AndData
);
1027 Reads a bit field in a 32-bit port, performs a bitwise AND followed by a
1028 bitwise OR, and writes the result back to the bit field in the
1031 Reads the 32-bit PCI configuration register specified by Address, performs a
1032 bitwise AND followed by a bitwise OR between the read result and
1033 the value specified by AndData, and writes the result to the 32-bit PCI
1034 configuration register specified by Address. The value written to the PCI
1035 configuration register is returned. This function must guarantee that all PCI
1036 read and write operations are serialized. Extra left bits in both AndData and
1037 OrData are stripped.
1039 If Address > 0x0FFFFFFF, then ASSERT().
1040 If Address is not aligned on a 32-bit boundary, then ASSERT().
1041 If StartBit is greater than 31, then ASSERT().
1042 If EndBit is greater than 31, then ASSERT().
1043 If EndBit is less than StartBit, then ASSERT().
1044 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
1045 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
1047 @param Address The PCI configuration register to write.
1048 @param StartBit The ordinal of the least significant bit in the bit field.
1050 @param EndBit The ordinal of the most significant bit in the bit field.
1052 @param AndData The value to AND with the PCI configuration register.
1053 @param OrData The value to OR with the result of the AND operation.
1055 @return The value written back to the PCI configuration register.
1060 PciBitFieldAndThenOr32 (
1068 return PciExpressBitFieldAndThenOr32 (Address
, StartBit
, EndBit
, AndData
, OrData
);
1072 Reads a range of PCI configuration registers into a caller supplied buffer.
1074 Reads the range of PCI configuration registers specified by StartAddress and
1075 Size into the buffer specified by Buffer. This function only allows the PCI
1076 configuration registers from a single PCI function to be read. Size is
1077 returned. When possible 32-bit PCI configuration read cycles are used to read
1078 from StartAdress to StartAddress + Size. Due to alignment restrictions, 8-bit
1079 and 16-bit PCI configuration read cycles may be used at the beginning and the
1082 If StartAddress > 0x0FFFFFFF, then ASSERT().
1083 If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
1084 If Size > 0 and Buffer is NULL, then ASSERT().
1086 @param StartAddress The starting address that encodes the PCI Bus, Device,
1087 Function and Register.
1088 @param Size The size in bytes of the transfer.
1089 @param Buffer The pointer to a buffer receiving the data read.
1097 IN UINTN StartAddress
,
1102 return PciExpressReadBuffer (StartAddress
, Size
, Buffer
);
1106 Copies the data in a caller supplied buffer to a specified range of PCI
1107 configuration space.
1109 Writes the range of PCI configuration registers specified by StartAddress and
1110 Size from the buffer specified by Buffer. This function only allows the PCI
1111 configuration registers from a single PCI function to be written. Size is
1112 returned. When possible 32-bit PCI configuration write cycles are used to
1113 write from StartAdress to StartAddress + Size. Due to alignment restrictions,
1114 8-bit and 16-bit PCI configuration write cycles may be used at the beginning
1115 and the end of the range.
1117 If StartAddress > 0x0FFFFFFF, then ASSERT().
1118 If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
1119 If Size > 0 and Buffer is NULL, then ASSERT().
1121 @param StartAddress The starting address that encodes the PCI Bus, Device,
1122 Function and Register.
1123 @param Size The size in bytes of the transfer.
1124 @param Buffer The pointer to a buffer containing the data to write.
1126 @return Size written to StartAddress.
1132 IN UINTN StartAddress
,
1137 return PciExpressWriteBuffer (StartAddress
, Size
, Buffer
);