2 Fixes Intel Itanium(TM) specific relocation types.
4 Copyright (c) 2006, Intel Corporation
5 All rights reserved. This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
15 #include "BasePeCoffLibInternals.h"
19 #define EXT_IMM64(Value, Address, Size, InstPos, ValPos) \
20 Value |= (((UINT64)((*(Address) >> InstPos) & (((UINT64)1 << Size) - 1))) << ValPos)
22 #define INS_IMM64(Value, Address, Size, InstPos, ValPos) \
23 *(UINT32*)Address = (*(UINT32*)Address & ~(((1 << Size) - 1) << InstPos)) | \
24 ((UINT32)((((UINT64)Value >> ValPos) & (((UINT64)1 << Size) - 1))) << InstPos)
26 #define IMM64_IMM7B_INST_WORD_X 3
27 #define IMM64_IMM7B_SIZE_X 7
28 #define IMM64_IMM7B_INST_WORD_POS_X 4
29 #define IMM64_IMM7B_VAL_POS_X 0
31 #define IMM64_IMM9D_INST_WORD_X 3
32 #define IMM64_IMM9D_SIZE_X 9
33 #define IMM64_IMM9D_INST_WORD_POS_X 18
34 #define IMM64_IMM9D_VAL_POS_X 7
36 #define IMM64_IMM5C_INST_WORD_X 3
37 #define IMM64_IMM5C_SIZE_X 5
38 #define IMM64_IMM5C_INST_WORD_POS_X 13
39 #define IMM64_IMM5C_VAL_POS_X 16
41 #define IMM64_IC_INST_WORD_X 3
42 #define IMM64_IC_SIZE_X 1
43 #define IMM64_IC_INST_WORD_POS_X 12
44 #define IMM64_IC_VAL_POS_X 21
46 #define IMM64_IMM41a_INST_WORD_X 1
47 #define IMM64_IMM41a_SIZE_X 10
48 #define IMM64_IMM41a_INST_WORD_POS_X 14
49 #define IMM64_IMM41a_VAL_POS_X 22
51 #define IMM64_IMM41b_INST_WORD_X 1
52 #define IMM64_IMM41b_SIZE_X 8
53 #define IMM64_IMM41b_INST_WORD_POS_X 24
54 #define IMM64_IMM41b_VAL_POS_X 32
56 #define IMM64_IMM41c_INST_WORD_X 2
57 #define IMM64_IMM41c_SIZE_X 23
58 #define IMM64_IMM41c_INST_WORD_POS_X 0
59 #define IMM64_IMM41c_VAL_POS_X 40
61 #define IMM64_SIGN_INST_WORD_X 3
62 #define IMM64_SIGN_SIZE_X 1
63 #define IMM64_SIGN_INST_WORD_POS_X 27
64 #define IMM64_SIGN_VAL_POS_X 63
67 Performs an Itanium-based specific relocation fixup.
69 @param Reloc Pointer to the relocation record.
70 @param Fixup Pointer to the address to fix up.
71 @param FixupData Pointer to a buffer to log the fixups.
72 @param Adjust The offset to adjust the fixup.
78 PeCoffLoaderRelocateImageEx (
81 IN OUT CHAR8
**FixupData
,
88 switch ((*Reloc
) >> 12) {
89 case EFI_IMAGE_REL_BASED_IA64_IMM64
:
92 // Align it to bundle address before fixing up the
93 // 64-bit immediate value of the movl instruction.
96 Fixup
= (CHAR8
*)((UINTN
) Fixup
& (UINTN
) ~(15));
100 // Extract the lower 32 bits of IMM64 from bundle
103 (UINT32
*)Fixup
+ IMM64_IMM7B_INST_WORD_X
,
105 IMM64_IMM7B_INST_WORD_POS_X
,
106 IMM64_IMM7B_VAL_POS_X
110 (UINT32
*)Fixup
+ IMM64_IMM9D_INST_WORD_X
,
112 IMM64_IMM9D_INST_WORD_POS_X
,
113 IMM64_IMM9D_VAL_POS_X
117 (UINT32
*)Fixup
+ IMM64_IMM5C_INST_WORD_X
,
119 IMM64_IMM5C_INST_WORD_POS_X
,
120 IMM64_IMM5C_VAL_POS_X
124 (UINT32
*)Fixup
+ IMM64_IC_INST_WORD_X
,
126 IMM64_IC_INST_WORD_POS_X
,
131 (UINT32
*)Fixup
+ IMM64_IMM41a_INST_WORD_X
,
133 IMM64_IMM41a_INST_WORD_POS_X
,
134 IMM64_IMM41a_VAL_POS_X
138 // Update 64-bit address
143 // Insert IMM64 into bundle
146 ((UINT32
*)Fixup
+ IMM64_IMM7B_INST_WORD_X
),
148 IMM64_IMM7B_INST_WORD_POS_X
,
149 IMM64_IMM7B_VAL_POS_X
153 ((UINT32
*)Fixup
+ IMM64_IMM9D_INST_WORD_X
),
155 IMM64_IMM9D_INST_WORD_POS_X
,
156 IMM64_IMM9D_VAL_POS_X
160 ((UINT32
*)Fixup
+ IMM64_IMM5C_INST_WORD_X
),
162 IMM64_IMM5C_INST_WORD_POS_X
,
163 IMM64_IMM5C_VAL_POS_X
167 ((UINT32
*)Fixup
+ IMM64_IC_INST_WORD_X
),
169 IMM64_IC_INST_WORD_POS_X
,
174 ((UINT32
*)Fixup
+ IMM64_IMM41a_INST_WORD_X
),
176 IMM64_IMM41a_INST_WORD_POS_X
,
177 IMM64_IMM41a_VAL_POS_X
181 ((UINT32
*)Fixup
+ IMM64_IMM41b_INST_WORD_X
),
183 IMM64_IMM41b_INST_WORD_POS_X
,
184 IMM64_IMM41b_VAL_POS_X
188 ((UINT32
*)Fixup
+ IMM64_IMM41c_INST_WORD_X
),
190 IMM64_IMM41c_INST_WORD_POS_X
,
191 IMM64_IMM41c_VAL_POS_X
195 ((UINT32
*)Fixup
+ IMM64_SIGN_INST_WORD_X
),
197 IMM64_SIGN_INST_WORD_POS_X
,
201 F64
= (UINT64
*) Fixup
;
202 if (*FixupData
!= NULL
) {
203 *FixupData
= ALIGN_POINTER(*FixupData
, sizeof(UINT64
));
204 *(UINT64
*)(*FixupData
) = *F64
;
205 *FixupData
= *FixupData
+ sizeof(UINT64
);
210 return RETURN_UNSUPPORTED
;
213 return RETURN_SUCCESS
;
217 Returns TRUE if the machine type of PE/COFF image is supported. Supported
218 does not mean the image can be executed it means the PE/COFF loader supports
219 loading and relocating of the image type. It's up to the caller to support
222 This function implies the basic PE/COFF loader/relocator supports IA32, EBC,
223 & X64 images. Calling the entry point in a correct mannor is up to the
224 consumer of this library. This version also supports the special relocations
227 @param Machine Machine type from the PE Header.
229 @return TRUE if this PE/COFF loader can load the image
233 PeCoffLoaderImageFormatSupported (
237 if ((Machine
== EFI_IMAGE_MACHINE_IPF
) || (Machine
== EFI_IMAGE_MACHINE_IA32
) ||
238 (Machine
== EFI_IMAGE_MACHINE_EBC
) || (Machine
== EFI_IMAGE_MACHINE_X64
)) {
247 ImageRead function that operates on a memory buffer whos base is passed into
250 @param Reloc Ponter to baes of the input stream
251 @param Fixup Offset to the start of the buffer
252 @param FixupData Number of bytes to copy into the buffer
253 @param Adjust Location to place results of read
255 @retval RETURN_SUCCESS Data is read from FileOffset from the Handle into
259 PeHotRelocateImageEx (
262 IN OUT CHAR8
**FixupData
,
269 switch ((*Reloc
) >> 12) {
270 case EFI_IMAGE_REL_BASED_DIR64
:
271 F64
= (UINT64
*) Fixup
;
272 *FixupData
= ALIGN_POINTER (*FixupData
, sizeof (UINT64
));
273 if (*(UINT64
*) (*FixupData
) == *F64
) {
274 *F64
= *F64
+ (UINT64
) Adjust
;
277 *FixupData
= *FixupData
+ sizeof (UINT64
);
280 case EFI_IMAGE_REL_BASED_IA64_IMM64
:
281 F64
= (UINT64
*) Fixup
;
282 *FixupData
= ALIGN_POINTER (*FixupData
, sizeof (UINT64
));
283 if (*(UINT64
*) (*FixupData
) == *F64
) {
285 // Align it to bundle address before fixing up the
286 // 64-bit immediate value of the movl instruction.
289 Fixup
= (CHAR8
*) ((UINT64
) Fixup
& (UINT64
)~(15));
290 FixupVal
= (UINT64
) 0;
293 // Extract the lower 32 bits of IMM64 from bundle
297 (UINT32
*) Fixup
+ IMM64_IMM7B_INST_WORD_X
,
299 IMM64_IMM7B_INST_WORD_POS_X
,
300 IMM64_IMM7B_VAL_POS_X
305 (UINT32
*) Fixup
+ IMM64_IMM9D_INST_WORD_X
,
307 IMM64_IMM9D_INST_WORD_POS_X
,
308 IMM64_IMM9D_VAL_POS_X
313 (UINT32
*) Fixup
+ IMM64_IMM5C_INST_WORD_X
,
315 IMM64_IMM5C_INST_WORD_POS_X
,
316 IMM64_IMM5C_VAL_POS_X
321 (UINT32
*) Fixup
+ IMM64_IC_INST_WORD_X
,
323 IMM64_IC_INST_WORD_POS_X
,
329 (UINT32
*) Fixup
+ IMM64_IMM41a_INST_WORD_X
,
331 IMM64_IMM41a_INST_WORD_POS_X
,
332 IMM64_IMM41a_VAL_POS_X
336 // Update 64-bit address
341 // Insert IMM64 into bundle
345 ((UINT32
*) Fixup
+ IMM64_IMM7B_INST_WORD_X
),
347 IMM64_IMM7B_INST_WORD_POS_X
,
348 IMM64_IMM7B_VAL_POS_X
353 ((UINT32
*) Fixup
+ IMM64_IMM9D_INST_WORD_X
),
355 IMM64_IMM9D_INST_WORD_POS_X
,
356 IMM64_IMM9D_VAL_POS_X
361 ((UINT32
*) Fixup
+ IMM64_IMM5C_INST_WORD_X
),
363 IMM64_IMM5C_INST_WORD_POS_X
,
364 IMM64_IMM5C_VAL_POS_X
369 ((UINT32
*) Fixup
+ IMM64_IC_INST_WORD_X
),
371 IMM64_IC_INST_WORD_POS_X
,
377 ((UINT32
*) Fixup
+ IMM64_IMM41a_INST_WORD_X
),
379 IMM64_IMM41a_INST_WORD_POS_X
,
380 IMM64_IMM41a_VAL_POS_X
385 ((UINT32
*) Fixup
+ IMM64_IMM41b_INST_WORD_X
),
387 IMM64_IMM41b_INST_WORD_POS_X
,
388 IMM64_IMM41b_VAL_POS_X
393 ((UINT32
*) Fixup
+ IMM64_IMM41c_INST_WORD_X
),
395 IMM64_IMM41c_INST_WORD_POS_X
,
396 IMM64_IMM41c_VAL_POS_X
401 ((UINT32
*) Fixup
+ IMM64_SIGN_INST_WORD_X
),
403 IMM64_SIGN_INST_WORD_POS_X
,
407 *(UINT64
*) (*FixupData
) = *F64
;
410 *FixupData
= *FixupData
+ sizeof (UINT64
);
414 DEBUG ((EFI_D_ERROR
, "PeHotRelocateEx:unknown fixed type\n"));
415 return RETURN_UNSUPPORTED
;
418 return RETURN_SUCCESS
;