2 Fixes Intel Itanium(TM) specific relocation types.
4 Copyright (c) 2006 - 2008, Intel Corporation
5 All rights reserved. This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
15 #include "BasePeCoffLibInternals.h"
19 #define EXT_IMM64(Value, Address, Size, InstPos, ValPos) \
20 Value |= (((UINT64)((*(Address) >> InstPos) & (((UINT64)1 << Size) - 1))) << ValPos)
22 #define INS_IMM64(Value, Address, Size, InstPos, ValPos) \
23 *(UINT32*)Address = (*(UINT32*)Address & ~(((1 << Size) - 1) << InstPos)) | \
24 ((UINT32)((((UINT64)Value >> ValPos) & (((UINT64)1 << Size) - 1))) << InstPos)
26 #define IMM64_IMM7B_INST_WORD_X 3
27 #define IMM64_IMM7B_SIZE_X 7
28 #define IMM64_IMM7B_INST_WORD_POS_X 4
29 #define IMM64_IMM7B_VAL_POS_X 0
31 #define IMM64_IMM9D_INST_WORD_X 3
32 #define IMM64_IMM9D_SIZE_X 9
33 #define IMM64_IMM9D_INST_WORD_POS_X 18
34 #define IMM64_IMM9D_VAL_POS_X 7
36 #define IMM64_IMM5C_INST_WORD_X 3
37 #define IMM64_IMM5C_SIZE_X 5
38 #define IMM64_IMM5C_INST_WORD_POS_X 13
39 #define IMM64_IMM5C_VAL_POS_X 16
41 #define IMM64_IC_INST_WORD_X 3
42 #define IMM64_IC_SIZE_X 1
43 #define IMM64_IC_INST_WORD_POS_X 12
44 #define IMM64_IC_VAL_POS_X 21
46 #define IMM64_IMM41A_INST_WORD_X 1
47 #define IMM64_IMM41A_SIZE_X 10
48 #define IMM64_IMM41A_INST_WORD_POS_X 14
49 #define IMM64_IMM41A_VAL_POS_X 22
51 #define IMM64_IMM41B_INST_WORD_X 1
52 #define IMM64_IMM41B_SIZE_X 8
53 #define IMM64_IMM41B_INST_WORD_POS_X 24
54 #define IMM64_IMM41B_VAL_POS_X 32
56 #define IMM64_IMM41C_INST_WORD_X 2
57 #define IMM64_IMM41C_SIZE_X 23
58 #define IMM64_IMM41C_INST_WORD_POS_X 0
59 #define IMM64_IMM41C_VAL_POS_X 40
61 #define IMM64_SIGN_INST_WORD_X 3
62 #define IMM64_SIGN_SIZE_X 1
63 #define IMM64_SIGN_INST_WORD_POS_X 27
64 #define IMM64_SIGN_VAL_POS_X 63
67 Performs an Itanium-based specific relocation fixup.
69 @param Reloc Pointer to the relocation record.
70 @param Fixup Pointer to the address to fix up.
71 @param FixupData Pointer to a buffer to log the fixups.
72 @param Adjust The offset to adjust the fixup.
74 @retval RETURN_SUCCESS Succeed to fix the relocation entry.
75 @retval RETURN_UNSUPPOTED Unrecoganized relocation entry.
79 PeCoffLoaderRelocateImageEx (
82 IN OUT CHAR8
**FixupData
,
89 switch ((*Reloc
) >> 12) {
90 case EFI_IMAGE_REL_BASED_IA64_IMM64
:
93 // Align it to bundle address before fixing up the
94 // 64-bit immediate value of the movl instruction.
97 Fixup
= (CHAR8
*)((UINTN
) Fixup
& (UINTN
) ~(15));
101 // Extract the lower 32 bits of IMM64 from bundle
104 (UINT32
*)Fixup
+ IMM64_IMM7B_INST_WORD_X
,
106 IMM64_IMM7B_INST_WORD_POS_X
,
107 IMM64_IMM7B_VAL_POS_X
111 (UINT32
*)Fixup
+ IMM64_IMM9D_INST_WORD_X
,
113 IMM64_IMM9D_INST_WORD_POS_X
,
114 IMM64_IMM9D_VAL_POS_X
118 (UINT32
*)Fixup
+ IMM64_IMM5C_INST_WORD_X
,
120 IMM64_IMM5C_INST_WORD_POS_X
,
121 IMM64_IMM5C_VAL_POS_X
125 (UINT32
*)Fixup
+ IMM64_IC_INST_WORD_X
,
127 IMM64_IC_INST_WORD_POS_X
,
132 (UINT32
*)Fixup
+ IMM64_IMM41A_INST_WORD_X
,
134 IMM64_IMM41A_INST_WORD_POS_X
,
135 IMM64_IMM41A_VAL_POS_X
139 // Update 64-bit address
144 // Insert IMM64 into bundle
147 ((UINT32
*)Fixup
+ IMM64_IMM7B_INST_WORD_X
),
149 IMM64_IMM7B_INST_WORD_POS_X
,
150 IMM64_IMM7B_VAL_POS_X
154 ((UINT32
*)Fixup
+ IMM64_IMM9D_INST_WORD_X
),
156 IMM64_IMM9D_INST_WORD_POS_X
,
157 IMM64_IMM9D_VAL_POS_X
161 ((UINT32
*)Fixup
+ IMM64_IMM5C_INST_WORD_X
),
163 IMM64_IMM5C_INST_WORD_POS_X
,
164 IMM64_IMM5C_VAL_POS_X
168 ((UINT32
*)Fixup
+ IMM64_IC_INST_WORD_X
),
170 IMM64_IC_INST_WORD_POS_X
,
175 ((UINT32
*)Fixup
+ IMM64_IMM41A_INST_WORD_X
),
177 IMM64_IMM41A_INST_WORD_POS_X
,
178 IMM64_IMM41A_VAL_POS_X
182 ((UINT32
*)Fixup
+ IMM64_IMM41B_INST_WORD_X
),
184 IMM64_IMM41B_INST_WORD_POS_X
,
185 IMM64_IMM41B_VAL_POS_X
189 ((UINT32
*)Fixup
+ IMM64_IMM41C_INST_WORD_X
),
191 IMM64_IMM41C_INST_WORD_POS_X
,
192 IMM64_IMM41C_VAL_POS_X
196 ((UINT32
*)Fixup
+ IMM64_SIGN_INST_WORD_X
),
198 IMM64_SIGN_INST_WORD_POS_X
,
202 Fixup64
= (UINT64
*) Fixup
;
203 if (*FixupData
!= NULL
) {
204 *FixupData
= ALIGN_POINTER(*FixupData
, sizeof(UINT64
));
205 *(UINT64
*)(*FixupData
) = *Fixup64
;
206 *FixupData
= *FixupData
+ sizeof(UINT64
);
211 return RETURN_UNSUPPORTED
;
214 return RETURN_SUCCESS
;
218 Returns TRUE if the machine type of PE/COFF image is supported. Supported
219 does not mean the image can be executed it means the PE/COFF loader supports
220 loading and relocating of the image type. It's up to the caller to support
223 This function implies the basic PE/COFF loader/relocator supports IA32, EBC,
224 & x64 images. Calling the entry point in a correct mannor is up to the
225 consumer of this library. This version also supports the special relocations
228 @param Machine Machine type from the PE Header.
230 @return TRUE if this PE/COFF loader can load the image
231 @return FALSE unrecoganized machine type of image.
235 PeCoffLoaderImageFormatSupported (
239 if ((Machine
== IMAGE_FILE_MACHINE_IA64
) || (Machine
== IMAGE_FILE_MACHINE_EBC
)) {
248 ImageRead function that operates on a memory buffer whos base is passed into
251 @param Reloc Ponter to baes of the input stream
252 @param Fixup Offset to the start of the buffer
253 @param FixupData Number of bytes to copy into the buffer
254 @param Adjust Location to place results of read
256 @retval RETURN_SUCCESS Data is read from FileOffset from the Handle into
258 @retval RETURN_UNSUPPORTED Un-recoganized relocation entry
262 PeHotRelocateImageEx (
265 IN OUT CHAR8
**FixupData
,
272 switch ((*Reloc
) >> 12) {
273 case EFI_IMAGE_REL_BASED_DIR64
:
274 Fixup64
= (UINT64
*) Fixup
;
275 *FixupData
= ALIGN_POINTER (*FixupData
, sizeof (UINT64
));
276 if (*(UINT64
*) (*FixupData
) == *Fixup64
) {
277 *Fixup64
= *Fixup64
+ (UINT64
) Adjust
;
280 *FixupData
= *FixupData
+ sizeof (UINT64
);
283 case EFI_IMAGE_REL_BASED_IA64_IMM64
:
284 Fixup64
= (UINT64
*) Fixup
;
285 *FixupData
= ALIGN_POINTER (*FixupData
, sizeof (UINT64
));
286 if (*(UINT64
*) (*FixupData
) == *Fixup64
) {
288 // Align it to bundle address before fixing up the
289 // 64-bit immediate value of the movl instruction.
292 Fixup
= (CHAR8
*) ((UINT64
) Fixup
& (UINT64
)~(15));
293 FixupVal
= (UINT64
) 0;
296 // Extract the lower 32 bits of IMM64 from bundle
300 (UINT32
*) Fixup
+ IMM64_IMM7B_INST_WORD_X
,
302 IMM64_IMM7B_INST_WORD_POS_X
,
303 IMM64_IMM7B_VAL_POS_X
308 (UINT32
*) Fixup
+ IMM64_IMM9D_INST_WORD_X
,
310 IMM64_IMM9D_INST_WORD_POS_X
,
311 IMM64_IMM9D_VAL_POS_X
316 (UINT32
*) Fixup
+ IMM64_IMM5C_INST_WORD_X
,
318 IMM64_IMM5C_INST_WORD_POS_X
,
319 IMM64_IMM5C_VAL_POS_X
324 (UINT32
*) Fixup
+ IMM64_IC_INST_WORD_X
,
326 IMM64_IC_INST_WORD_POS_X
,
332 (UINT32
*) Fixup
+ IMM64_IMM41A_INST_WORD_X
,
334 IMM64_IMM41A_INST_WORD_POS_X
,
335 IMM64_IMM41A_VAL_POS_X
339 // Update 64-bit address
344 // Insert IMM64 into bundle
348 ((UINT32
*) Fixup
+ IMM64_IMM7B_INST_WORD_X
),
350 IMM64_IMM7B_INST_WORD_POS_X
,
351 IMM64_IMM7B_VAL_POS_X
356 ((UINT32
*) Fixup
+ IMM64_IMM9D_INST_WORD_X
),
358 IMM64_IMM9D_INST_WORD_POS_X
,
359 IMM64_IMM9D_VAL_POS_X
364 ((UINT32
*) Fixup
+ IMM64_IMM5C_INST_WORD_X
),
366 IMM64_IMM5C_INST_WORD_POS_X
,
367 IMM64_IMM5C_VAL_POS_X
372 ((UINT32
*) Fixup
+ IMM64_IC_INST_WORD_X
),
374 IMM64_IC_INST_WORD_POS_X
,
380 ((UINT32
*) Fixup
+ IMM64_IMM41A_INST_WORD_X
),
382 IMM64_IMM41A_INST_WORD_POS_X
,
383 IMM64_IMM41A_VAL_POS_X
388 ((UINT32
*) Fixup
+ IMM64_IMM41B_INST_WORD_X
),
390 IMM64_IMM41B_INST_WORD_POS_X
,
391 IMM64_IMM41B_VAL_POS_X
396 ((UINT32
*) Fixup
+ IMM64_IMM41C_INST_WORD_X
),
398 IMM64_IMM41C_INST_WORD_POS_X
,
399 IMM64_IMM41C_VAL_POS_X
404 ((UINT32
*) Fixup
+ IMM64_SIGN_INST_WORD_X
),
406 IMM64_SIGN_INST_WORD_POS_X
,
410 *(UINT64
*) (*FixupData
) = *Fixup64
;
413 *FixupData
= *FixupData
+ sizeof (UINT64
);
417 DEBUG ((EFI_D_ERROR
, "PeHotRelocateEx:unknown fixed type\n"));
418 return RETURN_UNSUPPORTED
;
421 return RETURN_SUCCESS
;