2 The multiple segments PCI configuration Library Services that carry out
3 PCI configuration and enable the PCI operations to be replayed during an
4 S3 resume. This library class maps directly on top of the PciSegmentLib class.
6 Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
7 SPDX-License-Identifier: BSD-2-Clause-Patent
14 #include <Library/DebugLib.h>
15 #include <Library/S3BootScriptLib.h>
16 #include <Library/PciSegmentLib.h>
19 Macro that converts address in PciSegmentLib format to the new address that can be pass
20 to the S3 Boot Script Library functions. The Segment is dropped.
22 @param Address Address in PciSegmentLib format.
24 @retval New address that can be pass to the S3 Boot Script Library functions.
26 #define PCI_SEGMENT_LIB_ADDRESS_TO_S3_BOOT_SCRIPT_PCI_ADDRESS(Address) \
27 ((((UINT32)(Address) >> 20) & 0xff) << 24) | \
28 ((((UINT32)(Address) >> 15) & 0x1f) << 16) | \
29 ((((UINT32)(Address) >> 12) & 0x07) << 8) | \
30 LShiftU64 ((Address) & 0xfff, 32) // Always put Register in high four bytes.
33 Saves a PCI configuration value to the boot script.
35 This internal worker function saves a PCI configuration value in
36 the S3 script to be replayed on S3 resume.
38 If the saving process fails, then ASSERT().
40 @param Width The width of PCI configuration.
41 @param Address Address that encodes the PCI Bus, Device, Function and
43 @param Buffer The buffer containing value.
47 InternalSavePciSegmentWriteValueToBootScript (
48 IN S3_BOOT_SCRIPT_LIB_WIDTH Width
,
55 Status
= S3BootScriptSavePciCfg2Write (
57 RShiftU64 ((Address
), 32) & 0xffff,
58 PCI_SEGMENT_LIB_ADDRESS_TO_S3_BOOT_SCRIPT_PCI_ADDRESS (Address
),
62 ASSERT_RETURN_ERROR (Status
);
66 Saves an 8-bit PCI configuration value to the boot script.
68 This internal worker function saves an 8-bit PCI configuration value in
69 the S3 script to be replayed on S3 resume.
71 If the saving process fails, then ASSERT().
73 @param Address Address that encodes the PCI Bus, Device, Function and
75 @param Value The value saved to boot script.
81 InternalSavePciSegmentWrite8ValueToBootScript (
86 InternalSavePciSegmentWriteValueToBootScript (S3BootScriptWidthUint8
, Address
, &Value
);
92 Reads an 8-bit PCI configuration register, and saves the value in the S3 script to
93 be replayed on S3 resume.
95 Reads and returns the 8-bit PCI configuration register specified by Address.
96 This function must guarantee that all PCI read and write operations are serialized.
98 If any reserved bits in Address are set, then ASSERT().
100 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
102 @return The 8-bit PCI configuration register specified by Address.
111 return InternalSavePciSegmentWrite8ValueToBootScript (Address
, PciSegmentRead8 (Address
));
115 Writes an 8-bit PCI configuration register, and saves the value in the S3 script to
116 be replayed on S3 resume.
118 Writes the 8-bit PCI configuration register specified by Address with the value specified by Value.
119 Value is returned. This function must guarantee that all PCI read and write operations are serialized.
121 If any reserved bits in Address are set, then ASSERT().
123 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
124 @param Value The value to write.
126 @return The value written to the PCI configuration register.
136 return InternalSavePciSegmentWrite8ValueToBootScript (Address
, PciSegmentWrite8 (Address
, Value
));
140 Performs a bitwise OR of an 8-bit PCI configuration register with an 8-bit value, and saves
141 the value in the S3 script to be replayed on S3 resume.
143 Reads the 8-bit PCI configuration register specified by Address,
144 performs a bitwise OR between the read result and the value specified by OrData,
145 and writes the result to the 8-bit PCI configuration register specified by Address.
146 The value written to the PCI configuration register is returned.
147 This function must guarantee that all PCI read and write operations are serialized.
149 If any reserved bits in Address are set, then ASSERT().
151 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
152 @param OrData The value to OR with the PCI configuration register.
154 @return The value written to the PCI configuration register.
164 return InternalSavePciSegmentWrite8ValueToBootScript (Address
, PciSegmentOr8 (Address
, OrData
));
168 Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit value, and
169 saves the value in the S3 script to be replayed on S3 resume.
171 Reads the 8-bit PCI configuration register specified by Address,
172 performs a bitwise AND between the read result and the value specified by AndData,
173 and writes the result to the 8-bit PCI configuration register specified by Address.
174 The value written to the PCI configuration register is returned.
175 This function must guarantee that all PCI read and write operations are serialized.
176 If any reserved bits in Address are set, then ASSERT().
178 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
179 @param AndData The value to AND with the PCI configuration register.
181 @return The value written to the PCI configuration register.
191 return InternalSavePciSegmentWrite8ValueToBootScript (Address
, PciSegmentAnd8 (Address
, AndData
));
195 Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit value,
196 followed a bitwise OR with another 8-bit value, and saves the value in the S3 script to
197 be replayed on S3 resume.
199 Reads the 8-bit PCI configuration register specified by Address,
200 performs a bitwise AND between the read result and the value specified by AndData,
201 performs a bitwise OR between the result of the AND operation and the value specified by OrData,
202 and writes the result to the 8-bit PCI configuration register specified by Address.
203 The value written to the PCI configuration register is returned.
204 This function must guarantee that all PCI read and write operations are serialized.
206 If any reserved bits in Address are set, then ASSERT().
208 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
209 @param AndData The value to AND with the PCI configuration register.
210 @param OrData The value to OR with the PCI configuration register.
212 @return The value written to the PCI configuration register.
217 S3PciSegmentAndThenOr8 (
223 return InternalSavePciSegmentWrite8ValueToBootScript (Address
, PciSegmentAndThenOr8 (Address
, AndData
, OrData
));
227 Reads a bit field of a PCI configuration register, and saves the value in the
228 S3 script to be replayed on S3 resume.
230 Reads the bit field in an 8-bit PCI configuration register. The bit field is
231 specified by the StartBit and the EndBit. The value of the bit field is
234 If any reserved bits in Address are set, then ASSERT().
235 If StartBit is greater than 7, then ASSERT().
236 If EndBit is greater than 7, then ASSERT().
237 If EndBit is less than StartBit, then ASSERT().
239 @param Address PCI configuration register to read.
240 @param StartBit The ordinal of the least significant bit in the bit field.
242 @param EndBit The ordinal of the most significant bit in the bit field.
245 @return The value of the bit field read from the PCI configuration register.
250 S3PciSegmentBitFieldRead8 (
256 return InternalSavePciSegmentWrite8ValueToBootScript (Address
, PciSegmentBitFieldRead8 (Address
, StartBit
, EndBit
));
260 Writes a bit field to a PCI configuration register, and saves the value in
261 the S3 script to be replayed on S3 resume.
263 Writes Value to the bit field of the PCI configuration register. The bit
264 field is specified by the StartBit and the EndBit. All other bits in the
265 destination PCI configuration register are preserved. The new value of the
266 8-bit register is returned.
268 If any reserved bits in Address are set, then ASSERT().
269 If StartBit is greater than 7, then ASSERT().
270 If EndBit is greater than 7, then ASSERT().
271 If EndBit is less than StartBit, then ASSERT().
272 If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
274 @param Address PCI configuration register to write.
275 @param StartBit The ordinal of the least significant bit in the bit field.
277 @param EndBit The ordinal of the most significant bit in the bit field.
279 @param Value New value of the bit field.
281 @return The value written back to the PCI configuration register.
286 S3PciSegmentBitFieldWrite8 (
293 return InternalSavePciSegmentWrite8ValueToBootScript (Address
, PciSegmentBitFieldWrite8 (Address
, StartBit
, EndBit
, Value
));
297 Reads a bit field in an 8-bit PCI configuration, performs a bitwise OR, writes
298 the result back to the bit field in the 8-bit port, and saves the value in the
299 S3 script to be replayed on S3 resume.
301 Reads the 8-bit PCI configuration register specified by Address, performs a
302 bitwise OR between the read result and the value specified by
303 OrData, and writes the result to the 8-bit PCI configuration register
304 specified by Address. The value written to the PCI configuration register is
305 returned. This function must guarantee that all PCI read and write operations
306 are serialized. Extra left bits in OrData are stripped.
308 If any reserved bits in Address are set, then ASSERT().
309 If StartBit is greater than 7, then ASSERT().
310 If EndBit is greater than 7, then ASSERT().
311 If EndBit is less than StartBit, then ASSERT().
312 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
314 @param Address PCI configuration register to write.
315 @param StartBit The ordinal of the least significant bit in the bit field.
317 @param EndBit The ordinal of the most significant bit in the bit field.
319 @param OrData The value to OR with the PCI configuration register.
321 @return The value written back to the PCI configuration register.
326 S3PciSegmentBitFieldOr8 (
333 return InternalSavePciSegmentWrite8ValueToBootScript (Address
, PciSegmentBitFieldOr8 (Address
, StartBit
, EndBit
, OrData
));
337 Reads a bit field in an 8-bit PCI configuration register, performs a bitwise
338 AND, writes the result back to the bit field in the 8-bit register, and
339 saves the value in the S3 script to be replayed on S3 resume.
341 Reads the 8-bit PCI configuration register specified by Address, performs a
342 bitwise AND between the read result and the value specified by AndData, and
343 writes the result to the 8-bit PCI configuration register specified by
344 Address. The value written to the PCI configuration register is returned.
345 This function must guarantee that all PCI read and write operations are
346 serialized. Extra left bits in AndData are stripped.
348 If any reserved bits in Address are set, then ASSERT().
349 If StartBit is greater than 7, then ASSERT().
350 If EndBit is greater than 7, then ASSERT().
351 If EndBit is less than StartBit, then ASSERT().
352 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
354 @param Address PCI configuration register to write.
355 @param StartBit The ordinal of the least significant bit in the bit field.
357 @param EndBit The ordinal of the most significant bit in the bit field.
359 @param AndData The value to AND with the PCI configuration register.
361 @return The value written back to the PCI configuration register.
366 S3PciSegmentBitFieldAnd8 (
373 return InternalSavePciSegmentWrite8ValueToBootScript (Address
, PciSegmentBitFieldAnd8 (Address
, StartBit
, EndBit
, AndData
));
377 Reads a bit field in an 8-bit port, performs a bitwise AND followed by a
378 bitwise OR, writes the result back to the bit field in the 8-bit port,
379 and saves the value in the S3 script to be replayed on S3 resume.
381 Reads the 8-bit PCI configuration register specified by Address, performs a
382 bitwise AND followed by a bitwise OR between the read result and
383 the value specified by AndData, and writes the result to the 8-bit PCI
384 configuration register specified by Address. The value written to the PCI
385 configuration register is returned. This function must guarantee that all PCI
386 read and write operations are serialized. Extra left bits in both AndData and
389 If any reserved bits in Address are set, then ASSERT().
390 If StartBit is greater than 7, then ASSERT().
391 If EndBit is greater than 7, then ASSERT().
392 If EndBit is less than StartBit, then ASSERT().
393 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
394 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
396 @param Address PCI configuration register to write.
397 @param StartBit The ordinal of the least significant bit in the bit field.
399 @param EndBit The ordinal of the most significant bit in the bit field.
401 @param AndData The value to AND with the PCI configuration register.
402 @param OrData The value to OR with the result of the AND operation.
404 @return The value written back to the PCI configuration register.
409 S3PciSegmentBitFieldAndThenOr8 (
417 return InternalSavePciSegmentWrite8ValueToBootScript (Address
, PciSegmentBitFieldAndThenOr8 (Address
, StartBit
, EndBit
, AndData
, OrData
));
421 Saves a 16-bit PCI configuration value to the boot script.
423 This internal worker function saves a 16-bit PCI configuration value in
424 the S3 script to be replayed on S3 resume.
426 If the saving process fails, then ASSERT().
428 @param Address Address that encodes the PCI Bus, Device, Function and
430 @param Value The value saved to boot script.
436 InternalSavePciSegmentWrite16ValueToBootScript (
441 InternalSavePciSegmentWriteValueToBootScript (S3BootScriptWidthUint16
, Address
, &Value
);
447 Reads a 16-bit PCI configuration register, and saves the value in the S3 script
448 to be replayed on S3 resume.
450 Reads and returns the 16-bit PCI configuration register specified by Address.
451 This function must guarantee that all PCI read and write operations are serialized.
453 If any reserved bits in Address are set, then ASSERT().
454 If Address is not aligned on a 16-bit boundary, then ASSERT().
456 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
458 @return The 16-bit PCI configuration register specified by Address.
467 return InternalSavePciSegmentWrite16ValueToBootScript (Address
, PciSegmentRead16 (Address
));
471 Writes a 16-bit PCI configuration register, and saves the value in the S3 script to
472 be replayed on S3 resume.
474 Writes the 16-bit PCI configuration register specified by Address with the value specified by Value.
475 Value is returned. This function must guarantee that all PCI read and write operations are serialized.
477 If any reserved bits in Address are set, then ASSERT().
478 If Address is not aligned on a 16-bit boundary, then ASSERT().
480 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
481 @param Value The value to write.
483 @return The parameter of Value.
488 S3PciSegmentWrite16 (
493 return InternalSavePciSegmentWrite16ValueToBootScript (Address
, PciSegmentWrite16 (Address
, Value
));
497 Performs a bitwise OR of a 16-bit PCI configuration register with a 16-bit
498 value, and saves the value in the S3 script to be replayed on S3 resume.
500 Reads the 16-bit PCI configuration register specified by Address, performs a
501 bitwise OR between the read result and the value specified by OrData, and
502 writes the result to the 16-bit PCI configuration register specified by Address.
503 The value written to the PCI configuration register is returned. This function
504 must guarantee that all PCI read and write operations are serialized.
506 If any reserved bits in Address are set, then ASSERT().
507 If Address is not aligned on a 16-bit boundary, then ASSERT().
509 @param Address Address that encodes the PCI Segment, Bus, Device, Function and
511 @param OrData The value to OR with the PCI configuration register.
513 @return The value written back to the PCI configuration register.
523 return InternalSavePciSegmentWrite16ValueToBootScript (Address
, PciSegmentOr16 (Address
, OrData
));
527 Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit value, and
528 saves the value in the S3 script to be replayed on S3 resume.
530 Reads the 16-bit PCI configuration register specified by Address,
531 performs a bitwise AND between the read result and the value specified by AndData,
532 and writes the result to the 16-bit PCI configuration register specified by Address.
533 The value written to the PCI configuration register is returned.
534 This function must guarantee that all PCI read and write operations are serialized.
536 If any reserved bits in Address are set, then ASSERT().
537 If Address is not aligned on a 16-bit boundary, then ASSERT().
539 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
540 @param AndData The value to AND with the PCI configuration register.
542 @return The value written to the PCI configuration register.
552 return InternalSavePciSegmentWrite16ValueToBootScript (Address
, PciSegmentAnd16 (Address
, AndData
));
556 Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit value,
557 followed a bitwise OR with another 16-bit value, and saves the value in the S3 script to
558 be replayed on S3 resume.
560 Reads the 16-bit PCI configuration register specified by Address,
561 performs a bitwise AND between the read result and the value specified by AndData,
562 performs a bitwise OR between the result of the AND operation and the value specified by OrData,
563 and writes the result to the 16-bit PCI configuration register specified by Address.
564 The value written to the PCI configuration register is returned.
565 This function must guarantee that all PCI read and write operations are serialized.
567 If any reserved bits in Address are set, then ASSERT().
568 If Address is not aligned on a 16-bit boundary, then ASSERT().
570 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
571 @param AndData The value to AND with the PCI configuration register.
572 @param OrData The value to OR with the PCI configuration register.
574 @return The value written to the PCI configuration register.
579 S3PciSegmentAndThenOr16 (
585 return InternalSavePciSegmentWrite16ValueToBootScript (Address
, PciSegmentAndThenOr16 (Address
, AndData
, OrData
));
589 Reads a bit field of a PCI configuration register, and saves the value in the
590 S3 script to be replayed on S3 resume.
592 Reads the bit field in a 16-bit PCI configuration register. The bit field is
593 specified by the StartBit and the EndBit. The value of the bit field is
596 If any reserved bits in Address are set, then ASSERT().
597 If Address is not aligned on a 16-bit boundary, then ASSERT().
598 If StartBit is greater than 15, then ASSERT().
599 If EndBit is greater than 15, then ASSERT().
600 If EndBit is less than StartBit, then ASSERT().
602 @param Address PCI configuration register to read.
603 @param StartBit The ordinal of the least significant bit in the bit field.
605 @param EndBit The ordinal of the most significant bit in the bit field.
608 @return The value of the bit field read from the PCI configuration register.
613 S3PciSegmentBitFieldRead16 (
619 return InternalSavePciSegmentWrite16ValueToBootScript (Address
, PciSegmentBitFieldRead16 (Address
, StartBit
, EndBit
));
623 Writes a bit field to a PCI configuration register, and saves the value in
624 the S3 script to be replayed on S3 resume.
626 Writes Value to the bit field of the PCI configuration register. The bit
627 field is specified by the StartBit and the EndBit. All other bits in the
628 destination PCI configuration register are preserved. The new value of the
629 16-bit register is returned.
631 If any reserved bits in Address are set, then ASSERT().
632 If Address is not aligned on a 16-bit boundary, then ASSERT().
633 If StartBit is greater than 15, then ASSERT().
634 If EndBit is greater than 15, then ASSERT().
635 If EndBit is less than StartBit, then ASSERT().
636 If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
638 @param Address PCI configuration register to write.
639 @param StartBit The ordinal of the least significant bit in the bit field.
641 @param EndBit The ordinal of the most significant bit in the bit field.
643 @param Value New value of the bit field.
645 @return The value written back to the PCI configuration register.
650 S3PciSegmentBitFieldWrite16 (
657 return InternalSavePciSegmentWrite16ValueToBootScript (Address
, PciSegmentBitFieldWrite16 (Address
, StartBit
, EndBit
, Value
));
661 Reads a bit field in a 16-bit PCI configuration, performs a bitwise OR, writes
662 the result back to the bit field in the 16-bit port, and saves the value in the
663 S3 script to be replayed on S3 resume.
665 Reads the 16-bit PCI configuration register specified by Address, performs a
666 bitwise OR between the read result and the value specified by
667 OrData, and writes the result to the 16-bit PCI configuration register
668 specified by Address. The value written to the PCI configuration register is
669 returned. This function must guarantee that all PCI read and write operations
670 are serialized. Extra left bits in OrData are stripped.
672 If any reserved bits in Address are set, then ASSERT().
673 If Address is not aligned on a 16-bit boundary, then ASSERT().
674 If StartBit is greater than 15, then ASSERT().
675 If EndBit is greater than 15, then ASSERT().
676 If EndBit is less than StartBit, then ASSERT().
677 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
679 @param Address PCI configuration register to write.
680 @param StartBit The ordinal of the least significant bit in the bit field.
682 @param EndBit The ordinal of the most significant bit in the bit field.
684 @param OrData The value to OR with the PCI configuration register.
686 @return The value written back to the PCI configuration register.
691 S3PciSegmentBitFieldOr16 (
698 return InternalSavePciSegmentWrite16ValueToBootScript (Address
, PciSegmentBitFieldOr16 (Address
, StartBit
, EndBit
, OrData
));
702 Reads a bit field in a 16-bit PCI configuration register, performs a bitwise
703 AND, writes the result back to the bit field in the 16-bit register, and
704 saves the value in the S3 script to be replayed on S3 resume.
706 Reads the 16-bit PCI configuration register specified by Address, performs a
707 bitwise AND between the read result and the value specified by AndData, and
708 writes the result to the 16-bit PCI configuration register specified by
709 Address. The value written to the PCI configuration register is returned.
710 This function must guarantee that all PCI read and write operations are
711 serialized. Extra left bits in AndData are stripped.
713 If any reserved bits in Address are set, then ASSERT().
714 If Address is not aligned on a 16-bit boundary, then ASSERT().
715 If StartBit is greater than 15, then ASSERT().
716 If EndBit is greater than 15, then ASSERT().
717 If EndBit is less than StartBit, then ASSERT().
718 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
720 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
721 @param StartBit The ordinal of the least significant bit in the bit field.
723 @param EndBit The ordinal of the most significant bit in the bit field.
725 @param AndData The value to AND with the PCI configuration register.
727 @return The value written back to the PCI configuration register.
732 S3PciSegmentBitFieldAnd16 (
739 return InternalSavePciSegmentWrite16ValueToBootScript (Address
, PciSegmentBitFieldAnd16 (Address
, StartBit
, EndBit
, AndData
));
743 Reads a bit field in a 16-bit port, performs a bitwise AND followed by a
744 bitwise OR, writes the result back to the bit field in the 16-bit port,
745 and saves the value in the S3 script to be replayed on S3 resume.
747 Reads the 16-bit PCI configuration register specified by Address, performs a
748 bitwise AND followed by a bitwise OR between the read result and
749 the value specified by AndData, and writes the result to the 16-bit PCI
750 configuration register specified by Address. The value written to the PCI
751 configuration register is returned. This function must guarantee that all PCI
752 read and write operations are serialized. Extra left bits in both AndData and
755 If any reserved bits in Address are set, then ASSERT().
756 If StartBit is greater than 15, then ASSERT().
757 If EndBit is greater than 15, then ASSERT().
758 If EndBit is less than StartBit, then ASSERT().
759 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
760 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
762 @param Address PCI configuration register to write.
763 @param StartBit The ordinal of the least significant bit in the bit field.
765 @param EndBit The ordinal of the most significant bit in the bit field.
767 @param AndData The value to AND with the PCI configuration register.
768 @param OrData The value to OR with the result of the AND operation.
770 @return The value written back to the PCI configuration register.
775 S3PciSegmentBitFieldAndThenOr16 (
783 return InternalSavePciSegmentWrite16ValueToBootScript (Address
, PciSegmentBitFieldAndThenOr16 (Address
, StartBit
, EndBit
, AndData
, OrData
));
789 Saves a 32-bit PCI configuration value to the boot script.
791 This internal worker function saves a 32-bit PCI configuration value in the S3 script
792 to be replayed on S3 resume.
794 If the saving process fails, then ASSERT().
796 @param Address Address that encodes the PCI Bus, Device, Function and
798 @param Value The value saved to boot script.
804 InternalSavePciSegmentWrite32ValueToBootScript (
809 InternalSavePciSegmentWriteValueToBootScript (S3BootScriptWidthUint32
, Address
, &Value
);
815 Reads a 32-bit PCI configuration register, and saves the value in the S3 script
816 to be replayed on S3 resume.
818 Reads and returns the 32-bit PCI configuration register specified by Address.
819 This function must guarantee that all PCI read and write operations are serialized.
821 If any reserved bits in Address are set, then ASSERT().
822 If Address is not aligned on a 32-bit boundary, then ASSERT().
824 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
826 @return The 32-bit PCI configuration register specified by Address.
835 return InternalSavePciSegmentWrite32ValueToBootScript (Address
, PciSegmentRead32 (Address
));
839 Writes a 32-bit PCI configuration register, and saves the value in the S3 script to
840 be replayed on S3 resume.
842 Writes the 32-bit PCI configuration register specified by Address with the value specified by Value.
843 Value is returned. This function must guarantee that all PCI read and write operations are serialized.
845 If any reserved bits in Address are set, then ASSERT().
846 If Address is not aligned on a 32-bit boundary, then ASSERT().
848 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
849 @param Value The value to write.
851 @return The parameter of Value.
856 S3PciSegmentWrite32 (
861 return InternalSavePciSegmentWrite32ValueToBootScript (Address
, PciSegmentWrite32 (Address
, Value
));
865 Performs a bitwise OR of a 32-bit PCI configuration register with a 32-bit
866 value, and saves the value in the S3 script to be replayed on S3 resume.
868 Reads the 32-bit PCI configuration register specified by Address, performs a
869 bitwise OR between the read result and the value specified by OrData, and
870 writes the result to the 32-bit PCI configuration register specified by Address.
871 The value written to the PCI configuration register is returned. This function
872 must guarantee that all PCI read and write operations are serialized.
874 If any reserved bits in Address are set, then ASSERT().
875 If Address is not aligned on a 32-bit boundary, then ASSERT().
877 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and
879 @param OrData The value to OR with the PCI configuration register.
881 @return The value written back to the PCI configuration register.
891 return InternalSavePciSegmentWrite32ValueToBootScript (Address
, PciSegmentOr32 (Address
, OrData
));
895 Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit value, and
896 saves the value in the S3 script to be replayed on S3 resume.
898 Reads the 32-bit PCI configuration register specified by Address,
899 performs a bitwise AND between the read result and the value specified by AndData,
900 and writes the result to the 32-bit PCI configuration register specified by Address.
901 The value written to the PCI configuration register is returned.
902 This function must guarantee that all PCI read and write operations are serialized.
904 If any reserved bits in Address are set, then ASSERT().
905 If Address is not aligned on a 32-bit boundary, then ASSERT().
907 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
908 @param AndData The value to AND with the PCI configuration register.
910 @return The value written to the PCI configuration register.
920 return InternalSavePciSegmentWrite32ValueToBootScript (Address
, PciSegmentAnd32 (Address
, AndData
));
924 Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit value,
925 followed a bitwise OR with another 32-bit value, and saves the value in the S3 script to
926 be replayed on S3 resume.
928 Reads the 32-bit PCI configuration register specified by Address,
929 performs a bitwise AND between the read result and the value specified by AndData,
930 performs a bitwise OR between the result of the AND operation and the value specified by OrData,
931 and writes the result to the 32-bit PCI configuration register specified by Address.
932 The value written to the PCI configuration register is returned.
933 This function must guarantee that all PCI read and write operations are serialized.
935 If any reserved bits in Address are set, then ASSERT().
936 If Address is not aligned on a 32-bit boundary, then ASSERT().
938 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
939 @param AndData The value to AND with the PCI configuration register.
940 @param OrData The value to OR with the PCI configuration register.
942 @return The value written to the PCI configuration register.
947 S3PciSegmentAndThenOr32 (
953 return InternalSavePciSegmentWrite32ValueToBootScript (Address
, PciSegmentAndThenOr32 (Address
, AndData
, OrData
));
957 Reads a bit field of a PCI configuration register, and saves the value in the
958 S3 script to be replayed on S3 resume.
960 Reads the bit field in a 32-bit PCI configuration register. The bit field is
961 specified by the StartBit and the EndBit. The value of the bit field is
964 If any reserved bits in Address are set, then ASSERT().
965 If Address is not aligned on a 32-bit boundary, then ASSERT().
966 If StartBit is greater than 31, then ASSERT().
967 If EndBit is greater than 31, then ASSERT().
968 If EndBit is less than StartBit, then ASSERT().
970 @param Address PCI configuration register to read.
971 @param StartBit The ordinal of the least significant bit in the bit field.
973 @param EndBit The ordinal of the most significant bit in the bit field.
976 @return The value of the bit field read from the PCI configuration register.
981 S3PciSegmentBitFieldRead32 (
987 return InternalSavePciSegmentWrite32ValueToBootScript (Address
, PciSegmentBitFieldRead32 (Address
, StartBit
, EndBit
));
991 Writes a bit field to a PCI configuration register, and saves the value in
992 the S3 script to be replayed on S3 resume.
994 Writes Value to the bit field of the PCI configuration register. The bit
995 field is specified by the StartBit and the EndBit. All other bits in the
996 destination PCI configuration register are preserved. The new value of the
997 32-bit register is returned.
999 If any reserved bits in Address are set, then ASSERT().
1000 If Address is not aligned on a 32-bit boundary, then ASSERT().
1001 If StartBit is greater than 31, then ASSERT().
1002 If EndBit is greater than 31, then ASSERT().
1003 If EndBit is less than StartBit, then ASSERT().
1004 If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
1006 @param Address PCI configuration register to write.
1007 @param StartBit The ordinal of the least significant bit in the bit field.
1009 @param EndBit The ordinal of the most significant bit in the bit field.
1011 @param Value New value of the bit field.
1013 @return The value written back to the PCI configuration register.
1018 S3PciSegmentBitFieldWrite32 (
1025 return InternalSavePciSegmentWrite32ValueToBootScript (Address
, PciSegmentBitFieldWrite32 (Address
, StartBit
, EndBit
, Value
));
1029 Reads a bit field in a 32-bit PCI configuration, performs a bitwise OR, writes
1030 the result back to the bit field in the 32-bit port, and saves the value in the
1031 S3 script to be replayed on S3 resume.
1033 Reads the 32-bit PCI configuration register specified by Address, performs a
1034 bitwise OR between the read result and the value specified by
1035 OrData, and writes the result to the 32-bit PCI configuration register
1036 specified by Address. The value written to the PCI configuration register is
1037 returned. This function must guarantee that all PCI read and write operations
1038 are serialized. Extra left bits in OrData are stripped.
1040 If any reserved bits in Address are set, then ASSERT().
1041 If Address is not aligned on a 32-bit boundary, then ASSERT().
1042 If StartBit is greater than 31, then ASSERT().
1043 If EndBit is greater than 31, then ASSERT().
1044 If EndBit is less than StartBit, then ASSERT().
1045 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
1047 @param Address PCI configuration register to write.
1048 @param StartBit The ordinal of the least significant bit in the bit field.
1050 @param EndBit The ordinal of the most significant bit in the bit field.
1052 @param OrData The value to OR with the PCI configuration register.
1054 @return The value written back to the PCI configuration register.
1059 S3PciSegmentBitFieldOr32 (
1066 return InternalSavePciSegmentWrite32ValueToBootScript (Address
, PciSegmentBitFieldOr32 (Address
, StartBit
, EndBit
, OrData
));
1070 Reads a bit field in a 32-bit PCI configuration register, performs a bitwise
1071 AND, and writes the result back to the bit field in the 32-bit register, and
1072 saves the value in the S3 script to be replayed on S3 resume.
1074 Reads the 32-bit PCI configuration register specified by Address, performs a
1075 bitwise AND between the read result and the value specified by AndData, and
1076 writes the result to the 32-bit PCI configuration register specified by
1077 Address. The value written to the PCI configuration register is returned.
1078 This function must guarantee that all PCI read and write operations are
1079 serialized. Extra left bits in AndData are stripped.
1081 If any reserved bits in Address are set, then ASSERT().
1082 If Address is not aligned on a 32-bit boundary, then ASSERT().
1083 If StartBit is greater than 31, then ASSERT().
1084 If EndBit is greater than 31, then ASSERT().
1085 If EndBit is less than StartBit, then ASSERT().
1086 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
1088 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
1089 @param StartBit The ordinal of the least significant bit in the bit field.
1091 @param EndBit The ordinal of the most significant bit in the bit field.
1093 @param AndData The value to AND with the PCI configuration register.
1095 @return The value written back to the PCI configuration register.
1100 S3PciSegmentBitFieldAnd32 (
1107 return InternalSavePciSegmentWrite32ValueToBootScript (Address
, PciSegmentBitFieldAnd32 (Address
, StartBit
, EndBit
, AndData
));
1111 Reads a bit field in a 32-bit port, performs a bitwise AND followed by a
1112 bitwise OR, writes the result back to the bit field in the 32-bit port,
1113 and saves the value in the S3 script to be replayed on S3 resume.
1115 Reads the 32-bit PCI configuration register specified by Address, performs a
1116 bitwise AND followed by a bitwise OR between the read result and
1117 the value specified by AndData, and writes the result to the 32-bit PCI
1118 configuration register specified by Address. The value written to the PCI
1119 configuration register is returned. This function must guarantee that all PCI
1120 read and write operations are serialized. Extra left bits in both AndData and
1121 OrData are stripped.
1123 If any reserved bits in Address are set, then ASSERT().
1124 If StartBit is greater than 31, then ASSERT().
1125 If EndBit is greater than 31, then ASSERT().
1126 If EndBit is less than StartBit, then ASSERT().
1127 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
1128 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
1130 @param Address PCI configuration register to write.
1131 @param StartBit The ordinal of the least significant bit in the bit field.
1133 @param EndBit The ordinal of the most significant bit in the bit field.
1135 @param AndData The value to AND with the PCI configuration register.
1136 @param OrData The value to OR with the result of the AND operation.
1138 @return The value written back to the PCI configuration register.
1143 S3PciSegmentBitFieldAndThenOr32 (
1151 return InternalSavePciSegmentWrite32ValueToBootScript (Address
, PciSegmentBitFieldAndThenOr32 (Address
, StartBit
, EndBit
, AndData
, OrData
));
1155 Reads a range of PCI configuration registers into a caller supplied buffer,
1156 and saves the value in the S3 script to be replayed on S3 resume.
1158 Reads the range of PCI configuration registers specified by StartAddress and
1159 Size into the buffer specified by Buffer. This function only allows the PCI
1160 configuration registers from a single PCI function to be read. Size is
1161 returned. When possible 32-bit PCI configuration read cycles are used to read
1162 from StartAdress to StartAddress + Size. Due to alignment restrictions, 8-bit
1163 and 16-bit PCI configuration read cycles may be used at the beginning and the
1166 If any reserved bits in StartAddress are set, then ASSERT().
1167 If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
1168 If Size > 0 and Buffer is NULL, then ASSERT().
1170 @param StartAddress Starting address that encodes the PCI Segment, Bus, Device,
1171 Function and Register.
1172 @param Size Size in bytes of the transfer.
1173 @param Buffer Pointer to a buffer receiving the data read.
1180 S3PciSegmentReadBuffer (
1181 IN UINT64 StartAddress
,
1186 RETURN_STATUS Status
;
1188 Status
= S3BootScriptSavePciCfg2Write (
1189 S3BootScriptWidthUint8
,
1190 RShiftU64 (StartAddress
, 32) & 0xffff,
1191 PCI_SEGMENT_LIB_ADDRESS_TO_S3_BOOT_SCRIPT_PCI_ADDRESS (StartAddress
),
1192 PciSegmentReadBuffer (StartAddress
, Size
, Buffer
),
1195 ASSERT_RETURN_ERROR (Status
);
1200 Copies the data in a caller supplied buffer to a specified range of PCI
1201 configuration space, and saves the value in the S3 script to be replayed on S3
1204 Writes the range of PCI configuration registers specified by StartAddress and
1205 Size from the buffer specified by Buffer. This function only allows the PCI
1206 configuration registers from a single PCI function to be written. Size is
1207 returned. When possible 32-bit PCI configuration write cycles are used to
1208 write from StartAdress to StartAddress + Size. Due to alignment restrictions,
1209 8-bit and 16-bit PCI configuration write cycles may be used at the beginning
1210 and the end of the range.
1212 If any reserved bits in StartAddress are set, then ASSERT().
1213 If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
1214 If Size > 0 and Buffer is NULL, then ASSERT().
1216 @param StartAddress Starting address that encodes the PCI Segment, Bus, Device,
1217 Function and Register.
1218 @param Size Size in bytes of the transfer.
1219 @param Buffer Pointer to a buffer containing the data to write.
1221 @return The parameter of Size.
1226 S3PciSegmentWriteBuffer (
1227 IN UINT64 StartAddress
,
1232 RETURN_STATUS Status
;
1234 Status
= S3BootScriptSavePciCfg2Write (
1235 S3BootScriptWidthUint8
,
1236 RShiftU64 (StartAddress
, 32) & 0xffff,
1237 PCI_SEGMENT_LIB_ADDRESS_TO_S3_BOOT_SCRIPT_PCI_ADDRESS (StartAddress
),
1238 PciSegmentWriteBuffer (StartAddress
, Size
, Buffer
),
1241 ASSERT_RETURN_ERROR (Status
);