2 PCI Segment Library implementation using PCI CFG2 PPI.
4 Copyright (c) 2007 - 2009, Intel Corporation. All rights reserved.<BR>
5 This program and the accompanying materials are
6 licensed and made available under the terms and conditions of
7 the BSD License which accompanies this distribution. The full
8 text of the license may be found at
9 http://opensource.org/licenses/bsd-license.php.
11 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
18 #include <Ppi/PciCfg2.h>
20 #include <Library/PciSegmentLib.h>
21 #include <Library/BaseLib.h>
22 #include <Library/PeiServicesTablePointerLib.h>
23 #include <Library/DebugLib.h>
24 #include <Library/PeiServicesLib.h>
27 Assert the validity of a PCI Segment address.
28 A valid PCI Segment address should not contain 1's in bits 28..31 and 48..63
30 @param A The address to validate.
31 @param M Additional bits to assert to be zero.
34 #define ASSERT_INVALID_PCI_SEGMENT_ADDRESS(A,M) \
35 ASSERT (((A) & (0xffff0000f0000000ULL | (M))) == 0)
38 Translate PCI Lib address into format of PCI CFG2 PPI.
40 @param A The address that encodes the PCI Bus, Device, Function and
44 #define PCI_TO_PCICFG2_ADDRESS(A) \
45 ((((UINT32)(A) << 4) & 0xff000000) | (((UINT32)(A) >> 4) & 0x00000700) | (((UINT32)(A) << 1) & 0x001f0000) | (LShiftU64((A) & 0xfff, 32)))
50 This internal function retrieves PCI CFG2 PPI from PPI database.
52 @param Address The address that encodes the PCI Segment, Bus, Device,
53 Function and Register.
55 @return The pointer to PCI CFG2 PPI.
58 EFI_PEI_PCI_CFG2_PPI
*
59 InternalGetPciCfg2Ppi (
65 EFI_PEI_PCI_CFG2_PPI
*PciCfg2Ppi
;
70 SegmentNumber
= BitFieldRead64 (Address
, 32, 63);
73 // Loop through all instances of the PPI and match segment number
76 Status
= PeiServicesLocatePpi(
82 ASSERT_EFI_ERROR (Status
);
84 } while (PciCfg2Ppi
->Segment
!= SegmentNumber
);
90 Internal worker function to read a PCI configuration register.
92 This function wraps EFI_PEI_PCI_CFG2_PPI.Read() service.
93 It reads and returns the PCI configuration register specified by Address,
94 the width of data is specified by Width.
96 @param Address The address that encodes the PCI Bus, Device, Function and
98 @param Width The width of data to read
100 @return The value read from the PCI configuration register.
104 PeiPciSegmentLibPciCfg2ReadWorker (
106 IN EFI_PEI_PCI_CFG_PPI_WIDTH Width
110 CONST EFI_PEI_PCI_CFG2_PPI
*PciCfg2Ppi
;
111 UINT64 PciCfg2Address
;
113 PciCfg2Ppi
= InternalGetPciCfg2Ppi (Address
);
114 PciCfg2Address
= PCI_TO_PCICFG2_ADDRESS (Address
);
116 GetPeiServicesTablePointer (),
127 Internal worker function to writes a PCI configuration register.
129 This function wraps EFI_PEI_PCI_CFG2_PPI.Write() service.
130 It writes the PCI configuration register specified by Address with the
131 value specified by Data. The width of data is specifed by Width.
134 @param Address The address that encodes the PCI Bus, Device, Function and
136 @param Width The width of data to write
137 @param Data The value to write.
139 @return The value written to the PCI configuration register.
143 PeiPciSegmentLibPciCfg2WriteWorker (
145 IN EFI_PEI_PCI_CFG_PPI_WIDTH Width
,
149 CONST EFI_PEI_PCI_CFG2_PPI
*PciCfg2Ppi
;
150 UINT64 PciCfg2Address
;
152 PciCfg2Ppi
= InternalGetPciCfg2Ppi (Address
);
153 PciCfg2Address
= PCI_TO_PCICFG2_ADDRESS (Address
);
155 GetPeiServicesTablePointer (),
166 Register a PCI device so PCI configuration registers may be accessed after
167 SetVirtualAddressMap().
169 If any reserved bits in Address are set, then ASSERT().
171 @param Address The address that encodes the PCI Bus, Device, Function and
174 @retval RETURN_SUCCESS The PCI device was registered for runtime access.
175 @retval RETURN_UNSUPPORTED An attempt was made to call this function
176 after ExitBootServices().
177 @retval RETURN_UNSUPPORTED The resources required to access the PCI device
178 at runtime could not be mapped.
179 @retval RETURN_OUT_OF_RESOURCES There are not enough resources available to
180 complete the registration.
185 PciSegmentRegisterForRuntimeAccess (
189 ASSERT_INVALID_PCI_SEGMENT_ADDRESS (Address
, 0);
190 return RETURN_UNSUPPORTED
;
194 Reads an 8-bit PCI configuration register.
196 Reads and returns the 8-bit PCI configuration register specified by Address.
197 This function must guarantee that all PCI read and write operations are serialized.
199 If any reserved bits in Address are set, then ASSERT().
201 @param Address The address that encodes the PCI Segment, Bus, Device, Function,
204 @return The 8-bit PCI configuration register specified by Address.
213 ASSERT_INVALID_PCI_SEGMENT_ADDRESS (Address
, 0);
215 return (UINT8
) PeiPciSegmentLibPciCfg2ReadWorker (Address
, EfiPeiPciCfgWidthUint8
);
219 Writes an 8-bit PCI configuration register.
221 Writes the 8-bit PCI configuration register specified by Address with the value specified by Value.
222 Value is returned. This function must guarantee that all PCI read and write operations are serialized.
224 If any reserved bits in Address are set, then ASSERT().
226 @param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register.
227 @param Value The value to write.
229 @return The value written to the PCI configuration register.
239 ASSERT_INVALID_PCI_SEGMENT_ADDRESS (Address
, 0);
241 return (UINT8
) PeiPciSegmentLibPciCfg2WriteWorker (Address
, EfiPeiPciCfgWidthUint8
, Value
);
245 Performs a bitwise OR of an 8-bit PCI configuration register with an 8-bit value.
247 Reads the 8-bit PCI configuration register specified by Address,
248 performs a bitwise OR between the read result and the value specified by OrData,
249 and writes the result to the 8-bit PCI configuration register specified by Address.
250 The value written to the PCI configuration register is returned.
251 This function must guarantee that all PCI read and write operations are serialized.
253 If any reserved bits in Address are set, then ASSERT().
255 @param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register.
256 @param OrData The value to OR with the PCI configuration register.
258 @return The value written to the PCI configuration register.
268 return PciSegmentWrite8 (Address
, (UINT8
) (PciSegmentRead8 (Address
) | OrData
));
272 Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit value.
274 Reads the 8-bit PCI configuration register specified by Address,
275 performs a bitwise AND between the read result and the value specified by AndData,
276 and writes the result to the 8-bit PCI configuration register specified by Address.
277 The value written to the PCI configuration register is returned.
278 This function must guarantee that all PCI read and write operations are serialized.
279 If any reserved bits in Address are set, then ASSERT().
281 @param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register.
282 @param AndData The value to AND with the PCI configuration register.
284 @return The value written to the PCI configuration register.
294 return PciSegmentWrite8 (Address
, (UINT8
) (PciSegmentRead8 (Address
) & AndData
));
298 Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit value,
299 followed a bitwise OR with another 8-bit value.
301 Reads the 8-bit PCI configuration register specified by Address,
302 performs a bitwise AND between the read result and the value specified by AndData,
303 performs a bitwise OR between the result of the AND operation and the value specified by OrData,
304 and writes the result to the 8-bit PCI configuration register specified by Address.
305 The value written to the PCI configuration register is returned.
306 This function must guarantee that all PCI read and write operations are serialized.
308 If any reserved bits in Address are set, then ASSERT().
310 @param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register.
311 @param AndData The value to AND with the PCI configuration register.
312 @param OrData The value to OR with the PCI configuration register.
314 @return The value written to the PCI configuration register.
319 PciSegmentAndThenOr8 (
325 return PciSegmentWrite8 (Address
, (UINT8
) ((PciSegmentRead8 (Address
) & AndData
) | OrData
));
329 Reads a bit field of a PCI configuration register.
331 Reads the bit field in an 8-bit PCI configuration register. The bit field is
332 specified by the StartBit and the EndBit. The value of the bit field is
335 If any reserved bits in Address are set, then ASSERT().
336 If StartBit is greater than 7, then ASSERT().
337 If EndBit is greater than 7, then ASSERT().
338 If EndBit is less than StartBit, then ASSERT().
340 @param Address The PCI configuration register to read.
341 @param StartBit The ordinal of the least significant bit in the bit field.
343 @param EndBit The ordinal of the most significant bit in the bit field.
346 @return The value of the bit field read from the PCI configuration register.
351 PciSegmentBitFieldRead8 (
357 return BitFieldRead8 (PciSegmentRead8 (Address
), StartBit
, EndBit
);
361 Writes a bit field to a PCI configuration register.
363 Writes Value to the bit field of the PCI configuration register. The bit
364 field is specified by the StartBit and the EndBit. All other bits in the
365 destination PCI configuration register are preserved. The new value of the
366 8-bit register is returned.
368 If any reserved bits in Address are set, then ASSERT().
369 If StartBit is greater than 7, then ASSERT().
370 If EndBit is greater than 7, then ASSERT().
371 If EndBit is less than StartBit, then ASSERT().
373 @param Address The PCI configuration register to write.
374 @param StartBit The ordinal of the least significant bit in the bit field.
376 @param EndBit The ordinal of the most significant bit in the bit field.
378 @param Value The new value of the bit field.
380 @return The value written back to the PCI configuration register.
385 PciSegmentBitFieldWrite8 (
392 return PciSegmentWrite8 (
394 BitFieldWrite8 (PciSegmentRead8 (Address
), StartBit
, EndBit
, Value
)
399 Reads a bit field in an 8-bit PCI configuration, performs a bitwise OR, and
400 writes the result back to the bit field in the 8-bit port.
402 Reads the 8-bit PCI configuration register specified by Address, performs a
403 bitwise OR between the read result and the value specified by
404 OrData, and writes the result to the 8-bit PCI configuration register
405 specified by Address. The value written to the PCI configuration register is
406 returned. This function must guarantee that all PCI read and write operations
407 are serialized. Extra left bits in OrData are stripped.
409 If any reserved bits in Address are set, then ASSERT().
410 If StartBit is greater than 7, then ASSERT().
411 If EndBit is greater than 7, then ASSERT().
412 If EndBit is less than StartBit, then ASSERT().
414 @param Address The PCI configuration register to write.
415 @param StartBit The ordinal of the least significant bit in the bit field.
417 @param EndBit The ordinal of the most significant bit in the bit field.
419 @param OrData The value to OR with the PCI configuration register.
421 @return The value written back to the PCI configuration register.
426 PciSegmentBitFieldOr8 (
433 return PciSegmentWrite8 (
435 BitFieldOr8 (PciSegmentRead8 (Address
), StartBit
, EndBit
, OrData
)
440 Reads a bit field in an 8-bit PCI configuration register, performs a bitwise
441 AND, and writes the result back to the bit field in the 8-bit register.
443 Reads the 8-bit PCI configuration register specified by Address, performs a
444 bitwise AND between the read result and the value specified by AndData, and
445 writes the result to the 8-bit PCI configuration register specified by
446 Address. The value written to the PCI configuration register is returned.
447 This function must guarantee that all PCI read and write operations are
448 serialized. Extra left bits in AndData are stripped.
450 If any reserved bits in Address are set, then ASSERT().
451 If StartBit is greater than 7, then ASSERT().
452 If EndBit is greater than 7, then ASSERT().
453 If EndBit is less than StartBit, then ASSERT().
455 @param Address The PCI configuration register to write.
456 @param StartBit The ordinal of the least significant bit in the bit field.
458 @param EndBit The ordinal of the most significant bit in the bit field.
460 @param AndData The value to AND with the PCI configuration register.
462 @return The value written back to the PCI configuration register.
467 PciSegmentBitFieldAnd8 (
474 return PciSegmentWrite8 (
476 BitFieldAnd8 (PciSegmentRead8 (Address
), StartBit
, EndBit
, AndData
)
481 Reads a bit field in an 8-bit port, performs a bitwise AND followed by a
482 bitwise OR, and writes the result back to the bit field in the
485 Reads the 8-bit PCI configuration register specified by Address, performs a
486 bitwise AND followed by a bitwise OR between the read result and
487 the value specified by AndData, and writes the result to the 8-bit PCI
488 configuration register specified by Address. The value written to the PCI
489 configuration register is returned. This function must guarantee that all PCI
490 read and write operations are serialized. Extra left bits in both AndData and
493 If any reserved bits in Address are set, then ASSERT().
494 If StartBit is greater than 7, then ASSERT().
495 If EndBit is greater than 7, then ASSERT().
496 If EndBit is less than StartBit, then ASSERT().
498 @param Address The PCI configuration register to write.
499 @param StartBit The ordinal of the least significant bit in the bit field.
501 @param EndBit The ordinal of the most significant bit in the bit field.
503 @param AndData The value to AND with the PCI configuration register.
504 @param OrData The value to OR with the result of the AND operation.
506 @return The value written back to the PCI configuration register.
511 PciSegmentBitFieldAndThenOr8 (
519 return PciSegmentWrite8 (
521 BitFieldAndThenOr8 (PciSegmentRead8 (Address
), StartBit
, EndBit
, AndData
, OrData
)
526 Reads a 16-bit PCI configuration register.
528 Reads and returns the 16-bit PCI configuration register specified by Address.
529 This function must guarantee that all PCI read and write operations are serialized.
531 If any reserved bits in Address are set, then ASSERT().
532 If Address is not aligned on a 16-bit boundary, then ASSERT().
534 @param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register.
536 @return The 16-bit PCI configuration register specified by Address.
545 ASSERT_INVALID_PCI_SEGMENT_ADDRESS (Address
, 1);
547 return (UINT16
) PeiPciSegmentLibPciCfg2ReadWorker (Address
, EfiPeiPciCfgWidthUint16
);
551 Writes a 16-bit PCI configuration register.
553 Writes the 16-bit PCI configuration register specified by Address with the value specified by Value.
554 Value is returned. This function must guarantee that all PCI read and write operations are serialized.
556 If any reserved bits in Address are set, then ASSERT().
557 If Address is not aligned on a 16-bit boundary, then ASSERT().
559 @param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register.
560 @param Value The value to write.
562 @return The parameter of Value.
572 ASSERT_INVALID_PCI_SEGMENT_ADDRESS (Address
, 1);
574 return (UINT16
) PeiPciSegmentLibPciCfg2WriteWorker (Address
, EfiPeiPciCfgWidthUint16
, Value
);
578 Performs a bitwise OR of a 16-bit PCI configuration register with
581 Reads the 16-bit PCI configuration register specified by Address, performs a
582 bitwise OR between the read result and the value specified by
583 OrData, and writes the result to the 16-bit PCI configuration register
584 specified by Address. The value written to the PCI configuration register is
585 returned. This function must guarantee that all PCI read and write operations
588 If any reserved bits in Address are set, then ASSERT().
589 If Address is not aligned on a 16-bit boundary, then ASSERT().
591 @param Address The address that encodes the PCI Segment, Bus, Device, Function and
593 @param OrData The value to OR with the PCI configuration register.
595 @return The value written back to the PCI configuration register.
605 return PciSegmentWrite16 (Address
, (UINT16
) (PciSegmentRead16 (Address
) | OrData
));
609 Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit value.
611 Reads the 16-bit PCI configuration register specified by Address,
612 performs a bitwise AND between the read result and the value specified by AndData,
613 and writes the result to the 16-bit PCI configuration register specified by Address.
614 The value written to the PCI configuration register is returned.
615 This function must guarantee that all PCI read and write operations are serialized.
617 If any reserved bits in Address are set, then ASSERT().
618 If Address is not aligned on a 16-bit boundary, then ASSERT().
620 @param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register.
621 @param AndData The value to AND with the PCI configuration register.
623 @return The value written to the PCI configuration register.
633 return PciSegmentWrite16 (Address
, (UINT16
) (PciSegmentRead16 (Address
) & AndData
));
637 Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit value,
638 followed a bitwise OR with another 16-bit value.
640 Reads the 16-bit PCI configuration register specified by Address,
641 performs a bitwise AND between the read result and the value specified by AndData,
642 performs a bitwise OR between the result of the AND operation and the value specified by OrData,
643 and writes the result to the 16-bit PCI configuration register specified by Address.
644 The value written to the PCI configuration register is returned.
645 This function must guarantee that all PCI read and write operations are serialized.
647 If any reserved bits in Address are set, then ASSERT().
648 If Address is not aligned on a 16-bit boundary, then ASSERT().
650 @param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register.
651 @param AndData The value to AND with the PCI configuration register.
652 @param OrData The value to OR with the PCI configuration register.
654 @return The value written to the PCI configuration register.
659 PciSegmentAndThenOr16 (
665 return PciSegmentWrite16 (Address
, (UINT16
) ((PciSegmentRead16 (Address
) & AndData
) | OrData
));
669 Reads a bit field of a PCI configuration register.
671 Reads the bit field in a 16-bit PCI configuration register. The bit field is
672 specified by the StartBit and the EndBit. The value of the bit field is
675 If any reserved bits in Address are set, then ASSERT().
676 If Address is not aligned on a 16-bit boundary, then ASSERT().
677 If StartBit is greater than 15, then ASSERT().
678 If EndBit is greater than 15, then ASSERT().
679 If EndBit is less than StartBit, then ASSERT().
681 @param Address The PCI configuration register to read.
682 @param StartBit The ordinal of the least significant bit in the bit field.
684 @param EndBit The ordinal of the most significant bit in the bit field.
687 @return The value of the bit field read from the PCI configuration register.
692 PciSegmentBitFieldRead16 (
698 return BitFieldRead16 (PciSegmentRead16 (Address
), StartBit
, EndBit
);
702 Writes a bit field to a PCI configuration register.
704 Writes Value to the bit field of the PCI configuration register. The bit
705 field is specified by the StartBit and the EndBit. All other bits in the
706 destination PCI configuration register are preserved. The new value of the
707 16-bit register is returned.
709 If any reserved bits in Address are set, then ASSERT().
710 If Address is not aligned on a 16-bit boundary, then ASSERT().
711 If StartBit is greater than 15, then ASSERT().
712 If EndBit is greater than 15, then ASSERT().
713 If EndBit is less than StartBit, then ASSERT().
715 @param Address The PCI configuration register to write.
716 @param StartBit The ordinal of the least significant bit in the bit field.
718 @param EndBit The ordinal of the most significant bit in the bit field.
720 @param Value The new value of the bit field.
722 @return The value written back to the PCI configuration register.
727 PciSegmentBitFieldWrite16 (
734 return PciSegmentWrite16 (
736 BitFieldWrite16 (PciSegmentRead16 (Address
), StartBit
, EndBit
, Value
)
741 Reads the 16-bit PCI configuration register specified by Address,
742 performs a bitwise OR between the read result and the value specified by OrData,
743 and writes the result to the 16-bit PCI configuration register specified by Address.
745 If any reserved bits in Address are set, then ASSERT().
746 If Address is not aligned on a 16-bit boundary, then ASSERT().
747 If StartBit is greater than 15, then ASSERT().
748 If EndBit is greater than 15, then ASSERT().
749 If EndBit is less than StartBit, then ASSERT().
751 @param Address The PCI configuration register to write.
752 @param StartBit The ordinal of the least significant bit in the bit field.
754 @param EndBit The ordinal of the most significant bit in the bit field.
756 @param OrData The value to OR with the PCI configuration register.
758 @return The value written back to the PCI configuration register.
763 PciSegmentBitFieldOr16 (
770 return PciSegmentWrite16 (
772 BitFieldOr16 (PciSegmentRead16 (Address
), StartBit
, EndBit
, OrData
)
777 Reads a bit field in a 16-bit PCI configuration, performs a bitwise OR,
778 and writes the result back to the bit field in the 16-bit port.
780 Reads the 16-bit PCI configuration register specified by Address,
781 performs a bitwise OR between the read result and the value specified by OrData,
782 and writes the result to the 16-bit PCI configuration register specified by Address.
783 The value written to the PCI configuration register is returned.
784 This function must guarantee that all PCI read and write operations are serialized.
785 Extra left bits in OrData are stripped.
787 If any reserved bits in Address are set, then ASSERT().
788 If Address is not aligned on a 16-bit boundary, then ASSERT().
789 If StartBit is greater than 7, then ASSERT().
790 If EndBit is greater than 7, then ASSERT().
791 If EndBit is less than StartBit, then ASSERT().
793 @param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register.
794 @param StartBit The ordinal of the least significant bit in the bit field.
795 The ordinal of the least significant bit in a byte is bit 0.
796 @param EndBit The ordinal of the most significant bit in the bit field.
797 The ordinal of the most significant bit in a byte is bit 7.
798 @param AndData The value to AND with the read value from the PCI configuration register.
800 @return The value written to the PCI configuration register.
805 PciSegmentBitFieldAnd16 (
812 return PciSegmentWrite16 (
814 BitFieldAnd16 (PciSegmentRead16 (Address
), StartBit
, EndBit
, AndData
)
819 Reads a bit field in a 16-bit port, performs a bitwise AND followed by a
820 bitwise OR, and writes the result back to the bit field in the
823 Reads the 16-bit PCI configuration register specified by Address, performs a
824 bitwise AND followed by a bitwise OR between the read result and
825 the value specified by AndData, and writes the result to the 16-bit PCI
826 configuration register specified by Address. The value written to the PCI
827 configuration register is returned. This function must guarantee that all PCI
828 read and write operations are serialized. Extra left bits in both AndData and
831 If any reserved bits in Address are set, then ASSERT().
832 If StartBit is greater than 15, then ASSERT().
833 If EndBit is greater than 15, then ASSERT().
834 If EndBit is less than StartBit, then ASSERT().
836 @param Address The PCI configuration register to write.
837 @param StartBit The ordinal of the least significant bit in the bit field.
839 @param EndBit The ordinal of the most significant bit in the bit field.
841 @param AndData The value to AND with the PCI configuration register.
842 @param OrData The value to OR with the result of the AND operation.
844 @return The value written back to the PCI configuration register.
849 PciSegmentBitFieldAndThenOr16 (
857 return PciSegmentWrite16 (
859 BitFieldAndThenOr16 (PciSegmentRead16 (Address
), StartBit
, EndBit
, AndData
, OrData
)
864 Reads a 32-bit PCI configuration register.
866 Reads and returns the 32-bit PCI configuration register specified by Address.
867 This function must guarantee that all PCI read and write operations are serialized.
869 If any reserved bits in Address are set, then ASSERT().
870 If Address is not aligned on a 32-bit boundary, then ASSERT().
872 @param Address The address that encodes the PCI Segment, Bus, Device, Function,
875 @return The 32-bit PCI configuration register specified by Address.
884 ASSERT_INVALID_PCI_SEGMENT_ADDRESS (Address
, 3);
886 return PeiPciSegmentLibPciCfg2ReadWorker (Address
, EfiPeiPciCfgWidthUint32
);
890 Writes a 32-bit PCI configuration register.
892 Writes the 32-bit PCI configuration register specified by Address with the value specified by Value.
893 Value is returned. This function must guarantee that all PCI read and write operations are serialized.
895 If any reserved bits in Address are set, then ASSERT().
896 If Address is not aligned on a 32-bit boundary, then ASSERT().
898 @param Address The address that encodes the PCI Segment, Bus, Device,
899 Function, and Register.
900 @param Value The value to write.
902 @return The parameter of Value.
912 ASSERT_INVALID_PCI_SEGMENT_ADDRESS (Address
, 3);
914 return PeiPciSegmentLibPciCfg2WriteWorker (Address
, EfiPeiPciCfgWidthUint32
, Value
);
918 Performs a bitwise OR of a 32-bit PCI configuration register with a 32-bit value.
920 Reads the 32-bit PCI configuration register specified by Address,
921 performs a bitwise OR between the read result and the value specified by OrData,
922 and writes the result to the 32-bit PCI configuration register specified by Address.
923 The value written to the PCI configuration register is returned.
924 This function must guarantee that all PCI read and write operations are serialized.
926 If any reserved bits in Address are set, then ASSERT().
927 If Address is not aligned on a 32-bit boundary, then ASSERT().
929 @param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register.
930 @param OrData The value to OR with the PCI configuration register.
932 @return The value written to the PCI configuration register.
942 return PciSegmentWrite32 (Address
, PciSegmentRead32 (Address
) | OrData
);
946 Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit value.
948 Reads the 32-bit PCI configuration register specified by Address,
949 performs a bitwise AND between the read result and the value specified by AndData,
950 and writes the result to the 32-bit PCI configuration register specified by Address.
951 The value written to the PCI configuration register is returned.
952 This function must guarantee that all PCI read and write operations are serialized.
954 If any reserved bits in Address are set, then ASSERT().
955 If Address is not aligned on a 32-bit boundary, then ASSERT().
957 @param Address The address that encodes the PCI Segment, Bus, Device, Function,
959 @param AndData The value to AND with the PCI configuration register.
961 @return The value written to the PCI configuration register.
971 return PciSegmentWrite32 (Address
, PciSegmentRead32 (Address
) & AndData
);
975 Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit value,
976 followed a bitwise OR with another 32-bit value.
978 Reads the 32-bit PCI configuration register specified by Address,
979 performs a bitwise AND between the read result and the value specified by AndData,
980 performs a bitwise OR between the result of the AND operation and the value specified by OrData,
981 and writes the result to the 32-bit PCI configuration register specified by Address.
982 The value written to the PCI configuration register is returned.
983 This function must guarantee that all PCI read and write operations are serialized.
985 If any reserved bits in Address are set, then ASSERT().
986 If Address is not aligned on a 32-bit boundary, then ASSERT().
988 @param Address The address that encodes the PCI Segment, Bus, Device, Function,
990 @param AndData The value to AND with the PCI configuration register.
991 @param OrData The value to OR with the PCI configuration register.
993 @return The value written to the PCI configuration register.
998 PciSegmentAndThenOr32 (
1004 return PciSegmentWrite32 (Address
, (PciSegmentRead32 (Address
) & AndData
) | OrData
);
1008 Reads a bit field of a PCI configuration register.
1010 Reads the bit field in a 32-bit PCI configuration register. The bit field is
1011 specified by the StartBit and the EndBit. The value of the bit field is
1014 If any reserved bits in Address are set, then ASSERT().
1015 If Address is not aligned on a 32-bit boundary, then ASSERT().
1016 If StartBit is greater than 31, then ASSERT().
1017 If EndBit is greater than 31, then ASSERT().
1018 If EndBit is less than StartBit, then ASSERT().
1020 @param Address The PCI configuration register to read.
1021 @param StartBit The ordinal of the least significant bit in the bit field.
1023 @param EndBit The ordinal of the most significant bit in the bit field.
1026 @return The value of the bit field read from the PCI configuration register.
1031 PciSegmentBitFieldRead32 (
1037 return BitFieldRead32 (PciSegmentRead32 (Address
), StartBit
, EndBit
);
1041 Writes a bit field to a PCI configuration register.
1043 Writes Value to the bit field of the PCI configuration register. The bit
1044 field is specified by the StartBit and the EndBit. All other bits in the
1045 destination PCI configuration register are preserved. The new value of the
1046 32-bit register is returned.
1048 If any reserved bits in Address are set, then ASSERT().
1049 If Address is not aligned on a 32-bit boundary, then ASSERT().
1050 If StartBit is greater than 31, then ASSERT().
1051 If EndBit is greater than 31, then ASSERT().
1052 If EndBit is less than StartBit, then ASSERT().
1054 @param Address The PCI configuration register to write.
1055 @param StartBit The ordinal of the least significant bit in the bit field.
1057 @param EndBit The ordinal of the most significant bit in the bit field.
1059 @param Value The new value of the bit field.
1061 @return The value written back to the PCI configuration register.
1066 PciSegmentBitFieldWrite32 (
1073 return PciSegmentWrite32 (
1075 BitFieldWrite32 (PciSegmentRead32 (Address
), StartBit
, EndBit
, Value
)
1080 Reads a bit field in a 32-bit PCI configuration, performs a bitwise OR, and
1081 writes the result back to the bit field in the 32-bit port.
1083 Reads the 32-bit PCI configuration register specified by Address, performs a
1084 bitwise OR between the read result and the value specified by
1085 OrData, and writes the result to the 32-bit PCI configuration register
1086 specified by Address. The value written to the PCI configuration register is
1087 returned. This function must guarantee that all PCI read and write operations
1088 are serialized. Extra left bits in OrData are stripped.
1090 If any reserved bits in Address are set, then ASSERT().
1091 If StartBit is greater than 31, then ASSERT().
1092 If EndBit is greater than 31, then ASSERT().
1093 If EndBit is less than StartBit, then ASSERT().
1095 @param Address The PCI configuration register to write.
1096 @param StartBit The ordinal of the least significant bit in the bit field.
1098 @param EndBit The ordinal of the most significant bit in the bit field.
1100 @param OrData The value to OR with the PCI configuration register.
1102 @return The value written back to the PCI configuration register.
1107 PciSegmentBitFieldOr32 (
1114 return PciSegmentWrite32 (
1116 BitFieldOr32 (PciSegmentRead32 (Address
), StartBit
, EndBit
, OrData
)
1121 Reads a bit field in a 32-bit PCI configuration register, performs a bitwise
1122 AND, and writes the result back to the bit field in the 32-bit register.
1125 Reads the 32-bit PCI configuration register specified by Address, performs a bitwise
1126 AND between the read result and the value specified by AndData, and writes the result
1127 to the 32-bit PCI configuration register specified by Address. The value written to
1128 the PCI configuration register is returned. This function must guarantee that all PCI
1129 read and write operations are serialized. Extra left bits in AndData are stripped.
1130 If any reserved bits in Address are set, then ASSERT().
1131 If Address is not aligned on a 32-bit boundary, then ASSERT().
1132 If StartBit is greater than 31, then ASSERT().
1133 If EndBit is greater than 31, then ASSERT().
1134 If EndBit is less than StartBit, then ASSERT().
1137 @param Address The PCI configuration register to write.
1138 @param StartBit The ordinal of the least significant bit in the bit field.
1140 @param EndBit The ordinal of the most significant bit in the bit field.
1142 @param AndData The value to AND with the PCI configuration register.
1144 @return The value written back to the PCI configuration register.
1149 PciSegmentBitFieldAnd32 (
1156 return PciSegmentWrite32 (
1158 BitFieldAnd32 (PciSegmentRead32 (Address
), StartBit
, EndBit
, AndData
)
1163 Reads a bit field in a 32-bit port, performs a bitwise AND followed by a
1164 bitwise OR, and writes the result back to the bit field in the
1167 Reads the 32-bit PCI configuration register specified by Address, performs a
1168 bitwise AND followed by a bitwise OR between the read result and
1169 the value specified by AndData, and writes the result to the 32-bit PCI
1170 configuration register specified by Address. The value written to the PCI
1171 configuration register is returned. This function must guarantee that all PCI
1172 read and write operations are serialized. Extra left bits in both AndData and
1173 OrData are stripped.
1175 If any reserved bits in Address are set, then ASSERT().
1176 If StartBit is greater than 31, then ASSERT().
1177 If EndBit is greater than 31, then ASSERT().
1178 If EndBit is less than StartBit, then ASSERT().
1180 @param Address The PCI configuration register to write.
1181 @param StartBit The ordinal of the least significant bit in the bit field.
1183 @param EndBit The ordinal of the most significant bit in the bit field.
1185 @param AndData The value to AND with the PCI configuration register.
1186 @param OrData The value to OR with the result of the AND operation.
1188 @return The value written back to the PCI configuration register.
1193 PciSegmentBitFieldAndThenOr32 (
1201 return PciSegmentWrite32 (
1203 BitFieldAndThenOr32 (PciSegmentRead32 (Address
), StartBit
, EndBit
, AndData
, OrData
)
1208 Reads a range of PCI configuration registers into a caller supplied buffer.
1210 Reads the range of PCI configuration registers specified by StartAddress and
1211 Size into the buffer specified by Buffer. This function only allows the PCI
1212 configuration registers from a single PCI function to be read. Size is
1213 returned. When possible 32-bit PCI configuration read cycles are used to read
1214 from StartAdress to StartAddress + Size. Due to alignment restrictions, 8-bit
1215 and 16-bit PCI configuration read cycles may be used at the beginning and the
1218 If any reserved bits in StartAddress are set, then ASSERT().
1219 If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
1220 If Size > 0 and Buffer is NULL, then ASSERT().
1222 @param StartAddress The starting address that encodes the PCI Segment, Bus,
1223 Device, Function and Register.
1224 @param Size The size in bytes of the transfer.
1225 @param Buffer The pointer to a buffer receiving the data read.
1232 PciSegmentReadBuffer (
1233 IN UINT64 StartAddress
,
1240 ASSERT_INVALID_PCI_SEGMENT_ADDRESS (StartAddress
, 0);
1241 ASSERT (((StartAddress
& 0xFFF) + Size
) <= 0x1000);
1247 ASSERT (Buffer
!= NULL
);
1250 // Save Size for return
1254 if ((StartAddress
& BIT0
) != 0) {
1256 // Read a byte if StartAddress is byte aligned
1258 *(volatile UINT8
*)Buffer
= PciSegmentRead8 (StartAddress
);
1259 StartAddress
+= sizeof (UINT8
);
1260 Size
-= sizeof (UINT8
);
1261 Buffer
= (UINT8
*)Buffer
+ 1;
1264 if (Size
>= sizeof (UINT16
) && (StartAddress
& BIT1
) != 0) {
1266 // Read a word if StartAddress is word aligned
1268 WriteUnaligned16 (Buffer
, PciSegmentRead16 (StartAddress
));
1269 StartAddress
+= sizeof (UINT16
);
1270 Size
-= sizeof (UINT16
);
1271 Buffer
= (UINT16
*)Buffer
+ 1;
1274 while (Size
>= sizeof (UINT32
)) {
1276 // Read as many double words as possible
1278 WriteUnaligned32 (Buffer
, PciSegmentRead32 (StartAddress
));
1279 StartAddress
+= sizeof (UINT32
);
1280 Size
-= sizeof (UINT32
);
1281 Buffer
= (UINT32
*)Buffer
+ 1;
1284 if (Size
>= sizeof (UINT16
)) {
1286 // Read the last remaining word if exist
1288 WriteUnaligned16 (Buffer
, PciSegmentRead16 (StartAddress
));
1289 StartAddress
+= sizeof (UINT16
);
1290 Size
-= sizeof (UINT16
);
1291 Buffer
= (UINT16
*)Buffer
+ 1;
1294 if (Size
>= sizeof (UINT8
)) {
1296 // Read the last remaining byte if exist
1298 *(volatile UINT8
*)Buffer
= PciSegmentRead8 (StartAddress
);
1306 Copies the data in a caller supplied buffer to a specified range of PCI
1307 configuration space.
1309 Writes the range of PCI configuration registers specified by StartAddress and
1310 Size from the buffer specified by Buffer. This function only allows the PCI
1311 configuration registers from a single PCI function to be written. Size is
1312 returned. When possible 32-bit PCI configuration write cycles are used to
1313 write from StartAdress to StartAddress + Size. Due to alignment restrictions,
1314 8-bit and 16-bit PCI configuration write cycles may be used at the beginning
1315 and the end of the range.
1317 If any reserved bits in StartAddress are set, then ASSERT().
1318 If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
1319 If Size > 0 and Buffer is NULL, then ASSERT().
1321 @param StartAddress The starting address that encodes the PCI Segment, Bus,
1322 Device, Function and Register.
1323 @param Size The size in bytes of the transfer.
1324 @param Buffer The pointer to a buffer containing the data to write.
1326 @return The parameter of Size.
1331 PciSegmentWriteBuffer (
1332 IN UINT64 StartAddress
,
1339 ASSERT_INVALID_PCI_SEGMENT_ADDRESS (StartAddress
, 0);
1340 ASSERT (((StartAddress
& 0xFFF) + Size
) <= 0x1000);
1346 ASSERT (Buffer
!= NULL
);
1349 // Save Size for return
1353 if ((StartAddress
& BIT0
) != 0) {
1355 // Write a byte if StartAddress is byte aligned
1357 PciSegmentWrite8 (StartAddress
, *(UINT8
*)Buffer
);
1358 StartAddress
+= sizeof (UINT8
);
1359 Size
-= sizeof (UINT8
);
1360 Buffer
= (UINT8
*)Buffer
+ 1;
1363 if (Size
>= sizeof (UINT16
) && (StartAddress
& BIT1
) != 0) {
1365 // Write a word if StartAddress is word aligned
1367 PciSegmentWrite16 (StartAddress
, ReadUnaligned16 (Buffer
));
1368 StartAddress
+= sizeof (UINT16
);
1369 Size
-= sizeof (UINT16
);
1370 Buffer
= (UINT16
*)Buffer
+ 1;
1373 while (Size
>= sizeof (UINT32
)) {
1375 // Write as many double words as possible
1377 PciSegmentWrite32 (StartAddress
, ReadUnaligned32 (Buffer
));
1378 StartAddress
+= sizeof (UINT32
);
1379 Size
-= sizeof (UINT32
);
1380 Buffer
= (UINT32
*)Buffer
+ 1;
1383 if (Size
>= sizeof (UINT16
)) {
1385 // Write the last remaining word if exist
1387 PciSegmentWrite16 (StartAddress
, ReadUnaligned16 (Buffer
));
1388 StartAddress
+= sizeof (UINT16
);
1389 Size
-= sizeof (UINT16
);
1390 Buffer
= (UINT16
*)Buffer
+ 1;
1393 if (Size
>= sizeof (UINT8
)) {
1395 // Write the last remaining byte if exist
1397 PciSegmentWrite8 (StartAddress
, *(UINT8
*)Buffer
);