2 Fixes Intel Itanium(TM) specific relocation types.
4 Copyright (c) 2006, Intel Corporation
5 All rights reserved. This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
13 Module Name: PeCoffLoaderEx.c
17 #include "BasePeCoffLibInternals.h"
21 #define EXT_IMM64(Value, Address, Size, InstPos, ValPos) \
22 Value |= (((UINT64)((*(Address) >> InstPos) & (((UINT64)1 << Size) - 1))) << ValPos)
24 #define INS_IMM64(Value, Address, Size, InstPos, ValPos) \
25 *(UINT32*)Address = (*(UINT32*)Address & ~(((1 << Size) - 1) << InstPos)) | \
26 ((UINT32)((((UINT64)Value >> ValPos) & (((UINT64)1 << Size) - 1))) << InstPos)
28 #define IMM64_IMM7B_INST_WORD_X 3
29 #define IMM64_IMM7B_SIZE_X 7
30 #define IMM64_IMM7B_INST_WORD_POS_X 4
31 #define IMM64_IMM7B_VAL_POS_X 0
33 #define IMM64_IMM9D_INST_WORD_X 3
34 #define IMM64_IMM9D_SIZE_X 9
35 #define IMM64_IMM9D_INST_WORD_POS_X 18
36 #define IMM64_IMM9D_VAL_POS_X 7
38 #define IMM64_IMM5C_INST_WORD_X 3
39 #define IMM64_IMM5C_SIZE_X 5
40 #define IMM64_IMM5C_INST_WORD_POS_X 13
41 #define IMM64_IMM5C_VAL_POS_X 16
43 #define IMM64_IC_INST_WORD_X 3
44 #define IMM64_IC_SIZE_X 1
45 #define IMM64_IC_INST_WORD_POS_X 12
46 #define IMM64_IC_VAL_POS_X 21
48 #define IMM64_IMM41a_INST_WORD_X 1
49 #define IMM64_IMM41a_SIZE_X 10
50 #define IMM64_IMM41a_INST_WORD_POS_X 14
51 #define IMM64_IMM41a_VAL_POS_X 22
53 #define IMM64_IMM41b_INST_WORD_X 1
54 #define IMM64_IMM41b_SIZE_X 8
55 #define IMM64_IMM41b_INST_WORD_POS_X 24
56 #define IMM64_IMM41b_VAL_POS_X 32
58 #define IMM64_IMM41c_INST_WORD_X 2
59 #define IMM64_IMM41c_SIZE_X 23
60 #define IMM64_IMM41c_INST_WORD_POS_X 0
61 #define IMM64_IMM41c_VAL_POS_X 40
63 #define IMM64_SIGN_INST_WORD_X 3
64 #define IMM64_SIGN_SIZE_X 1
65 #define IMM64_SIGN_INST_WORD_POS_X 27
66 #define IMM64_SIGN_VAL_POS_X 63
69 Performs an Itanium-based specific relocation fixup.
71 @param Reloc Pointer to the relocation record.
72 @param Fixup Pointer to the address to fix up.
73 @param FixupData Pointer to a buffer to log the fixups.
74 @param Adjust The offset to adjust the fixup.
80 PeCoffLoaderRelocateImageEx (
83 IN OUT CHAR8
**FixupData
,
90 switch ((*Reloc
) >> 12) {
91 case EFI_IMAGE_REL_BASED_IA64_IMM64
:
94 // Align it to bundle address before fixing up the
95 // 64-bit immediate value of the movl instruction.
98 Fixup
= (CHAR8
*)((UINTN
) Fixup
& (UINTN
) ~(15));
102 // Extract the lower 32 bits of IMM64 from bundle
105 (UINT32
*)Fixup
+ IMM64_IMM7B_INST_WORD_X
,
107 IMM64_IMM7B_INST_WORD_POS_X
,
108 IMM64_IMM7B_VAL_POS_X
112 (UINT32
*)Fixup
+ IMM64_IMM9D_INST_WORD_X
,
114 IMM64_IMM9D_INST_WORD_POS_X
,
115 IMM64_IMM9D_VAL_POS_X
119 (UINT32
*)Fixup
+ IMM64_IMM5C_INST_WORD_X
,
121 IMM64_IMM5C_INST_WORD_POS_X
,
122 IMM64_IMM5C_VAL_POS_X
126 (UINT32
*)Fixup
+ IMM64_IC_INST_WORD_X
,
128 IMM64_IC_INST_WORD_POS_X
,
133 (UINT32
*)Fixup
+ IMM64_IMM41a_INST_WORD_X
,
135 IMM64_IMM41a_INST_WORD_POS_X
,
136 IMM64_IMM41a_VAL_POS_X
140 // Update 64-bit address
145 // Insert IMM64 into bundle
148 ((UINT32
*)Fixup
+ IMM64_IMM7B_INST_WORD_X
),
150 IMM64_IMM7B_INST_WORD_POS_X
,
151 IMM64_IMM7B_VAL_POS_X
155 ((UINT32
*)Fixup
+ IMM64_IMM9D_INST_WORD_X
),
157 IMM64_IMM9D_INST_WORD_POS_X
,
158 IMM64_IMM9D_VAL_POS_X
162 ((UINT32
*)Fixup
+ IMM64_IMM5C_INST_WORD_X
),
164 IMM64_IMM5C_INST_WORD_POS_X
,
165 IMM64_IMM5C_VAL_POS_X
169 ((UINT32
*)Fixup
+ IMM64_IC_INST_WORD_X
),
171 IMM64_IC_INST_WORD_POS_X
,
176 ((UINT32
*)Fixup
+ IMM64_IMM41a_INST_WORD_X
),
178 IMM64_IMM41a_INST_WORD_POS_X
,
179 IMM64_IMM41a_VAL_POS_X
183 ((UINT32
*)Fixup
+ IMM64_IMM41b_INST_WORD_X
),
185 IMM64_IMM41b_INST_WORD_POS_X
,
186 IMM64_IMM41b_VAL_POS_X
190 ((UINT32
*)Fixup
+ IMM64_IMM41c_INST_WORD_X
),
192 IMM64_IMM41c_INST_WORD_POS_X
,
193 IMM64_IMM41c_VAL_POS_X
197 ((UINT32
*)Fixup
+ IMM64_SIGN_INST_WORD_X
),
199 IMM64_SIGN_INST_WORD_POS_X
,
203 F64
= (UINT64
*) Fixup
;
204 if (*FixupData
!= NULL
) {
205 *FixupData
= ALIGN_POINTER(*FixupData
, sizeof(UINT64
));
206 *(UINT64
*)(*FixupData
) = *F64
;
207 *FixupData
= *FixupData
+ sizeof(UINT64
);
212 return RETURN_UNSUPPORTED
;
215 return RETURN_SUCCESS
;
219 Returns TRUE if the machine type of PE/COFF image is supported. Supported
220 does not mean the image can be executed it means the PE/COFF loader supports
221 loading and relocating of the image type. It's up to the caller to support
224 This function implies the basic PE/COFF loader/relocator supports IA32, EBC,
225 & X64 images. Calling the entry point in a correct mannor is up to the
226 consumer of this library. This version also supports the special relocations
229 @param Machine Machine type from the PE Header.
231 @return TRUE if this PE/COFF loader can load the image
235 PeCoffLoaderImageFormatSupported (
239 if ((Machine
== EFI_IMAGE_MACHINE_IPF
) || (Machine
== EFI_IMAGE_MACHINE_IA32
) ||
240 (Machine
== EFI_IMAGE_MACHINE_EBC
) || (Machine
== EFI_IMAGE_MACHINE_X64
)) {
249 ImageRead function that operates on a memory buffer whos base is passed into
252 @param Reloc Ponter to baes of the input stream
253 @param Fixup Offset to the start of the buffer
254 @param FixupData Number of bytes to copy into the buffer
255 @param Adjust Location to place results of read
257 @retval RETURN_SUCCESS Data is read from FileOffset from the Handle into
261 PeHotRelocateImageEx (
264 IN OUT CHAR8
**FixupData
,
271 switch ((*Reloc
) >> 12) {
272 case EFI_IMAGE_REL_BASED_DIR64
:
273 F64
= (UINT64
*) Fixup
;
274 *FixupData
= ALIGN_POINTER (*FixupData
, sizeof (UINT64
));
275 if (*(UINT64
*) (*FixupData
) == *F64
) {
276 *F64
= *F64
+ (UINT64
) Adjust
;
279 *FixupData
= *FixupData
+ sizeof (UINT64
);
282 case EFI_IMAGE_REL_BASED_IA64_IMM64
:
283 F64
= (UINT64
*) Fixup
;
284 *FixupData
= ALIGN_POINTER (*FixupData
, sizeof (UINT64
));
285 if (*(UINT64
*) (*FixupData
) == *F64
) {
287 // Align it to bundle address before fixing up the
288 // 64-bit immediate value of the movl instruction.
291 Fixup
= (CHAR8
*) ((UINT64
) Fixup
& (UINT64
)~(15));
292 FixupVal
= (UINT64
) 0;
295 // Extract the lower 32 bits of IMM64 from bundle
299 (UINT32
*) Fixup
+ IMM64_IMM7B_INST_WORD_X
,
301 IMM64_IMM7B_INST_WORD_POS_X
,
302 IMM64_IMM7B_VAL_POS_X
307 (UINT32
*) Fixup
+ IMM64_IMM9D_INST_WORD_X
,
309 IMM64_IMM9D_INST_WORD_POS_X
,
310 IMM64_IMM9D_VAL_POS_X
315 (UINT32
*) Fixup
+ IMM64_IMM5C_INST_WORD_X
,
317 IMM64_IMM5C_INST_WORD_POS_X
,
318 IMM64_IMM5C_VAL_POS_X
323 (UINT32
*) Fixup
+ IMM64_IC_INST_WORD_X
,
325 IMM64_IC_INST_WORD_POS_X
,
331 (UINT32
*) Fixup
+ IMM64_IMM41a_INST_WORD_X
,
333 IMM64_IMM41a_INST_WORD_POS_X
,
334 IMM64_IMM41a_VAL_POS_X
338 // Update 64-bit address
343 // Insert IMM64 into bundle
347 ((UINT32
*) Fixup
+ IMM64_IMM7B_INST_WORD_X
),
349 IMM64_IMM7B_INST_WORD_POS_X
,
350 IMM64_IMM7B_VAL_POS_X
355 ((UINT32
*) Fixup
+ IMM64_IMM9D_INST_WORD_X
),
357 IMM64_IMM9D_INST_WORD_POS_X
,
358 IMM64_IMM9D_VAL_POS_X
363 ((UINT32
*) Fixup
+ IMM64_IMM5C_INST_WORD_X
),
365 IMM64_IMM5C_INST_WORD_POS_X
,
366 IMM64_IMM5C_VAL_POS_X
371 ((UINT32
*) Fixup
+ IMM64_IC_INST_WORD_X
),
373 IMM64_IC_INST_WORD_POS_X
,
379 ((UINT32
*) Fixup
+ IMM64_IMM41a_INST_WORD_X
),
381 IMM64_IMM41a_INST_WORD_POS_X
,
382 IMM64_IMM41a_VAL_POS_X
387 ((UINT32
*) Fixup
+ IMM64_IMM41b_INST_WORD_X
),
389 IMM64_IMM41b_INST_WORD_POS_X
,
390 IMM64_IMM41b_VAL_POS_X
395 ((UINT32
*) Fixup
+ IMM64_IMM41c_INST_WORD_X
),
397 IMM64_IMM41c_INST_WORD_POS_X
,
398 IMM64_IMM41c_VAL_POS_X
403 ((UINT32
*) Fixup
+ IMM64_SIGN_INST_WORD_X
),
405 IMM64_SIGN_INST_WORD_POS_X
,
409 *(UINT64
*) (*FixupData
) = *F64
;
412 *FixupData
= *FixupData
+ sizeof (UINT64
);
416 DEBUG ((EFI_D_ERROR
, "PeHotRelocateEx:unknown fixed type\n"));
417 return RETURN_UNSUPPORTED
;
420 return RETURN_SUCCESS
;