Omap35xxPkg/Include/TPS65950.h

   1 /** @file
   2
   3   Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
   4
   5   SPDX-License-Identifier: BSD-2-Clause-Patent
   6
   7 **/
   8
   9 #ifndef __TPS65950_H__
  10 #define __TPS65950_H__
  11
  12 #define EXTERNAL_DEVICE_REGISTER_TO_SLAVE_ADDRESS(x)     (((x) >> 8) & 0xFF)
  13 #define EXTERNAL_DEVICE_REGISTER_TO_REGISTER(x)          ((x) & 0xFF)
  14 #define EXTERNAL_DEVICE_REGISTER(SlaveAddress, Register) (((SlaveAddress) & 0xFF) << 8 | ((Register) & 0xFF))
  15
  16 // I2C Address group
  17 #define I2C_ADDR_GRP_ID1      0x48
  18 #define I2C_ADDR_GRP_ID2      0x49
  19 #define I2C_ADDR_GRP_ID3      0x4A
  20 #define I2C_ADDR_GRP_ID4      0x4B
  21 #define I2C_ADDR_GRP_ID5      0x12
  22
  23 // MMC definitions.
  24 #define VMMC1_DEV_GRP         0x82
  25 #define DEV_GRP_P1            BIT5
  26
  27 #define VMMC1_DEDICATED_REG   0x85
  28 #define VSEL_1_85V            0x0
  29 #define VSEL_2_85V            0x1
  30 #define VSEL_3_00V            0x2
  31 #define VSEL_3_15V            0x3
  32
  33 #define TPS65950_GPIO_CTRL    0xaa  //I2C_ADDR_GRP_ID2
  34 #define CARD_DETECT_ENABLE    (BIT2 | BIT0) // GPIO ON + GPIO CD1 enabled
  35
  36
  37 #define GPIODATAIN1           0x98  //I2C_ADDR_GRP_ID2
  38 #define CARD_DETECT_BIT       BIT0
  39
  40 // LEDEN register
  41 #define LEDEN                 0xEE
  42 #define LEDAON                BIT0
  43 #define LEDBON                BIT1
  44 #define LEDAPWM               BIT4
  45 #define LEDBPWM               BIT5
  46
  47 // RTC registers
  48 #define SECONDS_REG           0x1C
  49 #define MINUTES_REG           0x1D
  50 #define HOURS_REG             0x1E
  51 #define DAYS_REG              0x1F
  52 #define MONTHS_REG            0x20
  53 #define YEARS_REG             0x21
  54 #define WEEKS_REG             0x22
  55 #define RTC_CTRL_REG          0x29
  56
  57 // USB PHY power
  58 #define VAUX2_DEDICATED       0x79
  59 #define VAUX2_DEV_GRP         0x76
  60
  61 #define VAUX_DEV_GRP_NONE     0x00
  62 #define VAUX_DEV_GRP_P1       0x20
  63 #define VAUX_DEV_GRP_P2       0x40
  64 #define VAUX_DEV_GRP_P3       0x80
  65 #define VAUX_DEDICATED_18V    0x05
  66
  67 // Display subsystem
  68 #define VPLL2_DEDICATED       0x91
  69 #define VPLL2_DEV_GRP         0x8E
  70
  71 #define GPIODATADIR1          0x9B
  72 #define SETGPIODATAOUT1       0xA4
  73
  74 #endif //__TPS65950_H__