Omap35xxPkg/LcdGraphicsOutputDxe/LcdGraphicsOutputDxe.h

   1 /** @file
   2
   3  Copyright (c) 2011, ARM Ltd. All rights reserved.<BR>
   4  SPDX-License-Identifier: BSD-2-Clause-Patent
   5
   6 **/
   7
   8 #ifndef __OMAP3_DSS_GRAPHICS__
   9 #define __OMAP3_DSS_GRAPHICS__
  10
  11 #include <Library/UefiBootServicesTableLib.h>
  12 #include <Library/UefiLib.h>
  13 #include <Library/DebugLib.h>
  14 #include <Library/MemoryAllocationLib.h>
  15 #include <Library/IoLib.h>
  16
  17 #include <Protocol/DevicePathToText.h>
  18 #include <Protocol/EmbeddedExternalDevice.h>
  19 #include <Protocol/Cpu.h>
  20
  21 #include <Guid/GlobalVariable.h>
  22
  23 #include <Omap3530/Omap3530.h>
  24 #include <TPS65950.h>
  25
  26 typedef struct {
  27   VENDOR_DEVICE_PATH            Guid;
  28   EFI_DEVICE_PATH_PROTOCOL      End;
  29 } LCD_GRAPHICS_DEVICE_PATH;
  30
  31 typedef struct {
  32   UINTN                                 Signature;
  33   EFI_HANDLE                            Handle;
  34   EFI_GRAPHICS_OUTPUT_MODE_INFORMATION  ModeInfo;
  35   EFI_GRAPHICS_OUTPUT_PROTOCOL_MODE     Mode;
  36   EFI_GRAPHICS_OUTPUT_PROTOCOL          Gop;
  37   LCD_GRAPHICS_DEVICE_PATH              DevicePath;
  38 //  EFI_EVENT                             ExitBootServicesEvent;
  39 } LCD_INSTANCE;
  40
  41 #define LCD_INSTANCE_SIGNATURE  SIGNATURE_32('l', 'c', 'd', '0')
  42 #define LCD_INSTANCE_FROM_GOP_THIS(a)     CR (a, LCD_INSTANCE, Gop, LCD_INSTANCE_SIGNATURE)
  43
  44 typedef struct {
  45   UINTN             Mode;
  46   UINTN             HorizontalResolution;
  47   UINTN             VerticalResolution;
  48
  49   UINT32            DssDivisor;
  50   UINT32            DispcDivisor;
  51
  52   UINT32            HSync;
  53   UINT32            HFrontPorch;
  54   UINT32            HBackPorch;
  55
  56   UINT32            VSync;
  57   UINT32            VFrontPorch;
  58   UINT32            VBackPorch;
  59 } LCD_MODE;
  60
  61 EFI_STATUS
  62 InitializeDisplay (
  63   IN LCD_INSTANCE* Instance
  64 );
  65
  66 EFI_STATUS
  67 EFIAPI
  68 LcdGraphicsQueryMode (
  69   IN  EFI_GRAPHICS_OUTPUT_PROTOCOL          *This,
  70   IN  UINT32                                ModeNumber,
  71   OUT UINTN                                 *SizeOfInfo,
  72   OUT EFI_GRAPHICS_OUTPUT_MODE_INFORMATION  **Info
  73 );
  74
  75 EFI_STATUS
  76 EFIAPI
  77 LcdGraphicsSetMode (
  78   IN EFI_GRAPHICS_OUTPUT_PROTOCOL  *This,
  79   IN UINT32                        ModeNumber
  80 );
  81
  82 EFI_STATUS
  83 EFIAPI
  84 LcdGraphicsBlt (
  85   IN EFI_GRAPHICS_OUTPUT_PROTOCOL        *This,
  86   IN OUT EFI_GRAPHICS_OUTPUT_BLT_PIXEL   *BltBuffer,     OPTIONAL
  87   IN EFI_GRAPHICS_OUTPUT_BLT_OPERATION   BltOperation,
  88   IN UINTN                               SourceX,
  89   IN UINTN                               SourceY,
  90   IN UINTN                               DestinationX,
  91   IN UINTN                               DestinationY,
  92   IN UINTN                               Width,
  93   IN UINTN                               Height,
  94   IN UINTN                               Delta           OPTIONAL   // Number of BYTES in a row of the BltBuffer
  95 );
  96
  97 // HW registers
  98 #define CM_FCLKEN_DSS   0x48004E00
  99 #define CM_ICLKEN_DSS   0x48004E10
 100
 101 #define DSS_CONTROL     0x48050040
 102 #define DSS_SYSCONFIG   0x48050010
 103 #define DSS_SYSSTATUS   0x48050014
 104
 105 #define DISPC_CONTROL   0x48050440
 106 #define DISPC_CONFIG    0x48050444
 107 #define DISPC_SIZE_LCD  0x4805047C
 108 #define DISPC_TIMING_H  0x48050464
 109 #define DISPC_TIMING_V  0x48050468
 110
 111 #define CM_CLKSEL_DSS   0x48004E40
 112 #define DISPC_DIVISOR   0x48050470
 113 #define DISPC_POL_FREQ  0x4805046C
 114
 115 #define DISPC_GFX_TABLE_BA 0x480504B8
 116 #define DISPC_GFX_BA0   0x48050480
 117 #define DISPC_GFX_BA1   0x48050484
 118 #define DISPC_GFX_POS   0x48050488
 119 #define DISPC_GFX_SIZE  0x4805048C
 120 #define DISPC_GFX_ATTR  0x480504A0
 121 #define DISPC_GFX_PRELD 0x4805062C
 122
 123 #define DISPC_DEFAULT_COLOR_0 0x4805044C
 124
 125 //#define DISPC_IRQSTATUS
 126
 127 // Bits
 128 #define EN_TV           0x4
 129 #define EN_DSS2         0x2
 130 #define EN_DSS1         0x1
 131 #define EN_DSS          0x1
 132
 133 #define DSS_SOFTRESET   0x2
 134 #define DSS_RESETDONE   0x1
 135
 136 #define BYPASS_MODE     (BIT15 | BIT16)
 137
 138 #define LCDENABLE       BIT0
 139 #define ACTIVEMATRIX    BIT3
 140 #define GOLCD           BIT5
 141 #define DATALINES24     (BIT8 | BIT9)
 142 #define LCDENABLESIGNAL BIT28
 143
 144 #define GFXENABLE       BIT0
 145 #define RGB16           (0x6 << 1)
 146 #define BURSTSIZE16     (0x2 << 6)
 147
 148 #define CLEARLOADMODE   ~(BIT2 | BIT1)
 149 #define LOAD_FRAME_ONLY BIT2
 150
 151 #endif