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OvmfPkg: report S3 state in DSDT
[mirror_edk2.git] / OvmfPkg / AcpiTables / Dsdt.asl
1 /** @file
2 Contains root level name space objects for the platform
3
4 Copyright (c) 2008, Intel Corporation. All rights reserved.<BR>
5 This program and the accompanying materials are
6 licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
9
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
12
13 **/
14
15 DefinitionBlock ("Dsdt.aml", "DSDT", 1, "INTEL ", "OVMF ", 4) {
16 //
17 // System Sleep States
18 //
19 Name (\_S0, Package () {5, 0, 0, 0}) // Working
20 Name (\_S3, Package () {1, 0, 0, 0}) // Suspend to Ram (PIIX4: STR)
21 Name (\_S4, Package () {2, 0, 0, 0}) // Suspend to Disk (PIIX4: POSCL)
22 Name (\_S5, Package () {0, 0, 0, 0}) // Soft Off
23
24 //
25 // System Bus
26 //
27 Scope (\_SB) {
28 //
29 // PCI Root Bridge
30 //
31 Device (PCI0) {
32 Name (_HID, EISAID ("PNP0A03"))
33 Name (_ADR, 0x00000000)
34 Name (_BBN, 0x00)
35 Name (_UID, 0x00)
36
37 //
38 // BUS, I/O, and MMIO resources
39 //
40 Name (CRES, ResourceTemplate () {
41 WORDBusNumber ( // Bus number resource (0); the bridge produces bus numbers for its subsequent buses
42 ResourceProducer, // bit 0 of general flags is 1
43 MinFixed, // Range is fixed
44 MaxFixed, // Range is fixed
45 PosDecode, // PosDecode
46 0x0000, // Granularity
47 0x0000, // Min
48 0x00FF, // Max
49 0x0000, // Translation
50 0x0100 // Range Length = Max-Min+1
51 )
52
53 IO (Decode16, 0xCF8, 0xCF8, 0x01, 0x08) //Consumed resource (0xCF8-0xCFF)
54
55 WORDIO ( // Consumed-and-produced resource (all I/O below CF8)
56 ResourceProducer, // bit 0 of general flags is 0
57 MinFixed, // Range is fixed
58 MaxFixed, // Range is fixed
59 PosDecode,
60 EntireRange,
61 0x0000, // Granularity
62 0x0000, // Min
63 0x0CF7, // Max
64 0x0000, // Translation
65 0x0CF8 // Range Length
66 )
67
68 WORDIO ( // Consumed-and-produced resource (all I/O above CFF)
69 ResourceProducer, // bit 0 of general flags is 0
70 MinFixed, // Range is fixed
71 MaxFixed, // Range is fixed
72 PosDecode,
73 EntireRange,
74 0x0000, // Granularity
75 0x0D00, // Min
76 0xFFFF, // Max
77 0x0000, // Translation
78 0xF300 // Range Length
79 )
80
81 DWORDMEMORY ( // Descriptor for legacy VGA video RAM
82 ResourceProducer, // bit 0 of general flags is 0
83 PosDecode,
84 MinFixed, // Range is fixed
85 MaxFixed, // Range is Fixed
86 Cacheable,
87 ReadWrite,
88 0x00000000, // Granularity
89 0x000A0000, // Min
90 0x000BFFFF, // Max
91 0x00000000, // Translation
92 0x00020000 // Range Length
93 )
94
95 DWORDMEMORY ( // Descriptor for 32-bit MMIO
96 ResourceProducer, // bit 0 of general flags is 0
97 PosDecode,
98 MinFixed, // Range is fixed
99 MaxFixed, // Range is Fixed
100 NonCacheable,
101 ReadWrite,
102 0x00000000, // Granularity
103 0xF8000000, // Min
104 0xFFFBFFFF, // Max
105 0x00000000, // Translation
106 0x07FC0000, // Range Length
107 , // ResourceSourceIndex
108 , // ResourceSource
109 PW32 // DescriptorName
110 )
111 })
112
113 Name (CR64, ResourceTemplate () {
114 QWordMemory ( // Descriptor for 64-bit MMIO
115 ResourceProducer, // bit 0 of general flags is 0
116 PosDecode,
117 MinFixed, // Range is fixed
118 MaxFixed, // Range is Fixed
119 Cacheable,
120 ReadWrite,
121 0x00000000, // Granularity
122 0x8000000000, // Min
123 0xFFFFFFFFFF, // Max
124 0x00000000, // Translation
125 0x8000000000, // Range Length
126 , // ResourceSourceIndex
127 , // ResourceSource
128 PW64 // DescriptorName
129 )
130 })
131
132 Method (_CRS, 0) {
133 //
134 // see the FIRMWARE_DATA structure in "OvmfPkg/AcpiPlatformDxe/Qemu.c"
135 //
136 External (FWDT, OpRegionObj)
137 Field(FWDT, QWordAcc, NoLock, Preserve) {
138 P0S, 64, // PciWindow32.Base
139 P0E, 64, // PciWindow32.End
140 P0L, 64, // PciWindow32.Length
141 P1S, 64, // PciWindow64.Base
142 P1E, 64, // PciWindow64.End
143 P1L, 64 // PciWindow64.Length
144 }
145 Field(FWDT, DWordAcc, NoLock, Preserve) {
146 P0SL, 32, // PciWindow32.Base, low 32 bits
147 P0SH, 32, // PciWindow32.Base, high 32 bits
148 P0EL, 32, // PciWindow32.End, low 32 bits
149 P0EH, 32, // PciWindow32.End, high 32 bits
150 P0LL, 32, // PciWindow32.Length, low 32 bits
151 P0LH, 32, // PciWindow32.Length, high 32 bits
152 P1SL, 32, // PciWindow64.Base, low 32 bits
153 P1SH, 32, // PciWindow64.Base, high 32 bits
154 P1EL, 32, // PciWindow64.End, low 32 bits
155 P1EH, 32, // PciWindow64.End, high 32 bits
156 P1LL, 32, // PciWindow64.Length, low 32 bits
157 P1LH, 32 // PciWindow64.Length, high 32 bits
158 }
159
160 //
161 // fixup 32-bit PCI IO window
162 //
163 CreateDWordField (CRES, \_SB.PCI0.PW32._MIN, PS32)
164 CreateDWordField (CRES, \_SB.PCI0.PW32._MAX, PE32)
165 CreateDWordField (CRES, \_SB.PCI0.PW32._LEN, PL32)
166 Store (P0SL, PS32)
167 Store (P0EL, PE32)
168 Store (P0LL, PL32)
169
170 If (LAnd (LEqual (P1SL, 0x00), LEqual (P1SH, 0x00))) {
171 Return (CRES)
172 } Else {
173 //
174 // fixup 64-bit PCI IO window
175 //
176 CreateQWordField (CR64, \_SB.PCI0.PW64._MIN, PS64)
177 CreateQWordField (CR64, \_SB.PCI0.PW64._MAX, PE64)
178 CreateQWordField (CR64, \_SB.PCI0.PW64._LEN, PL64)
179 Store (P1S, PS64)
180 Store (P1E, PE64)
181 Store (P1L, PL64)
182
183 //
184 // add window and return result
185 //
186 ConcatenateResTemplate (CRES, CR64, Local0)
187 Return (Local0)
188 }
189 }
190
191 //
192 // PCI Interrupt Routing Table - PIC Mode Only
193 //
194 Method (_PRT, 0, NotSerialized) {
195 Return (
196 Package () {
197 //
198 // Bus 0; Devices 0 to 15
199 //
200 Package () {0x0000FFFF, 0x00, \_SB.PCI0.LPC.LNKD, 0x00},
201 Package () {0x0000FFFF, 0x01, \_SB.PCI0.LPC.LNKA, 0x00},
202 Package () {0x0000FFFF, 0x02, \_SB.PCI0.LPC.LNKB, 0x00},
203 Package () {0x0000FFFF, 0x03, \_SB.PCI0.LPC.LNKC, 0x00},
204
205 Package () {0x0001FFFF, 0x00, 0x00, 0x09},
206 //
207 // list of IRQs occupied thus far: 9
208 //
209 Package () {0x0001FFFF, 0x01, \_SB.PCI0.LPC.LNKB, 0x00},
210 Package () {0x0001FFFF, 0x02, \_SB.PCI0.LPC.LNKC, 0x00},
211 Package () {0x0001FFFF, 0x03, \_SB.PCI0.LPC.LNKD, 0x00},
212
213 Package () {0x0002FFFF, 0x00, \_SB.PCI0.LPC.LNKB, 0x00},
214 Package () {0x0002FFFF, 0x01, \_SB.PCI0.LPC.LNKC, 0x00},
215 Package () {0x0002FFFF, 0x02, \_SB.PCI0.LPC.LNKD, 0x00},
216 Package () {0x0002FFFF, 0x03, \_SB.PCI0.LPC.LNKA, 0x00},
217
218 Package () {0x0003FFFF, 0x00, \_SB.PCI0.LPC.LNKC, 0x00},
219 Package () {0x0003FFFF, 0x01, \_SB.PCI0.LPC.LNKD, 0x00},
220 Package () {0x0003FFFF, 0x02, \_SB.PCI0.LPC.LNKA, 0x00},
221 Package () {0x0003FFFF, 0x03, \_SB.PCI0.LPC.LNKB, 0x00},
222
223 Package () {0x0004FFFF, 0x00, \_SB.PCI0.LPC.LNKD, 0x00},
224 Package () {0x0004FFFF, 0x01, \_SB.PCI0.LPC.LNKA, 0x00},
225 Package () {0x0004FFFF, 0x02, \_SB.PCI0.LPC.LNKB, 0x00},
226 Package () {0x0004FFFF, 0x03, \_SB.PCI0.LPC.LNKC, 0x00},
227
228 Package () {0x0005FFFF, 0x00, \_SB.PCI0.LPC.LNKA, 0x00},
229 Package () {0x0005FFFF, 0x01, \_SB.PCI0.LPC.LNKB, 0x00},
230 Package () {0x0005FFFF, 0x02, \_SB.PCI0.LPC.LNKC, 0x00},
231 Package () {0x0005FFFF, 0x03, \_SB.PCI0.LPC.LNKD, 0x00},
232
233 Package () {0x0006FFFF, 0x00, \_SB.PCI0.LPC.LNKB, 0x00},
234 Package () {0x0006FFFF, 0x01, \_SB.PCI0.LPC.LNKC, 0x00},
235 Package () {0x0006FFFF, 0x02, \_SB.PCI0.LPC.LNKD, 0x00},
236 Package () {0x0006FFFF, 0x03, \_SB.PCI0.LPC.LNKA, 0x00},
237
238 Package () {0x0007FFFF, 0x00, \_SB.PCI0.LPC.LNKC, 0x00},
239 Package () {0x0007FFFF, 0x01, \_SB.PCI0.LPC.LNKD, 0x00},
240 Package () {0x0007FFFF, 0x02, \_SB.PCI0.LPC.LNKA, 0x00},
241 Package () {0x0007FFFF, 0x03, \_SB.PCI0.LPC.LNKB, 0x00},
242
243 Package () {0x0008FFFF, 0x00, \_SB.PCI0.LPC.LNKD, 0x00},
244 Package () {0x0008FFFF, 0x01, \_SB.PCI0.LPC.LNKA, 0x00},
245 Package () {0x0008FFFF, 0x02, \_SB.PCI0.LPC.LNKB, 0x00},
246 Package () {0x0008FFFF, 0x03, \_SB.PCI0.LPC.LNKC, 0x00},
247
248 Package () {0x0009FFFF, 0x00, \_SB.PCI0.LPC.LNKA, 0x00},
249 Package () {0x0009FFFF, 0x01, \_SB.PCI0.LPC.LNKB, 0x00},
250 Package () {0x0009FFFF, 0x02, \_SB.PCI0.LPC.LNKC, 0x00},
251 Package () {0x0009FFFF, 0x03, \_SB.PCI0.LPC.LNKD, 0x00},
252
253 Package () {0x000AFFFF, 0x00, \_SB.PCI0.LPC.LNKB, 0x00},
254 Package () {0x000AFFFF, 0x01, \_SB.PCI0.LPC.LNKC, 0x00},
255 Package () {0x000AFFFF, 0x02, \_SB.PCI0.LPC.LNKD, 0x00},
256 Package () {0x000AFFFF, 0x03, \_SB.PCI0.LPC.LNKA, 0x00},
257
258 Package () {0x000BFFFF, 0x00, \_SB.PCI0.LPC.LNKC, 0x00},
259 Package () {0x000BFFFF, 0x01, \_SB.PCI0.LPC.LNKD, 0x00},
260 Package () {0x000BFFFF, 0x02, \_SB.PCI0.LPC.LNKA, 0x00},
261 Package () {0x000BFFFF, 0x03, \_SB.PCI0.LPC.LNKB, 0x00},
262
263 Package () {0x000CFFFF, 0x00, \_SB.PCI0.LPC.LNKD, 0x00},
264 Package () {0x000CFFFF, 0x01, \_SB.PCI0.LPC.LNKA, 0x00},
265 Package () {0x000CFFFF, 0x02, \_SB.PCI0.LPC.LNKB, 0x00},
266 Package () {0x000CFFFF, 0x03, \_SB.PCI0.LPC.LNKC, 0x00},
267
268 Package () {0x000DFFFF, 0x00, \_SB.PCI0.LPC.LNKA, 0x00},
269 Package () {0x000DFFFF, 0x01, \_SB.PCI0.LPC.LNKB, 0x00},
270 Package () {0x000DFFFF, 0x02, \_SB.PCI0.LPC.LNKC, 0x00},
271 Package () {0x000DFFFF, 0x03, \_SB.PCI0.LPC.LNKD, 0x00},
272
273 Package () {0x000EFFFF, 0x00, \_SB.PCI0.LPC.LNKB, 0x00},
274 Package () {0x000EFFFF, 0x01, \_SB.PCI0.LPC.LNKC, 0x00},
275 Package () {0x000EFFFF, 0x02, \_SB.PCI0.LPC.LNKD, 0x00},
276 Package () {0x000EFFFF, 0x03, \_SB.PCI0.LPC.LNKA, 0x00},
277
278 Package () {0x000FFFFF, 0x00, \_SB.PCI0.LPC.LNKC, 0x00},
279 Package () {0x000FFFFF, 0x01, \_SB.PCI0.LPC.LNKD, 0x00},
280 Package () {0x000FFFFF, 0x02, \_SB.PCI0.LPC.LNKA, 0x00},
281 Package () {0x000FFFFF, 0x03, \_SB.PCI0.LPC.LNKB, 0x00}
282 }
283 )
284 }
285
286 //
287 // PCI to ISA Bridge (Bus 0, Device 1, Function 0)
288 // "Low Pin Count"
289 //
290 Device (LPC) {
291 Name (_ADR, 0x00010000)
292
293 //
294 // PCI Interrupt Routing Configuration Registers, PIRQRC[A:D]
295 //
296 OperationRegion (PRR0, PCI_Config, 0x60, 0x04)
297 Field (PRR0, ANYACC, NOLOCK, PRESERVE) {
298 PIRA, 8,
299 PIRB, 8,
300 PIRC, 8,
301 PIRD, 8
302 }
303
304 //
305 // _STA method for LNKA, LNKB, LNKC, LNKD
306 // Arg0[in]: value of PIRA / PIRB / PIRC / PIRD
307 //
308 Method (PSTA, 1, NotSerialized) {
309 If (And (Arg0, 0x80)) { // disable-bit set?
310 Return (0x9) // "device present" | "functioning properly"
311 } Else {
312 Return (0xB) // same | "enabled and decoding resources"
313 }
314 }
315
316 //
317 // _CRS method for LNKA, LNKB, LNKC, LNKD
318 // Arg0[in]: value of PIRA / PIRB / PIRC / PIRD
319 //
320 Method (PCRS, 1, NotSerialized) {
321 //
322 // create temporary buffer with an Extended Interrupt Descriptor
323 // whose single vector defaults to zero
324 //
325 Name (BUF0, ResourceTemplate () {
326 Interrupt (ResourceConsumer, Level, ActiveHigh, Shared){0}
327 }
328 )
329
330 //
331 // define reference to first interrupt vector in buffer
332 //
333 CreateDWordField (BUF0, 0x05, IRQW)
334
335 //
336 // If the disable-bit is clear, overwrite the default zero vector
337 // with the value in Arg0 (ie. PIRQRC[A:D]). Reserved bits are read
338 // as 0.
339 //
340 If (LNot (And (Arg0, 0x80))) {
341 Store (Arg0, IRQW)
342 }
343 Return (BUF0)
344 }
345
346 //
347 // _PRS resource for LNKA, LNKB, LNKC, LNKD
348 //
349 Name (PPRS, ResourceTemplate () {
350 Interrupt (ResourceConsumer, Level, ActiveHigh, Shared) {5, 10, 11}
351 //
352 // list of IRQs occupied thus far: 9, 5, 10, 11
353 //
354 })
355
356 //
357 // PCI IRQ Link A
358 //
359 Device (LNKA) {
360 Name (_HID, EISAID("PNP0C0F"))
361 Name (_UID, 1)
362
363 Method (_STA, 0, NotSerialized) { Return (PSTA (PIRA)) }
364 Method (_DIS, 0, NotSerialized) {
365 Or (PIRA, 0x80, PIRA) // set disable-bit
366 }
367 Method (_CRS, 0, NotSerialized) { Return (PCRS (PIRA)) }
368 Method (_PRS, 0, NotSerialized) { Return (PPRS) }
369 Method (_SRS, 1, NotSerialized) {
370 CreateDWordField (Arg0, 0x05, IRQW)
371 Store (IRQW, PIRA)
372 }
373 }
374
375 //
376 // PCI IRQ Link B
377 //
378 Device (LNKB) {
379 Name (_HID, EISAID("PNP0C0F"))
380 Name (_UID, 2)
381
382 Method (_STA, 0, NotSerialized) { Return (PSTA (PIRB)) }
383 Method (_DIS, 0, NotSerialized) {
384 Or (PIRB, 0x80, PIRB) // set disable-bit
385 }
386 Method (_CRS, 0, NotSerialized) { Return (PCRS (PIRB)) }
387 Method (_PRS, 0, NotSerialized) { Return (PPRS) }
388 Method (_SRS, 1, NotSerialized) {
389 CreateDWordField (Arg0, 0x05, IRQW)
390 Store (IRQW, PIRB)
391 }
392 }
393
394 //
395 // PCI IRQ Link C
396 //
397 Device (LNKC) {
398 Name (_HID, EISAID("PNP0C0F"))
399 Name (_UID, 3)
400
401 Method (_STA, 0, NotSerialized) { Return (PSTA (PIRC)) }
402 Method (_DIS, 0, NotSerialized) {
403 Or (PIRC, 0x80, PIRC) // set disable-bit
404 }
405 Method (_CRS, 0, NotSerialized) { Return (PCRS (PIRC)) }
406 Method (_PRS, 0, NotSerialized) { Return (PPRS) }
407 Method (_SRS, 1, NotSerialized) {
408 CreateDWordField (Arg0, 0x05, IRQW)
409 Store (IRQW, PIRC)
410 }
411 }
412
413 //
414 // PCI IRQ Link D
415 //
416 Device (LNKD) {
417 Name (_HID, EISAID("PNP0C0F"))
418 Name (_UID, 4)
419
420 Method (_STA, 0, NotSerialized) { Return (PSTA (PIRD)) }
421 Method (_DIS, 0, NotSerialized) {
422 Or (PIRD, 0x80, PIRD) // set disable-bit
423 }
424 Method (_CRS, 0, NotSerialized) { Return (PCRS (PIRD)) }
425 Method (_PRS, 0, NotSerialized) { Return (PPRS) }
426 Method (_SRS, 1, NotSerialized) {
427 CreateDWordField (Arg0, 0x05, IRQW)
428 Store (IRQW, PIRD)
429 }
430 }
431
432 //
433 // Programmable Interrupt Controller (PIC)
434 //
435 Device(PIC) {
436 Name (_HID, EISAID ("PNP0000"))
437 Name (_CRS, ResourceTemplate () {
438 IO (Decode16, 0x020, 0x020, 0x00, 0x02)
439 IO (Decode16, 0x0A0, 0x0A0, 0x00, 0x02)
440 IO (Decode16, 0x4D0, 0x4D0, 0x00, 0x02)
441 IRQNoFlags () {2}
442 //
443 // list of IRQs occupied thus far: 9, 5, 10, 11, 2
444 //
445 })
446 }
447
448 //
449 // ISA DMA
450 //
451 Device (DMAC) {
452 Name (_HID, EISAID ("PNP0200"))
453 Name (_CRS, ResourceTemplate () {
454 IO (Decode16, 0x00, 0x00, 0, 0x10)
455 IO (Decode16, 0x81, 0x81, 0, 0x03)
456 IO (Decode16, 0x87, 0x87, 0, 0x01)
457 IO (Decode16, 0x89, 0x89, 0, 0x03)
458 IO (Decode16, 0x8f, 0x8f, 0, 0x01)
459 IO (Decode16, 0xc0, 0xc0, 0, 0x20)
460 DMA (Compatibility, NotBusMaster, Transfer8) {4}
461 })
462 }
463
464 //
465 // 8254 Timer
466 //
467 Device(TMR) {
468 Name(_HID,EISAID("PNP0100"))
469 Name(_CRS, ResourceTemplate () {
470 IO (Decode16, 0x40, 0x40, 0x00, 0x04)
471 IRQNoFlags () {0}
472 //
473 // list of IRQs occupied thus far: 9, 5, 10, 11, 2, 0
474 //
475 })
476 }
477
478 //
479 // Real Time Clock
480 //
481 Device (RTC) {
482 Name (_HID, EISAID ("PNP0B00"))
483 Name (_CRS, ResourceTemplate () {
484 IO (Decode16, 0x70, 0x70, 0x00, 0x02)
485 IRQNoFlags () {8}
486 //
487 // list of IRQs occupied thus far: 9, 5, 10, 11, 2, 0, 8
488 //
489 })
490 }
491
492 //
493 // PCAT Speaker
494 //
495 Device(SPKR) {
496 Name (_HID, EISAID("PNP0800"))
497 Name (_CRS, ResourceTemplate () {
498 IO (Decode16, 0x61, 0x61, 0x01, 0x01)
499 })
500 }
501
502 //
503 // Floating Point Coprocessor
504 //
505 Device(FPU) {
506 Name (_HID, EISAID("PNP0C04"))
507 Name (_CRS, ResourceTemplate () {
508 IO (Decode16, 0xF0, 0xF0, 0x00, 0x10)
509 IRQNoFlags () {13}
510 //
511 // list of IRQs occupied thus far: 9, 5, 10, 11, 2, 0, 8, 13
512 //
513 })
514 }
515
516 //
517 // Generic motherboard devices and pieces that don't fit anywhere else
518 //
519 Device(XTRA) {
520 Name (_HID, EISAID ("PNP0C02"))
521 Name (_UID, 0x01)
522 Name (_CRS, ResourceTemplate () {
523 IO (Decode16, 0x010, 0x010, 0x00, 0x10)
524 IO (Decode16, 0x022, 0x022, 0x00, 0x1E)
525 IO (Decode16, 0x044, 0x044, 0x00, 0x1C)
526 IO (Decode16, 0x062, 0x062, 0x00, 0x02)
527 IO (Decode16, 0x065, 0x065, 0x00, 0x0B)
528 IO (Decode16, 0x072, 0x072, 0x00, 0x0E)
529 IO (Decode16, 0x080, 0x080, 0x00, 0x01)
530 IO (Decode16, 0x084, 0x084, 0x00, 0x03)
531 IO (Decode16, 0x088, 0x088, 0x00, 0x01)
532 IO (Decode16, 0x08c, 0x08c, 0x00, 0x03)
533 IO (Decode16, 0x090, 0x090, 0x00, 0x10)
534 IO (Decode16, 0x0A2, 0x0A2, 0x00, 0x1E)
535 IO (Decode16, 0x0E0, 0x0E0, 0x00, 0x10)
536 IO (Decode16, 0x1E0, 0x1E0, 0x00, 0x10)
537 IO (Decode16, 0x160, 0x160, 0x00, 0x10)
538 IO (Decode16, 0x278, 0x278, 0x00, 0x08)
539 IO (Decode16, 0x370, 0x370, 0x00, 0x02)
540 IO (Decode16, 0x378, 0x378, 0x00, 0x08)
541 IO (Decode16, 0x402, 0x402, 0x00, 0x01) // QEMU debug console, should use FixedPcdGet16 (PcdDebugIoPort)
542 IO (Decode16, 0x440, 0x440, 0x00, 0x10)
543 IO (Decode16, 0x678, 0x678, 0x00, 0x08)
544 IO (Decode16, 0x778, 0x778, 0x00, 0x08)
545 IO (Decode16, 0xafe0, 0xafe0, 0x00, 0x04) // QEMU GPE0 BLK
546 IO (Decode16, 0xb000, 0xb000, 0x00, 0x40) // PMBLK1
547 Memory32Fixed (ReadOnly, 0xFEC00000, 0x1000) // IO APIC
548 Memory32Fixed (ReadOnly, 0xFEE00000, 0x100000) // LAPIC
549 })
550 }
551
552 //
553 // PS/2 Keyboard and PC/AT Enhanced Keyboard 101/102
554 //
555 Device (PS2K) {
556 Name (_HID, EISAID ("PNP0303"))
557 Name (_CID, EISAID ("PNP030B"))
558 Name(_CRS,ResourceTemplate() {
559 IO (Decode16, 0x60, 0x60, 0x00, 0x01)
560 IO (Decode16, 0x64, 0x64, 0x00, 0x01)
561 IRQNoFlags () {1}
562 //
563 // list of IRQs occupied thus far: 9, 5, 10, 11, 2, 0, 8, 13, 1
564 //
565 })
566 }
567
568 //
569 // PS/2 Mouse and Microsoft Mouse
570 //
571 Device (PS2M) { // PS/2 stype mouse port
572 Name (_HID, EISAID ("PNP0F03"))
573 Name (_CID, EISAID ("PNP0F13"))
574 Name (_CRS, ResourceTemplate() {
575 IRQNoFlags () {12}
576 //
577 // list of IRQs occupied thus far:
578 // 9, 5, 10, 11, 2, 0, 8, 13, 1, 12
579 //
580 })
581 }
582
583 //
584 // UART Serial Port - COM1
585 //
586 Device (UAR1) {
587 Name (_HID, EISAID ("PNP0501"))
588 Name (_DDN, "COM1")
589 Name (_UID, 0x01)
590 Name(_CRS,ResourceTemplate() {
591 IO (Decode16, 0x3F8, 0x3F8, 0x01, 0x08)
592 IRQ (Edge, ActiveHigh, Exclusive, ) {4}
593 //
594 // list of IRQs occupied thus far:
595 // 9, 5, 10, 11, 2, 0, 8, 13, 1, 12, 4
596 //
597 })
598 }
599
600 //
601 // UART Serial Port - COM2
602 //
603 Device (UAR2) {
604 Name (_HID, EISAID ("PNP0501"))
605 Name (_DDN, "COM2")
606 Name (_UID, 0x02)
607 Name(_CRS,ResourceTemplate() {
608 IO (Decode16, 0x2F8, 0x2F8, 0x01, 0x08)
609 IRQ (Edge, ActiveHigh, Exclusive, ) {3}
610 //
611 // list of IRQs occupied thus far:
612 // 9, 5, 10, 11, 2, 0, 8, 13, 1, 12, 4, 3
613 //
614 })
615 }
616
617 //
618 // Floppy Disk Controller
619 //
620 Device (FDC) {
621 Name (_HID, EISAID ("PNP0700"))
622 Name (_CRS,ResourceTemplate() {
623 IO (Decode16, 0x3F0, 0x3F0, 0x01, 0x06)
624 IO (Decode16, 0x3F7, 0x3F7, 0x01, 0x01)
625 IRQNoFlags () {6}
626 //
627 // list of IRQs occupied thus far:
628 // 9, 5, 10, 11, 2, 0, 8, 13, 1, 12, 4, 3, 6
629 //
630 DMA (Compatibility, NotBusMaster, Transfer8) {2}
631 })
632 }
633
634 //
635 // parallel port -- no DMA for now
636 //
637 Device (PAR1) {
638 Name (_HID, EISAID ("PNP0400"))
639 Name (_DDN, "LPT1")
640 Name (_UID, 0x01)
641 Name(_CRS, ResourceTemplate() {
642 IO (Decode16, 0x0378, 0x0378, 0x00, 0x08)
643 IRQNoFlags () {7}
644 //
645 // list of IRQs occupied thus far:
646 // 9, 5, 10, 11, 2, 0, 8, 13, 1, 12, 4, 3, 6, 7
647 // in order:
648 // 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13
649 //
650 })
651 }
652 }
653 }
654 }
655 }
EFI Development Kit II mirror for PVE