3 AMD Sev Dxe driver. This driver is dispatched early in DXE, due to being list
4 in APRIORI. It clears C-bit from MMIO and NonExistent Memory space when SEV
7 Copyright (c) 2017 - 2020, AMD Inc. All rights reserved.<BR>
9 SPDX-License-Identifier: BSD-2-Clause-Patent
13 #include <IndustryStandard/Q35MchIch9.h>
14 #include <Library/BaseLib.h>
15 #include <Library/BaseMemoryLib.h>
16 #include <Library/DebugLib.h>
17 #include <Library/DxeServicesTableLib.h>
18 #include <Library/MemEncryptSevLib.h>
19 #include <Library/MemoryAllocationLib.h>
20 #include <Library/PcdLib.h>
25 IN EFI_HANDLE ImageHandle
,
26 IN EFI_SYSTEM_TABLE
*SystemTable
30 EFI_GCD_MEMORY_SPACE_DESCRIPTOR
*AllDescMap
;
35 // Do nothing when SEV is not enabled
37 if (!MemEncryptSevIsEnabled ()) {
38 return EFI_UNSUPPORTED
;
42 // Iterate through the GCD map and clear the C-bit from MMIO and NonExistent
43 // memory space. The NonExistent memory space will be used for mapping the
44 // MMIO space added later (eg PciRootBridge). By clearing both known MMIO and
45 // NonExistent memory space can gurantee that current and furture MMIO adds
46 // will have C-bit cleared.
48 Status
= gDS
->GetMemorySpaceMap (&NumEntries
, &AllDescMap
);
49 if (!EFI_ERROR (Status
)) {
50 for (Index
= 0; Index
< NumEntries
; Index
++) {
51 CONST EFI_GCD_MEMORY_SPACE_DESCRIPTOR
*Desc
;
53 Desc
= &AllDescMap
[Index
];
54 if (Desc
->GcdMemoryType
== EfiGcdMemoryTypeMemoryMappedIo
||
55 Desc
->GcdMemoryType
== EfiGcdMemoryTypeNonExistent
) {
56 Status
= MemEncryptSevClearPageEncMask (
59 EFI_SIZE_TO_PAGES (Desc
->Length
),
62 ASSERT_EFI_ERROR (Status
);
66 FreePool (AllDescMap
);
70 // If PCI Express is enabled, the MMCONFIG area has been reserved, rather
71 // than marked as MMIO, and so the C-bit won't be cleared by the above walk
72 // through the GCD map. Check for the MMCONFIG area and clear the C-bit for
75 if (PcdGet16 (PcdOvmfHostBridgePciDevId
) == INTEL_Q35_MCH_DEVICE_ID
) {
76 Status
= MemEncryptSevClearPageEncMask (
78 FixedPcdGet64 (PcdPciExpressBaseAddress
),
79 EFI_SIZE_TO_PAGES (SIZE_256MB
),
83 ASSERT_EFI_ERROR (Status
);
87 // When SMM is enabled, clear the C-bit from SMM Saved State Area
89 // NOTES: The SavedStateArea address cleared here is before SMBASE
90 // relocation. Currently, we do not clear the SavedStateArea address after
91 // SMBASE is relocated due to the following reasons:
93 // 1) Guest BIOS never access the relocated SavedStateArea.
95 // 2) The C-bit works on page-aligned address, but the SavedStateArea
96 // address is not a page-aligned. Theoretically, we could roundup the address
97 // and clear the C-bit of aligned address but looking carefully we found
98 // that some portion of the page contains code -- which will causes a bigger
99 // issues for SEV guest. When SEV is enabled, all the code must be encrypted
100 // otherwise hardware will cause trap.
102 // We restore the C-bit for this SMM Saved State Area after SMBASE relocation
103 // is completed (See OvmfPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.c).
105 if (FeaturePcdGet (PcdSmmSmramRequire
)) {
109 Status
= MemEncryptSevLocateInitialSmramSaveStateMapPages (
113 ASSERT_EFI_ERROR (Status
);
116 // Although these pages were set aside (i.e., allocated) by PlatformPei, we
117 // could be after a warm reboot from the OS. Don't leak any stale OS data
118 // to the hypervisor.
120 ZeroMem ((VOID
*)MapPagesBase
, EFI_PAGES_TO_SIZE (MapPagesCount
));
122 Status
= MemEncryptSevClearPageEncMask (
123 0, // Cr3BaseAddress -- use current CR3
124 MapPagesBase
, // BaseAddress
125 MapPagesCount
, // NumPages
128 if (EFI_ERROR (Status
)) {
129 DEBUG ((DEBUG_ERROR
, "%a: MemEncryptSevClearPageEncMask(): %r\n",
130 __FUNCTION__
, Status
));