OvmfPkg/Bhyve/AcpiTables/Facp.aslc

   1 /*
   2  * Copyright (c) 2020, Rebecca Cran <rebecca@bsdio.com>
   3  * Copyright (c) 2014, Pluribus Networks, Inc.
   4  *
   5  * SPDX-License-Identifier: BSD-2-Clause-Patent
   6  */
   7
   8 #include "Platform.h"
   9
  10 #define EFI_ACPI_OEM_TABLE_ID     SIGNATURE_64('B','V','F','A','C','P',' ',' ')
  11
  12 EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE FACP = {
  13   {
  14     EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE,
  15     sizeof (EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE),
  16     EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION,
  17     0,                          // to make sum of entire table == 0
  18     {EFI_ACPI_OEM_ID},          // OEMID is a 6 bytes long field
  19     EFI_ACPI_OEM_TABLE_ID,      // OEM table identification(8 bytes long)
  20     EFI_ACPI_OEM_REVISION,      // OEM revision number
  21     EFI_ACPI_CREATOR_ID,        // ASL compiler vendor ID
  22     EFI_ACPI_CREATOR_REVISION   // ASL compiler revision number
  23   },
  24   0,                // Physical addesss of FACS
  25   0,                // Physical address of DSDT
  26   INT_MODEL,        // System Interrupt Model
  27   RESERVED,         // reserved
  28   SCI_INT_VECTOR,   // System vector of SCI interrupt
  29   SMI_CMD_IO_PORT,  // Port address of SMI command port
  30   ACPI_ENABLE,      // value to write to port smi_cmd to enable ACPI
  31   ACPI_DISABLE,     // value to write to port smi_cmd to disable ACPI
  32   S4BIOS_REQ,       // Value to write to SMI CMD port to enter the S4BIOS state
  33   0,                // PState control
  34   PM1a_EVT_BLK,     // Port address of Power Mgt 1a Event Reg Blk
  35   PM1b_EVT_BLK,     // Port address of Power Mgt 1b Event Reg Blk
  36   PM1a_CNT_BLK,     // Port address of Power Mgt 1a Ctrl Reg Blk
  37   PM1b_CNT_BLK,     // Port address of Power Mgt 1b Ctrl Reg Blk
  38   PM2_CNT_BLK,      // Port address of Power Mgt 2  Ctrl Reg Blk
  39   PM_TMR_BLK,       // Port address of Power Mgt Timer Ctrl Reg Blk
  40   GPE0_BLK,         // Port addr of General Purpose Event 0 Reg Blk
  41   GPE1_BLK,         // Port addr of General Purpose Event 1 Reg Blk
  42   PM1_EVT_LEN,      // Byte Length of ports at pm1X_evt_blk
  43   PM1_CNT_LEN,      // Byte Length of ports at pm1X_cnt_blk
  44   PM2_CNT_LEN,      // Byte Length of ports at pm2_cnt_blk
  45   PM_TM_LEN,        // Byte Length of ports at pm_tm_blk
  46   GPE0_BLK_LEN,     // Byte Length of ports at gpe0_blk
  47   GPE1_BLK_LEN,     // Byte Length of ports at gpe1_blk
  48   GPE1_BASE,        // offset in gpe model where gpe1 events start
  49   0,                // _CST support
  50   P_LVL2_LAT,       // worst case HW latency to enter/exit C2 state
  51   P_LVL3_LAT,       // worst case HW latency to enter/exit C3 state
  52   FLUSH_SIZE,       // Size of area read to flush caches
  53   FLUSH_STRIDE,     // Stride used in flushing caches
  54   DUTY_OFFSET,      // bit location of duty cycle field in p_cnt reg
  55   DUTY_WIDTH,       // bit width of duty cycle field in p_cnt reg
  56   DAY_ALRM,         // index to day-of-month alarm in RTC CMOS RAM
  57   MON_ALRM,         // index to month-of-year alarm in RTC CMOS RAM
  58   CENTURY,          // index to century in RTC CMOS RAM
  59   IAPC_BOOT_ARCH,   // Boot architecture flag
  60   RESERVED,         // reserved
  61   FACP_FLAGS,
  62   FACP_RESET_REG,
  63   FACP_RESET_VAL,
  64 };
  65
  66 VOID*
  67 ReferenceAcpiTable (
  68   VOID
  69   )
  70 {
  71   //
  72   // Reference the table being generated to prevent the optimizer from removing the
  73   // data structure from the exeutable
  74   //
  75   return (VOID*)&FACP;
  76 }