OvmfPkg/Bhyve/BhyvePkg.dec

   1 #
   2 #  Copyright (c) 2020, Rebecca Cran <rebecca@bsdio.com>
   3 #  Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.<BR>
   4 #  Copyright (c) 2014, Pluribus Networks, Inc.
   5 #
   6 #  SPDX-License-Identifier: BSD-2-Clause-Patent
   7 #
   8 ##
   9
  10 [Defines]
  11   DEC_SPECIFICATION              = 0x00010005
  12   PACKAGE_NAME                   = BhyvePkg
  13   PACKAGE_GUID                   = 178345e1-6ac0-439d-a3df-9abf70dccd57
  14   PACKAGE_VERSION                = 0.1
  15
  16 [Includes]
  17   Include
  18   ../Include
  19
  20 [LibraryClasses]
  21   ##  @libraryclass  Save and restore variables using a file
  22   #
  23   NvVarsFileLib|Include/Library/NvVarsFileLib.h
  24
  25   ##  @libraryclass  Provides services to work with PCI capabilities in PCI
  26   #                  config space.
  27   PciCapLib|Include/Library/PciCapLib.h
  28
  29   ##  @libraryclass  Layered on top of PciCapLib, allows clients to plug an
  30   #                  EFI_PCI_IO_PROTOCOL backend into PciCapLib, for config
  31   #                  space access.
  32   PciCapPciIoLib|Include/Library/PciCapPciIoLib.h
  33
  34   ##  @libraryclass  Layered on top of PciCapLib, allows clients to plug a
  35   #                  PciSegmentLib backend into PciCapLib, for config space
  36   #                  access.
  37   PciCapPciSegmentLib|Include/Library/PciCapPciSegmentLib.h
  38
  39   ##  @libraryclass  Register a status code handler for printing the Boot
  40   #                  Manager's LoadImage() and StartImage() preparations, and
  41   #                  return codes, to the UEFI console.
  42   PlatformBmPrintScLib|Include/Library/PlatformBmPrintScLib.h
  43
  44   ##  @libraryclass  Serialize (and deserialize) variables
  45   #
  46   SerializeVariablesLib|Include/Library/SerializeVariablesLib.h
  47
  48   ##  @libraryclass  Access bhyve's firmware control interface
  49   #
  50   BhyveFwCtlLib|Include/Library/BhyveFwCtlLib.h
  51
  52 [Guids]
  53   gUefiOvmfPkgTokenSpaceGuid          = {0x93bb96af, 0xb9f2, 0x4eb8, {0x94, 0x62, 0xe0, 0xba, 0x74, 0x56, 0x42, 0x36}}
  54   gOvmfPlatformConfigGuid             = {0x7235c51c, 0x0c80, 0x4cab, {0x87, 0xac, 0x3b, 0x08, 0x4a, 0x63, 0x04, 0xb1}}
  55   gVirtioMmioTransportGuid            = {0x837dca9e, 0xe874, 0x4d82, {0xb2, 0x9a, 0x23, 0xfe, 0x0e, 0x23, 0xd1, 0xe2}}
  56   gRootBridgesConnectedEventGroupGuid = {0x24a2d66f, 0xeedd, 0x4086, {0x90, 0x42, 0xf2, 0x6e, 0x47, 0x97, 0xee, 0x69}}
  57
  58 [Protocols]
  59   gVirtioDeviceProtocolGuid           = {0xfa920010, 0x6785, 0x4941, {0xb6, 0xec, 0x49, 0x8c, 0x57, 0x9f, 0x16, 0x0a}}
  60   gIoMmuAbsentProtocolGuid            = {0xf8775d50, 0x8abd, 0x4adf, {0x92, 0xac, 0x85, 0x3e, 0x51, 0xf6, 0xc8, 0xdc}}
  61
  62 [PcdsFixedAtBuild]
  63   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfPeiMemFvBase|0x0|UINT32|0
  64   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfPeiMemFvSize|0x0|UINT32|1
  65   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeMemFvBase|0x0|UINT32|0x15
  66   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeMemFvSize|0x0|UINT32|0x16
  67
  68   ## This flag is used to control the destination port for PlatformDebugLibIoPort
  69   gUefiOvmfPkgTokenSpaceGuid.PcdDebugIoPort|0x2F8|UINT16|4
  70
  71   ## When VirtioScsiDxe is instantiated for a HBA, the numbers of targets and
  72   #  LUNs are retrieved from the host during virtio-scsi setup.
  73   #  MdeModulePkg/Bus/Scsi/ScsiBusDxe then scans all MaxTarget * MaxLun
  74   #  possible devices. This can take extremely long, for example with
  75   #  MaxTarget=255 and MaxLun=16383. The *inclusive* constants below limit
  76   #  MaxTarget and MaxLun, independently, should the host report higher values,
  77   #  so that scanning the number of devices given by their product is still
  78   #  acceptably fast.
  79   gUefiOvmfPkgTokenSpaceGuid.PcdVirtioScsiMaxTargetLimit|31|UINT16|6
  80   gUefiOvmfPkgTokenSpaceGuid.PcdVirtioScsiMaxLunLimit|7|UINT32|7
  81
  82   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageEventLogBase|0x0|UINT32|0x8
  83   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageEventLogSize|0x0|UINT32|0x9
  84   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFirmwareFdSize|0x0|UINT32|0xa
  85   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFirmwareBlockSize|0|UINT32|0xb
  86   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageVariableBase|0x0|UINT32|0xc
  87   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageFtwSpareBase|0x0|UINT32|0xd
  88   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageFtwWorkingBase|0x0|UINT32|0xe
  89   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFdBaseAddress|0x0|UINT32|0xf
  90   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPageTablesBase|0x0|UINT32|0x11
  91   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPageTablesSize|0x0|UINT32|0x12
  92   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamBase|0x0|UINT32|0x13
  93   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamSize|0x0|UINT32|0x14
  94   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfLockBoxStorageBase|0x0|UINT32|0x18
  95   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfLockBoxStorageSize|0x0|UINT32|0x19
  96   gUefiOvmfPkgTokenSpaceGuid.PcdGuidedExtractHandlerTableSize|0x0|UINT32|0x1a
  97   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDecompressionScratchEnd|0x0|UINT32|0x1f
  98
  99   ## Pcd8259LegacyModeMask defines the default mask value for platform. This
 100   #  value is determined.
 101   #  1) If platform only support pure UEFI, value should be set to 0xFFFF or
 102   #     0xFFFE; Because only clock interrupt is allowed in legacy mode in pure
 103   #     UEFI platform.
 104   #  2) If platform install CSM and use thunk module:
 105   #     a) If thunk call provided by CSM binary requires some legacy interrupt
 106   #        support, the corresponding bit should be opened as 0.
 107   #        For example, if keyboard interfaces provided CSM binary use legacy
 108   #        keyboard interrupt in 8259 bit 1, then the value should be set to
 109   #        0xFFFC.
 110   #     b) If all thunk call provied by CSM binary do not require legacy
 111   #        interrupt support, value should be set to 0xFFFF or 0xFFFE.
 112   #
 113   #  The default value of legacy mode mask could be changed by
 114   #  EFI_LEGACY_8259_PROTOCOL->SetMask(). But it is rarely need change it
 115   #  except some special cases such as when initializing the CSM binary, it
 116   #  should be set to 0xFFFF to mask all legacy interrupt. Please restore the
 117   #  original legacy mask value if changing is made for these special case.
 118   gUefiOvmfPkgTokenSpaceGuid.Pcd8259LegacyModeMask|0xFFFF|UINT16|0x3
 119
 120   ## Pcd8259LegacyModeEdgeLevel defines the default edge level for legacy
 121   #  mode's interrrupt controller.
 122   #  For the corresponding bits, 0 = Edge triggered and 1 = Level triggered.
 123   gUefiOvmfPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel|0x0000|UINT16|0x5
 124
 125
 126
 127 [PcdsDynamic, PcdsDynamicEx]
 128   gUefiOvmfPkgTokenSpaceGuid.PcdEmuVariableEvent|0|UINT64|2
 129   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashVariablesEnable|FALSE|BOOLEAN|0x10
 130   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfHostBridgePciDevId|0|UINT16|0x1b
 131   gUefiOvmfPkgTokenSpaceGuid.PcdQemuSmbiosValidated|FALSE|BOOLEAN|0x21
 132
 133   ## The IO port aperture shared by all PCI root bridges.
 134   #
 135   gUefiOvmfPkgTokenSpaceGuid.PcdPciIoBase|0x0|UINT64|0x22
 136   gUefiOvmfPkgTokenSpaceGuid.PcdPciIoSize|0x0|UINT64|0x23
 137
 138   ## The 32-bit MMIO aperture shared by all PCI root bridges.
 139   #
 140   gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio32Base|0x0|UINT64|0x24
 141   gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio32Size|0x0|UINT64|0x25
 142
 143   ## The 64-bit MMIO aperture shared by all PCI root bridges.
 144   #
 145   gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio64Base|0x0|UINT64|0x26
 146   gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio64Size|0x0|UINT64|0x27
 147
 148   ## The following setting controls how many megabytes we configure as TSEG on
 149   #  Q35, for SMRAM purposes. Permitted defaults are: 1, 2, 8. Other defaults
 150   #  cause undefined behavior. During boot, the PCD is updated by PlatformPei
 151   #  to reflect the extended TSEG size, if one is advertized by QEMU.
 152   #
 153   #  This PCD is only accessed if PcdSmmSmramRequire is TRUE (see below).
 154   gUefiOvmfPkgTokenSpaceGuid.PcdQ35TsegMbytes|8|UINT16|0x20
 155
 156 [PcdsFeatureFlag]
 157   gUefiOvmfPkgTokenSpaceGuid.PcdQemuBootOrderPciTranslation|TRUE|BOOLEAN|0x1c
 158   gUefiOvmfPkgTokenSpaceGuid.PcdQemuBootOrderMmioTranslation|FALSE|BOOLEAN|0x1d
 159
 160   ## This feature flag enables SMM/SMRAM support. Note that it also requires
 161   #  such support from the underlying QEMU instance; if that support is not
 162   #  present, the firmware will reject continuing after a certain point.
 163   #
 164   #  The flag also acts as a general "security switch"; when TRUE, many
 165   #  components will change behavior, with the goal of preventing a malicious
 166   #  runtime OS from tampering with firmware structures (special memory ranges
 167   #  used by OVMF, the varstore pflash chip, LockBox etc).
 168   gUefiOvmfPkgTokenSpaceGuid.PcdSmmSmramRequire|FALSE|BOOLEAN|0x1e
 169
 170 [Protocols]
 171 gEfiLegacyBiosProtocolGuid          = {0xdb9a1e3d, 0x45cb, 0x4abb, {0x85, 0x3b, 0xe5, 0x38, 0x7f, 0xdb, 0x2e, 0x2d}}