2 A simple DXE_DRIVER that causes the PCI Bus UEFI_DRIVER to allocate 64-bit
3 MMIO BARs above 4 GB, regardless of option ROM availability (as long as a CSM
4 is not present), conserving 32-bit MMIO aperture for 32-bit BARs.
6 Copyright (C) 2016, Red Hat, Inc.
7 Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
9 SPDX-License-Identifier: BSD-2-Clause-Patent
12 #include <Library/BaseLib.h>
13 #include <Library/BaseMemoryLib.h>
14 #include <IndustryStandard/Acpi10.h>
15 #include <IndustryStandard/Pci22.h>
17 #include <Library/DebugLib.h>
18 #include <Library/MemoryAllocationLib.h>
19 #include <Library/PcdLib.h>
20 #include <Library/UefiBootServicesTableLib.h>
22 #include <Protocol/IncompatiblePciDeviceSupport.h>
23 #include <Protocol/LegacyBios.h>
26 // The Legacy BIOS protocol has been located.
28 STATIC BOOLEAN mLegacyBiosInstalled
;
31 // The protocol interface this driver produces.
33 STATIC EFI_INCOMPATIBLE_PCI_DEVICE_SUPPORT_PROTOCOL
34 mIncompatiblePciDeviceSupport
;
37 // Configuration template for the CheckDevice() protocol member function.
39 // Refer to Table 20 "ACPI 2.0 & 3.0 QWORD Address Space Descriptor Usage" in
40 // the Platform Init 1.4a Spec, Volume 5.
42 // This structure is interpreted by the UpdatePciInfo() function in the edk2
43 // PCI Bus UEFI_DRIVER.
45 // This structure looks like:
46 // AddressDesc-1 + AddressDesc-2 + ... + AddressDesc-n + EndDesc
48 STATIC CONST EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR mMmio64Configuration
= {
49 ACPI_ADDRESS_SPACE_DESCRIPTOR
, // Desc
51 sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR
) -
53 EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR
,
57 ACPI_ADDRESS_SPACE_TYPE_MEM
, // ResType
60 64, // AddrSpaceGranularity:
61 // aperture selection hint
65 // no special alignment
67 MAX_UINT64
, // AddrTranslationOffset:
71 // use probed BAR size
75 // mOptionRomConfiguration is present only in Td guest.
76 // Host VMM can inject option ROM which is untrusted in Td guest,
77 // so PCI option ROM needs to be ignored.
78 // According to "Table 20. ACPI 2.0 & 3.0 QWORD Address Space Descriptor Usage"
79 // PI spec 1.7, type-specific flags can be set to 0 when
80 // Address Translation Offset == 6 to skip device option ROM.
82 STATIC CONST EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR mOptionRomConfiguration
= {
83 ACPI_ADDRESS_SPACE_DESCRIPTOR
, // Desc
85 sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR
) -
87 EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR
,
91 ACPI_ADDRESS_SPACE_TYPE_MEM
, // ResType
93 0, // Disable option roms SpecificFlag
94 64, // AddrSpaceGranularity:
95 // aperture selection hint
97 MAX_UINT64
, // AddrRangeMin
98 MAX_UINT64
, // AddrRangeMax:
99 // no special alignment
101 6, // AddrTranslationOffset:
105 // use probed BAR size
108 STATIC CONST EFI_ACPI_END_TAG_DESCRIPTOR mEndDesc
= {
109 ACPI_END_TAG_DESCRIPTOR
, // Desc
110 0 // Checksum: to be ignored
114 // The CheckDevice() member function has been called.
116 STATIC BOOLEAN mCheckDeviceCalled
;
119 Notification callback for Legacy BIOS protocol installation.
121 @param[in] Event Event whose notification function is being invoked.
123 @param[in] Context The pointer to the notification function's context, which
124 is implementation-dependent.
129 LegacyBiosInstalled (
135 EFI_LEGACY_BIOS_PROTOCOL
*LegacyBios
;
137 ASSERT (!mCheckDeviceCalled
);
139 Status
= gBS
->LocateProtocol (
140 &gEfiLegacyBiosProtocolGuid
,
141 NULL
/* Registration */,
144 if (EFI_ERROR (Status
)) {
148 mLegacyBiosInstalled
= TRUE
;
151 // Close the event and deregister this callback.
153 Status
= gBS
->CloseEvent (Event
);
154 ASSERT_EFI_ERROR (Status
);
158 Returns a list of ACPI resource descriptors that detail the special resource
159 configuration requirements for an incompatible PCI device.
161 Prior to bus enumeration, the PCI bus driver will look for the presence of
162 the EFI_INCOMPATIBLE_PCI_DEVICE_SUPPORT_PROTOCOL. Only one instance of this
163 protocol can be present in the system. For each PCI device that the PCI bus
164 driver discovers, the PCI bus driver calls this function with the device's
165 vendor ID, device ID, revision ID, subsystem vendor ID, and subsystem device
166 ID. If the VendorId, DeviceId, RevisionId, SubsystemVendorId, or
167 SubsystemDeviceId value is set to (UINTN)-1, that field will be ignored. The
168 ID values that are not (UINTN)-1 will be used to identify the current device.
170 This function will only return EFI_SUCCESS. However, if the device is an
171 incompatible PCI device, a list of ACPI resource descriptors will be returned
172 in Configuration. Otherwise, NULL will be returned in Configuration instead.
173 The PCI bus driver does not need to allocate memory for Configuration.
174 However, it is the PCI bus driver's responsibility to free it. The PCI bus
175 driver then can configure this device with the information that is derived
176 from this list of resource nodes, rather than the result of BAR probing.
178 Only the following two resource descriptor types from the ACPI Specification
179 may be used to describe the incompatible PCI device resource requirements:
180 - QWORD Address Space Descriptor (ACPI 2.0, section 6.4.3.5.1; also ACPI 3.0)
181 - End Tag (ACPI 2.0, section 6.4.2.8; also ACPI 3.0)
183 The QWORD Address Space Descriptor can describe memory, I/O, and bus number
184 ranges for dynamic or fixed resources. The configuration of a PCI root bridge
185 is described with one or more QWORD Address Space Descriptors, followed by an
186 End Tag. See the ACPI Specification for details on the field values.
188 @param[in] This Pointer to the
189 EFI_INCOMPATIBLE_PCI_DEVICE_SUPPORT_PROTOCOL
192 @param[in] VendorId A unique ID to identify the manufacturer of
193 the PCI device. See the Conventional PCI
194 Specification 3.0 for details.
196 @param[in] DeviceId A unique ID to identify the particular PCI
197 device. See the Conventional PCI
198 Specification 3.0 for details.
200 @param[in] RevisionId A PCI device-specific revision identifier.
201 See the Conventional PCI Specification 3.0
204 @param[in] SubsystemVendorId Specifies the subsystem vendor ID. See the
205 Conventional PCI Specification 3.0 for
208 @param[in] SubsystemDeviceId Specifies the subsystem device ID. See the
209 Conventional PCI Specification 3.0 for
212 @param[out] Configuration A list of ACPI resource descriptors that
213 detail the configuration requirement.
215 @retval EFI_SUCCESS The function always returns EFI_SUCCESS.
221 IN EFI_INCOMPATIBLE_PCI_DEVICE_SUPPORT_PROTOCOL
*This
,
225 IN UINTN SubsystemVendorId
,
226 IN UINTN SubsystemDeviceId
,
227 OUT VOID
**Configuration
230 mCheckDeviceCalled
= TRUE
;
235 // Unlike the general description of this protocol member suggests, there is
236 // nothing incompatible about the PCI devices that we'll match here. We'll
237 // match all PCI devices, and generate exactly one QWORD Address Space
238 // Descriptor for each. That descriptor will instruct the PCI Bus UEFI_DRIVER
239 // not to degrade 64-bit MMIO BARs for the device, even if a PCI option ROM
240 // BAR is present on the device.
242 // The concern captured in the PCI Bus UEFI_DRIVER is that a legacy BIOS boot
243 // (via a CSM) could dispatch a legacy option ROM on the device, which might
244 // have trouble with MMIO BARs that have been allocated outside of the 32-bit
245 // address space. But, if we don't support legacy option ROMs at all, then
246 // this problem cannot arise.
248 if (mLegacyBiosInstalled
) {
250 // Don't interfere with resource degradation.
252 *Configuration
= NULL
;
257 // This member function is mis-specified actually: it is supposed to allocate
258 // memory, but as specified, it could not return an error status. Thankfully,
259 // the edk2 PCI Bus UEFI_DRIVER actually handles error codes; see the
260 // UpdatePciInfo() function.
262 Length
= sizeof mMmio64Configuration
+ sizeof mEndDesc
;
265 // In Td guest OptionRom is not allowed.
267 if (TdIsEnabled ()) {
268 Length
+= sizeof mOptionRomConfiguration
;
271 *Configuration
= AllocateZeroPool (Length
);
273 if (*Configuration
== NULL
) {
276 "%a: 64-bit MMIO BARs may be degraded for PCI 0x%04x:0x%04x (rev %d)\n",
282 return EFI_OUT_OF_RESOURCES
;
285 Ptr
= (UINT8
*)(UINTN
)*Configuration
;
286 CopyMem (Ptr
, &mMmio64Configuration
, sizeof mMmio64Configuration
);
287 Length
= sizeof mMmio64Configuration
;
289 if (TdIsEnabled ()) {
290 CopyMem (Ptr
+ Length
, &mOptionRomConfiguration
, sizeof mOptionRomConfiguration
);
291 Length
+= sizeof mOptionRomConfiguration
;
294 CopyMem (Ptr
+ Length
, &mEndDesc
, sizeof mEndDesc
);
300 Entry point for this driver.
302 @param[in] ImageHandle Image handle of this driver.
303 @param[in] SystemTable Pointer to SystemTable.
305 @retval EFI_SUCESS Driver has loaded successfully.
306 @retval EFI_UNSUPPORTED PCI resource allocation has been disabled.
307 @retval EFI_UNSUPPORTED There is no 64-bit PCI MMIO aperture.
308 @return Error codes from lower level functions.
314 IN EFI_HANDLE ImageHandle
,
315 IN EFI_SYSTEM_TABLE
*SystemTable
323 // If there is no 64-bit PCI MMIO aperture, then 64-bit MMIO BARs have to be
324 // allocated under 4 GB unconditionally.
326 if (PcdGet64 (PcdPciMmio64Size
) == 0) {
327 return EFI_UNSUPPORTED
;
331 // Otherwise, create a protocol notify to see if a CSM is present. (With the
332 // CSM absent, the PCI Bus driver won't have to worry about allocating 64-bit
333 // MMIO BARs in the 32-bit MMIO aperture, for the sake of a legacy BIOS.)
335 // If the Legacy BIOS Protocol is present at the time of this driver starting
336 // up, we can mark immediately that the PCI Bus driver should perform the
337 // usual 64-bit MMIO BAR degradation.
339 // Otherwise, if the Legacy BIOS Protocol is absent at startup, it may be
340 // installed later. However, if it doesn't show up until the first
341 // EFI_INCOMPATIBLE_PCI_DEVICE_SUPPORT_PROTOCOL.CheckDevice() call from the
342 // PCI Bus driver, then it never will:
344 // 1. The following drivers are dispatched in some unspecified order:
345 // - PCI Host Bridge DXE_DRIVER,
346 // - PCI Bus UEFI_DRIVER,
347 // - this DXE_DRIVER,
348 // - Legacy BIOS DXE_DRIVER.
350 // 2. The DXE_CORE enters BDS.
352 // 3. The platform BDS connects the PCI Root Bridge IO instances (produced by
353 // the PCI Host Bridge DXE_DRIVER).
355 // 4. The PCI Bus UEFI_DRIVER enumerates resources and calls into this
356 // DXE_DRIVER (CheckDevice()).
358 // 5. This driver remembers if EFI_LEGACY_BIOS_PROTOCOL has been installed
359 // sometime during step 1 (produced by the Legacy BIOS DXE_DRIVER).
361 // For breaking this order, the Legacy BIOS DXE_DRIVER would have to install
362 // its protocol after the firmware enters BDS, which cannot happen.
364 Status
= gBS
->CreateEvent (
371 if (EFI_ERROR (Status
)) {
375 Status
= gBS
->RegisterProtocolNotify (
376 &gEfiLegacyBiosProtocolGuid
,
380 if (EFI_ERROR (Status
)) {
384 Status
= gBS
->SignalEvent (Event
);
385 ASSERT_EFI_ERROR (Status
);
387 mIncompatiblePciDeviceSupport
.CheckDevice
= CheckDevice
;
388 Status
= gBS
->InstallMultipleProtocolInterfaces (
390 &gEfiIncompatiblePciDeviceSupportProtocolGuid
,
391 &mIncompatiblePciDeviceSupport
,
394 if (EFI_ERROR (Status
)) {
401 if (!mLegacyBiosInstalled
) {
402 EFI_STATUS CloseStatus
;
404 CloseStatus
= gBS
->CloseEvent (Event
);
405 ASSERT_EFI_ERROR (CloseStatus
);