OvmfPkg/Library/AcpiTimerLib/BaseAcpiTimerLib.c

   1 /** @file
   2   Provide constructor and GetTick for Base instance of ACPI Timer Library
   3
   4   Copyright (C) 2014, Gabriel L. Somlo <somlo@cmu.edu>
   5
   6   This program and the accompanying materials are licensed and made
   7   available under the terms and conditions of the BSD License which
   8   accompanies this distribution.   The full text of the license may
   9   be found at http://opensource.org/licenses/bsd-license.php
  10
  11   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  12   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  13 **/
  14
  15 #include <Library/DebugLib.h>
  16 #include <Library/IoLib.h>
  17 #include <Library/PciLib.h>
  18 #include <Library/PcdLib.h>
  19 #include <OvmfPlatforms.h>
  20
  21 //
  22 // Power Management PCI Configuration Register fields
  23 //
  24 #define PMBA_RTE  BIT0
  25 #define PMIOSE    BIT0
  26
  27 //
  28 // Offset in the Power Management Base Address to the ACPI Timer
  29 //
  30 #define ACPI_TIMER_OFFSET  0x8
  31
  32 //
  33 // Cached ACPI Timer IO Address
  34 //
  35 STATIC UINT32 mAcpiTimerIoAddr;
  36
  37 /**
  38   The constructor function caches the ACPI tick counter address, and,
  39   if necessary, enables ACPI IO space.
  40
  41   @retval EFI_SUCCESS   The constructor always returns RETURN_SUCCESS.
  42
  43 **/
  44 RETURN_STATUS
  45 EFIAPI
  46 AcpiTimerLibConstructor (
  47   VOID
  48   )
  49 {
  50   UINT16 HostBridgeDevId;
  51   UINTN Pmba;
  52   UINTN PmRegMisc;
  53
  54   //
  55   // Query Host Bridge DID to determine platform type
  56   //
  57   HostBridgeDevId = PciRead16 (OVMF_HOSTBRIDGE_DID);
  58   switch (HostBridgeDevId) {
  59     case INTEL_82441_DEVICE_ID:
  60       Pmba      = POWER_MGMT_REGISTER_PIIX4 (0x40);
  61       PmRegMisc = POWER_MGMT_REGISTER_PIIX4 (0x80);
  62       break;
  63     case INTEL_Q35_MCH_DEVICE_ID:
  64       Pmba      = POWER_MGMT_REGISTER_Q35 (0x40);
  65       PmRegMisc = POWER_MGMT_REGISTER_Q35 (0x80);
  66       break;
  67     default:
  68       DEBUG ((EFI_D_ERROR, "%a: Unknown Host Bridge Device ID: 0x%04x\n",
  69         __FUNCTION__, HostBridgeDevId));
  70       ASSERT (FALSE);
  71       return RETURN_UNSUPPORTED;
  72   }
  73
  74   mAcpiTimerIoAddr = (PciRead32 (Pmba) & ~PMBA_RTE) + ACPI_TIMER_OFFSET;
  75
  76   //
  77   // Check to see if the Power Management Base Address is already enabled
  78   //
  79   if ((PciRead8 (PmRegMisc) & PMIOSE) == 0) {
  80     //
  81     // If the Power Management Base Address is not programmed,
  82     // then program the Power Management Base Address from a PCD.
  83     //
  84     PciAndThenOr32 (Pmba, (UINT32) ~0xFFC0, PcdGet16 (PcdAcpiPmBaseAddress));
  85
  86     //
  87     // Enable PMBA I/O port decodes in PMREGMISC
  88     //
  89     PciOr8 (PmRegMisc, PMIOSE);
  90   }
  91
  92   return RETURN_SUCCESS;
  93 }
  94
  95 /**
  96   Internal function to read the current tick counter of ACPI.
  97
  98   Read the current ACPI tick counter using the counter address cached
  99   by this instance's constructor.
 100
 101   @return The tick counter read.
 102
 103 **/
 104 UINT32
 105 InternalAcpiGetTimerTick (
 106   VOID
 107   )
 108 {
 109   //
 110   //   Return the current ACPI timer value.
 111   //
 112   return IoRead32 (mAcpiTimerIoAddr);
 113 }