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1 /** @file
2 OVMF's instance of the PCI Host Bridge Library.
3
4 Copyright (C) 2016, Red Hat, Inc.
5 Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
6
7 SPDX-License-Identifier: BSD-2-Clause-Patent
8
9 **/
10 #include <PiDxe.h>
11
12 #include <IndustryStandard/Pci.h>
13 #include <IndustryStandard/Q35MchIch9.h>
14
15 #include <Protocol/PciHostBridgeResourceAllocation.h>
16 #include <Protocol/PciRootBridgeIo.h>
17
18 #include <Library/BaseMemoryLib.h>
19 #include <Library/DebugLib.h>
20 #include <Library/MemoryAllocationLib.h>
21 #include <Library/PcdLib.h>
22 #include <Library/PciHostBridgeLib.h>
23 #include <Library/PciHostBridgeUtilityLib.h>
24 #include "PciHostBridge.h"
25
26
27 STATIC PCI_ROOT_BRIDGE_APERTURE mNonExistAperture = { MAX_UINT64, 0 };
28
29
30 /**
31 Return all the root bridge instances in an array.
32
33 @param Count Return the count of root bridge instances.
34
35 @return All the root bridge instances in an array.
36 The array should be passed into PciHostBridgeFreeRootBridges()
37 when it's not used.
38 **/
39 PCI_ROOT_BRIDGE *
40 EFIAPI
41 PciHostBridgeGetRootBridges (
42 UINTN *Count
43 )
44 {
45 UINT64 Attributes;
46 UINT64 AllocationAttributes;
47 PCI_ROOT_BRIDGE_APERTURE Io;
48 PCI_ROOT_BRIDGE_APERTURE Mem;
49 PCI_ROOT_BRIDGE_APERTURE MemAbove4G;
50
51 if (PcdGetBool (PcdPciDisableBusEnumeration)) {
52 return ScanForRootBridges (Count);
53 }
54
55 ZeroMem (&Io, sizeof (Io));
56 ZeroMem (&Mem, sizeof (Mem));
57 ZeroMem (&MemAbove4G, sizeof (MemAbove4G));
58
59 Attributes = EFI_PCI_ATTRIBUTE_IDE_PRIMARY_IO |
60 EFI_PCI_ATTRIBUTE_IDE_SECONDARY_IO |
61 EFI_PCI_ATTRIBUTE_ISA_IO_16 |
62 EFI_PCI_ATTRIBUTE_ISA_MOTHERBOARD_IO |
63 EFI_PCI_ATTRIBUTE_VGA_MEMORY |
64 EFI_PCI_ATTRIBUTE_VGA_IO_16 |
65 EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO_16;
66
67 AllocationAttributes = EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM;
68 if (PcdGet64 (PcdPciMmio64Size) > 0) {
69 AllocationAttributes |= EFI_PCI_HOST_BRIDGE_MEM64_DECODE;
70 MemAbove4G.Base = PcdGet64 (PcdPciMmio64Base);
71 MemAbove4G.Limit = PcdGet64 (PcdPciMmio64Base) +
72 PcdGet64 (PcdPciMmio64Size) - 1;
73 } else {
74 CopyMem (&MemAbove4G, &mNonExistAperture, sizeof (mNonExistAperture));
75 }
76
77 Io.Base = PcdGet64 (PcdPciIoBase);
78 Io.Limit = PcdGet64 (PcdPciIoBase) + (PcdGet64 (PcdPciIoSize) - 1);
79 Mem.Base = PcdGet64 (PcdPciMmio32Base);
80 Mem.Limit = PcdGet64 (PcdPciMmio32Base) + (PcdGet64 (PcdPciMmio32Size) - 1);
81
82 return PciHostBridgeUtilityGetRootBridges (
83 Count,
84 Attributes,
85 AllocationAttributes,
86 FALSE,
87 PcdGet16 (PcdOvmfHostBridgePciDevId) != INTEL_Q35_MCH_DEVICE_ID,
88 &Io,
89 &Mem,
90 &MemAbove4G,
91 &mNonExistAperture,
92 &mNonExistAperture
93 );
94 }
95
96
97 /**
98 Free the root bridge instances array returned from
99 PciHostBridgeGetRootBridges().
100
101 @param The root bridge instances array.
102 @param The count of the array.
103 **/
104 VOID
105 EFIAPI
106 PciHostBridgeFreeRootBridges (
107 PCI_ROOT_BRIDGE *Bridges,
108 UINTN Count
109 )
110 {
111 PciHostBridgeUtilityFreeRootBridges (Bridges, Count);
112 }
113
114
115 /**
116 Inform the platform that the resource conflict happens.
117
118 @param HostBridgeHandle Handle of the Host Bridge.
119 @param Configuration Pointer to PCI I/O and PCI memory resource
120 descriptors. The Configuration contains the resources
121 for all the root bridges. The resource for each root
122 bridge is terminated with END descriptor and an
123 additional END is appended indicating the end of the
124 entire resources. The resource descriptor field
125 values follow the description in
126 EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
127 .SubmitResources().
128 **/
129 VOID
130 EFIAPI
131 PciHostBridgeResourceConflict (
132 EFI_HANDLE HostBridgeHandle,
133 VOID *Configuration
134 )
135 {
136 PciHostBridgeUtilityResourceConflict (Configuration);
137 }