OvmfPkg/Library/PlatformBootManagerLibGrub/BdsPlatform.h

   1 /** @file
   2   Platform BDS customizations include file.
   3
   4   Copyright (C) 2020 James Bottomley, IBM Corporation.
   5   Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>
   6   SPDX-License-Identifier: BSD-2-Clause-Patent
   7
   8 Module Name:
   9
  10   BdsPlatform.h
  11
  12 Abstract:
  13
  14   Head file for BDS Platform specific code
  15
  16 **/
  17
  18 #ifndef _PLATFORM_SPECIFIC_BDS_PLATFORM_H_
  19 #define _PLATFORM_SPECIFIC_BDS_PLATFORM_H_
  20
  21 #include <PiDxe.h>
  22
  23 #include <IndustryStandard/Pci.h>
  24 #include <IndustryStandard/Acpi.h>
  25 #include <IndustryStandard/SmBios.h>
  26 #include <IndustryStandard/PeImage.h>
  27 #include <IndustryStandard/Virtio095.h>
  28
  29 #include <Library/DebugLib.h>
  30 #include <Library/BaseMemoryLib.h>
  31 #include <Library/UefiBootServicesTableLib.h>
  32 #include <Library/UefiRuntimeServicesTableLib.h>
  33 #include <Library/MemoryAllocationLib.h>
  34 #include <Library/BaseLib.h>
  35 #include <Library/PcdLib.h>
  36 #include <Library/PciLib.h>
  37 #include <Library/UefiBootManagerLib.h>
  38 #include <Library/BootLogoLib.h>
  39 #include <Library/HobLib.h>
  40 #include <Library/UefiLib.h>
  41 #include <Library/DxeServicesTableLib.h>
  42 #include <Library/DevicePathLib.h>
  43 #include <Library/IoLib.h>
  44
  45 #include <Protocol/Decompress.h>
  46 #include <Protocol/PciIo.h>
  47 #include <Protocol/FirmwareVolume2.h>
  48 #include <Protocol/SimpleFileSystem.h>
  49 #include <Protocol/PciRootBridgeIo.h>
  50 #include <Protocol/DxeSmmReadyToLock.h>
  51 #include <Protocol/LoadedImage.h>
  52
  53 #include <Guid/Acpi.h>
  54 #include <Guid/SmBios.h>
  55 #include <Guid/HobList.h>
  56 #include <Guid/GlobalVariable.h>
  57 #include <Guid/EventGroup.h>
  58 #include <Guid/DebugAgentGuid.h>
  59
  60 #include <OvmfPlatforms.h>
  61
  62 extern EFI_DEVICE_PATH_PROTOCOL  *gPlatformConnectSequence[];
  63 extern ACPI_HID_DEVICE_PATH      gPnpPs2KeyboardDeviceNode;
  64 extern ACPI_HID_DEVICE_PATH      gPnp16550ComPortDeviceNode;
  65 extern UART_DEVICE_PATH          gUartDeviceNode;
  66 extern VENDOR_DEVICE_PATH        gTerminalTypeDeviceNode;
  67
  68 #define PCI_DEVICE_PATH_NODE(Func, Dev) \
  69   { \
  70     { \
  71       HARDWARE_DEVICE_PATH, \
  72       HW_PCI_DP, \
  73       { \
  74         (UINT8) (sizeof (PCI_DEVICE_PATH)), \
  75         (UINT8) ((sizeof (PCI_DEVICE_PATH)) >> 8) \
  76       } \
  77     }, \
  78     (Func), \
  79     (Dev) \
  80   }
  81
  82 #define PNPID_DEVICE_PATH_NODE(PnpId) \
  83   { \
  84     { \
  85       ACPI_DEVICE_PATH, \
  86       ACPI_DP, \
  87       { \
  88         (UINT8) (sizeof (ACPI_HID_DEVICE_PATH)), \
  89         (UINT8) ((sizeof (ACPI_HID_DEVICE_PATH)) >> 8) \
  90       }, \
  91     }, \
  92     EISA_PNP_ID((PnpId)), \
  93     0 \
  94   }
  95
  96 #define gPciIsaBridge \
  97   PCI_DEVICE_PATH_NODE(0, 0x1f)
  98
  99 #define gP2PBridge \
 100   PCI_DEVICE_PATH_NODE(0, 0x1e)
 101
 102 #define gPnpPs2Keyboard \
 103   PNPID_DEVICE_PATH_NODE(0x0303)
 104
 105 #define gPnp16550ComPort \
 106   PNPID_DEVICE_PATH_NODE(0x0501)
 107
 108 #define gUart \
 109   { \
 110     { \
 111       MESSAGING_DEVICE_PATH, \
 112       MSG_UART_DP, \
 113       { \
 114         (UINT8) (sizeof (UART_DEVICE_PATH)), \
 115         (UINT8) ((sizeof (UART_DEVICE_PATH)) >> 8) \
 116       } \
 117     }, \
 118     0, \
 119     115200, \
 120     8, \
 121     1, \
 122     1 \
 123   }
 124
 125 #define gPcAnsiTerminal \
 126   { \
 127     { \
 128       MESSAGING_DEVICE_PATH, \
 129       MSG_VENDOR_DP, \
 130       { \
 131         (UINT8) (sizeof (VENDOR_DEVICE_PATH)), \
 132         (UINT8) ((sizeof (VENDOR_DEVICE_PATH)) >> 8) \
 133       } \
 134     }, \
 135     DEVICE_PATH_MESSAGING_PC_ANSI \
 136   }
 137
 138 #define gEndEntire \
 139   { \
 140     END_DEVICE_PATH_TYPE, \
 141     END_ENTIRE_DEVICE_PATH_SUBTYPE, \
 142     { \
 143       END_DEVICE_PATH_LENGTH, \
 144       0 \
 145     } \
 146   }
 147
 148 #define PCI_CLASS_SCC        0x07
 149 #define PCI_SUBCLASS_SERIAL  0x00
 150 #define PCI_IF_16550         0x02
 151 #define IS_PCI_16550SERIAL(_p)  IS_CLASS3 (_p, PCI_CLASS_SCC, PCI_SUBCLASS_SERIAL, PCI_IF_16550)
 152 #define IS_PCI_ISA_PDECODE(_p)  IS_CLASS3 (_p, PCI_CLASS_BRIDGE, PCI_CLASS_BRIDGE_ISA_PDECODE, 0)
 153
 154 typedef struct {
 155   EFI_DEVICE_PATH_PROTOCOL    *DevicePath;
 156   UINTN                       ConnectType;
 157 } PLATFORM_CONSOLE_CONNECT_ENTRY;
 158
 159 #define CONSOLE_OUT  BIT0
 160 #define CONSOLE_IN   BIT1
 161 #define STD_ERROR    BIT2
 162 extern PLATFORM_CONSOLE_CONNECT_ENTRY  gPlatformConsole[];
 163 extern PLATFORM_CONSOLE_CONNECT_ENTRY  gXenPlatformConsole[];
 164
 165 //
 166 // Platform BDS Functions
 167 //
 168
 169 VOID
 170 PlatformInitializeConsole (
 171   IN PLATFORM_CONSOLE_CONNECT_ENTRY  *PlatformConsole
 172   );
 173
 174 /**
 175   Loads and boots UEFI Linux via the FwCfg interface.
 176
 177   @retval    EFI_NOT_FOUND - The Linux kernel was not found
 178
 179 **/
 180 EFI_STATUS
 181 TryRunningQemuKernel (
 182   VOID
 183   );
 184
 185 #endif // _PLATFORM_SPECIFIC_BDS_PLATFORM_H_