OvmfPkg/Library/PlatformBootManagerLibGrub/BdsPlatform.h

   1 /** @file
   2   Platform BDS customizations include file.
   3
   4   Copyright (C) 2020 James Bottomley, IBM Corporation.
   5   Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>
   6   SPDX-License-Identifier: BSD-2-Clause-Patent
   7
   8 Module Name:
   9
  10   BdsPlatform.h
  11
  12 Abstract:
  13
  14   Head file for BDS Platform specific code
  15
  16 **/
  17
  18 #ifndef _PLATFORM_SPECIFIC_BDS_PLATFORM_H_
  19 #define _PLATFORM_SPECIFIC_BDS_PLATFORM_H_
  20
  21
  22 #include <PiDxe.h>
  23
  24 #include <IndustryStandard/Pci.h>
  25 #include <IndustryStandard/Acpi.h>
  26 #include <IndustryStandard/SmBios.h>
  27 #include <IndustryStandard/PeImage.h>
  28 #include <IndustryStandard/Virtio095.h>
  29
  30 #include <Library/DebugLib.h>
  31 #include <Library/BaseMemoryLib.h>
  32 #include <Library/UefiBootServicesTableLib.h>
  33 #include <Library/UefiRuntimeServicesTableLib.h>
  34 #include <Library/MemoryAllocationLib.h>
  35 #include <Library/BaseLib.h>
  36 #include <Library/PcdLib.h>
  37 #include <Library/PciLib.h>
  38 #include <Library/UefiBootManagerLib.h>
  39 #include <Library/BootLogoLib.h>
  40 #include <Library/HobLib.h>
  41 #include <Library/UefiLib.h>
  42 #include <Library/DxeServicesTableLib.h>
  43 #include <Library/DevicePathLib.h>
  44 #include <Library/IoLib.h>
  45
  46 #include <Protocol/Decompress.h>
  47 #include <Protocol/PciIo.h>
  48 #include <Protocol/FirmwareVolume2.h>
  49 #include <Protocol/SimpleFileSystem.h>
  50 #include <Protocol/PciRootBridgeIo.h>
  51 #include <Protocol/DxeSmmReadyToLock.h>
  52 #include <Protocol/LoadedImage.h>
  53
  54 #include <Guid/Acpi.h>
  55 #include <Guid/SmBios.h>
  56 #include <Guid/HobList.h>
  57 #include <Guid/GlobalVariable.h>
  58 #include <Guid/EventGroup.h>
  59 #include <Guid/DebugAgentGuid.h>
  60
  61 #include <OvmfPlatforms.h>
  62
  63 extern EFI_DEVICE_PATH_PROTOCOL   *gPlatformConnectSequence[];
  64 extern ACPI_HID_DEVICE_PATH       gPnpPs2KeyboardDeviceNode;
  65 extern ACPI_HID_DEVICE_PATH       gPnp16550ComPortDeviceNode;
  66 extern UART_DEVICE_PATH           gUartDeviceNode;
  67 extern VENDOR_DEVICE_PATH         gTerminalTypeDeviceNode;
  68
  69 #define PCI_DEVICE_PATH_NODE(Func, Dev) \
  70   { \
  71     { \
  72       HARDWARE_DEVICE_PATH, \
  73       HW_PCI_DP, \
  74       { \
  75         (UINT8) (sizeof (PCI_DEVICE_PATH)), \
  76         (UINT8) ((sizeof (PCI_DEVICE_PATH)) >> 8) \
  77       } \
  78     }, \
  79     (Func), \
  80     (Dev) \
  81   }
  82
  83 #define PNPID_DEVICE_PATH_NODE(PnpId) \
  84   { \
  85     { \
  86       ACPI_DEVICE_PATH, \
  87       ACPI_DP, \
  88       { \
  89         (UINT8) (sizeof (ACPI_HID_DEVICE_PATH)), \
  90         (UINT8) ((sizeof (ACPI_HID_DEVICE_PATH)) >> 8) \
  91       }, \
  92     }, \
  93     EISA_PNP_ID((PnpId)), \
  94     0 \
  95   }
  96
  97 #define gPciIsaBridge \
  98   PCI_DEVICE_PATH_NODE(0, 0x1f)
  99
 100 #define gP2PBridge \
 101   PCI_DEVICE_PATH_NODE(0, 0x1e)
 102
 103 #define gPnpPs2Keyboard \
 104   PNPID_DEVICE_PATH_NODE(0x0303)
 105
 106 #define gPnp16550ComPort \
 107   PNPID_DEVICE_PATH_NODE(0x0501)
 108
 109 #define gUart \
 110   { \
 111     { \
 112       MESSAGING_DEVICE_PATH, \
 113       MSG_UART_DP, \
 114       { \
 115         (UINT8) (sizeof (UART_DEVICE_PATH)), \
 116         (UINT8) ((sizeof (UART_DEVICE_PATH)) >> 8) \
 117       } \
 118     }, \
 119     0, \
 120     115200, \
 121     8, \
 122     1, \
 123     1 \
 124   }
 125
 126 #define gPcAnsiTerminal \
 127   { \
 128     { \
 129       MESSAGING_DEVICE_PATH, \
 130       MSG_VENDOR_DP, \
 131       { \
 132         (UINT8) (sizeof (VENDOR_DEVICE_PATH)), \
 133         (UINT8) ((sizeof (VENDOR_DEVICE_PATH)) >> 8) \
 134       } \
 135     }, \
 136     DEVICE_PATH_MESSAGING_PC_ANSI \
 137   }
 138
 139 #define gEndEntire \
 140   { \
 141     END_DEVICE_PATH_TYPE, \
 142     END_ENTIRE_DEVICE_PATH_SUBTYPE, \
 143     { \
 144       END_DEVICE_PATH_LENGTH, \
 145       0 \
 146     } \
 147   }
 148
 149 #define PCI_CLASS_SCC          0x07
 150 #define PCI_SUBCLASS_SERIAL    0x00
 151 #define PCI_IF_16550           0x02
 152 #define IS_PCI_16550SERIAL(_p)           IS_CLASS3 (_p, PCI_CLASS_SCC, PCI_SUBCLASS_SERIAL, PCI_IF_16550)
 153 #define IS_PCI_ISA_PDECODE(_p)        IS_CLASS3 (_p, PCI_CLASS_BRIDGE, PCI_CLASS_BRIDGE_ISA_PDECODE, 0)
 154
 155 typedef struct {
 156   EFI_DEVICE_PATH_PROTOCOL  *DevicePath;
 157   UINTN                     ConnectType;
 158 } PLATFORM_CONSOLE_CONNECT_ENTRY;
 159
 160 #define CONSOLE_OUT BIT0
 161 #define CONSOLE_IN  BIT1
 162 #define STD_ERROR   BIT2
 163 extern PLATFORM_CONSOLE_CONNECT_ENTRY  gPlatformConsole[];
 164 extern PLATFORM_CONSOLE_CONNECT_ENTRY  gXenPlatformConsole[];
 165
 166 //
 167 // Platform BDS Functions
 168 //
 169
 170 VOID
 171 PlatformInitializeConsole (
 172   IN PLATFORM_CONSOLE_CONNECT_ENTRY   *PlatformConsole
 173   );
 174
 175 #endif // _PLATFORM_SPECIFIC_BDS_PLATFORM_H_