OvmfPkg/PlatformPei/AmdSev.c

   1 /**@file
   2   Initialize Secure Encrypted Virtualization (SEV) support
   3
   4   Copyright (c) 2017 - 2020, Advanced Micro Devices. All rights reserved.<BR>
   5
   6   SPDX-License-Identifier: BSD-2-Clause-Patent
   7
   8 **/
   9 //
  10 // The package level header files this module uses
  11 //
  12 #include <IndustryStandard/Q35MchIch9.h>
  13 #include <Library/BaseMemoryLib.h>
  14 #include <Library/DebugLib.h>
  15 #include <Library/HobLib.h>
  16 #include <Library/MemEncryptSevLib.h>
  17 #include <Library/MemoryAllocationLib.h>
  18 #include <Library/PcdLib.h>
  19 #include <PiPei.h>
  20 #include <Register/Amd/Msr.h>
  21 #include <Register/Intel/SmramSaveStateMap.h>
  22
  23 #include "Platform.h"
  24
  25 /**
  26
  27   Initialize SEV-ES support if running as an SEV-ES guest.
  28
  29   **/
  30 STATIC
  31 VOID
  32 AmdSevEsInitialize (
  33   VOID
  34   )
  35 {
  36   UINT8                *GhcbBase;
  37   PHYSICAL_ADDRESS     GhcbBasePa;
  38   UINTN                GhcbPageCount;
  39   UINT8                *GhcbBackupBase;
  40   UINT8                *GhcbBackupPages;
  41   UINTN                GhcbBackupPageCount;
  42   SEV_ES_PER_CPU_DATA  *SevEsData;
  43   UINTN                PageCount;
  44   RETURN_STATUS        PcdStatus, DecryptStatus;
  45   IA32_DESCRIPTOR      Gdtr;
  46   VOID                 *Gdt;
  47
  48   if (!MemEncryptSevEsIsEnabled ()) {
  49     return;
  50   }
  51
  52   PcdStatus = PcdSetBoolS (PcdSevEsIsEnabled, TRUE);
  53   ASSERT_RETURN_ERROR (PcdStatus);
  54
  55   //
  56   // Allocate GHCB and per-CPU variable pages.
  57   //   Since the pages must survive across the UEFI to OS transition
  58   //   make them reserved.
  59   //
  60   GhcbPageCount = mMaxCpuCount * 2;
  61   GhcbBase = AllocateReservedPages (GhcbPageCount);
  62   ASSERT (GhcbBase != NULL);
  63
  64   GhcbBasePa = (PHYSICAL_ADDRESS)(UINTN) GhcbBase;
  65
  66   //
  67   // Each vCPU gets two consecutive pages, the first is the GHCB and the
  68   // second is the per-CPU variable page. Loop through the allocation and
  69   // only clear the encryption mask for the GHCB pages.
  70   //
  71   for (PageCount = 0; PageCount < GhcbPageCount; PageCount += 2) {
  72     DecryptStatus = MemEncryptSevClearPageEncMask (
  73       0,
  74       GhcbBasePa + EFI_PAGES_TO_SIZE (PageCount),
  75       1
  76       );
  77     ASSERT_RETURN_ERROR (DecryptStatus);
  78   }
  79
  80   ZeroMem (GhcbBase, EFI_PAGES_TO_SIZE (GhcbPageCount));
  81
  82   PcdStatus = PcdSet64S (PcdGhcbBase, GhcbBasePa);
  83   ASSERT_RETURN_ERROR (PcdStatus);
  84   PcdStatus = PcdSet64S (PcdGhcbSize, EFI_PAGES_TO_SIZE (GhcbPageCount));
  85   ASSERT_RETURN_ERROR (PcdStatus);
  86
  87   DEBUG ((DEBUG_INFO,
  88     "SEV-ES is enabled, %lu GHCB pages allocated starting at 0x%p\n",
  89     (UINT64)GhcbPageCount, GhcbBase));
  90
  91   //
  92   // Allocate #VC recursion backup pages. The number of backup pages needed is
  93   // one less than the maximum VC count.
  94   //
  95   GhcbBackupPageCount = mMaxCpuCount * (VMGEXIT_MAXIMUM_VC_COUNT - 1);
  96   GhcbBackupBase = AllocatePages (GhcbBackupPageCount);
  97   ASSERT (GhcbBackupBase != NULL);
  98
  99   GhcbBackupPages = GhcbBackupBase;
 100   for (PageCount = 1; PageCount < GhcbPageCount; PageCount += 2) {
 101     SevEsData =
 102       (SEV_ES_PER_CPU_DATA *)(GhcbBase + EFI_PAGES_TO_SIZE (PageCount));
 103     SevEsData->GhcbBackupPages = GhcbBackupPages;
 104
 105     GhcbBackupPages += EFI_PAGE_SIZE * (VMGEXIT_MAXIMUM_VC_COUNT - 1);
 106   }
 107
 108   DEBUG ((DEBUG_INFO,
 109     "SEV-ES is enabled, %lu GHCB backup pages allocated starting at 0x%p\n",
 110     (UINT64)GhcbBackupPageCount, GhcbBackupBase));
 111
 112   AsmWriteMsr64 (MSR_SEV_ES_GHCB, GhcbBasePa);
 113
 114   //
 115   // The SEV support will clear the C-bit from non-RAM areas.  The early GDT
 116   // lives in a non-RAM area, so when an exception occurs (like a #VC) the GDT
 117   // will be read as un-encrypted even though it was created before the C-bit
 118   // was cleared (encrypted). This will result in a failure to be able to
 119   // handle the exception.
 120   //
 121   AsmReadGdtr (&Gdtr);
 122
 123   Gdt = AllocatePages (EFI_SIZE_TO_PAGES ((UINTN) Gdtr.Limit + 1));
 124   ASSERT (Gdt != NULL);
 125
 126   CopyMem (Gdt, (VOID *) Gdtr.Base, Gdtr.Limit + 1);
 127   Gdtr.Base = (UINTN) Gdt;
 128   AsmWriteGdtr (&Gdtr);
 129 }
 130
 131 /**
 132
 133   Function checks if SEV support is available, if present then it sets
 134   the dynamic PcdPteMemoryEncryptionAddressOrMask with memory encryption mask.
 135
 136   **/
 137 VOID
 138 AmdSevInitialize (
 139   VOID
 140   )
 141 {
 142   UINT64                            EncryptionMask;
 143   RETURN_STATUS                     PcdStatus;
 144
 145   //
 146   // Check if SEV is enabled
 147   //
 148   if (!MemEncryptSevIsEnabled ()) {
 149     return;
 150   }
 151
 152   //
 153   // Set Memory Encryption Mask PCD
 154   //
 155   EncryptionMask = MemEncryptSevGetEncryptionMask ();
 156   PcdStatus = PcdSet64S (PcdPteMemoryEncryptionAddressOrMask, EncryptionMask);
 157   ASSERT_RETURN_ERROR (PcdStatus);
 158
 159   DEBUG ((DEBUG_INFO, "SEV is enabled (mask 0x%lx)\n", EncryptionMask));
 160
 161   //
 162   // Set Pcd to Deny the execution of option ROM when security
 163   // violation.
 164   //
 165   PcdStatus = PcdSet32S (PcdOptionRomImageVerificationPolicy, 0x4);
 166   ASSERT_RETURN_ERROR (PcdStatus);
 167
 168   //
 169   // When SMM is required, cover the pages containing the initial SMRAM Save
 170   // State Map with a memory allocation HOB:
 171   //
 172   // There's going to be a time interval between our decrypting those pages for
 173   // SMBASE relocation and re-encrypting the same pages after SMBASE
 174   // relocation. We shall ensure that the DXE phase stay away from those pages
 175   // until after re-encryption, in order to prevent an information leak to the
 176   // hypervisor.
 177   //
 178   if (FeaturePcdGet (PcdSmmSmramRequire) && (mBootMode != BOOT_ON_S3_RESUME)) {
 179     RETURN_STATUS LocateMapStatus;
 180     UINTN         MapPagesBase;
 181     UINTN         MapPagesCount;
 182
 183     LocateMapStatus = MemEncryptSevLocateInitialSmramSaveStateMapPages (
 184                         &MapPagesBase,
 185                         &MapPagesCount
 186                         );
 187     ASSERT_RETURN_ERROR (LocateMapStatus);
 188
 189     if (mQ35SmramAtDefaultSmbase) {
 190       //
 191       // The initial SMRAM Save State Map has been covered as part of a larger
 192       // reserved memory allocation in InitializeRamRegions().
 193       //
 194       ASSERT (SMM_DEFAULT_SMBASE <= MapPagesBase);
 195       ASSERT (
 196         (MapPagesBase + EFI_PAGES_TO_SIZE (MapPagesCount) <=
 197          SMM_DEFAULT_SMBASE + MCH_DEFAULT_SMBASE_SIZE)
 198         );
 199     } else {
 200       BuildMemoryAllocationHob (
 201         MapPagesBase,                      // BaseAddress
 202         EFI_PAGES_TO_SIZE (MapPagesCount), // Length
 203         EfiBootServicesData                // MemoryType
 204         );
 205     }
 206   }
 207
 208   //
 209   // Check and perform SEV-ES initialization if required.
 210   //
 211   AmdSevEsInitialize ();
 212 }