4 Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
5 This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
16 // The package level header files this module uses
21 // The Library classes this module consumes
23 #include <Library/DebugLib.h>
24 #include <Library/HobLib.h>
25 #include <Library/IoLib.h>
26 #include <Library/MemoryAllocationLib.h>
27 #include <Library/PcdLib.h>
28 #include <Library/PciLib.h>
29 #include <Library/PeimEntryPoint.h>
30 #include <Library/ResourcePublicationLib.h>
31 #include <Guid/MemoryTypeInformation.h>
36 EFI_MEMORY_TYPE_INFORMATION mDefaultMemoryTypeInformation
[] = {
37 { EfiACPIMemoryNVS
, 0x004 },
38 { EfiACPIReclaimMemory
, 0x008 },
39 { EfiReservedMemoryType
, 0x004 },
40 { EfiRuntimeServicesData
, 0x024 },
41 { EfiRuntimeServicesCode
, 0x030 },
42 { EfiBootServicesCode
, 0x180 },
43 { EfiBootServicesData
, 0xF00 },
44 { EfiMaxMemoryType
, 0x000 }
49 AddIoMemoryBaseSizeHob (
50 EFI_PHYSICAL_ADDRESS MemoryBase
,
54 BuildResourceDescriptorHob (
55 EFI_RESOURCE_MEMORY_MAPPED_IO
,
56 EFI_RESOURCE_ATTRIBUTE_PRESENT
|
57 EFI_RESOURCE_ATTRIBUTE_INITIALIZED
|
58 EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE
|
59 EFI_RESOURCE_ATTRIBUTE_TESTED
,
68 EFI_PHYSICAL_ADDRESS MemoryBase
,
69 EFI_PHYSICAL_ADDRESS MemoryLimit
72 AddIoMemoryBaseSizeHob (MemoryBase
, (UINT64
)(MemoryLimit
- MemoryBase
));
77 AddMemoryBaseSizeHob (
78 EFI_PHYSICAL_ADDRESS MemoryBase
,
82 BuildResourceDescriptorHob (
83 EFI_RESOURCE_SYSTEM_MEMORY
,
84 EFI_RESOURCE_ATTRIBUTE_PRESENT
|
85 EFI_RESOURCE_ATTRIBUTE_INITIALIZED
|
86 EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE
|
87 EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE
|
88 EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE
|
89 EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE
|
90 EFI_RESOURCE_ATTRIBUTE_TESTED
,
99 EFI_PHYSICAL_ADDRESS MemoryBase
,
100 EFI_PHYSICAL_ADDRESS MemoryLimit
103 AddMemoryBaseSizeHob (MemoryBase
, (UINT64
)(MemoryLimit
- MemoryBase
));
108 AddUntestedMemoryBaseSizeHob (
109 EFI_PHYSICAL_ADDRESS MemoryBase
,
113 BuildResourceDescriptorHob (
114 EFI_RESOURCE_SYSTEM_MEMORY
,
115 EFI_RESOURCE_ATTRIBUTE_PRESENT
|
116 EFI_RESOURCE_ATTRIBUTE_INITIALIZED
|
117 EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE
|
118 EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE
|
119 EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE
|
120 EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE
,
128 AddUntestedMemoryRangeHob (
129 EFI_PHYSICAL_ADDRESS MemoryBase
,
130 EFI_PHYSICAL_ADDRESS MemoryLimit
133 AddUntestedMemoryBaseSizeHob (MemoryBase
, (UINT64
)(MemoryLimit
- MemoryBase
));
138 MemMapInitialization (
139 EFI_PHYSICAL_ADDRESS TopOfMemory
143 // Create Memory Type Information HOB
146 &gEfiMemoryTypeInformationGuid
,
147 mDefaultMemoryTypeInformation
,
148 sizeof(mDefaultMemoryTypeInformation
)
152 // Add PCI IO Port space available for PCI resource allocations.
154 BuildResourceDescriptorHob (
156 EFI_RESOURCE_ATTRIBUTE_PRESENT
|
157 EFI_RESOURCE_ATTRIBUTE_INITIALIZED
,
163 // Add PCI MMIO space available to PCI resource allocations
165 if (TopOfMemory
< BASE_2GB
) {
166 AddIoMemoryBaseSizeHob (BASE_2GB
, 0xFEC00000 - BASE_2GB
);
168 AddIoMemoryBaseSizeHob (TopOfMemory
, 0xFEC00000 - TopOfMemory
);
174 AddIoMemoryBaseSizeHob (0xFEC80000, SIZE_512KB
);
179 AddIoMemoryBaseSizeHob (0xFEC00000, SIZE_512KB
);
182 // Video memory + Legacy BIOS region
184 AddIoMemoryRangeHob (0x0A0000, BASE_1MB
);
198 // Build the CPU hob with 36-bit addressing and 16-bits of IO space.
200 BuildCpuHob (36, 16);
203 // Set the PM I/O base address to 0x400
205 PciAndThenOr32 (PCI_LIB_ADDRESS (0, 1, 3, 0x40), (UINT32
) ~0xfc0, 0x400);
210 ReserveEmuVariableNvStore (
213 EFI_PHYSICAL_ADDRESS VariableStore
;
216 // Allocate storage for NV variables early on so it will be
217 // at a consistent address. Since VM memory is preserved
218 // across reboots, this allows the NV variable storage to survive
222 (EFI_PHYSICAL_ADDRESS
)(UINTN
)
223 AllocateRuntimePool (
224 2 * PcdGet32 (PcdFlashNvStorageFtwSpareSize
)
227 "Reserved variable store memory: 0x%lX; size: %dkb\n",
229 (2 * PcdGet32 (PcdFlashNvStorageFtwSpareSize
)) / 1024
231 PcdSet64 (PcdEmuVariableNvStoreReserved
, VariableStore
);
242 DEBUG ((EFI_D_INFO
, "CMOS:\n"));
244 for (Loop
= 0; Loop
< 0x80; Loop
++) {
245 if ((Loop
% 0x10) == 0) {
246 DEBUG ((EFI_D_INFO
, "%02x:", Loop
));
248 DEBUG ((EFI_D_INFO
, " %02x", CmosRead8 (Loop
)));
249 if ((Loop
% 0x10) == 0xf) {
250 DEBUG ((EFI_D_INFO
, "\n"));
257 Perform Platform PEI initialization.
259 @param FileHandle Handle of the file being invoked.
260 @param PeiServices Describes the list of possible PEI Services.
262 @return EFI_SUCCESS The PEIM initialized successfully.
268 IN EFI_PEI_FILE_HANDLE FileHandle
,
269 IN CONST EFI_PEI_SERVICES
**PeiServices
272 EFI_PHYSICAL_ADDRESS TopOfMemory
;
274 DEBUG ((EFI_D_ERROR
, "Platform PEIM Loaded\n"));
278 TopOfMemory
= MemDetect ();
280 ReserveEmuVariableNvStore ();
282 PeiFvInitialization ();
284 MemMapInitialization (TopOfMemory
);
286 MiscInitialization ();