4 Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
5 This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
16 // The package level header files this module uses
21 // The Library classes this module consumes
23 #include <Library/DebugLib.h>
24 #include <Library/HobLib.h>
25 #include <Library/IoLib.h>
26 #include <Library/MemoryAllocationLib.h>
27 #include <Library/PcdLib.h>
28 #include <Library/PciLib.h>
29 #include <Library/PeimEntryPoint.h>
30 #include <Library/PeiServicesLib.h>
31 #include <Library/ResourcePublicationLib.h>
32 #include <Guid/MemoryTypeInformation.h>
33 #include <Ppi/MasterBootMode.h>
38 EFI_MEMORY_TYPE_INFORMATION mDefaultMemoryTypeInformation
[] = {
39 { EfiACPIMemoryNVS
, 0x004 },
40 { EfiACPIReclaimMemory
, 0x008 },
41 { EfiReservedMemoryType
, 0x004 },
42 { EfiRuntimeServicesData
, 0x024 },
43 { EfiRuntimeServicesCode
, 0x030 },
44 { EfiBootServicesCode
, 0x180 },
45 { EfiBootServicesData
, 0xF00 },
46 { EfiMaxMemoryType
, 0x000 }
50 EFI_PEI_PPI_DESCRIPTOR mPpiBootMode
[] = {
52 EFI_PEI_PPI_DESCRIPTOR_PPI
| EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST
,
53 &gEfiPeiMasterBootModePpiGuid
,
60 AddIoMemoryBaseSizeHob (
61 EFI_PHYSICAL_ADDRESS MemoryBase
,
65 BuildResourceDescriptorHob (
66 EFI_RESOURCE_MEMORY_MAPPED_IO
,
67 EFI_RESOURCE_ATTRIBUTE_PRESENT
|
68 EFI_RESOURCE_ATTRIBUTE_INITIALIZED
|
69 EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE
|
70 EFI_RESOURCE_ATTRIBUTE_TESTED
,
79 EFI_PHYSICAL_ADDRESS MemoryBase
,
80 EFI_PHYSICAL_ADDRESS MemoryLimit
83 AddIoMemoryBaseSizeHob (MemoryBase
, (UINT64
)(MemoryLimit
- MemoryBase
));
88 AddMemoryBaseSizeHob (
89 EFI_PHYSICAL_ADDRESS MemoryBase
,
93 BuildResourceDescriptorHob (
94 EFI_RESOURCE_SYSTEM_MEMORY
,
95 EFI_RESOURCE_ATTRIBUTE_PRESENT
|
96 EFI_RESOURCE_ATTRIBUTE_INITIALIZED
|
97 EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE
|
98 EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE
|
99 EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE
|
100 EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE
|
101 EFI_RESOURCE_ATTRIBUTE_TESTED
,
110 EFI_PHYSICAL_ADDRESS MemoryBase
,
111 EFI_PHYSICAL_ADDRESS MemoryLimit
114 AddMemoryBaseSizeHob (MemoryBase
, (UINT64
)(MemoryLimit
- MemoryBase
));
119 AddUntestedMemoryBaseSizeHob (
120 EFI_PHYSICAL_ADDRESS MemoryBase
,
124 BuildResourceDescriptorHob (
125 EFI_RESOURCE_SYSTEM_MEMORY
,
126 EFI_RESOURCE_ATTRIBUTE_PRESENT
|
127 EFI_RESOURCE_ATTRIBUTE_INITIALIZED
|
128 EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE
|
129 EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE
|
130 EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE
|
131 EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE
,
139 AddUntestedMemoryRangeHob (
140 EFI_PHYSICAL_ADDRESS MemoryBase
,
141 EFI_PHYSICAL_ADDRESS MemoryLimit
144 AddUntestedMemoryBaseSizeHob (MemoryBase
, (UINT64
)(MemoryLimit
- MemoryBase
));
149 MemMapInitialization (
150 EFI_PHYSICAL_ADDRESS TopOfMemory
154 // Create Memory Type Information HOB
157 &gEfiMemoryTypeInformationGuid
,
158 mDefaultMemoryTypeInformation
,
159 sizeof(mDefaultMemoryTypeInformation
)
163 // Add PCI IO Port space available for PCI resource allocations.
165 BuildResourceDescriptorHob (
167 EFI_RESOURCE_ATTRIBUTE_PRESENT
|
168 EFI_RESOURCE_ATTRIBUTE_INITIALIZED
,
174 // Add PCI MMIO space available to PCI resource allocations
176 if (TopOfMemory
< BASE_2GB
) {
177 AddIoMemoryBaseSizeHob (BASE_2GB
, 0xFEC00000 - BASE_2GB
);
179 AddIoMemoryBaseSizeHob (TopOfMemory
, 0xFEC00000 - TopOfMemory
);
185 AddIoMemoryBaseSizeHob (0xFEC80000, SIZE_512KB
);
190 AddIoMemoryBaseSizeHob (0xFEC00000, SIZE_512KB
);
193 // Video memory + Legacy BIOS region
195 AddIoMemoryRangeHob (0x0A0000, BASE_1MB
);
209 // Build the CPU hob with 36-bit addressing and 16-bits of IO space.
211 BuildCpuHob (36, 16);
214 // Set the PM I/O base address to 0x400
216 PciAndThenOr32 (PCI_LIB_ADDRESS (0, 1, 3, 0x40), (UINT32
) ~0xfc0, 0x400);
221 BootModeInitialization (
226 Status
= PeiServicesSetBootMode (BOOT_WITH_FULL_CONFIGURATION
);
227 ASSERT_EFI_ERROR (Status
);
229 Status
= PeiServicesInstallPpi (mPpiBootMode
);
230 ASSERT_EFI_ERROR (Status
);
235 ReserveEmuVariableNvStore (
238 EFI_PHYSICAL_ADDRESS VariableStore
;
241 // Allocate storage for NV variables early on so it will be
242 // at a consistent address. Since VM memory is preserved
243 // across reboots, this allows the NV variable storage to survive
247 (EFI_PHYSICAL_ADDRESS
)(UINTN
)
248 AllocateRuntimePool (
249 2 * PcdGet32 (PcdFlashNvStorageFtwSpareSize
)
252 "Reserved variable store memory: 0x%lX; size: %dkb\n",
254 (2 * PcdGet32 (PcdFlashNvStorageFtwSpareSize
)) / 1024
256 PcdSet64 (PcdEmuVariableNvStoreReserved
, VariableStore
);
267 DEBUG ((EFI_D_INFO
, "CMOS:\n"));
269 for (Loop
= 0; Loop
< 0x80; Loop
++) {
270 if ((Loop
% 0x10) == 0) {
271 DEBUG ((EFI_D_INFO
, "%02x:", Loop
));
273 DEBUG ((EFI_D_INFO
, " %02x", CmosRead8 (Loop
)));
274 if ((Loop
% 0x10) == 0xf) {
275 DEBUG ((EFI_D_INFO
, "\n"));
282 Perform Platform PEI initialization.
284 @param FileHandle Handle of the file being invoked.
285 @param PeiServices Describes the list of possible PEI Services.
287 @return EFI_SUCCESS The PEIM initialized successfully.
293 IN EFI_PEI_FILE_HANDLE FileHandle
,
294 IN CONST EFI_PEI_SERVICES
**PeiServices
297 EFI_PHYSICAL_ADDRESS TopOfMemory
;
299 DEBUG ((EFI_D_ERROR
, "Platform PEIM Loaded\n"));
303 TopOfMemory
= MemDetect ();
305 ReserveEmuVariableNvStore ();
307 PeiFvInitialization ();
309 MemMapInitialization (TopOfMemory
);
311 MiscInitialization ();
313 BootModeInitialization ();