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1 /** @file
2 Platform PEI module include file.
3
4 Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>
5 SPDX-License-Identifier: BSD-2-Clause-Patent
6
7 **/
8
9 #ifndef _PLATFORM_PEI_H_INCLUDED_
10 #define _PLATFORM_PEI_H_INCLUDED_
11
12 #include <IndustryStandard/E820.h>
13
14 VOID
15 AddIoMemoryBaseSizeHob (
16 EFI_PHYSICAL_ADDRESS MemoryBase,
17 UINT64 MemorySize
18 );
19
20 VOID
21 AddIoMemoryRangeHob (
22 EFI_PHYSICAL_ADDRESS MemoryBase,
23 EFI_PHYSICAL_ADDRESS MemoryLimit
24 );
25
26 VOID
27 AddMemoryBaseSizeHob (
28 EFI_PHYSICAL_ADDRESS MemoryBase,
29 UINT64 MemorySize
30 );
31
32 VOID
33 AddMemoryRangeHob (
34 EFI_PHYSICAL_ADDRESS MemoryBase,
35 EFI_PHYSICAL_ADDRESS MemoryLimit
36 );
37
38 VOID
39 AddReservedMemoryBaseSizeHob (
40 EFI_PHYSICAL_ADDRESS MemoryBase,
41 UINT64 MemorySize,
42 BOOLEAN Cacheable
43 );
44
45 VOID
46 AddressWidthInitialization (
47 VOID
48 );
49
50 VOID
51 Q35TsegMbytesInitialization (
52 VOID
53 );
54
55 VOID
56 Q35SmramAtDefaultSmbaseInitialization (
57 VOID
58 );
59
60 EFI_STATUS
61 PublishPeiMemory (
62 VOID
63 );
64
65 UINT32
66 GetSystemMemorySizeBelow4gb (
67 VOID
68 );
69
70 VOID
71 QemuUc32BaseInitialization (
72 VOID
73 );
74
75 VOID
76 InitializeRamRegions (
77 VOID
78 );
79
80 EFI_STATUS
81 PeiFvInitialization (
82 VOID
83 );
84
85 VOID
86 InstallFeatureControlCallback (
87 VOID
88 );
89
90 VOID
91 InstallClearCacheCallback (
92 VOID
93 );
94
95 EFI_STATUS
96 InitializeXen (
97 VOID
98 );
99
100 BOOLEAN
101 XenDetect (
102 VOID
103 );
104
105 VOID
106 AmdSevInitialize (
107 VOID
108 );
109
110 extern BOOLEAN mXen;
111
112 VOID
113 XenPublishRamRegions (
114 VOID
115 );
116
117 extern EFI_BOOT_MODE mBootMode;
118
119 extern BOOLEAN mS3Supported;
120
121 extern UINT8 mPhysMemAddressWidth;
122
123 extern UINT32 mMaxCpuCount;
124
125 extern UINT16 mHostBridgeDevId;
126
127 extern BOOLEAN mQ35SmramAtDefaultSmbase;
128
129 extern UINT32 mQemuUc32Base;
130
131 #endif // _PLATFORM_PEI_H_INCLUDED_