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1 ;------------------------------------------------------------------------------
2 ; @file
3 ; First code executed by processor after resetting.
4 ;
5 ; Copyright (c) 2008 - 2014, Intel Corporation. All rights reserved.<BR>
6 ; Copyright (c) 2019, Citrix Systems, Inc.
7 ;
8 ; SPDX-License-Identifier: BSD-2-Clause-Patent
9 ;
10 ;------------------------------------------------------------------------------
11
12 BITS 16
13
14 ALIGN 16
15
16 ;
17 ; Pad the image size to 4k when page tables are in VTF0
18 ;
19 ; If the VTF0 image has page tables built in, then we need to make
20 ; sure the end of VTF0 is 4k above where the page tables end.
21 ;
22 ; This is required so the page tables will be 4k aligned when VTF0 is
23 ; located just below 0x100000000 (4GB) in the firmware device.
24 ;
25 %ifdef ALIGN_TOP_TO_4K_FOR_PAGING
26 TIMES (0x1000 - ($ - EndOfPageTables) - (fourGigabytes - xenPVHEntryPoint)) DB 0
27 %endif
28
29 BITS 32
30 xenPVHEntryPoint:
31 ;
32 ; Entry point to use when running as a Xen PVH guest. (0xffffffd0)
33 ;
34 ; Description of the expected state of the machine when this entry point is
35 ; used can be found at:
36 ; https://xenbits.xenproject.org/docs/unstable/misc/pvh.html
37 ;
38 jmp xenPVHMain
39
40 BITS 16
41 ALIGN 16
42
43 applicationProcessorEntryPoint:
44 ;
45 ; Application Processors entry point
46 ;
47 ; GenFv generates code aligned on a 4k boundary which will jump to this
48 ; location. (0xffffffe0) This allows the Local APIC Startup IPI to be
49 ; used to wake up the application processors.
50 ;
51 jmp EarlyApInitReal16
52
53 ALIGN 8
54
55 DD 0
56
57 ;
58 ; The VTF signature
59 ;
60 ; VTF-0 means that the VTF (Volume Top File) code does not require
61 ; any fixups.
62 ;
63 vtfSignature:
64 DB 'V', 'T', 'F', 0
65
66 ALIGN 16
67
68 resetVector:
69 ;
70 ; Reset Vector
71 ;
72 ; This is where the processor will begin execution
73 ;
74 jmp EarlyBspInitReal16
75
76 ALIGN 16
77
78 fourGigabytes:
79