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1 /** @file
2 This file describes the contents of the ACPI Fixed ACPI Description Table
3 (FADT). Some additional ACPI values are defined in Acpi1_0.h and Acpi2_0.h.
4 All changes to the FADT contents should be done in this file.
5
6 Copyright (c) 2013-2015 Intel Corporation.
7
8 SPDX-License-Identifier: BSD-2-Clause-Patent
9
10 **/
11
12 #include "Fadt.h"
13
14 EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE FADT = {
15 {
16 EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE,
17 sizeof (EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE),
18 EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION,
19 0, // to make sum of entire table == 0
20 {EFI_ACPI_OEM_ID}, // OEMID is a 6 bytes long field
21 EFI_ACPI_OEM_TABLE_ID,// OEM table identification(8 bytes long)
22 EFI_ACPI_OEM_REVISION,// OEM revision number
23 EFI_ACPI_CREATOR_ID, // ASL compiler vendor ID
24 EFI_ACPI_CREATOR_REVISION // ASL compiler revision number
25 },
26 0, // Physical addesss of FACS
27 0, // Physical address of DSDT
28 RESERVED, // reserved
29 PM_PROFILE, // Preferred powermanagement profile
30 SCI_INT_VECTOR, // System vector of SCI interrupt
31 ACPI_RUNTIME_UPDATE, // Port address of SMI command port
32 ACPI_ENABLE, // value to write to port smi_cmd to enable ACPI
33 ACPI_DISABLE, // value to write to port smi_cmd to disable ACPI
34 S4BIOS_REQ, // Value to write to SMI CMD port to enter the S4BIOS state
35 RESERVED, // reserved - must be zero
36 ACPI_RUNTIME_UPDATE, // Port address of Power Mgt 1a Event Reg Blk
37 PM1b_EVT_BLK_ADDRESS, // Port address of Power Mgt 1b Event Reg Blk
38 ACPI_RUNTIME_UPDATE, // Port address of Power Mgt 1a Ctrl Reg Blk
39 PM1b_CNT_BLK_ADDRESS, // Port address of Power Mgt 1b Ctrl Reg Blk
40 ACPI_RUNTIME_UPDATE, // Port address of Power Mgt 2 Ctrl Reg Blk
41 ACPI_RUNTIME_UPDATE, // Port address of Power Mgt Timer Ctrl Reg Blk
42 ACPI_RUNTIME_UPDATE, // Port addr of General Purpose Event 0 Reg Blk
43 GPE1_BLK_ADDRESS, // Port addr of General Purpose Event 1 Reg Blk
44 PM1_EVT_LEN, // Byte Length of ports at pm1X_evt_blk
45 PM1_CNT_LEN, // Byte Length of ports at pm1X_cnt_blk
46 PM2_CNT_LEN, // Byte Length of ports at pm2_cnt_blk
47 PM_TM_LEN, // Byte Length of ports at pm_tm_blk
48 GPE0_BLK_LEN, // Byte Length of ports at gpe0_blk
49 GPE1_BLK_LEN, // Byte Length of ports at gpe1_blk
50 GPE1_BASE, // offset in gpe model where gpe1 events start
51 RESERVED, // reserved
52 P_LVL2_LAT, // worst case HW latency to enter/exit C2 state
53 P_LVL3_LAT, // worst case HW latency to enter/exit C3 state
54 FLUSH_SIZE, // Size of area read to flush caches
55 FLUSH_STRIDE, // Stride used in flushing caches
56 DUTY_OFFSET, // bit location of duty cycle field in p_cnt reg
57 DUTY_WIDTH, // bit width of duty cycle field in p_cnt reg
58 DAY_ALRM, // index to day-of-month alarm in RTC CMOS RAM
59 MON_ALRM, // index to month-of-year alarm in RTC CMOS RAM
60 CENTURY, // index to century in RTC CMOS RAM
61 IAPC_BOOT_ARCH, // IA-PC Boot Architecture Flags
62 RESERVED, // reserved
63 FLAG2, // Fixed feature flags
64
65 {
66 RESET_REG_ADDRESS_SPACE_ID, // Address of the reset register
67 RESET_REG_BIT_WIDTH,
68 RESET_REG_BIT_OFFSET,
69 RESERVED,
70 RESET_REG_ADDRESS
71 },
72 RESET_VALUE, // Value to write to the RESET_REG port
73 {
74 RESERVED,
75 RESERVED,
76 RESERVED
77 },
78 0, // 64Bit physical addesss of FACS
79 0, // 64Bit physical address of DSDT
80
81 {
82 PM1a_EVT_BLK_ADDRESS_SPACE_ID, // Extended Port address of Power Mgt 1a Event Reg Blk
83 PM1a_EVT_BLK_BIT_WIDTH,
84 PM1a_EVT_BLK_BIT_OFFSET,
85 RESERVED,
86 ACPI_RUNTIME_UPDATE
87 },
88
89 {
90 PM1b_EVT_BLK_ADDRESS_SPACE_ID, // Extended Port address of Power Mgt 1b Event Reg Blk
91 PM1b_EVT_BLK_BIT_WIDTH,
92 PM1b_EVT_BLK_BIT_OFFSET,
93 RESERVED,
94 PM1b_EVT_BLK_ADDRESS
95 },
96
97 {
98 PM1a_CNT_BLK_ADDRESS_SPACE_ID, // Extended Port address of Power Mgt 1a Ctrl Reg Blk
99 PM1a_CNT_BLK_BIT_WIDTH,
100 PM1a_CNT_BLK_BIT_OFFSET,
101 RESERVED,
102 ACPI_RUNTIME_UPDATE
103 },
104
105 {
106 PM1b_CNT_BLK_ADDRESS_SPACE_ID, // Extended Port address of Power Mgt 1b Ctrl Reg Blk
107 PM1b_CNT_BLK_BIT_WIDTH,
108 PM1b_CNT_BLK_BIT_OFFSET,
109 RESERVED,
110 PM1b_CNT_BLK_ADDRESS
111 },
112
113 {
114 PM2_CNT_BLK_ADDRESS_SPACE_ID, // Extended Port address of Power Mgt 2 Ctrl Reg Blk
115 PM2_CNT_BLK_BIT_WIDTH,
116 PM2_CNT_BLK_BIT_OFFSET,
117 RESERVED,
118 ACPI_RUNTIME_UPDATE
119 },
120
121 {
122 PM_TMR_BLK_ADDRESS_SPACE_ID, // Extended Port address of Power Mgt Timer Ctrl Reg Blk
123 PM_TMR_BLK_BIT_WIDTH,
124 PM_TMR_BLK_BIT_OFFSET,
125 RESERVED,
126 ACPI_RUNTIME_UPDATE
127 },
128
129 {
130 GPE0_BLK_ADDRESS_SPACE_ID, // Extended Port address of General Purpose Event 0 Reg Blk
131 GPE0_BLK_BIT_WIDTH,
132 GPE0_BLK_BIT_OFFSET,
133 RESERVED,
134 ACPI_RUNTIME_UPDATE
135 },
136
137 {
138 GPE1_BLK_ADDRESS_SPACE_ID, // Extended Port address of General Purpose Event 1 Reg Blk
139 GPE1_BLK_BIT_WIDTH,
140 GPE1_BLK_BIT_OFFSET,
141 RESERVED,
142 GPE1_BLK_ADDRESS
143 }
144 };
145
146 VOID*
147 ReferenceAcpiTable (
148 VOID
149 )
150
151 {
152 //
153 // Reference the table being generated to prevent the optimizer from removing the
154 // data structure from the exeutable
155 //
156 return (VOID*)&FADT;
157 }