2 Quark platform specific information.
4 Copyright (c) 2013 Intel Corporation.
6 This program and the accompanying materials
7 are licensed and made available under the terms and conditions of the BSD License
8 which accompanies this distribution. The full text of the license may be found at
9 http://opensource.org/licenses/bsd-license.php
11 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
18 #ifndef __PLATFORM_H__
19 #define __PLATFORM_H__
22 // Constant definition
24 #define MAX_SMRAM_RANGES 4
27 #define QUARK_STAGE1_IMAGE_TYPE_MASK 0xF0
28 #define QUARK_STAGE1_BOOT_IMAGE_TYPE 0x00 // Stage1 Boot images 0x00 -> 0x0F.
29 #define QUARK_STAGE1_RECOVERY_IMAGE_TYPE 0x10 // Stage1 Recovery images 0x10 -> 0x1F.
31 #define QUARK_BOOTROM_BASE_ADDRESS 0xFFFE0000 // Base address of Quark ROM in memory map.
32 #define QUARK_BOOTROM_SIZE_BYTES 0x20000 // Quark ROM is 128KB.
33 #define SMM_DEFAULT_SMBASE 0x30000 // Default SMBASE address.
34 #define SMM_DEFAULT_SMBASE_SIZE_BYTES 0x10000 // Size in bytes of default SMRAM.
37 // Gpio to be used to assert / deassert PCI express PERST# signal.
39 #define PCIEXP_PERST_RESUMEWELL_GPIO 3
42 // Minimum time in microseconds for assertion of PERST# signal.
44 #define PCIEXP_PERST_MIN_ASSERT_US 100
47 // Microsecond delay post issueing common lane reset.
49 #define PCIEXP_DELAY_US_POST_CMNRESET_RESET 1
52 // Microsecond delay to wait for PLL to lock.
54 #define PCIEXP_DELAY_US_WAIT_PLL_LOCK 80
57 // Microsecond delay post issueing sideband interface reset.
59 #define PCIEXP_DELAY_US_POST_SBI_RESET 20
62 // Microsecond delay post deasserting PERST#.
64 #define PCIEXP_DELAY_US_POST_PERST_DEASSERT 10
67 // Catastrophic Trip point in degrees Celsius for this platform.
69 #define PLATFORM_CATASTROPHIC_TRIP_CELSIUS 105
72 // Platform flash update LED common definitions.
74 #define PLATFORM_FLASH_UPDATE_LED_TOGGLE_COUNT 7
75 #define PLATFORM_FLASH_UPDATE_LED_TOGGLE_DELTA (1000 * 1000) // In Microseconds for EFI_STALL.
78 // This structure stores the base and size of the ACPI reserved memory used when
79 // resuming from S3. This region must be allocated by the platform code.
82 UINT32 AcpiReservedMemoryBase
;
83 UINT32 AcpiReservedMemorySize
;
84 UINT32 SystemMemoryLength
;
85 } RESERVED_ACPI_S3_RANGE
;
87 #define RESERVED_ACPI_S3_RANGE_OFFSET (EFI_PAGE_SIZE - sizeof (RESERVED_ACPI_S3_RANGE))
90 // Define valid platform types.
91 // First add value before TypePlatformMax in EFI_PLATFORM_TYPE definition
92 // and then add string description to end of EFI_PLATFORM_TYPE_NAME_TABLE_DEFINITION.
93 // Value shown for supported platforms to help sanity checking with build tools
94 // and ACPI method usage.
97 TypeUnknown
= 0, // !!! SHOULD BE THE FIRST ENTRY !!!
104 TypePlatformRsv7
= 7,
106 TypePlatformMax
// !!! SHOULD BE THE LAST ENTRY !!!
109 #define EFI_PLATFORM_TYPE_NAME_TABLE_DEFINITION \
117 L"TypePlatformRsv7",\
123 } QUARK_EDKII_STAGE1_HEADER
;