2 Platform Erratas performed by early init PEIM driver.
4 Copyright (c) 2013 Intel Corporation.
6 SPDX-License-Identifier: BSD-2-Clause-Patent
10 #include "CommonHeader.h"
11 #include "PlatformEarlyInit.h"
18 // Platform EHCI Packet Buffer OUT/IN Thresholds, values in number of DWORDs.
20 #define EHCI_OUT_THRESHOLD_VALUE (0x7f)
21 #define EHCI_IN_THRESHOLD_VALUE (0x7f)
24 // Platform init USB device interrupt masks.
26 #define V_IOH_USBDEVICE_D_INTR_MSK_UDC_REG (0x0000007f)
27 #define V_IOH_USBDEVICE_EP_INTR_MSK_UDC_REG (B_IOH_USBDEVICE_EP_INTR_MSK_UDC_REG_OUT_EP_MASK | B_IOH_USBDEVICE_EP_INTR_MSK_UDC_REG_IN_EP_MASK)
30 // Global variables defined within this source module.
33 UINTN IohEhciPciReg
[IOH_MAX_EHCI_USB_CONTROLLERS
] = {
34 PCI_LIB_ADDRESS (IOH_USB_BUS_NUMBER
, IOH_USB_EHCI_DEVICE_NUMBER
, IOH_EHCI_FUNCTION_NUMBER
, 0),
37 UINTN IohUsbDevicePciReg
[IOH_MAX_USBDEVICE_USB_CONTROLLERS
] = {
38 PCI_LIB_ADDRESS (IOH_USB_BUS_NUMBER
, IOH_USBDEVICE_DEVICE_NUMBER
, IOH_USBDEVICE_FUNCTION_NUMBER
, 0),
42 // Routines local to this source module.
45 /** Perform USB erratas after MRC init.
49 PlatformUsbErratasPostMrc (
58 TempBar0Addr
= PcdGet32(PcdPeiQNCUsbControllerMemoryBaseAddress
);
61 // Apply EHCI controller erratas.
63 for (Index
= 0; Index
< IOH_MAX_EHCI_USB_CONTROLLERS
; Index
++, TempBar0Addr
+= IOH_USB_CONTROLLER_MMIO_RANGE
) {
65 if ((PciRead16 (IohEhciPciReg
[Index
] + R_IOH_USB_VENDOR_ID
)) != V_IOH_USB_VENDOR_ID
) {
66 continue; // Device not enabled, skip.
70 // Save current settings for PCI CMD/BAR0 registers
72 SaveCmdReg
= PciRead16 (IohEhciPciReg
[Index
] + R_IOH_USB_COMMAND
);
73 SaveBar0Reg
= PciRead32 (IohEhciPciReg
[Index
] + R_IOH_USB_MEMBAR
);
76 // Temp. assign base address register, Enable Memory Space.
78 PciWrite32 ((IohEhciPciReg
[Index
] + R_IOH_USB_MEMBAR
), TempBar0Addr
);
79 PciWrite16 (IohEhciPciReg
[Index
] + R_IOH_USB_COMMAND
, SaveCmdReg
| B_IOH_USB_COMMAND_MSE
);
83 // Set packet buffer OUT/IN thresholds.
86 TempBar0Addr
+ R_IOH_EHCI_INSNREG01
,
87 (UINT32
) (~(B_IOH_EHCI_INSNREG01_OUT_THRESHOLD_MASK
| B_IOH_EHCI_INSNREG01_IN_THRESHOLD_MASK
)),
88 (UINT32
) ((EHCI_OUT_THRESHOLD_VALUE
<< B_IOH_EHCI_INSNREG01_OUT_THRESHOLD_BP
) | (EHCI_IN_THRESHOLD_VALUE
<< B_IOH_EHCI_INSNREG01_IN_THRESHOLD_BP
))
92 // Restore settings for PCI CMD/BAR0 registers
94 PciWrite32 ((IohEhciPciReg
[Index
] + R_IOH_USB_MEMBAR
), SaveBar0Reg
);
95 PciWrite16 (IohEhciPciReg
[Index
] + R_IOH_USB_COMMAND
, SaveCmdReg
);
99 // Apply USB device controller erratas.
101 for (Index
= 0; Index
< IOH_MAX_USBDEVICE_USB_CONTROLLERS
; Index
++, TempBar0Addr
+= IOH_USB_CONTROLLER_MMIO_RANGE
) {
103 if ((PciRead16 (IohUsbDevicePciReg
[Index
] + R_IOH_USB_VENDOR_ID
)) != V_IOH_USB_VENDOR_ID
) {
104 continue; // Device not enabled, skip.
108 // Save current settings for PCI CMD/BAR0 registers
110 SaveCmdReg
= PciRead16 (IohUsbDevicePciReg
[Index
] + R_IOH_USB_COMMAND
);
111 SaveBar0Reg
= PciRead32 (IohUsbDevicePciReg
[Index
] + R_IOH_USB_MEMBAR
);
114 // Temp. assign base address register, Enable Memory Space.
116 PciWrite32 ((IohUsbDevicePciReg
[Index
] + R_IOH_USB_MEMBAR
), TempBar0Addr
);
117 PciWrite16 (IohUsbDevicePciReg
[Index
] + R_IOH_USB_COMMAND
, SaveCmdReg
| B_IOH_USB_COMMAND_MSE
);
120 // Erratas for USB Device interrupt registers.
124 // 1st Mask interrupts.
127 TempBar0Addr
+ R_IOH_USBDEVICE_D_INTR_MSK_UDC_REG
,
128 V_IOH_USBDEVICE_D_INTR_MSK_UDC_REG
131 // 2nd RW/1C of equivalent status bits.
134 TempBar0Addr
+ R_IOH_USBDEVICE_D_INTR_UDC_REG
,
135 V_IOH_USBDEVICE_D_INTR_MSK_UDC_REG
139 // 1st Mask end point interrupts.
142 TempBar0Addr
+ R_IOH_USBDEVICE_EP_INTR_MSK_UDC_REG
,
143 V_IOH_USBDEVICE_EP_INTR_MSK_UDC_REG
146 // 2nd RW/1C of equivalent end point status bits.
149 TempBar0Addr
+ R_IOH_USBDEVICE_EP_INTR_UDC_REG
,
150 V_IOH_USBDEVICE_EP_INTR_MSK_UDC_REG
154 // Restore settings for PCI CMD/BAR0 registers
156 PciWrite32 ((IohUsbDevicePciReg
[Index
] + R_IOH_USB_MEMBAR
), SaveBar0Reg
);
157 PciWrite16 (IohUsbDevicePciReg
[Index
] + R_IOH_USB_COMMAND
, SaveCmdReg
);
162 // Routines exported by this source module.
165 /** Perform Platform Erratas after MRC.
167 @retval EFI_SUCCESS Operation success.
172 PlatformErratasPostMrc (
176 PlatformUsbErratasPostMrc ();