2 TIS (TPM Interface Specification) functions used by TPM1.2.
4 Copyright (c) 2013 - 2016, Intel Corporation. All rights reserved.<BR>
5 (C) Copyright 2015 Hewlett Packard Enterprise Development LP<BR>
6 This program and the accompanying materials
7 are licensed and made available under the terms and conditions of the BSD License
8 which accompanies this distribution. The full text of the license may be found at
9 http://opensource.org/licenses/bsd-license.php
11 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
17 #include <IndustryStandard/Tpm12.h>
18 #include <Library/BaseLib.h>
19 #include <Library/BaseMemoryLib.h>
20 #include <Library/IoLib.h>
21 #include <Library/TimerLib.h>
22 #include <Library/DebugLib.h>
23 #include <Library/Tpm12CommandLib.h>
24 #include <Library/PcdLib.h>
26 #include <IndustryStandard/TpmPtp.h>
27 #include <IndustryStandard/TpmTis.h>
37 // Max TPM command/reponse length
39 #define TPMCMDBUFLENGTH 1024
42 Check whether TPM chip exist.
44 @param[in] TisReg Pointer to TIS register.
46 @retval TRUE TPM chip exists.
47 @retval FALSE TPM chip is not found.
50 Tpm12TisPcPresenceCheck (
51 IN TIS_PC_REGISTERS_PTR TisReg
56 RegRead
= MmioRead8 ((UINTN
)&TisReg
->Access
);
57 return (BOOLEAN
)(RegRead
!= (UINT8
)-1);
61 Return PTP interface type.
63 @param[in] Register Pointer to PTP register.
65 @return PTP interface type.
68 Tpm12GetPtpInterface (
72 PTP_CRB_INTERFACE_IDENTIFIER InterfaceId
;
73 PTP_FIFO_INTERFACE_CAPABILITY InterfaceCapability
;
75 if (!Tpm12TisPcPresenceCheck (Register
)) {
76 return PtpInterfaceMax
;
81 InterfaceId
.Uint32
= MmioRead32 ((UINTN
)&((PTP_CRB_REGISTERS
*)Register
)->InterfaceId
);
82 InterfaceCapability
.Uint32
= MmioRead32 ((UINTN
)&((PTP_FIFO_REGISTERS
*)Register
)->InterfaceCapability
);
84 if ((InterfaceId
.Bits
.InterfaceType
== PTP_INTERFACE_IDENTIFIER_INTERFACE_TYPE_CRB
) &&
85 (InterfaceId
.Bits
.InterfaceVersion
== PTP_INTERFACE_IDENTIFIER_INTERFACE_VERSION_CRB
) &&
86 (InterfaceId
.Bits
.CapCRB
!= 0)) {
87 return PtpInterfaceCrb
;
89 if ((InterfaceId
.Bits
.InterfaceType
== PTP_INTERFACE_IDENTIFIER_INTERFACE_TYPE_FIFO
) &&
90 (InterfaceId
.Bits
.InterfaceVersion
== PTP_INTERFACE_IDENTIFIER_INTERFACE_VERSION_FIFO
) &&
91 (InterfaceId
.Bits
.CapFIFO
!= 0) &&
92 (InterfaceCapability
.Bits
.InterfaceVersion
== INTERFACE_CAPABILITY_INTERFACE_VERSION_PTP
)) {
93 return PtpInterfaceFifo
;
95 return PtpInterfaceTis
;
99 Check whether the value of a TPM chip register satisfies the input BIT setting.
101 @param[in] Register Address port of register to be checked.
102 @param[in] BitSet Check these data bits are set.
103 @param[in] BitClear Check these data bits are clear.
104 @param[in] TimeOut The max wait time (unit MicroSecond) when checking register.
106 @retval EFI_SUCCESS The register satisfies the check bit.
107 @retval EFI_TIMEOUT The register can't run into the expected status in time.
110 Tpm12TisPcWaitRegisterBits (
120 for (WaitTime
= 0; WaitTime
< TimeOut
; WaitTime
+= 30){
121 RegRead
= MmioRead8 ((UINTN
)Register
);
122 if ((RegRead
& BitSet
) == BitSet
&& (RegRead
& BitClear
) == 0)
124 MicroSecondDelay (30);
130 Get BurstCount by reading the burstCount field of a TIS regiger
131 in the time of default TIS_TIMEOUT_D.
133 @param[in] TisReg Pointer to TIS register.
134 @param[out] BurstCount Pointer to a buffer to store the got BurstConut.
136 @retval EFI_SUCCESS Get BurstCount.
137 @retval EFI_INVALID_PARAMETER TisReg is NULL or BurstCount is NULL.
138 @retval EFI_TIMEOUT BurstCount can't be got in time.
141 Tpm12TisPcReadBurstCount (
142 IN TIS_PC_REGISTERS_PTR TisReg
,
143 OUT UINT16
*BurstCount
150 if (BurstCount
== NULL
|| TisReg
== NULL
) {
151 return EFI_INVALID_PARAMETER
;
157 // TIS_PC_REGISTERS_PTR->burstCount is UINT16, but it is not 2bytes aligned,
158 // so it needs to use MmioRead8 to read two times
160 DataByte0
= MmioRead8 ((UINTN
)&TisReg
->BurstCount
);
161 DataByte1
= MmioRead8 ((UINTN
)&TisReg
->BurstCount
+ 1);
162 *BurstCount
= (UINT16
)((DataByte1
<< 8) + DataByte0
);
163 if (*BurstCount
!= 0) {
166 MicroSecondDelay (30);
168 } while (WaitTime
< TIS_TIMEOUT_D
);
174 Set TPM chip to ready state by sending ready command TIS_PC_STS_READY
175 to Status Register in time.
177 @param[in] TisReg Pointer to TIS register.
179 @retval EFI_SUCCESS TPM chip enters into ready state.
180 @retval EFI_INVALID_PARAMETER TisReg is NULL.
181 @retval EFI_TIMEOUT TPM chip can't be set to ready state in time.
184 Tpm12TisPcPrepareCommand (
185 IN TIS_PC_REGISTERS_PTR TisReg
190 if (TisReg
== NULL
) {
191 return EFI_INVALID_PARAMETER
;
194 MmioWrite8((UINTN
)&TisReg
->Status
, TIS_PC_STS_READY
);
195 Status
= Tpm12TisPcWaitRegisterBits (
205 Get the control of TPM chip by sending requestUse command TIS_PC_ACC_RQUUSE
206 to ACCESS Register in the time of default TIS_TIMEOUT_A.
208 @param[in] TisReg Pointer to TIS register.
210 @retval EFI_SUCCESS Get the control of TPM chip.
211 @retval EFI_INVALID_PARAMETER TisReg is NULL.
212 @retval EFI_NOT_FOUND TPM chip doesn't exit.
213 @retval EFI_TIMEOUT Can't get the TPM control in time.
216 Tpm12TisPcRequestUseTpm (
217 IN TIS_PC_REGISTERS_PTR TisReg
222 if (TisReg
== NULL
) {
223 return EFI_INVALID_PARAMETER
;
226 if (!Tpm12TisPcPresenceCheck (TisReg
)) {
227 return EFI_NOT_FOUND
;
230 MmioWrite8((UINTN
)&TisReg
->Access
, TIS_PC_ACC_RQUUSE
);
231 Status
= Tpm12TisPcWaitRegisterBits (
233 (UINT8
)(TIS_PC_ACC_ACTIVE
|TIS_PC_VALID
),
241 Send a command to TPM for execution and return response data.
243 @param[in] TisReg TPM register space base address.
244 @param[in] BufferIn Buffer for command data.
245 @param[in] SizeIn Size of command data.
246 @param[in, out] BufferOut Buffer for response data.
247 @param[in, out] SizeOut Size of response data.
249 @retval EFI_SUCCESS Operation completed successfully.
250 @retval EFI_BUFFER_TOO_SMALL Response data buffer is too small.
251 @retval EFI_DEVICE_ERROR Unexpected device behavior.
252 @retval EFI_UNSUPPORTED Unsupported TPM version
257 IN TIS_PC_REGISTERS_PTR TisReg
,
260 IN OUT UINT8
*BufferOut
,
261 IN OUT UINT32
*SizeOut
275 DEBUG ((EFI_D_VERBOSE
, "Tpm12TisTpmCommand Send - "));
276 if (SizeIn
> 0x100) {
281 for (Index
= 0; Index
< DebugSize
; Index
++) {
282 DEBUG ((EFI_D_VERBOSE
, "%02x ", BufferIn
[Index
]));
284 if (DebugSize
!= SizeIn
) {
285 DEBUG ((EFI_D_VERBOSE
, "...... "));
286 for (Index
= SizeIn
- 0x20; Index
< SizeIn
; Index
++) {
287 DEBUG ((EFI_D_VERBOSE
, "%02x ", BufferIn
[Index
]));
290 DEBUG ((EFI_D_VERBOSE
, "\n"));
294 Status
= Tpm12TisPcPrepareCommand (TisReg
);
295 if (EFI_ERROR (Status
)){
296 DEBUG ((DEBUG_ERROR
, "Tpm12 is not ready for command!\n"));
297 return EFI_DEVICE_ERROR
;
300 // Send the command data to Tpm
303 while (Index
< SizeIn
) {
304 Status
= Tpm12TisPcReadBurstCount (TisReg
, &BurstCount
);
305 if (EFI_ERROR (Status
)) {
306 Status
= EFI_DEVICE_ERROR
;
309 for (; BurstCount
> 0 && Index
< SizeIn
; BurstCount
--) {
310 MmioWrite8((UINTN
)&TisReg
->DataFifo
, *(BufferIn
+ Index
));
315 // Check the Tpm status STS_EXPECT change from 1 to 0
317 Status
= Tpm12TisPcWaitRegisterBits (
319 (UINT8
) TIS_PC_VALID
,
323 if (EFI_ERROR (Status
)) {
324 DEBUG ((DEBUG_ERROR
, "Tpm12 The send buffer too small!\n"));
325 Status
= EFI_BUFFER_TOO_SMALL
;
329 // Executed the TPM command and waiting for the response data ready
331 MmioWrite8((UINTN
)&TisReg
->Status
, TIS_PC_STS_GO
);
332 Status
= Tpm12TisPcWaitRegisterBits (
334 (UINT8
) (TIS_PC_VALID
| TIS_PC_STS_DATA
),
338 if (EFI_ERROR (Status
)) {
339 DEBUG ((DEBUG_ERROR
, "Wait for Tpm12 response data time out!!\n"));
340 Status
= EFI_DEVICE_ERROR
;
344 // Get response data header
348 while (Index
< sizeof (TPM_RSP_COMMAND_HDR
)) {
349 Status
= Tpm12TisPcReadBurstCount (TisReg
, &BurstCount
);
350 if (EFI_ERROR (Status
)) {
351 Status
= EFI_DEVICE_ERROR
;
354 for (; BurstCount
> 0; BurstCount
--) {
355 *(BufferOut
+ Index
) = MmioRead8 ((UINTN
)&TisReg
->DataFifo
);
357 if (Index
== sizeof (TPM_RSP_COMMAND_HDR
)) break;
361 DEBUG ((EFI_D_VERBOSE
, "Tpm12TisTpmCommand ReceiveHeader - "));
362 for (Index
= 0; Index
< sizeof (TPM_RSP_COMMAND_HDR
); Index
++) {
363 DEBUG ((EFI_D_VERBOSE
, "%02x ", BufferOut
[Index
]));
365 DEBUG ((EFI_D_VERBOSE
, "\n"));
368 // Check the response data header (tag, parasize and returncode)
370 CopyMem (&Data16
, BufferOut
, sizeof (UINT16
));
371 RspTag
= SwapBytes16 (Data16
);
372 if (RspTag
!= TPM_TAG_RSP_COMMAND
&& RspTag
!= TPM_TAG_RSP_AUTH1_COMMAND
&& RspTag
!= TPM_TAG_RSP_AUTH2_COMMAND
) {
373 DEBUG ((EFI_D_ERROR
, "TPM12: Response tag error - current tag value is %x\n", RspTag
));
374 Status
= EFI_UNSUPPORTED
;
378 CopyMem (&Data32
, (BufferOut
+ 2), sizeof (UINT32
));
379 TpmOutSize
= SwapBytes32 (Data32
);
380 if (*SizeOut
< TpmOutSize
) {
381 Status
= EFI_BUFFER_TOO_SMALL
;
384 *SizeOut
= TpmOutSize
;
386 // Continue reading the remaining data
388 while ( Index
< TpmOutSize
) {
389 for (; BurstCount
> 0; BurstCount
--) {
390 *(BufferOut
+ Index
) = MmioRead8 ((UINTN
)&TisReg
->DataFifo
);
392 if (Index
== TpmOutSize
) {
393 Status
= EFI_SUCCESS
;
397 Status
= Tpm12TisPcReadBurstCount (TisReg
, &BurstCount
);
398 if (EFI_ERROR (Status
)) {
399 Status
= EFI_DEVICE_ERROR
;
405 DEBUG ((EFI_D_VERBOSE
, "Tpm12TisTpmCommand Receive - "));
406 for (Index
= 0; Index
< TpmOutSize
; Index
++) {
407 DEBUG ((EFI_D_VERBOSE
, "%02x ", BufferOut
[Index
]));
409 DEBUG ((EFI_D_VERBOSE
, "\n"));
411 MmioWrite8((UINTN
)&TisReg
->Status
, TIS_PC_STS_READY
);
416 This service enables the sending of commands to the TPM12.
418 @param[in] InputParameterBlockSize Size of the TPM12 input parameter block.
419 @param[in] InputParameterBlock Pointer to the TPM12 input parameter block.
420 @param[in,out] OutputParameterBlockSize Size of the TPM12 output parameter block.
421 @param[in] OutputParameterBlock Pointer to the TPM12 output parameter block.
423 @retval EFI_SUCCESS The command byte stream was successfully sent to the device and a response was successfully received.
424 @retval EFI_DEVICE_ERROR The command was not successfully sent to the device or a response was not successfully received from the device.
425 @retval EFI_BUFFER_TOO_SMALL The output parameter block is too small.
430 IN UINT32 InputParameterBlockSize
,
431 IN UINT8
*InputParameterBlock
,
432 IN OUT UINT32
*OutputParameterBlockSize
,
433 IN UINT8
*OutputParameterBlock
436 PTP_INTERFACE_TYPE PtpInterface
;
439 // Special handle for TPM1.2 to check PTP too, because PTP/TIS share same register address.
441 PtpInterface
= Tpm12GetPtpInterface ((VOID
*) (UINTN
) PcdGet64 (PcdTpmBaseAddress
));
442 switch (PtpInterface
) {
443 case PtpInterfaceFifo
:
444 case PtpInterfaceTis
:
445 return Tpm12TisTpmCommand (
446 (TIS_PC_REGISTERS_PTR
) (UINTN
) PcdGet64 (PcdTpmBaseAddress
),
448 InputParameterBlockSize
,
449 OutputParameterBlock
,
450 OutputParameterBlockSize
452 case PtpInterfaceCrb
:
454 // No need to support CRB because it is only accept TPM2 command.
457 return EFI_DEVICE_ERROR
;
463 Check whether the value of a TPM chip register satisfies the input BIT setting.
465 @param[in] Register Address port of register to be checked.
466 @param[in] BitSet Check these data bits are set.
467 @param[in] BitClear Check these data bits are clear.
468 @param[in] TimeOut The max wait time (unit MicroSecond) when checking register.
470 @retval EFI_SUCCESS The register satisfies the check bit.
471 @retval EFI_TIMEOUT The register can't run into the expected status in time.
474 Tpm12PtpCrbWaitRegisterBits (
484 for (WaitTime
= 0; WaitTime
< TimeOut
; WaitTime
+= 30){
485 RegRead
= MmioRead32 ((UINTN
)Register
);
486 if ((RegRead
& BitSet
) == BitSet
&& (RegRead
& BitClear
) == 0) {
489 MicroSecondDelay (30);
495 Get the control of TPM chip.
497 @param[in] CrbReg Pointer to CRB register.
499 @retval EFI_SUCCESS Get the control of TPM chip.
500 @retval EFI_INVALID_PARAMETER CrbReg is NULL.
501 @retval EFI_NOT_FOUND TPM chip doesn't exit.
502 @retval EFI_TIMEOUT Can't get the TPM control in time.
505 Tpm12PtpCrbRequestUseTpm (
506 IN PTP_CRB_REGISTERS_PTR CrbReg
511 MmioWrite32((UINTN
)&CrbReg
->LocalityControl
, PTP_CRB_LOCALITY_CONTROL_REQUEST_ACCESS
);
512 Status
= Tpm12PtpCrbWaitRegisterBits (
513 &CrbReg
->LocalityStatus
,
514 PTP_CRB_LOCALITY_STATUS_GRANTED
,
522 This service requests use TPM12.
524 @retval EFI_SUCCESS Get the control of TPM12 chip.
525 @retval EFI_NOT_FOUND TPM12 not found.
526 @retval EFI_DEVICE_ERROR Unexpected device behavior.
534 PTP_INTERFACE_TYPE PtpInterface
;
537 // Special handle for TPM1.2 to check PTP too, because PTP/TIS share same register address.
538 // Some other program might leverage this function to check the existence of TPM chip.
540 PtpInterface
= Tpm12GetPtpInterface ((VOID
*) (UINTN
) PcdGet64 (PcdTpmBaseAddress
));
541 switch (PtpInterface
) {
542 case PtpInterfaceCrb
:
543 return Tpm12PtpCrbRequestUseTpm ((PTP_CRB_REGISTERS_PTR
) (UINTN
) PcdGet64 (PcdTpmBaseAddress
));
544 case PtpInterfaceFifo
:
545 case PtpInterfaceTis
:
546 return Tpm12TisPcRequestUseTpm ((TIS_PC_REGISTERS_PTR
) (UINTN
) PcdGet64 (PcdTpmBaseAddress
));
548 return EFI_NOT_FOUND
;