2 TIS (TPM Interface Specification) functions used by dTPM2.0 library.
4 Copyright (c) 2013 - 2015, Intel Corporation. All rights reserved.<BR>
5 This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
15 #include <IndustryStandard/Tpm20.h>
17 #include <Library/BaseLib.h>
18 #include <Library/BaseMemoryLib.h>
19 #include <Library/IoLib.h>
20 #include <Library/TimerLib.h>
21 #include <Library/DebugLib.h>
22 #include <Library/Tpm2DeviceLib.h>
23 #include <Library/PcdLib.h>
26 // Set structure alignment to 1-byte
31 // Register set map as specified in TIS specification Chapter 10
35 /// Used to gain ownership for this particular port.
38 UINT8 Reserved1
[7]; // 1
40 /// Controls interrupts.
42 UINT32 IntEnable
; // 8
44 /// SIRQ vector to be used by the TPM.
46 UINT8 IntVector
; // 0ch
47 UINT8 Reserved2
[3]; // 0dh
49 /// What caused interrupt.
53 /// Shows which interrupts are supported by that particular TPM.
55 UINT32 IntfCapability
; // 14h
57 /// Status Register. Provides status of the TPM.
61 /// Number of consecutive writes that can be done to the TPM.
63 UINT16 BurstCount
; // 19h
65 /// TPM2 support CANCEL at BIT[24] of STATUS register (WO)
67 UINT8 StatusEx
; // 1Bh
70 /// Read or write FIFO, depending on transaction.
72 UINT32 DataFifo
; // 24h
73 UINT8 Reserved4
[0xed8]; // 28h
87 /// TCG defined configuration registers.
89 UINT8 TcgDefined
[0x7b]; // 0f05h
91 /// Alias to I/O legacy space.
93 UINT32 LegacyAddress1
; // 0f80h
95 /// Additional 8 bits for I/O legacy space extension.
97 UINT32 LegacyAddress1Ex
; // 0f84h
99 /// Alias to second I/O legacy space.
101 UINT32 LegacyAddress2
; // 0f88h
103 /// Additional 8 bits for second I/O legacy space extension.
105 UINT32 LegacyAddress2Ex
; // 0f8ch
107 /// Vendor-defined configuration registers.
109 UINT8 VendorDefined
[0x70];// 0f90h
113 // Restore original structure alignment
118 // Define pointer types used to access TIS registers on PC
120 typedef TIS_PC_REGISTERS
*TIS_PC_REGISTERS_PTR
;
123 // Define bits of ACCESS and STATUS registers
127 /// This bit is a 1 to indicate that the other bits in this register are valid.
129 #define TIS_PC_VALID BIT7
131 /// Indicate that this locality is active.
133 #define TIS_PC_ACC_ACTIVE BIT5
135 /// Set to 1 to indicate that this locality had the TPM taken away while
136 /// this locality had the TIS_PC_ACC_ACTIVE bit set.
138 #define TIS_PC_ACC_SEIZED BIT4
140 /// Set to 1 to indicate that TPM MUST reset the
141 /// TIS_PC_ACC_ACTIVE bit and remove ownership for localities less than the
142 /// locality that is writing this bit.
144 #define TIS_PC_ACC_SEIZE BIT3
146 /// When this bit is 1, another locality is requesting usage of the TPM.
148 #define TIS_PC_ACC_PENDIND BIT2
150 /// Set to 1 to indicate that this locality is requesting to use TPM.
152 #define TIS_PC_ACC_RQUUSE BIT1
154 /// A value of 1 indicates that a T/OS has not been established on the platform
156 #define TIS_PC_ACC_ESTABLISH BIT0
159 /// When this bit is 1, TPM is in the Ready state,
160 /// indicating it is ready to receive a new command.
162 #define TIS_PC_STS_READY BIT6
164 /// Write a 1 to this bit to cause the TPM to execute that command.
166 #define TIS_PC_STS_GO BIT5
168 /// This bit indicates that the TPM has data available as a response.
170 #define TIS_PC_STS_DATA BIT4
172 /// The TPM sets this bit to a value of 1 when it expects another byte of data for a command.
174 #define TIS_PC_STS_EXPECT BIT3
176 /// Writes a 1 to this bit to force the TPM to re-send the response.
178 #define TIS_PC_STS_RETRY BIT1
181 // Default TimeOut value
183 #define TIS_TIMEOUT_A (1000 * 1000) // 1s
184 #define TIS_TIMEOUT_B (2000 * 1000) // 2s
185 #define TIS_TIMEOUT_C (1000 * 1000) // 1s
186 #define TIS_TIMEOUT_D (1000 * 1000) // 1s
188 #define TIS_TIMEOUT_MAX (90000 * 1000) // 90s
191 // Max TPM command/reponse length
193 #define TPMCMDBUFLENGTH 0x500
196 Check whether TPM chip exist.
198 @param[in] TisReg Pointer to TIS register.
200 @retval TRUE TPM chip exists.
201 @retval FALSE TPM chip is not found.
205 IN TIS_PC_REGISTERS_PTR TisReg
210 RegRead
= MmioRead8 ((UINTN
)&TisReg
->Access
);
211 return (BOOLEAN
)(RegRead
!= (UINT8
)-1);
215 Check whether the value of a TPM chip register satisfies the input BIT setting.
217 @param[in] Register Address port of register to be checked.
218 @param[in] BitSet Check these data bits are set.
219 @param[in] BitClear Check these data bits are clear.
220 @param[in] TimeOut The max wait time (unit MicroSecond) when checking register.
222 @retval EFI_SUCCESS The register satisfies the check bit.
223 @retval EFI_TIMEOUT The register can't run into the expected status in time.
226 TisPcWaitRegisterBits (
236 for (WaitTime
= 0; WaitTime
< TimeOut
; WaitTime
+= 30){
237 RegRead
= MmioRead8 ((UINTN
)Register
);
238 if ((RegRead
& BitSet
) == BitSet
&& (RegRead
& BitClear
) == 0)
240 MicroSecondDelay (30);
246 Get BurstCount by reading the burstCount field of a TIS regiger
247 in the time of default TIS_TIMEOUT_D.
249 @param[in] TisReg Pointer to TIS register.
250 @param[out] BurstCount Pointer to a buffer to store the got BurstConut.
252 @retval EFI_SUCCESS Get BurstCount.
253 @retval EFI_INVALID_PARAMETER TisReg is NULL or BurstCount is NULL.
254 @retval EFI_TIMEOUT BurstCount can't be got in time.
257 TisPcReadBurstCount (
258 IN TIS_PC_REGISTERS_PTR TisReg
,
259 OUT UINT16
*BurstCount
266 if (BurstCount
== NULL
|| TisReg
== NULL
) {
267 return EFI_INVALID_PARAMETER
;
273 // TIS_PC_REGISTERS_PTR->burstCount is UINT16, but it is not 2bytes aligned,
274 // so it needs to use MmioRead8 to read two times
276 DataByte0
= MmioRead8 ((UINTN
)&TisReg
->BurstCount
);
277 DataByte1
= MmioRead8 ((UINTN
)&TisReg
->BurstCount
+ 1);
278 *BurstCount
= (UINT16
)((DataByte1
<< 8) + DataByte0
);
279 if (*BurstCount
!= 0) {
282 MicroSecondDelay (30);
284 } while (WaitTime
< TIS_TIMEOUT_D
);
290 Set TPM chip to ready state by sending ready command TIS_PC_STS_READY
291 to Status Register in time.
293 @param[in] TisReg Pointer to TIS register.
295 @retval EFI_SUCCESS TPM chip enters into ready state.
296 @retval EFI_INVALID_PARAMETER TisReg is NULL.
297 @retval EFI_TIMEOUT TPM chip can't be set to ready state in time.
300 TisPcPrepareCommand (
301 IN TIS_PC_REGISTERS_PTR TisReg
306 if (TisReg
== NULL
) {
307 return EFI_INVALID_PARAMETER
;
310 MmioWrite8((UINTN
)&TisReg
->Status
, TIS_PC_STS_READY
);
311 Status
= TisPcWaitRegisterBits (
321 Get the control of TPM chip by sending requestUse command TIS_PC_ACC_RQUUSE
322 to ACCESS Register in the time of default TIS_TIMEOUT_A.
324 @param[in] TisReg Pointer to TIS register.
326 @retval EFI_SUCCESS Get the control of TPM chip.
327 @retval EFI_INVALID_PARAMETER TisReg is NULL.
328 @retval EFI_NOT_FOUND TPM chip doesn't exit.
329 @retval EFI_TIMEOUT Can't get the TPM control in time.
333 IN TIS_PC_REGISTERS_PTR TisReg
338 if (TisReg
== NULL
) {
339 return EFI_INVALID_PARAMETER
;
342 if (!TisPcPresenceCheck (TisReg
)) {
343 return EFI_NOT_FOUND
;
346 MmioWrite8((UINTN
)&TisReg
->Access
, TIS_PC_ACC_RQUUSE
);
347 Status
= TisPcWaitRegisterBits (
349 (UINT8
)(TIS_PC_ACC_ACTIVE
|TIS_PC_VALID
),
357 Send a command to TPM for execution and return response data.
359 @param[in] TisReg TPM register space base address.
360 @param[in] BufferIn Buffer for command data.
361 @param[in] SizeIn Size of command data.
362 @param[in, out] BufferOut Buffer for response data.
363 @param[in, out] SizeOut Size of response data.
365 @retval EFI_SUCCESS Operation completed successfully.
366 @retval EFI_BUFFER_TOO_SMALL Response data buffer is too small.
367 @retval EFI_DEVICE_ERROR Unexpected device behavior.
368 @retval EFI_UNSUPPORTED Unsupported TPM version
373 IN TIS_PC_REGISTERS_PTR TisReg
,
376 IN OUT UINT8
*BufferOut
,
377 IN OUT UINT32
*SizeOut
390 DEBUG ((EFI_D_INFO
, "Tpm2TisTpmCommand Send - "));
391 if (SizeIn
> 0x100) {
396 for (Index
= 0; Index
< DebugSize
; Index
++) {
397 DEBUG ((EFI_D_INFO
, "%02x ", BufferIn
[Index
]));
399 if (DebugSize
!= SizeIn
) {
400 DEBUG ((EFI_D_INFO
, "...... "));
401 for (Index
= SizeIn
- 0x20; Index
< SizeIn
; Index
++) {
402 DEBUG ((EFI_D_INFO
, "%02x ", BufferIn
[Index
]));
405 DEBUG ((EFI_D_INFO
, "\n"));
409 Status
= TisPcPrepareCommand (TisReg
);
410 if (EFI_ERROR (Status
)){
411 DEBUG ((DEBUG_ERROR
, "Tpm2 is not ready for command!\n"));
412 return EFI_DEVICE_ERROR
;
415 // Send the command data to Tpm
418 while (Index
< SizeIn
) {
419 Status
= TisPcReadBurstCount (TisReg
, &BurstCount
);
420 if (EFI_ERROR (Status
)) {
421 Status
= EFI_DEVICE_ERROR
;
424 for (; BurstCount
> 0 && Index
< SizeIn
; BurstCount
--) {
425 MmioWrite8((UINTN
)&TisReg
->DataFifo
, *(BufferIn
+ Index
));
430 // Check the Tpm status STS_EXPECT change from 1 to 0
432 Status
= TisPcWaitRegisterBits (
434 (UINT8
) TIS_PC_VALID
,
438 if (EFI_ERROR (Status
)) {
439 DEBUG ((DEBUG_ERROR
, "Tpm2 The send buffer too small!\n"));
440 Status
= EFI_BUFFER_TOO_SMALL
;
444 // Executed the TPM command and waiting for the response data ready
446 MmioWrite8((UINTN
)&TisReg
->Status
, TIS_PC_STS_GO
);
449 // NOTE: That may take many seconds to minutes for certain commands, such as key generation.
451 Status
= TisPcWaitRegisterBits (
453 (UINT8
) (TIS_PC_VALID
| TIS_PC_STS_DATA
),
457 if (EFI_ERROR (Status
)) {
458 DEBUG ((DEBUG_ERROR
, "Wait for Tpm2 response data time out!!\n"));
459 Status
= EFI_DEVICE_ERROR
;
463 // Get response data header
467 while (Index
< sizeof (TPM2_RESPONSE_HEADER
)) {
468 Status
= TisPcReadBurstCount (TisReg
, &BurstCount
);
469 if (EFI_ERROR (Status
)) {
470 Status
= EFI_DEVICE_ERROR
;
473 for (; BurstCount
> 0; BurstCount
--) {
474 *(BufferOut
+ Index
) = MmioRead8 ((UINTN
)&TisReg
->DataFifo
);
476 if (Index
== sizeof (TPM2_RESPONSE_HEADER
)) break;
480 DEBUG ((EFI_D_INFO
, "TisTpmCommand ReceiveHeader - "));
481 for (Index
= 0; Index
< sizeof (TPM2_RESPONSE_HEADER
); Index
++) {
482 DEBUG ((EFI_D_INFO
, "%02x ", BufferOut
[Index
]));
484 DEBUG ((EFI_D_INFO
, "\n"));
487 // Check the reponse data header (tag,parasize and returncode )
489 CopyMem (&Data16
, BufferOut
, sizeof (UINT16
));
490 // TPM2 should not use this RSP_COMMAND
491 if (SwapBytes16 (Data16
) == TPM_ST_RSP_COMMAND
) {
492 DEBUG ((EFI_D_ERROR
, "TPM2: TPM_ST_RSP error - %x\n", TPM_ST_RSP_COMMAND
));
493 Status
= EFI_UNSUPPORTED
;
497 CopyMem (&Data32
, (BufferOut
+ 2), sizeof (UINT32
));
498 TpmOutSize
= SwapBytes32 (Data32
);
499 if (*SizeOut
< TpmOutSize
) {
500 Status
= EFI_BUFFER_TOO_SMALL
;
503 *SizeOut
= TpmOutSize
;
505 // Continue reading the remaining data
507 while ( Index
< TpmOutSize
) {
508 for (; BurstCount
> 0; BurstCount
--) {
509 *(BufferOut
+ Index
) = MmioRead8 ((UINTN
)&TisReg
->DataFifo
);
511 if (Index
== TpmOutSize
) {
512 Status
= EFI_SUCCESS
;
516 Status
= TisPcReadBurstCount (TisReg
, &BurstCount
);
517 if (EFI_ERROR (Status
)) {
518 Status
= EFI_DEVICE_ERROR
;
524 DEBUG ((EFI_D_INFO
, "Tpm2TisTpmCommand Receive - "));
525 for (Index
= 0; Index
< TpmOutSize
; Index
++) {
526 DEBUG ((EFI_D_INFO
, "%02x ", BufferOut
[Index
]));
528 DEBUG ((EFI_D_INFO
, "\n"));
530 MmioWrite8((UINTN
)&TisReg
->Status
, TIS_PC_STS_READY
);
535 This service enables the sending of commands to the TPM2.
537 @param[in] InputParameterBlockSize Size of the TPM2 input parameter block.
538 @param[in] InputParameterBlock Pointer to the TPM2 input parameter block.
539 @param[in,out] OutputParameterBlockSize Size of the TPM2 output parameter block.
540 @param[in] OutputParameterBlock Pointer to the TPM2 output parameter block.
542 @retval EFI_SUCCESS The command byte stream was successfully sent to the device and a response was successfully received.
543 @retval EFI_DEVICE_ERROR The command was not successfully sent to the device or a response was not successfully received from the device.
544 @retval EFI_BUFFER_TOO_SMALL The output parameter block is too small.
549 IN UINT32 InputParameterBlockSize
,
550 IN UINT8
*InputParameterBlock
,
551 IN OUT UINT32
*OutputParameterBlockSize
,
552 IN UINT8
*OutputParameterBlock
555 return TisTpmCommand (
556 (TIS_PC_REGISTERS_PTR
) (UINTN
) PcdGet64 (PcdTpmBaseAddress
),
558 InputParameterBlockSize
,
559 OutputParameterBlock
,
560 OutputParameterBlockSize
565 This service requests use TPM2.
567 @retval EFI_SUCCESS Get the control of TPM2 chip.
568 @retval EFI_NOT_FOUND TPM2 not found.
569 @retval EFI_DEVICE_ERROR Unexpected device behavior.
577 return TisPcRequestUseTpm ((TIS_PC_REGISTERS_PTR
) (UINTN
) PcdGet64 (PcdTpmBaseAddress
));